From patchwork Mon Jul 31 05:37:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 708887 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA7FAC001DF for ; Mon, 31 Jul 2023 05:38:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230040AbjGaFiD (ORCPT ); Mon, 31 Jul 2023 01:38:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230042AbjGaFhy (ORCPT ); Mon, 31 Jul 2023 01:37:54 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48A81A0; Sun, 30 Jul 2023 22:37:51 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36V2O4Zo000521; Mon, 31 Jul 2023 05:37:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=w3H+w2i9i25VHAqCSTbXgTQgMD2PoTCIEA7OBbxNaTg=; b=ZffYByRMG6WWdDu5/DEKUkZgWJUMwTnrANopYOeGoruqY6YzDPj+Gqj5SitBOy1cq+EJ nwc7yiQV3XmBuTqG8L2nK3C2NYBeGIU7PRlBHyA87w4K13qoV4qwZbiKxwD6vKGW3DyC o5+ZvnCvAVNekz9vlRazSQqKgGzb9BP/0rzZdrk/6SSce6zCJYdIhqkBbRUHsnVUtFjo JSp0TkasaZZvA91iKbbk0wZMC+PSUkPWzv/C6vsXaSfp2Sp5lY8AzrO4DkuVBIsJb7Rj X89QWkUn6Vwg++Gvp2CVOaMSC7Wp1TINhW35Q4FkKYdMB0uYBbLOmYbp4BYBESXGFdcU xA== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3s4ucejqjr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 31 Jul 2023 05:37:47 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 36V5bkFe004304 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 31 Jul 2023 05:37:46 GMT Received: from fenglinw2-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Sun, 30 Jul 2023 22:37:42 -0700 From: Fenglin Wu To: , , , , , , , Konrad Dybcio , Dmitry Torokhov , CC: , , , , Subject: [PATCH v4 1/3] input: pm8xxx-vib: refactor to easily support new SPMI vibrator Date: Mon, 31 Jul 2023 13:37:06 +0800 Message-ID: <20230731053712.2220898-2-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230731053712.2220898-1-quic_fenglinw@quicinc.com> References: <20230731053712.2220898-1-quic_fenglinw@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: I3S53-mb7CU4_x2A-fCm5OwonAcuLMsb X-Proofpoint-ORIG-GUID: I3S53-mb7CU4_x2A-fCm5OwonAcuLMsb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-27_10,2023-07-26_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 spamscore=0 phishscore=0 suspectscore=0 impostorscore=0 malwarescore=0 adultscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2307310050 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently, all vibrator control register addresses are hard coded, including the base address and the offset, it's not flexible to support new SPMI vibrator module which is usually included in different PMICs with different base address. Refactor this by defining register offset with HW type combination, and register base address which is defined in 'reg' property is added for SPMI vibrators. Signed-off-by: Fenglin Wu --- drivers/input/misc/pm8xxx-vibrator.c | 122 ++++++++++++++++----------- 1 file changed, 73 insertions(+), 49 deletions(-) diff --git a/drivers/input/misc/pm8xxx-vibrator.c b/drivers/input/misc/pm8xxx-vibrator.c index 04cb87efd799..d6b468324c77 100644 --- a/drivers/input/misc/pm8xxx-vibrator.c +++ b/drivers/input/misc/pm8xxx-vibrator.c @@ -12,36 +12,44 @@ #include #include +#define SSBL_VIB_DRV_REG 0x4A +#define SSBI_VIB_DRV_EN_MANUAL_MASK GENMASK(7, 2) +#define SSBI_VIB_DRV_LEVEL_MASK GENMASK(7, 3) +#define SSBI_VIB_DRV_SHIFT 3 + +#define SPMI_VIB_DRV_REG 0x41 +#define SPMI_VIB_DRV_LEVEL_MASK GENMASK(4, 0) +#define SPMI_VIB_DRV_SHIFT 0 + +#define SPMI_VIB_EN_REG 0x46 +#define SPMI_VIB_EN_BIT BIT(7) + #define VIB_MAX_LEVEL_mV (3100) #define VIB_MIN_LEVEL_mV (1200) #define VIB_MAX_LEVELS (VIB_MAX_LEVEL_mV - VIB_MIN_LEVEL_mV) #define MAX_FF_SPEED 0xff -struct pm8xxx_regs { - unsigned int enable_addr; - unsigned int enable_mask; +enum vib_hw_type { + SSBI_VIB, + SPMI_VIB, +}; - unsigned int drv_addr; - unsigned int drv_mask; - unsigned int drv_shift; - unsigned int drv_en_manual_mask; +struct pm8xxx_vib_data { + enum vib_hw_type hw_type; + unsigned int enable_addr; + unsigned int drv_addr; }; -static const struct pm8xxx_regs pm8058_regs = { - .drv_addr = 0x4A, - .drv_mask = 0xf8, - .drv_shift = 3, - .drv_en_manual_mask = 0xfc, +static const struct pm8xxx_vib_data ssbi_vib_data = { + .hw_type = SSBI_VIB, + .drv_addr = SSBL_VIB_DRV_REG, }; -static struct pm8xxx_regs pm8916_regs = { - .enable_addr = 0xc046, - .enable_mask = BIT(7), - .drv_addr = 0xc041, - .drv_mask = 0x1F, - .drv_shift = 0, - .drv_en_manual_mask = 0, +static const struct pm8xxx_vib_data spmi_vib_data = { + .hw_type = SPMI_VIB, + .enable_addr = SPMI_VIB_EN_REG, + .drv_addr = SPMI_VIB_DRV_REG, }; /** @@ -49,7 +57,8 @@ static struct pm8xxx_regs pm8916_regs = { * @vib_input_dev: input device supporting force feedback * @work: work structure to set the vibration parameters * @regmap: regmap for register read/write - * @regs: registers' info + * @data: vibrator HW info + * @reg_base: the register base of the module * @speed: speed of vibration set from userland * @active: state of vibrator * @level: level of vibration to set in the chip @@ -59,7 +68,8 @@ struct pm8xxx_vib { struct input_dev *vib_input_dev; struct work_struct work; struct regmap *regmap; - const struct pm8xxx_regs *regs; + const struct pm8xxx_vib_data *data; + unsigned int reg_base; int speed; int level; bool active; @@ -75,24 +85,31 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) { int rc; unsigned int val = vib->reg_vib_drv; - const struct pm8xxx_regs *regs = vib->regs; + u32 mask = SPMI_VIB_DRV_LEVEL_MASK; + u32 shift = SPMI_VIB_DRV_SHIFT; + + if (vib->data->hw_type == SSBI_VIB) { + mask = SSBI_VIB_DRV_LEVEL_MASK; + shift = SSBI_VIB_DRV_SHIFT; + } if (on) - val |= (vib->level << regs->drv_shift) & regs->drv_mask; + val |= (vib->level << shift) & mask; else - val &= ~regs->drv_mask; + val &= ~mask; - rc = regmap_write(vib->regmap, regs->drv_addr, val); + rc = regmap_update_bits(vib->regmap, vib->reg_base + vib->data->drv_addr, mask, val); if (rc < 0) return rc; vib->reg_vib_drv = val; - if (regs->enable_mask) - rc = regmap_update_bits(vib->regmap, regs->enable_addr, - regs->enable_mask, on ? ~0 : 0); + if (vib->data->hw_type == SSBI_VIB) + return 0; - return rc; + mask = SPMI_VIB_EN_BIT; + val = on ? SPMI_VIB_EN_BIT : 0; + return regmap_update_bits(vib->regmap, vib->reg_base + vib->data->enable_addr, mask, val); } /** @@ -102,13 +119,6 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) static void pm8xxx_work_handler(struct work_struct *work) { struct pm8xxx_vib *vib = container_of(work, struct pm8xxx_vib, work); - const struct pm8xxx_regs *regs = vib->regs; - int rc; - unsigned int val; - - rc = regmap_read(vib->regmap, regs->drv_addr, &val); - if (rc < 0) - return; /* * pmic vibrator supports voltage ranges from 1.2 to 3.1V, so @@ -168,9 +178,9 @@ static int pm8xxx_vib_probe(struct platform_device *pdev) { struct pm8xxx_vib *vib; struct input_dev *input_dev; + const struct pm8xxx_vib_data *data; int error; - unsigned int val; - const struct pm8xxx_regs *regs; + unsigned int val, reg_base; vib = devm_kzalloc(&pdev->dev, sizeof(*vib), GFP_KERNEL); if (!vib) @@ -187,19 +197,33 @@ static int pm8xxx_vib_probe(struct platform_device *pdev) INIT_WORK(&vib->work, pm8xxx_work_handler); vib->vib_input_dev = input_dev; - regs = of_device_get_match_data(&pdev->dev); + data = of_device_get_match_data(&pdev->dev); + if (!data) + return -EINVAL; - /* operate in manual mode */ - error = regmap_read(vib->regmap, regs->drv_addr, &val); - if (error < 0) - return error; + if (data->hw_type != SSBI_VIB) { + error = fwnode_property_read_u32(pdev->dev.fwnode, "reg", ®_base); + if (error < 0) { + dev_err(&pdev->dev, "Failed to read reg address, rc=%d\n", error); + return error; + } + + vib->reg_base += reg_base; + } - val &= regs->drv_en_manual_mask; - error = regmap_write(vib->regmap, regs->drv_addr, val); + error = regmap_read(vib->regmap, vib->reg_base + data->drv_addr, &val); if (error < 0) return error; - vib->regs = regs; + /* operate in manual mode */ + if (data->hw_type == SSBI_VIB) { + val &= SSBI_VIB_DRV_EN_MANUAL_MASK; + error = regmap_write(vib->regmap, vib->reg_base + data->drv_addr, val); + if (error < 0) + return error; + } + + vib->data = data; vib->reg_vib_drv = val; input_dev->name = "pm8xxx_vib_ffmemless"; @@ -239,9 +263,9 @@ static int pm8xxx_vib_suspend(struct device *dev) static DEFINE_SIMPLE_DEV_PM_OPS(pm8xxx_vib_pm_ops, pm8xxx_vib_suspend, NULL); static const struct of_device_id pm8xxx_vib_id_table[] = { - { .compatible = "qcom,pm8058-vib", .data = &pm8058_regs }, - { .compatible = "qcom,pm8921-vib", .data = &pm8058_regs }, - { .compatible = "qcom,pm8916-vib", .data = &pm8916_regs }, + { .compatible = "qcom,pm8058-vib", .data = &ssbi_vib_data }, + { .compatible = "qcom,pm8921-vib", .data = &ssbi_vib_data }, + { .compatible = "qcom,pm8916-vib", .data = &spmi_vib_data }, { } }; MODULE_DEVICE_TABLE(of, pm8xxx_vib_id_table); From patchwork Mon Jul 31 05:37:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 708500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E779C001DF for ; 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Sun, 30 Jul 2023 22:37:46 -0700 From: Fenglin Wu To: , , , , , , , Konrad Dybcio , Dmitry Torokhov , , CC: , , , , Subject: [PATCH v4 2/3] dt-bindings: input: qcom,pm8xxx-vib: add new SPMI vibrator module Date: Mon, 31 Jul 2023 13:37:07 +0800 Message-ID: <20230731053712.2220898-3-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230731053712.2220898-1-quic_fenglinw@quicinc.com> References: <20230731053712.2220898-1-quic_fenglinw@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Zc17qifmR0Wp9d3ROZ9ze16mOmEj72YB X-Proofpoint-GUID: Zc17qifmR0Wp9d3ROZ9ze16mOmEj72YB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-27_10,2023-07-26_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 priorityscore=1501 mlxlogscore=999 suspectscore=0 spamscore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 impostorscore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2307310050 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add compatible string 'qcom,spmi-vib-gen2' to support vibrator module inside PMI632, PMI7250B, PM7325B, PM7550BA. Signed-off-by: Fenglin Wu Acked-by: Rob Herring --- .../bindings/input/qcom,pm8xxx-vib.yaml | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml index c8832cd0d7da..4a2319fc1e3f 100644 --- a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml +++ b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml @@ -11,10 +11,18 @@ maintainers: properties: compatible: - enum: - - qcom,pm8058-vib - - qcom,pm8916-vib - - qcom,pm8921-vib + oneOf: + - enum: + - qcom,pm8058-vib + - qcom,pm8916-vib + - qcom,pm8921-vib + - items: + - enum: + - qcom,pmi632-vib + - qcom,pm7250b-vib + - qcom,pm7325b-vib + - qcom,pm7550b-vib + - const: qcom,spmi-vib-gen2 reg: maxItems: 1 From patchwork Mon Jul 31 05:37:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 708886 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8D8BC04E69 for ; Mon, 31 Jul 2023 05:38:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230029AbjGaFiS (ORCPT ); Mon, 31 Jul 2023 01:38:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230041AbjGaFiK (ORCPT ); Mon, 31 Jul 2023 01:38:10 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9750C1712; Sun, 30 Jul 2023 22:37:59 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36V4ZxHK011198; Mon, 31 Jul 2023 05:37:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=8UCvBdezWOgpOB3GiCUuatshhW0I7+hNLdh7kxurs+U=; b=gkcGyks/sxKIoud6Ek0W/SF/x7R4cs26S8FQgtuSrbTFEmCaiLmPeAv+eYetcQxII8Ad 68KJG0l1EeUtseR5xP4ULy/H3e6lhQ69gY60XKwPq6pa70qvYheLccyJh8r6LbpxqDbD enL5JSIfQJatgyDEq1sxOfkSF1m8saEXSi0ap59ChsvP42TUfVj26oqNp/BAUPc5HzCc /OMnu7Bm1gjo7wiGrVOVnecIB5C0M6MrVTh+0Mxd2TVkbX2x3EDxtt3p4ZaL9zAhsa/M pM4sMe3d3ZZj7eURbMfBrH52RwxFaGE2+SFYU4oU2sb7xovrat8zwMAtLYjHm5mgIU0F yw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3s4ug22psu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 31 Jul 2023 05:37:55 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 36V5bsNC017074 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 31 Jul 2023 05:37:54 GMT Received: from fenglinw2-gv.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Sun, 30 Jul 2023 22:37:50 -0700 From: Fenglin Wu To: , , , , , , , Konrad Dybcio , Dmitry Torokhov , CC: , , , , Subject: [PATCH v4 3/3] input: pm8xxx-vibrator: add new SPMI vibrator support Date: Mon, 31 Jul 2023 13:37:08 +0800 Message-ID: <20230731053712.2220898-4-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230731053712.2220898-1-quic_fenglinw@quicinc.com> References: <20230731053712.2220898-1-quic_fenglinw@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: zxs8hqQFQ9J1X0X9hl5r7X1chhymmn6F X-Proofpoint-ORIG-GUID: zxs8hqQFQ9J1X0X9hl5r7X1chhymmn6F X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-27_10,2023-07-26_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 mlxlogscore=999 phishscore=0 bulkscore=0 clxscore=1015 mlxscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2307310050 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add new SPMI vibrator module which is very similar to the SPMI vibrator module inside PM8916 but just has a finer drive voltage step (1mV vs 100mV) hence its drive level control is expanded to across 2 registers. Name the module as 'qcom,spmi-vib-gen2', and it can be found in following Qualcomm PMICs: PMI632, PM7250B, PM7325B, PM7550BA. Signed-off-by: Fenglin Wu --- drivers/input/misc/pm8xxx-vibrator.c | 55 +++++++++++++++++++++++++--- 1 file changed, 50 insertions(+), 5 deletions(-) diff --git a/drivers/input/misc/pm8xxx-vibrator.c b/drivers/input/misc/pm8xxx-vibrator.c index d6b468324c77..9cfd3dec5366 100644 --- a/drivers/input/misc/pm8xxx-vibrator.c +++ b/drivers/input/misc/pm8xxx-vibrator.c @@ -21,6 +21,13 @@ #define SPMI_VIB_DRV_LEVEL_MASK GENMASK(4, 0) #define SPMI_VIB_DRV_SHIFT 0 +#define SPMI_VIB_GEN2_DRV_REG 0x40 +#define SPMI_VIB_GEN2_DRV_MASK GENMASK(7, 0) +#define SPMI_VIB_GEN2_DRV_SHIFT 0 +#define SPMI_VIB_GEN2_DRV2_REG 0x41 +#define SPMI_VIB_GEN2_DRV2_MASK GENMASK(3, 0) +#define SPMI_VIB_GEN2_DRV2_SHIFT 8 + #define SPMI_VIB_EN_REG 0x46 #define SPMI_VIB_EN_BIT BIT(7) @@ -33,12 +40,14 @@ enum vib_hw_type { SSBI_VIB, SPMI_VIB, + SPMI_VIB_GEN2 }; struct pm8xxx_vib_data { enum vib_hw_type hw_type; unsigned int enable_addr; unsigned int drv_addr; + unsigned int drv2_addr; }; static const struct pm8xxx_vib_data ssbi_vib_data = { @@ -52,6 +61,13 @@ static const struct pm8xxx_vib_data spmi_vib_data = { .drv_addr = SPMI_VIB_DRV_REG, }; +static const struct pm8xxx_vib_data spmi_vib_gen2_data = { + .hw_type = SPMI_VIB_GEN2, + .enable_addr = SPMI_VIB_EN_REG, + .drv_addr = SPMI_VIB_GEN2_DRV_REG, + .drv2_addr = SPMI_VIB_GEN2_DRV2_REG, +}; + /** * struct pm8xxx_vib - structure to hold vibrator data * @vib_input_dev: input device supporting force feedback @@ -85,12 +101,24 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) { int rc; unsigned int val = vib->reg_vib_drv; - u32 mask = SPMI_VIB_DRV_LEVEL_MASK; - u32 shift = SPMI_VIB_DRV_SHIFT; + u32 mask, shift; - if (vib->data->hw_type == SSBI_VIB) { + + switch (vib->data->hw_type) { + case SSBI_VIB: mask = SSBI_VIB_DRV_LEVEL_MASK; shift = SSBI_VIB_DRV_SHIFT; + break; + case SPMI_VIB: + mask = SPMI_VIB_DRV_LEVEL_MASK; + shift = SPMI_VIB_DRV_SHIFT; + break; + case SPMI_VIB_GEN2: + mask = SPMI_VIB_GEN2_DRV_MASK; + shift = SPMI_VIB_GEN2_DRV_SHIFT; + break; + default: + return -EINVAL; } if (on) @@ -104,6 +132,19 @@ static int pm8xxx_vib_set(struct pm8xxx_vib *vib, bool on) vib->reg_vib_drv = val; + if (vib->data->hw_type == SPMI_VIB_GEN2) { + mask = SPMI_VIB_GEN2_DRV2_MASK; + shift = SPMI_VIB_GEN2_DRV2_SHIFT; + if (on) + val = (vib->level >> shift) & mask; + else + val = 0; + rc = regmap_update_bits(vib->regmap, + vib->reg_base + vib->data->drv2_addr, mask, val); + if (rc < 0) + return rc; + } + if (vib->data->hw_type == SSBI_VIB) return 0; @@ -128,10 +169,13 @@ static void pm8xxx_work_handler(struct work_struct *work) vib->active = true; vib->level = ((VIB_MAX_LEVELS * vib->speed) / MAX_FF_SPEED) + VIB_MIN_LEVEL_mV; - vib->level /= 100; + if (vib->data->hw_type != SPMI_VIB_GEN2) + vib->level /= 100; } else { vib->active = false; - vib->level = VIB_MIN_LEVEL_mV / 100; + vib->level = VIB_MIN_LEVEL_mV; + if (vib->data->hw_type != SPMI_VIB_GEN2) + vib->level /= 100; } pm8xxx_vib_set(vib, vib->active); @@ -266,6 +310,7 @@ static const struct of_device_id pm8xxx_vib_id_table[] = { { .compatible = "qcom,pm8058-vib", .data = &ssbi_vib_data }, { .compatible = "qcom,pm8921-vib", .data = &ssbi_vib_data }, { .compatible = "qcom,pm8916-vib", .data = &spmi_vib_data }, + { .compatible = "qcom,spmi-vib-gen2", .data = &spmi_vib_gen2_data }, { } }; MODULE_DEVICE_TABLE(of, pm8xxx_vib_id_table);