From patchwork Mon Jul 24 21:42:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 705841 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF7A9EB64DD for ; Mon, 24 Jul 2023 21:42:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229980AbjGXVmw (ORCPT ); Mon, 24 Jul 2023 17:42:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229541AbjGXVmv (ORCPT ); Mon, 24 Jul 2023 17:42:51 -0400 Received: from mail-yw1-x1136.google.com (mail-yw1-x1136.google.com [IPv6:2607:f8b0:4864:20::1136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D72DE9; Mon, 24 Jul 2023 14:42:50 -0700 (PDT) Received: by mail-yw1-x1136.google.com with SMTP id 00721157ae682-583b3939521so33485707b3.0; Mon, 24 Jul 2023 14:42:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690234969; x=1690839769; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3/5RSV3Hpiy5sXwWx6A0fKzeyTBqVKJN6USvmb47CSg=; b=Zm+zpYspmqeXwh/gjrvM09jtRt+3z9Y7oB9Bp4uystRgukAHbj0bNNs+R0vtV9AK2u gMsoiXOipLp8v5WpRxih80AiVbu686b/8lQZMdg1nlk27COIRnLdcMxMpQzARKzBiTRI R8vD26HKA7sXwPfnznwu9yJiIVLnMFZNtfh/HswJqZTMAH/OKBiC79Zn3UvQOoAqdQN6 suk1RerZebnGzZk/X+kgcPqbYbIqB2FiIDznYlR0mq7tcyINWujbbkWZvkVMoiW7Snin ZxJwONs+EUvkPzwXtztElcwNNH9nLvQeWXtW8yxxK17cZLstPnQi7Ib3cFiwCyyUzSia uz8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690234969; x=1690839769; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3/5RSV3Hpiy5sXwWx6A0fKzeyTBqVKJN6USvmb47CSg=; b=JI6XGSIxi5vA1rtGeHj+C2nEa/Y8Bi9y0DhjR3LOUpLWiKNcLNPyYY9ZTE5DMALSR3 S24/qvZHec2fhZRJBHBHIeXk0xR8+dRrBxhX4boYYoMz4Ne13bmAJ4ylMmBTZQ/tKpjR RZCIdEJVbDTNeewMA0GDDPZ9SQEAIU30rUyhH7/syZJcQZylgCnk4k5KXB8yjWjzZUpg a0jGj6esFJ3ASYkeKTN6IpUWxomIYqZ+G5LZdwKaYHixWTRpWOa8dJqyygvt8nVTby0P +WnZ12VWFpZCtG+L+dMT7hCkbSbK0u/JB3n0SfzvyqgZuJHIhcL+wPRmDmOMzD45TDsV PaFA== X-Gm-Message-State: ABy/qLaC2c9sT8jd3H56HQMbJUf1hH/dQxV2fHZq7KnJLubS49U/E3gn 0muYmBoA9OWEuIPLq927zOlSSK1KJmNd5w== X-Google-Smtp-Source: APBJJlE/44Xe2sC05Lzvpj2tRArBipfQPmzsmlgMMUojFub3azhEFYdXQ9VQmxwUDHk5DaUJyHZxNQ== X-Received: by 2002:a81:4e08:0:b0:583:3c7e:7749 with SMTP id c8-20020a814e08000000b005833c7e7749mr7913534ywb.41.1690234969425; Mon, 24 Jul 2023 14:42:49 -0700 (PDT) Received: from localhost ([2607:fea8:529e:7800::3cbb]) by smtp.gmail.com with ESMTPSA id x206-20020a8163d7000000b0056dfbc37d9fsm3118624ywb.50.2023.07.24.14.42.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jul 2023 14:42:48 -0700 (PDT) From: Richard Acayan To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Cc: Richard Acayan Subject: [PATCH 1/4] dt-bindings: interconnect: add SDM670 OSM L3 compatible Date: Mon, 24 Jul 2023 17:42:11 -0400 Message-ID: <20230724214209.208699-7-mailingradian@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230724214209.208699-6-mailingradian@gmail.com> References: <20230724214209.208699-6-mailingradian@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the compatible for the OSM L3 interconnect used in the Snapdragon 670. Signed-off-by: Richard Acayan --- Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 9d0a98d77ae9..21dae0b92819 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -21,6 +21,7 @@ properties: - enum: - qcom,sc7180-osm-l3 - qcom,sc8180x-osm-l3 + - qcom,sdm670-osm-l3 - qcom,sdm845-osm-l3 - qcom,sm6350-osm-l3 - qcom,sm8150-osm-l3 From patchwork Mon Jul 24 21:42:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 705840 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1298C001E0 for ; Mon, 24 Jul 2023 21:43:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231304AbjGXVnH (ORCPT ); Mon, 24 Jul 2023 17:43:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231287AbjGXVmx (ORCPT ); Mon, 24 Jul 2023 17:42:53 -0400 Received: from mail-yw1-x112e.google.com (mail-yw1-x112e.google.com [IPv6:2607:f8b0:4864:20::112e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 582F511F; Mon, 24 Jul 2023 14:42:52 -0700 (PDT) Received: by mail-yw1-x112e.google.com with SMTP id 00721157ae682-583f99641adso15854037b3.2; Mon, 24 Jul 2023 14:42:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690234971; x=1690839771; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZqsP4uN6ZTppOmII0KV9Wnz7n7beM5l3mioJmObzpWE=; b=nz2gxsklnibcRhXiYe2SIm2dWVOx4+Kui6CAk3JHo/cjL7dPG/nvlvKETGF72Qwm6u 5XUVpNt9P/A3lpmLmTUqrm8UXtyLOKxhqzLoqN2Dvcycpu36LgpaYSRH6OPNk7kI87+X 94u8NDBS8HsVJLV4JsjEWsCQW7OgeRkZV80fleQJJJqF1qmA66ezf9oxy7Xh9QyHx3OA Dgi13VZolAaRJNZWqRHa0/LIn5OOVxjRvyea2L44WjeekIpkl532VZUz/RP2k+oDj/SF +L87RiWuwi97aLGnqaY6dsx3VijqsA8YgHdtX+XZ+qz3Hh8ckKvunZE8+yeOgevpirlt nFcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690234971; x=1690839771; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZqsP4uN6ZTppOmII0KV9Wnz7n7beM5l3mioJmObzpWE=; b=cue5aaLwLsvbJMsnRBvGkbf1FTp3hTAh4J2rMz75CcRmy0AD1YWaieGzm2emOtBTXh Ig7LPRn4N3hc2QM1cs0ujfZtl1Oeq+EtaBqVrBYLhWRVMgEfas6tnPaaGbBb4rq/4kK/ ODd1CRz6LcZ7nVo8eyX+l3gMkQ0a+fWbqwm5z6+amMPx8rjExPHdOhRqS0KYfRho/M/z TGF6dxhyweQ0lDyKXQeANqwUCfXF8iIVgvtsSjFE3UMRK4M9CkPQwCQTPDzIZ6EpwyiN dKOj4I7xWeFwa4oL0uQ6cjHQh6BFq0qJUjHQtseYppYZZz1X7DEpOIqmuhrwdHrm0ezf TosA== X-Gm-Message-State: ABy/qLYaSpTzSoOrO0IfgPiekR0x3HbYrQ7YWxAkl/JxwGFXhCNNU3xp cuU4FOUQY5EZKLhPAGFBR+g= X-Google-Smtp-Source: APBJJlE+QK9sxQeEmBCQPmbp/Ks0oMVcLCkEbuUE0uLKCm27z88QxGPXcrs36hCenCrU2o8tZZWNAw== X-Received: by 2002:a81:4fd6:0:b0:583:741c:5fe6 with SMTP id d205-20020a814fd6000000b00583741c5fe6mr5630219ywb.52.1690234971245; Mon, 24 Jul 2023 14:42:51 -0700 (PDT) Received: from localhost ([2607:fea8:529e:7800::3cbb]) by smtp.gmail.com with ESMTPSA id h198-20020a816ccf000000b005773ca61111sm2113827ywc.42.2023.07.24.14.42.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jul 2023 14:42:50 -0700 (PDT) From: Richard Acayan To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Cc: Richard Acayan Subject: [PATCH 2/4] arm64: dts: qcom: sdm670: add osm l3 Date: Mon, 24 Jul 2023 17:42:12 -0400 Message-ID: <20230724214209.208699-8-mailingradian@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230724214209.208699-6-mailingradian@gmail.com> References: <20230724214209.208699-6-mailingradian@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the interconnect node for L3 cache on SDM670. Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index a1c207c0266d..45f9633d2d2c 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1354,5 +1354,15 @@ intc: interrupt-controller@17a00000 { interrupts = ; #interrupt-cells = <3>; }; + + osm_l3: interconnect@17d41000 { + compatible = "qcom,sdm670-osm-l3", "qcom,osm-l3"; + reg = <0 0x17d41000 0 0x1400>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; }; }; From patchwork Mon Jul 24 21:42:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 706405 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4891EC04FDF for ; Mon, 24 Jul 2023 21:43:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231287AbjGXVnH (ORCPT ); Mon, 24 Jul 2023 17:43:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231315AbjGXVm4 (ORCPT ); Mon, 24 Jul 2023 17:42:56 -0400 Received: from mail-yw1-x112c.google.com (mail-yw1-x112c.google.com [IPv6:2607:f8b0:4864:20::112c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07ECB122; Mon, 24 Jul 2023 14:42:54 -0700 (PDT) Received: by mail-yw1-x112c.google.com with SMTP id 00721157ae682-583e91891aeso21886407b3.1; Mon, 24 Jul 2023 14:42:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690234973; x=1690839773; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ngiLZG73zdZJGD5Bsu6BbcrxMVGagfGuOIrnngJsOqE=; b=P+g7dL9lAYTRtjnEfSydRhfujHNt5e0WHo1OiYLat1ma91WTlmOQlrP4oHt9rMhJ92 zFtm36ern/Egr91P0tOzoMLXe1hCJuS7ABdPnTcWUPFy4ZP1rLlkZP0uPNAJy6PEpsbp IQ27LwdLW6QUplgvJ448xzAB8VJ+Y3/n4Zd0GZe2C+CHt3s3x4WBwlivEVeq3m2ORXnO dwHItd++kA4n+zwVpUzmXRtf+CDFZinF936KbLL0mm/5JLeNB+jYuUIrL5AqBLbcIQ33 HT6qClujUzALQMI2MTVQ3X8cFSBQnuiwMdZvM6oADFNqIHohBXXQDJ9vZYeuoiSB1CPW Q/oQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690234973; x=1690839773; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ngiLZG73zdZJGD5Bsu6BbcrxMVGagfGuOIrnngJsOqE=; b=NS+SUn0nKJ4g9mHfffvfYwHJRlRMu60UiWEB7+ACWP453HLdkNaxap8V3VcoxV+FCQ q7I3tDPeppHc4g0ir8svLTSLZNlCBGOBR+yEnczfPqRp+tJcUIBBHhpsme5JrwYsIOgd eaKKnQf88ebdDFuFdh8abp+Ty+gsMb9olq9wi96HYSeKy2G00J5oDaA0UAjAkH1Tl4DN 26EcFZa9IsR2qHxH/NhLx4KwEUbfyPuigBtpFKCwBgs352iBCN6+DwsRgtaDQnpiz1e6 qi9Cf+L5KHRLEUN5DaTPb8G9vD4xHaLtOxGTqWwE24DLnxrgeJQ5H9PCKRbrHpFWLRfV RHrw== X-Gm-Message-State: ABy/qLYqgD32W5QGOdP1kzAstJ8lHzAHPcqdDeySbEXsRJLwe+/V5Xp7 yv4uuNV1U1LR4eV/QaLg5peP+CfAk55tzA== X-Google-Smtp-Source: APBJJlEVNwW9WdKbiE+69ffJnYJ+9V26rxlHtUbAt5CuaU/t3rjY6PpvCooDY4Tw7EpxKhkdXrCCew== X-Received: by 2002:a81:66c4:0:b0:568:d63e:dd2c with SMTP id a187-20020a8166c4000000b00568d63edd2cmr9626068ywc.11.1690234973112; Mon, 24 Jul 2023 14:42:53 -0700 (PDT) Received: from localhost ([2607:fea8:529e:7800::3cbb]) by smtp.gmail.com with ESMTPSA id q187-20020a8175c4000000b0058390181d16sm2698538ywc.30.2023.07.24.14.42.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jul 2023 14:42:52 -0700 (PDT) From: Richard Acayan To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Cc: Richard Acayan Subject: [PATCH 3/4] arm64: dts: qcom: sdm670: add cpu frequency scaling Date: Mon, 24 Jul 2023 17:42:13 -0400 Message-ID: <20230724214209.208699-9-mailingradian@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230724214209.208699-6-mailingradian@gmail.com> References: <20230724214209.208699-6-mailingradian@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add CPU frequency scaling and the operating performance points for the CPUs. Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 168 +++++++++++++++++++++++++++ 1 file changed, 168 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 45f9633d2d2c..d013d0279dc9 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -35,6 +36,10 @@ CPU0: cpu@0 { compatible = "qcom,kryo360"; reg = <0x0 0x0>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD0>; power-domain-names = "psci"; next-level-cache = <&L2_0>; @@ -56,6 +61,10 @@ CPU1: cpu@100 { compatible = "qcom,kryo360"; reg = <0x0 0x100>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD1>; power-domain-names = "psci"; next-level-cache = <&L2_100>; @@ -72,6 +81,10 @@ CPU2: cpu@200 { compatible = "qcom,kryo360"; reg = <0x0 0x200>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD2>; power-domain-names = "psci"; next-level-cache = <&L2_200>; @@ -88,6 +101,10 @@ CPU3: cpu@300 { compatible = "qcom,kryo360"; reg = <0x0 0x300>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD3>; power-domain-names = "psci"; next-level-cache = <&L2_300>; @@ -104,6 +121,10 @@ CPU4: cpu@400 { compatible = "qcom,kryo360"; reg = <0x0 0x400>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD4>; power-domain-names = "psci"; next-level-cache = <&L2_400>; @@ -120,6 +141,10 @@ CPU5: cpu@500 { compatible = "qcom,kryo360"; reg = <0x0 0x500>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD5>; power-domain-names = "psci"; next-level-cache = <&L2_500>; @@ -136,6 +161,10 @@ CPU6: cpu@600 { compatible = "qcom,kryo360"; reg = <0x0 0x600>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu6_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD6>; power-domain-names = "psci"; next-level-cache = <&L2_600>; @@ -152,6 +181,10 @@ CPU7: cpu@700 { compatible = "qcom,kryo360"; reg = <0x0 0x700>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu6_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD7>; power-domain-names = "psci"; next-level-cache = <&L2_700>; @@ -246,6 +279,130 @@ memory@80000000 { reg = <0x0 0x80000000 0x0 0x0>; }; + cpu0_opp_table: opp-table-cpu0 { + compatible = "operating-points-v2"; + opp-shared; + + // 576 mV + cpu0_opp1: opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-peak-kBps = <400000 4800000>; + }; + + // 576 mV + cpu0_opp2: opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + opp-peak-kBps = <400000 4800000>; + }; + + // 576 mV + cpu0_opp3: opp-748800000 { + opp-hz = /bits/ 64 <748800000>; + opp-peak-kBps = <1200000 4800000>; + }; + + // 636 mV + cpu0_opp4: opp-998400000 { + opp-hz = /bits/ 64 <998400000>; + opp-peak-kBps = <1804000 8908800>; + }; + + // 672 mV + cpu0_opp5: opp-1209600000 { + opp-hz = /bits/ 64 <1209600000>; + opp-peak-kBps = <2188000 8908800>; + }; + + // 688 mV + cpu0_opp6: opp-1324800000 { + opp-hz = /bits/ 64 <1324800000>; + opp-peak-kBps = <2188000 13516800>; + }; + + // 716 mV + cpu0_opp7: opp-1516800000 { + opp-hz = /bits/ 64 <1516800000>; + opp-peak-kBps = <3072000 15052800>; + }; + + // 740 mV + cpu0_opp8: opp-1612800000 { + opp-hz = /bits/ 64 <1612800000>; + opp-peak-kBps = <3072000 22118400>; + }; + + // 772 mV + cpu0_opp9: opp-1708800000 { + opp-hz = /bits/ 64 <1708800000>; + opp-peak-kBps = <4068000 23040000>; + }; + }; + + cpu6_opp_table: opp-table-cpu6 { + compatible = "operating-points-v2"; + opp-shared; + + // 584 mV + cpu6_opp1: opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-peak-kBps = <400000 4800000>; + }; + + // 584 mV + cpu6_opp2: opp-652800000 { + opp-hz = /bits/ 64 <652800000>; + opp-peak-kBps = <400000 4800000>; + }; + + // 584 mV + cpu6_opp3: opp-825600000 { + opp-hz = /bits/ 64 <825600000>; + opp-peak-kBps = <1200000 4800000>; + }; + + // 616 mV + cpu6_opp4: opp-979200000 { + opp-hz = /bits/ 64 <979200000>; + opp-peak-kBps = <1200000 4800000>; + }; + + // 648 mV + cpu6_opp5: opp-1132800000 { + opp-hz = /bits/ 64 <1132800000>; + opp-peak-kBps = <2188000 8908800>; + }; + + // 680 mV + cpu6_opp6: opp-1363200000 { + opp-hz = /bits/ 64 <1363200000>; + opp-peak-kBps = <4068000 12902400>; + }; + + // 720 mV + cpu6_opp7: opp-1536000000 { + opp-hz = /bits/ 64 <1536000000>; + opp-peak-kBps = <4068000 12902400>; + }; + + // 768 mV + cpu6_opp8: opp-1747200000 { + opp-hz = /bits/ 64 <1747200000>; + opp-peak-kBps = <4068000 15052800>; + }; + + // 776 mV + cpu6_opp9: opp-1843200000 { + opp-hz = /bits/ 64 <1843200000>; + opp-peak-kBps = <4068000 15052800>; + }; + + // 816 mV + cpu6_opp10: opp-1996800000 { + opp-hz = /bits/ 64 <1996800000>; + opp-peak-kBps = <6220000 19046400>; + }; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -1364,5 +1521,16 @@ osm_l3: interconnect@17d41000 { #interconnect-cells = <1>; }; + + cpufreq_hw: cpufreq@17d43000 { + compatible = "qcom,cpufreq-hw"; + reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>; + reg-names = "freq-domain0", "freq-domain1"; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #freq-domain-cells = <1>; + }; }; }; From patchwork Mon Jul 24 21:42:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 706406 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B6B5C001B0 for ; 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Mon, 24 Jul 2023 14:42:54 -0700 (PDT) Received: from localhost ([2607:fea8:529e:7800::3cbb]) by smtp.gmail.com with ESMTPSA id e11-20020a81690b000000b00583803487ccsm3099267ywc.122.2023.07.24.14.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jul 2023 14:42:54 -0700 (PDT) From: Richard Acayan To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Cc: Richard Acayan Subject: [PATCH 4/4] arm64: dts: qcom: sdm670: add frequency profile Date: Mon, 24 Jul 2023 17:42:14 -0400 Message-ID: <20230724214209.208699-10-mailingradian@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230724214209.208699-6-mailingradian@gmail.com> References: <20230724214209.208699-6-mailingradian@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the coefficients for the CPU frequencies to aid in frequency scaling. Profiling setup: - freqbench (https://github.com/kdrag0n/freqbench) - LineageOS kernel, android_kernel_google_msm-4.9 - recommended configuration options by freqbench - disabled options that require clang or 32-bit compilers - mmc governor switched from simple_ondemand to powersave Frequency domains: cpu1 cpu6 Offline CPUs: cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 Sampling power every 1000 ms Baseline power usage: 445 mW ===== CPU 1 ===== Frequencies: 300 576 748 998 1209 1324 1516 1612 1708 300: 1114 3.7 C/MHz 43 mW 11.6 J 25.8 I/mJ 269.4 s 576: 2138 3.7 C/MHz 51 mW 7.1 J 42.2 I/mJ 140.3 s 748: 2780 3.7 C/MHz 67 mW 7.3 J 41.3 I/mJ 107.9 s 998: 3706 3.7 C/MHz 73 mW 5.9 J 51.1 I/mJ 80.9 s 1209: 4490 3.7 C/MHz 86 mW 5.7 J 52.2 I/mJ 66.8 s 1324: 4918 3.7 C/MHz 90 mW 5.5 J 54.6 I/mJ 61.0 s 1516: 5631 3.7 C/MHz 103 mW 5.5 J 54.9 I/mJ 53.3 s 1612: 5987 3.7 C/MHz 109 mW 5.5 J 55.0 I/mJ 50.1 s 1708: 6344 3.7 C/MHz 126 mW 5.9 J 50.5 I/mJ 47.3 s ===== CPU 6 ===== Frequencies: 300 652 825 979 1132 1363 1536 1747 1843 1996 300: 1868 6.2 C/MHz 53 mW 8.5 J 35.2 I/mJ 160.6 s 652: 4073 6.2 C/MHz 96 mW 7.1 J 42.4 I/mJ 73.7 s 825: 5132 6.2 C/MHz 117 mW 6.9 J 43.7 I/mJ 58.5 s 979: 6099 6.2 C/MHz 151 mW 7.4 J 40.4 I/mJ 49.2 s 1132: 7071 6.2 C/MHz 207 mW 8.8 J 34.1 I/mJ 42.4 s 1363: 8482 6.2 C/MHz 235 mW 8.3 J 36.1 I/mJ 35.4 s 1536: 9578 6.2 C/MHz 287 mW 9.0 J 33.3 I/mJ 31.3 s 1747: 10892 6.2 C/MHz 340 mW 9.4 J 32.0 I/mJ 27.6 s 1843: 11471 6.2 C/MHz 368 mW 9.6 J 31.1 I/mJ 26.2 s 1996: 12425 6.2 C/MHz 438 mW 10.6 J 28.3 I/mJ 24.2 s Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index d013d0279dc9..d68cdf34c31a 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -36,6 +36,8 @@ CPU0: cpu@0 { compatible = "qcom,kryo360"; reg = <0x0 0x0>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -61,6 +63,8 @@ CPU1: cpu@100 { compatible = "qcom,kryo360"; reg = <0x0 0x100>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -81,6 +85,8 @@ CPU2: cpu@200 { compatible = "qcom,kryo360"; reg = <0x0 0x200>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -101,6 +107,8 @@ CPU3: cpu@300 { compatible = "qcom,kryo360"; reg = <0x0 0x300>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -121,6 +129,8 @@ CPU4: cpu@400 { compatible = "qcom,kryo360"; reg = <0x0 0x400>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -141,6 +151,8 @@ CPU5: cpu@500 { compatible = "qcom,kryo360"; reg = <0x0 0x500>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -161,6 +173,8 @@ CPU6: cpu@600 { compatible = "qcom,kryo360"; reg = <0x0 0x600>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <393>; qcom,freq-domain = <&cpufreq_hw 1>; operating-points-v2 = <&cpu6_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -181,6 +195,8 @@ CPU7: cpu@700 { compatible = "qcom,kryo360"; reg = <0x0 0x700>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <393>; qcom,freq-domain = <&cpufreq_hw 1>; operating-points-v2 = <&cpu6_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,