From patchwork Sun Jul 23 16:10:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 705646 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EBCBC001DF for ; Sun, 23 Jul 2023 16:22:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229953AbjGWQWQ (ORCPT ); Sun, 23 Jul 2023 12:22:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229891AbjGWQWP (ORCPT ); Sun, 23 Jul 2023 12:22:15 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 577C2E76; Sun, 23 Jul 2023 09:22:14 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A5DB460DFB; Sun, 23 Jul 2023 16:22:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 13453C433C7; Sun, 23 Jul 2023 16:22:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1690129333; bh=xPpxwJzBLsCaca6qQZWRTcviG5VQc7YuCxtBnfOO0Sc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AETGN3psgYDDeZ7dEs61AH+fm3ZEVg3r6pj/bYdGI19yI2nBvxoq0BdIEj8AhmTR1 E01kZ3OlafYNozk7XyhxhkUA1OPn5TbDbIcaks21KcjxCV9SiUd6ihHPkwcAD17LKS MTNfuC/XyK9+n6hZH5nXwAHIT1fn3I1n4WQ9lQi08GVemg4wuBDEe82fWemSYoHW07 yTP2s1rO9QZNg9GcA5PROay5Sqh4jnA1Qqg3U3i/Pdld8KzmqzmHfJf7KUrh3aen4X d0Ir96HVrfapgb2TSqjGl/AbCkicw4A46nqADKQcL1BjAjXs4iHPo4U4WPoiyvA/Cr Kror3MKocjfTw== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next 02/10] net: stmmac: xgmac: add more feature parsing from hw cap Date: Mon, 24 Jul 2023 00:10:21 +0800 Message-Id: <20230723161029.1345-3-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230723161029.1345-1-jszhang@kernel.org> References: <20230723161029.1345-1-jszhang@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The XGMAC_HWFEAT_GMIISEL bit also indicates whether support 10/100Mbps or not. The XGMAC_HWFEAT_HDSEL bit indicates whether support half duplex or not. The XGMAC_HWFEAT_ADDMACADRSEL bit indicates whether support Multiple MAC address registers or not. The XGMAC_HWFEAT_SMASEL bit indicates whether support SMA (MDIO) Interface or not. Signed-off-by: Jisheng Zhang --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 3 +++ drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 153321fe42c3..81cbb13a101d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -111,6 +111,7 @@ #define XGMAC_LPI_TIMER_CTRL 0x000000d4 #define XGMAC_HW_FEATURE0 0x0000011c #define XGMAC_HWFEAT_SAVLANINS BIT(27) +#define XGMAC_HWFEAT_ADDMACADRSEL GENMASK(22, 18) #define XGMAC_HWFEAT_RXCOESEL BIT(16) #define XGMAC_HWFEAT_TXCOESEL BIT(14) #define XGMAC_HWFEAT_EEESEL BIT(13) @@ -121,7 +122,9 @@ #define XGMAC_HWFEAT_MMCSEL BIT(8) #define XGMAC_HWFEAT_MGKSEL BIT(7) #define XGMAC_HWFEAT_RWKSEL BIT(6) +#define XGMAC_HWFEAT_SMASEL BIT(5) #define XGMAC_HWFEAT_VLHASH BIT(4) +#define XGMAC_HWFEAT_HDSEL BIT(3) #define XGMAC_HWFEAT_GMIISEL BIT(1) #define XGMAC_HW_FEATURE1 0x00000120 #define XGMAC_HWFEAT_L3L4FNUM GENMASK(30, 27) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c index b09395f5edcb..b5ba4e0cca55 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c @@ -406,6 +406,10 @@ static int dwxgmac2_get_hw_feature(void __iomem *ioaddr, dma_cap->pmt_remote_wake_up = (hw_cap & XGMAC_HWFEAT_RWKSEL) >> 6; dma_cap->vlhash = (hw_cap & XGMAC_HWFEAT_VLHASH) >> 4; dma_cap->mbps_1000 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1; + dma_cap->mbps_10_100 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1; + dma_cap->half_duplex = (hw_cap & XGMAC_HWFEAT_HDSEL) >> 3; + dma_cap->multi_addr = (hw_cap & XGMAC_HWFEAT_ADDMACADRSEL) >> 18; + dma_cap->sma_mdio = (hw_cap & XGMAC_HWFEAT_SMASEL) >> 5; /* MAC HW feature 1 */ hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1); From patchwork Sun Jul 23 16:10:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 705645 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF59CC001DF for ; Sun, 23 Jul 2023 16:22:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229456AbjGWQWa (ORCPT ); Sun, 23 Jul 2023 12:22:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230073AbjGWQW1 (ORCPT ); Sun, 23 Jul 2023 12:22:27 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF82810D8; Sun, 23 Jul 2023 09:22:22 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 08CB960DFC; Sun, 23 Jul 2023 16:22:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E9942C433AB; Sun, 23 Jul 2023 16:22:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1690129341; bh=DE4uo4JK2isjtFObJJyFLlrT5b6CK5kuMo4uw+Jhg2c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gxJgtT6d+8MMUOnhiMgFqecA9A+UoZoYEZNBjfGO7bMmMtFyDCJj74mzDvTPDGSFX BaBhs3Kk9mauFNzspZZzLvp5EuM+Qt0nPs8kQxHU+BFAOYzECl02gnEN5ycZzDb1mw 4Pf4F8ML0PDzrzkWtTImdtpr7iGZoY5V3pmDqmg9/VtEYr+xvnq2JB9E9O49zNMHmt TkUWAoCS+szIh3RBP1FBx6QjsUmO4ldMvwapT0qB31xP2IXk9ep16DVcN3ljFUcH8q 9WObdGpuZoUZvGrwoFRWAP3iZrRtoIcUPwuJW6kPTbe26MtMh7EyvX5GYLSMSXW5RC hfmfkt6k3DngA== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next 04/10] net: stmmac: enlarge max rx/tx queues and channels to 16 Date: Mon, 24 Jul 2023 00:10:23 +0800 Message-Id: <20230723161029.1345-5-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230723161029.1345-1-jszhang@kernel.org> References: <20230723161029.1345-1-jszhang@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org xgmac supports up to 16 rx/tx queues and up to 16 channels. Signed-off-by: Jisheng Zhang --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 5 ++--- include/linux/stmmac.h | 6 +++--- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c index a0c2ef8bb0ac..aaae82d3d9dc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -202,9 +202,8 @@ static void dwxgmac2_map_mtl_to_dma(struct mac_device_info *hw, u32 queue, void __iomem *ioaddr = hw->pcsr; u32 value, reg; - reg = (queue < 4) ? XGMAC_MTL_RXQ_DMA_MAP0 : XGMAC_MTL_RXQ_DMA_MAP1; - if (queue >= 4) - queue -= 4; + reg = XGMAC_MTL_RXQ_DMA_MAP0 + (queue & ~0x3); + queue &= 0x3; value = readl(ioaddr + reg); value &= ~XGMAC_QxMDMACH(queue); diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index ef67dba775d0..11671fd6adee 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -15,9 +15,9 @@ #include #include -#define MTL_MAX_RX_QUEUES 8 -#define MTL_MAX_TX_QUEUES 8 -#define STMMAC_CH_MAX 8 +#define MTL_MAX_RX_QUEUES 16 +#define MTL_MAX_TX_QUEUES 16 +#define STMMAC_CH_MAX 16 #define STMMAC_RX_COE_NONE 0 #define STMMAC_RX_COE_TYPE1 1 From patchwork Sun Jul 23 16:10:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 705644 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38441C001DF for ; Sun, 23 Jul 2023 16:23:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229926AbjGWQXB (ORCPT ); Sun, 23 Jul 2023 12:23:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229554AbjGWQW7 (ORCPT ); Sun, 23 Jul 2023 12:22:59 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 125CE1BFA; Sun, 23 Jul 2023 09:22:37 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8AC2360E0B; Sun, 23 Jul 2023 16:22:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3181EC433C8; Sun, 23 Jul 2023 16:22:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1690129351; bh=ucsnwmWqR4ajtwvJh+GfJymKYMLxktOm7tZoJmtvJZc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AyDfYmJwoGoanHp/xBxMzNwo/cJheiN1a66a5+JT/+JbxfvGeZbhY0WcLEh9sp2xZ iMoHU4LlaESiLdQ4GU548+FHQ1ch6rj47ps7a0E3uW39U6fLpUI8vOQilzLMM9JsMy Ao1UbrGhMqQdh5+1NtBCkLIOSiWAMBqg5YaHNYcaaTYIuylOJwtVP5ybVdA1uFQzJU WNGM9nZUF7W6/aJ1PiwEW56ikB3CqahcjajRukn9f4pPPEsFXWaWLLhb5A+UcgSHyD dxc9+5L0mYd8HXYzekvLkWO9U7MVdU0fXkmC8NXQZq+ESXf4TiKufJj3eOO0/B53zg YeVY7AfuNmLSw== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next 06/10] net: stmmac: xgmac: support per-channel irq Date: Mon, 24 Jul 2023 00:10:25 +0800 Message-Id: <20230723161029.1345-7-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230723161029.1345-1-jszhang@kernel.org> References: <20230723161029.1345-1-jszhang@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IP supports per channel interrupt, add support for this usage case. Signed-off-by: Jisheng Zhang --- .../net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 ++ .../ethernet/stmicro/stmmac/dwxgmac2_dma.c | 33 +++++++++++-------- 2 files changed, 22 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 81cbb13a101d..12e1228ccf2a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -327,6 +327,8 @@ /* DMA Registers */ #define XGMAC_DMA_MODE 0x00003000 +#define XGMAC_INTM GENMASK(13, 12) +#define XGMAC_INTM_MODE1 0x1 #define XGMAC_SWR BIT(0) #define XGMAC_DMA_SYSBUS_MODE 0x00003004 #define XGMAC_WR_OSR_LMT GENMASK(29, 24) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c index b5ba4e0cca55..ef25af92d6cc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c @@ -31,6 +31,13 @@ static void dwxgmac2_dma_init(void __iomem *ioaddr, value |= XGMAC_EAME; writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE); + + if (dma_cfg->perch_irq_en) { + value = readl(ioaddr + XGMAC_DMA_MODE); + value &= ~XGMAC_INTM; + value |= FIELD_PREP(XGMAC_INTM, XGMAC_INTM_MODE1); + writel(value, ioaddr + XGMAC_DMA_MODE); + } } static void dwxgmac2_dma_init_chan(struct stmmac_priv *priv, @@ -365,20 +372,20 @@ static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv, } /* TX/RX NORMAL interrupts */ - if (likely(intr_status & XGMAC_NIS)) { - if (likely(intr_status & XGMAC_RI)) { - u64_stats_update_begin(&rx_q->rxq_stats.syncp); - rx_q->rxq_stats.rx_normal_irq_n++; - u64_stats_update_end(&rx_q->rxq_stats.syncp); - ret |= handle_rx; - } - if (likely(intr_status & (XGMAC_TI | XGMAC_TBU))) { - u64_stats_update_begin(&tx_q->txq_stats.syncp); - tx_q->txq_stats.tx_normal_irq_n++; - u64_stats_update_end(&tx_q->txq_stats.syncp); - ret |= handle_tx; - } + if (likely(intr_status & XGMAC_RI)) { + u64_stats_update_begin(&rx_q->rxq_stats.syncp); + rx_q->rxq_stats.rx_normal_irq_n++; + u64_stats_update_end(&rx_q->rxq_stats.syncp); + ret |= handle_rx; + } + if (likely(intr_status & XGMAC_TI)) { + u64_stats_update_begin(&tx_q->txq_stats.syncp); + tx_q->txq_stats.tx_normal_irq_n++; + u64_stats_update_end(&tx_q->txq_stats.syncp); + ret |= handle_tx; } + if (unlikely(intr_status & XGMAC_TBU)) + ret |= handle_tx; /* Clear interrupts */ writel(intr_en & intr_status, ioaddr + XGMAC_DMA_CH_STATUS(chan)); From patchwork Sun Jul 23 16:10:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 705643 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5225CC001DE for ; Sun, 23 Jul 2023 16:23:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229572AbjGWQXP (ORCPT ); Sun, 23 Jul 2023 12:23:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229945AbjGWQXM (ORCPT ); Sun, 23 Jul 2023 12:23:12 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DBDD10C2; Sun, 23 Jul 2023 09:22:47 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0966A60E05; Sun, 23 Jul 2023 16:22:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6CF1BC433C8; Sun, 23 Jul 2023 16:22:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1690129362; bh=77r49RSSQhAozO3HusyMgOJivNEdF2Oycm6v24MDK60=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LbJaNcSBqDv3TqTL9DOpOFtVQAvmOZDNAcpGCIvWPiAC2ss+7LaTuU60MqlD3oTgS 9zdjwsNlMnz6VUppT+/I9iJyH5BjziWnzaae2/gm//cQwmkfhqPnjGNY7KcPEq2+ZS rgWhVRJaUs/QPnBKydu23WlOGcwokmagkMVqM/4YxcDEXm1irn67kRre/lpUYbbLSk tSJxCz/v6imyZGVT0Hn2/ZJYVroskvzK3TxOwHQT7M8l/+t1+OW/hdKSeDmDRpgby0 9HcL5rXrCzFT7VhH8g3m9QOQco33FQC+fw+ReDl5VuxORDQg2D3IIj1REb9QY6L4v5 SnGealjZlXjLQ== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next 09/10] dt-bindings: net: snps, dwmac: add per channel irq support Date: Mon, 24 Jul 2023 00:10:28 +0800 Message-Id: <20230723161029.1345-10-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230723161029.1345-1-jszhang@kernel.org> References: <20230723161029.1345-1-jszhang@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IP supports per channel interrupt, add support for this usage case. Signed-off-by: Jisheng Zhang --- .../devicetree/bindings/net/snps,dwmac.yaml | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index bb80ca205d26..525210c2c06c 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -101,6 +101,11 @@ properties: minItems: 1 maxItems: 2 + snps,per-channel-interrupt: + $ref: /schemas/types.yaml#/definitions/flag + description: + Indicates that Rx and Tx complete will generate a unique interrupt for each channel + interrupts: minItems: 1 items: @@ -109,6 +114,8 @@ properties: - description: The interrupt that occurs when Rx exits the LPI state - description: The interrupt that occurs when Safety Feature Correctible Errors happen - description: The interrupt that occurs when Safety Feature Uncorrectible Errors happen + - description: All of the rx per-channel interrupts + - description: All of the tx per-channel interrupts interrupt-names: minItems: 1 @@ -118,6 +125,22 @@ properties: - const: eth_lpi - const: sfty_ce_irq - const: sfty_ue_irq + - const: rx0 + - const: rx1 + - const: rx2 + - const: rx3 + - const: rx4 + - const: rx5 + - const: rx6 + - const: rx7 + - const: tx0 + - const: tx1 + - const: tx2 + - const: tx3 + - const: tx4 + - const: tx5 + - const: tx6 + - const: tx7 clocks: minItems: 1 From patchwork Sun Jul 23 16:10:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 705642 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0EF6C001DF for ; Sun, 23 Jul 2023 16:23:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229653AbjGWQXr (ORCPT ); Sun, 23 Jul 2023 12:23:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45012 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229692AbjGWQXq (ORCPT ); Sun, 23 Jul 2023 12:23:46 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 982B61BE4; Sun, 23 Jul 2023 09:23:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 71D5060E03; Sun, 23 Jul 2023 16:22:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DBE3FC433C9; Sun, 23 Jul 2023 16:22:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1690129365; bh=qDI0Xb5iaQWdsQql8g8clSdLAw51YwA2gB/y/HlqbvM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fVXln860LhUZcxF5EYN3gLM6af9tazNAY7YXKWeCJndIKqyXeMu8VBtbEEPrnnJJf pgz4q/ToKIP59p1+VzHxLLHDojPmJpfu0VZcIeBw499UMjt6dovJefE8Bm6ebXkBzE e3GORnARNutWgspjrF8VJVtzJFUV9kXshfdBhK3NLiM0tstmPOEX65Y/pLoCWvthUF yBj/TQlm45C85bQyDIsPSsVK6aGGJlJPVTuMfLewFSeD2ttgfHGRpi+lbPKHUa4+ds 01IoMUIfk6k+eucfSvTVZiopFDKcMOsJYKFFC1WCH56N91vHrSJnw54cSH8BS6irtC JMTiTPs3TaUMw== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next 10/10] net: stmmac: platform: support parsing per channel irq from DT Date: Mon, 24 Jul 2023 00:10:29 +0800 Message-Id: <20230723161029.1345-11-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230723161029.1345-1-jszhang@kernel.org> References: <20230723161029.1345-1-jszhang@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The snps dwmac IP may support per channel interrupt. Add support to parse the per channel irq from DT. Signed-off-by: Jisheng Zhang --- .../ethernet/stmicro/stmmac/stmmac_platform.c | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c index e1b7a3fefd1a..16fff66c578b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c @@ -539,10 +539,14 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) if (of_device_is_compatible(np, "snps,dwxgmac")) { plat->has_xgmac = 1; plat->pmt = 1; + if (of_property_read_bool(np, "snps,tso")) plat->flags |= STMMAC_FLAG_TSO_EN; } + if (of_property_read_bool(np, "snps,per-channel-interrupt")) + plat->flags |= STMMAC_FLAG_PERCH_IRQ_EN; + dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg), GFP_KERNEL); if (!dma_cfg) { @@ -705,6 +709,9 @@ EXPORT_SYMBOL_GPL(stmmac_remove_config_dt); int stmmac_get_platform_resources(struct platform_device *pdev, struct stmmac_resources *stmmac_res) { + char irq_name[8]; + int i; + memset(stmmac_res, 0, sizeof(*stmmac_res)); /* Get IRQ information early to have an ability to ask for deferred @@ -738,6 +745,26 @@ int stmmac_get_platform_resources(struct platform_device *pdev, dev_info(&pdev->dev, "IRQ eth_lpi not found\n"); } + for (i = 0; i < MTL_MAX_RX_QUEUES; i++) { + snprintf(irq_name, sizeof(irq_name), "rx%i", i); + stmmac_res->rx_irq[i] = platform_get_irq_byname_optional(pdev, irq_name); + if (stmmac_res->rx_irq[i] < 0) { + if (stmmac_res->rx_irq[i] == -EPROBE_DEFER) + return -EPROBE_DEFER; + break; + } + } + + for (i = 0; i < MTL_MAX_TX_QUEUES; i++) { + snprintf(irq_name, sizeof(irq_name), "tx%i", i); + stmmac_res->tx_irq[i] = platform_get_irq_byname_optional(pdev, irq_name); + if (stmmac_res->tx_irq[i] < 0) { + if (stmmac_res->tx_irq[i] == -EPROBE_DEFER) + return -EPROBE_DEFER; + break; + } + } + stmmac_res->sfty_ce_irq = platform_get_irq_byname_optional(pdev, "sfty_ce_irq"); if (stmmac_res->sfty_ce_irq < 0) { if (stmmac_res->sfty_ce_irq == -EPROBE_DEFER)