From patchwork Wed Jul 3 12:26:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 168414 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp830413ilk; Wed, 3 Jul 2019 05:26:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqyjyKPWzVZApkymAYoQPFFQUO8iAiBgn13vfRvO4DMahwjSqEEMpbNNr0ygqE6zsHGJ8nUi X-Received: by 2002:a17:90a:3401:: with SMTP id o1mr12415054pjb.7.1562156794754; Wed, 03 Jul 2019 05:26:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562156794; cv=none; d=google.com; s=arc-20160816; b=0RhxbIJCd/zg6H8jp3/XdY2o+K7BvOWm8xUTjwG+VIjnGYEqubDbfblei1KQJMcbn+ lCAVMNDhLIKEqvyQgOWU718kgxe0YSP3cd9Y9SryShWPNePpbA5tt2N1bawfVElJLkfp XQnSWcFfk3yjM7Q4GQHBNXvOr5lNErd0TWxuoy258XhWb3QRAX9QZrtMjbiK062axqHc Acc+PBKokGuBOi1hl26DKCOU6/5wPaebFw1MgxE+5AJG+MkiqdIpHv0WS3sMXSSXfCDq wWVAKJtHjKa+028usRqAVWevhGlBhDJW1X7RCXgaS9ClUilxvttENIpLmdFT4EpNigfq gZ6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=plGjGyOid1jI+Xxis9Als2EenBhEyLHhPcpZxpUYN30=; b=oYTNslfrVCi5JX/CldxBNdLNCkuiMIlQpdlklHSGM8kXrqQI7zvm1aYeOURKlFqdgl 1DuVrwCLuPDY9/8SzUWHRB6wPFE5oZW/F28gyro7BYNu7GFgvaSZ1wHA0QWN+PrwhTZW IDJ8vt+B8jlA3fjARW0fSTcIZ0bDNFunD5mR+BXI9GTA5wGNdVxoVNvb29D6/GNjCw/9 BonUVxlVGwHv1va59j98CZdM+Y6B1OmBnOhtDvbe3oZvfKJnfA7RrTxoCcVsQJNY2HPu O9OidlsVOPx6AS3VNCKldfVgQYO55yCZyu49ftdPm2AcXv4kZOGo+6G+lziUF3pKc88J AH6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b="vKwjNK/h"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id v67sm2868132wme.24.2019.07.03.05.26.22 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 03 Jul 2019 05:26:22 -0700 (PDT) From: Jerome Brunet To: Neil Armstrong Cc: Jerome Brunet , Kevin Hilman , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: clock: meson: add resets to the audio clock controller Date: Wed, 3 Jul 2019 14:26:13 +0200 Message-Id: <20190703122614.3579-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190703122614.3579-1-jbrunet@baylibre.com> References: <20190703122614.3579-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the documentation and bindings for the resets provided by the g12a audio clock controller Signed-off-by: Jerome Brunet --- .../bindings/clock/amlogic,axg-audio-clkc.txt | 1 + .../reset/amlogic,meson-g12a-audio-reset.h | 38 +++++++++++++++++++ 2 files changed, 39 insertions(+) create mode 100644 include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h -- 2.21.0 diff --git a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt index 0f777749f4f1..b3957d10d241 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt @@ -22,6 +22,7 @@ Required Properties: components. - resets : phandle of the internal reset line - #clock-cells : should be 1. +- #reset-cells : should be 1 on the g12a (and following) soc family Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. All available clocks are defined as diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h new file mode 100644 index 000000000000..14b78dabed0e --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Jerome Brunet + * + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H + +#define AUD_RESET_PDM 0 +#define AUD_RESET_TDMIN_A 1 +#define AUD_RESET_TDMIN_B 2 +#define AUD_RESET_TDMIN_C 3 +#define AUD_RESET_TDMIN_LB 4 +#define AUD_RESET_LOOPBACK 5 +#define AUD_RESET_TODDR_A 6 +#define AUD_RESET_TODDR_B 7 +#define AUD_RESET_TODDR_C 8 +#define AUD_RESET_FRDDR_A 9 +#define AUD_RESET_FRDDR_B 10 +#define AUD_RESET_FRDDR_C 11 +#define AUD_RESET_TDMOUT_A 12 +#define AUD_RESET_TDMOUT_B 13 +#define AUD_RESET_TDMOUT_C 14 +#define AUD_RESET_SPDIFOUT 15 +#define AUD_RESET_SPDIFOUT_B 16 +#define AUD_RESET_SPDIFIN 17 +#define AUD_RESET_EQDRC 18 +#define AUD_RESET_RESAMPLE 19 +#define AUD_RESET_DDRARB 20 +#define AUD_RESET_POWDET 21 +#define AUD_RESET_TORAM 22 +#define AUD_RESET_TOACODEC 23 +#define AUD_RESET_TOHDMITX 24 +#define AUD_RESET_CLKTREE 25 + +#endif From patchwork Wed Jul 3 12:26:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 168413 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp830357ilk; Wed, 3 Jul 2019 05:26:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqw3uYwFegqkIBOU1aj28XHN1udKLrszcGZdCw9bdxjDqeVRWCVnDssxzNC0TUu46+K6Rpk+ X-Received: by 2002:a63:e001:: with SMTP id e1mr37185980pgh.306.1562156792043; Wed, 03 Jul 2019 05:26:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562156792; cv=none; d=google.com; s=arc-20160816; b=YhAn6sSSTGqDi8uOjTugFD57z51OFb7dCq2KMP41wzue9ZImCZF7hmCv5j/bzLSVxr KErXt+SoJ0Lo7Jr0TvqQMh/BChJQDH5qTFPA7eAG0u7pFbLb8glunztCsk6+o0LwcvHU CSyqbihMtsfX2lT5BoujVB0aMP4sIR+qAUpXBrbx0c45+6PIdkwJGMmlDyv2WIzLVjgl 3pu3RWcSoDAmJu9Whs27Wp6DzjW80xQrAoTk/iB9xen4s6iJcgJOfWX97U/r4iclNrJX RR35wlpr88uaz+5s908tDdB085I43uJ3zNaFjrjfienESIcLHd4Z4Jtt+CEw1NQEq8sT A41Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JILUVyhQViuGdxVU7msStBtHX6blqTuLXOnzbseIUxY=; b=uDGUQF8DsYYEGx0+VMKbwweM2RYR7jFeHJptq82MpAIV1fW3GKnFEI98dckk9lmtpE 83NK9LLwu56lgvLcNHyY0c3/CcfH2Qn5zV/sIePEbH2EJAyUjAHIL1BhwdcIE5fWEs+E /1I1Fm4zQAgnzQpG0YBtf0HCQWzofJtbBe8IpHHIeoGTZGCxe55M8stNLC8ntkLCCVO1 7qgmBvu505WeJl//nWbu5EGKIq4BGk9yI+R10YvG5oAd003PPpEJJ25a1nLwWmw22smh qNuRbOTzHAvgfm0QaOZa76HUdvqF0jYHbFoeAs872pJEDSC6KR85OBQcEzrR+B+6m8la Y1jQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=15DE6QGN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id v67sm2868132wme.24.2019.07.03.05.26.23 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 03 Jul 2019 05:26:23 -0700 (PDT) From: Jerome Brunet To: Neil Armstrong Cc: Jerome Brunet , Kevin Hilman , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] clk: meson: axg-audio: add g12a reset support Date: Wed, 3 Jul 2019 14:26:14 +0200 Message-Id: <20190703122614.3579-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190703122614.3579-1-jbrunet@baylibre.com> References: <20190703122614.3579-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On the g12a, the register space dedicated to the audio clock also provides some resets. Let the clock controller register a reset provider as well for this SoC family. the axg SoC family does not appear to provide this feature. Signed-off-by: Jerome Brunet --- drivers/clk/meson/axg-audio.c | 107 +++++++++++++++++++++++++++++++++- drivers/clk/meson/axg-audio.h | 1 + 2 files changed, 106 insertions(+), 2 deletions(-) -- 2.21.0 Reviewed-by: Neil Armstrong diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c index 8028ff6f6610..ce163bd03aad 100644 --- a/drivers/clk/meson/axg-audio.c +++ b/drivers/clk/meson/axg-audio.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include "axg-audio.h" @@ -916,6 +917,84 @@ static int axg_register_clk_hw_inputs(struct device *dev, return 0; } +struct axg_audio_reset_data { + struct reset_controller_dev rstc; + struct regmap *map; + unsigned int offset; +}; + +static void axg_audio_reset_reg_and_bit(struct axg_audio_reset_data *rst, + unsigned long id, + unsigned int *reg, + unsigned int *bit) +{ + unsigned int stride = regmap_get_reg_stride(rst->map); + + *reg = (id / (stride * BITS_PER_BYTE)) * stride; + *reg += rst->offset; + *bit = id % (stride * BITS_PER_BYTE); +} + +static int axg_audio_reset_update(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + struct axg_audio_reset_data *rst = + container_of(rcdev, struct axg_audio_reset_data, rstc); + unsigned int offset, bit; + + axg_audio_reset_reg_and_bit(rst, id, &offset, &bit); + + regmap_update_bits(rst->map, offset, BIT(bit), + assert ? BIT(bit) : 0); + + return 0; +} + +static int axg_audio_reset_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct axg_audio_reset_data *rst = + container_of(rcdev, struct axg_audio_reset_data, rstc); + unsigned int val, offset, bit; + + axg_audio_reset_reg_and_bit(rst, id, &offset, &bit); + + regmap_read(rst->map, offset, &val); + + return !!(val & BIT(bit)); +} + +static int axg_audio_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return axg_audio_reset_update(rcdev, id, true); +} + +static int axg_audio_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return axg_audio_reset_update(rcdev, id, false); +} + +static int axg_audio_reset_toggle(struct reset_controller_dev *rcdev, + unsigned long id) +{ + int ret; + + ret = axg_audio_reset_assert(rcdev, id); + if (ret) + return ret; + + return axg_audio_reset_deassert(rcdev, id); +} + +static const struct reset_control_ops axg_audio_rstc_ops = { + .assert = axg_audio_reset_assert, + .deassert = axg_audio_reset_deassert, + .reset = axg_audio_reset_toggle, + .status = axg_audio_reset_status, +}; + static const struct regmap_config axg_audio_regmap_cfg = { .reg_bits = 32, .val_bits = 32, @@ -925,12 +1004,15 @@ static const struct regmap_config axg_audio_regmap_cfg = { struct audioclk_data { struct clk_hw_onecell_data *hw_onecell_data; + unsigned int reset_offset; + unsigned int reset_num; }; static int axg_audio_clkc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; const struct audioclk_data *data; + struct axg_audio_reset_data *rst; struct regmap *map; struct resource *res; void __iomem *regs; @@ -1005,8 +1087,27 @@ static int axg_audio_clkc_probe(struct platform_device *pdev) } } - return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, - data->hw_onecell_data); + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, + data->hw_onecell_data); + if (ret) + return ret; + + /* Stop here if there is no reset */ + if (!data->reset_num) + return 0; + + rst = devm_kzalloc(dev, sizeof(*rst), GFP_KERNEL); + if (!rst) + return -ENOMEM; + + rst->map = map; + rst->offset = data->reset_offset; + rst->rstc.nr_resets = data->reset_num; + rst->rstc.ops = &axg_audio_rstc_ops; + rst->rstc.of_node = dev->of_node; + rst->rstc.owner = THIS_MODULE; + + return ret = devm_reset_controller_register(dev, &rst->rstc); } static const struct audioclk_data axg_audioclk_data = { @@ -1015,6 +1116,8 @@ static const struct audioclk_data axg_audioclk_data = { static const struct audioclk_data g12a_audioclk_data = { .hw_onecell_data = &g12a_audio_hw_onecell_data, + .reset_offset = AUDIO_SW_RESET, + .reset_num = 26, }; static const struct of_device_id clkc_match_table[] = { diff --git a/drivers/clk/meson/axg-audio.h b/drivers/clk/meson/axg-audio.h index 5d972d55d6c7..c00e28b2e1a9 100644 --- a/drivers/clk/meson/axg-audio.h +++ b/drivers/clk/meson/axg-audio.h @@ -22,6 +22,7 @@ #define AUDIO_MCLK_F_CTRL 0x018 #define AUDIO_MST_PAD_CTRL0 0x01c #define AUDIO_MST_PAD_CTRL1 0x020 +#define AUDIO_SW_RESET 0x024 #define AUDIO_MST_A_SCLK_CTRL0 0x040 #define AUDIO_MST_A_SCLK_CTRL1 0x044 #define AUDIO_MST_B_SCLK_CTRL0 0x048