From patchwork Sat Jul 15 14:37:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 703279 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 765C9EB64DC for ; Sat, 15 Jul 2023 14:37:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229944AbjGOOh0 (ORCPT ); Sat, 15 Jul 2023 10:37:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230083AbjGOOhZ (ORCPT ); Sat, 15 Jul 2023 10:37:25 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FFF530D8 for ; Sat, 15 Jul 2023 07:37:23 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id 2adb3069b0e04-4f9fdb0ef35so4924411e87.0 for ; Sat, 15 Jul 2023 07:37:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689431841; x=1692023841; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=h1PfYXnPFUdyoINMSQb8t2+X3rjDb+lX4Py5/7kpDz8=; b=zomzmBKeflRbMfpSQoKGf0VGvLR1wjVea2S70CLAJdG1UsSokSpNpzKqAXumCK+7pJ SM6xMbU8ZRxh5I68dmxSwQgTwtq+PwelJnfiYD/69bqvkAORlB3GuSvbl+CK/iCq8tL7 Qex+yaKO2XslQFcG41sfGARcgjQ+C1jfxQBDZQSpJ9PbZ3eRs2jPlbl8/jEg7lmNcJkv nixOg8MPLWbtfxpIeNgbb+qPP6cGy9reY9CS5hP/wfDJ1W639q0JjUuX4BjKnryWFrU/ qnRfgb8zWc1ZvpTWpQkGhkpKlqbizEQ0unEuP+oHl4WfWWXfbKcAzSheyx/oSnHxOmDl Uprw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689431841; x=1692023841; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=h1PfYXnPFUdyoINMSQb8t2+X3rjDb+lX4Py5/7kpDz8=; b=DBUQEcKXGKOHZ/rXGshYap0H8mv8XiX+2Wq1TXPx27AYgqny52HitNRHGxo1TLwFJq HVLvXiw8z0jeWSz1iAXMZSqBkMGI6IaXUeJqJCtZ1kEoD5BfIJfmnhjee5GXCcw96MuK KJvmvqI9K3ICOqPSTrNE7K2x4P+3ojT7tUOG3WZRFaSDjMsRuLuMg37nkPljdowujDug EAPSitiIm1IVLRJC/XtRbGthqH5ZaQovo2QL8C8HBzfDKbV7IIaISnb7Ro6v3d2DznfU 45nM0/RNp59B+NCIE26kQgroGwpAIlsVLrvYVrterVBj4rYdY6fHOIx9kZXG35Q+q6u+ CC/Q== X-Gm-Message-State: ABy/qLZZMNsTJfESnoFhJg3kzL6GqcodXvqtAlAnKW9sJU75EUQd1lTM xYndKjJmKYvn/uM2tIZfyKdzxA== X-Google-Smtp-Source: APBJJlENwnPMJhk/Hv3ShtT5c0MjZkoCfipiqxhk1bwJOoWs8NLXDJr9qLT0rQDlEzPLxKnn/MMNHg== X-Received: by 2002:a05:6512:ad1:b0:4fd:b7fb:c9e9 with SMTP id n17-20020a0565120ad100b004fdb7fbc9e9mr87165lfu.41.1689431841621; Sat, 15 Jul 2023 07:37:21 -0700 (PDT) Received: from [192.168.1.101] (abxi167.neoplus.adsl.tpnet.pl. [83.9.2.167]) by smtp.gmail.com with ESMTPSA id 27-20020ac2483b000000b004f858249932sm1927732lft.90.2023.07.15.07.37.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 Jul 2023 07:37:21 -0700 (PDT) From: Konrad Dybcio Date: Sat, 15 Jul 2023 16:37:11 +0200 Subject: [PATCH v3 1/2] dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle MIME-Version: 1.0 Message-Id: <20230328-topic-msgram_mpm-v3-1-2c72f27b4706@linaro.org> References: <20230328-topic-msgram_mpm-v3-0-2c72f27b4706@linaro.org> In-Reply-To: <20230328-topic-msgram_mpm-v3-0-2c72f27b4706@linaro.org> To: Andy Gross , Bjorn Andersson , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1689431838; l=2979; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=hEZfhI1EGIlmfejCXVFxQDw5yfJpSTVeevTgH6zVb+o=; b=smtqGVT2hbELn8tjrn1hDztpZdaIz3pc7WiPLxXkZgqgZ5E9//CxZiIvoOAt5Ik9sz7PUku8w Gb2YXdtkfkgDzht6OAufS03cz0dcX1HdSTjdrqCnoGUfV2iu4l3+y5b X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Due to the wild nature of the Qualcomm RPM Message RAM, we can't really use 'reg' to point to the MPM's slice of Message RAM without cutting into an already-defined RPM MSG RAM node used for GLINK and SMEM. Document passing the register space as a slice of SRAM through the qcom,rpm-msg-ram property. This also makes 'reg' deprecated. Signed-off-by: Konrad Dybcio --- .../bindings/interrupt-controller/qcom,mpm.yaml | 44 +++++++++++++--------- 1 file changed, 27 insertions(+), 17 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml index 509d20c091af..b8bd408748e4 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml @@ -29,6 +29,12 @@ properties: maxItems: 1 description: Specifies the base address and size of vMPM registers in RPM MSG RAM. + deprecated: true + + qcom,rpm-msg-ram: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the APSS MPM slice of the RPM Message RAM interrupts: maxItems: 1 @@ -64,33 +70,37 @@ properties: required: - compatible - - reg - interrupts - mboxes - interrupt-controller - '#interrupt-cells' - qcom,mpm-pin-count - qcom,mpm-pin-map + - qcom,rpm-msg-ram additionalProperties: false examples: - | #include - mpm: interrupt-controller@45f01b8 { - compatible = "qcom,mpm"; - interrupts = ; - reg = <0x45f01b8 0x1000>; - mboxes = <&apcs_glb 1>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&intc>; - qcom,mpm-pin-count = <96>; - qcom,mpm-pin-map = <2 275>, - <5 296>, - <12 422>, - <24 79>, - <86 183>, - <90 260>, - <91 260>; + + remoteproc-rpm { + compatible = "qcom,msm8998-rpm-proc", "qcom,rpm-proc"; + + mpm: interrupt-controller { + compatible = "qcom,mpm"; + qcom,rpm-msg-ram = <&apss_mpm>; + interrupts = ; + mboxes = <&apcs_glb 1>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + qcom,mpm-pin-count = <96>; + qcom,mpm-pin-map = <2 275>, + <5 296>, + <12 422>, + <24 79>, + <86 183>, + <91 260>; + }; }; From patchwork Sat Jul 15 14:37:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 703562 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4B17C001E0 for ; Sat, 15 Jul 2023 14:37:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230240AbjGOOh1 (ORCPT ); Sat, 15 Jul 2023 10:37:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230217AbjGOOh0 (ORCPT ); Sat, 15 Jul 2023 10:37:26 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95D3218F for ; Sat, 15 Jul 2023 07:37:24 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-4fb77f21c63so4855866e87.2 for ; Sat, 15 Jul 2023 07:37:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689431843; x=1692023843; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=UZHiNhlcnBcV/12CBhpoH4NhL4fdNzTRpHhX759efoE=; b=BsY8MQ0xvz96CZJKR/sx45m0/u2jh9C3oJWJLlgU3qjeOWlNVuW6zlX4hr9GmoQgki 3XEaHj5F+wy8RhpKBHkM7pUBm3k4watAYcITYdzE7shshGHzHItKBULY3LzIlGTo3cYe VVpDEXzYvIj2sD4wNaP7yPqCreFJWx5iHOuuzYSU8UyJie4KR/9fgB1x4+Az8MvtOzOE n0kJzzNjt5CSOJ6yMovlqIEXkD8wSeBWqPyL684SgmxMyC3n0Bv/uYOhP6oUFaiFbfdN jRXc6sD/qWXDPR43xjVnA0CIfqHLHQLy/kTIIo0W2gA683TsLHcQ3bJlACCRw/lf3REz JIzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689431843; x=1692023843; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UZHiNhlcnBcV/12CBhpoH4NhL4fdNzTRpHhX759efoE=; b=BX03kGbUc0GOIw4U5iw/w2oljOGjpGeHhpJigMShWe3bZ0LUHvIZ4RjFxHUKYeIn5E jaOQ9CrVmfZjoWrDtDlXdFvjVeujGdURI3Oh3N+BGEVjUEObj865GpI2ArUc3TU9ygxO SSknB31BXcPrKH/VfYRSoI80Yh4WDGLq8F27kEPRHeNu/8uTrZvXiAI/mwJzB3nxEFeN tRhrGNFvnbNnUZfVb9QPDQ+mUs8sdtVZBJn9l9UdpXxtuUsK7CBvgor02ozECI0nRDO1 hBKe6PNvSHxkjF7T4aWaqL2iY88cpXyMCz2dvKJ31OaXeMpdUwF/xHHOZR3SZSnjFW2W XaWA== X-Gm-Message-State: ABy/qLaJONA6V9KQRDeaNt9hq7sj5US0jBirJJKq2PanQ4S0f4wj2XOA TO5AQZZTh9gwGyitLuEg7wE0bQ== X-Google-Smtp-Source: APBJJlF9vTYb38fDN2cl5WXmv3evgsk3uBu/K0a+eFf9xPi1G9rQcU3ZmIisL82IgPPGt0KdLoJFvg== X-Received: by 2002:a05:6512:1047:b0:4f8:70b0:eec6 with SMTP id c7-20020a056512104700b004f870b0eec6mr6186944lfb.28.1689431842878; Sat, 15 Jul 2023 07:37:22 -0700 (PDT) Received: from [192.168.1.101] (abxi167.neoplus.adsl.tpnet.pl. [83.9.2.167]) by smtp.gmail.com with ESMTPSA id 27-20020ac2483b000000b004f858249932sm1927732lft.90.2023.07.15.07.37.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 Jul 2023 07:37:22 -0700 (PDT) From: Konrad Dybcio Date: Sat, 15 Jul 2023 16:37:12 +0200 Subject: [PATCH v3 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space MIME-Version: 1.0 Message-Id: <20230328-topic-msgram_mpm-v3-2-2c72f27b4706@linaro.org> References: <20230328-topic-msgram_mpm-v3-0-2c72f27b4706@linaro.org> In-Reply-To: <20230328-topic-msgram_mpm-v3-0-2c72f27b4706@linaro.org> To: Andy Gross , Bjorn Andersson , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1689431838; l=2751; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=yQx/+qerpXC0l+cy+Ejk8gpdBKyKLvnTn9FYud1Txtk=; b=szGuRyKgIllLGEGjGUWBYEelsIFHCREhm0PjQzBAVd4lOmpKRU1A29kDL5kw7XOvz7H87kCpy ZfQpQPJiHweDDXeQ1mH32MHmq7iNL/jUgQelWRHvrMIhOv8xPEJZKxD X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The MPM hardware is accessible to us from the ARM CPUs through a shared memory region (RPM MSG RAM) that's also concurrently accessed by other kinds of cores on the system (like modem, ADSP etc.). Modeling this relation in a (somewhat) sane manner in the device tree basically requires us to either present the MPM as a child of said memory region (which makes little sense, as a mapped memory carveout is not a bus), define nodes which bleed their register spaces into one another, or passing their slice of the MSG RAM through some kind of a property. Go with the third option and add a way to map a region passed through the "qcom,rpm-msg-ram" property as our register space. The current way of using 'reg' is preserved for ABI reasons. Acked-by: Shawn Guo Signed-off-by: Konrad Dybcio --- drivers/irqchip/irq-qcom-mpm.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c index d30614661eea..ee5f39a4a42a 100644 --- a/drivers/irqchip/irq-qcom-mpm.c +++ b/drivers/irqchip/irq-qcom-mpm.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) struct device *dev = &pdev->dev; struct irq_domain *parent_domain; struct generic_pm_domain *genpd; + struct device_node *msgram_np; struct qcom_mpm_priv *priv; unsigned int pin_cnt; + struct resource res; int i, irq; int ret; @@ -374,9 +377,21 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) raw_spin_lock_init(&priv->lock); - priv->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); + /* If we have a handle to an RPM message ram partition, use it. */ + msgram_np = of_parse_phandle(np, "qcom,rpm-msg-ram", 0); + if (msgram_np) { + ret = of_address_to_resource(msgram_np, 0, &res); + /* Don't use devm_ioremap_resource, as we're accessing a shared region. */ + priv->base = devm_ioremap(dev, res.start, resource_size(&res)); + of_node_put(msgram_np); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } else { + /* Otherwise, fall back to simple MMIO. */ + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } for (i = 0; i < priv->reg_stride; i++) { qcom_mpm_write(priv, MPM_REG_ENABLE, i, 0);