From patchwork Fri Jul 14 16:54:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Charlie Jenkins X-Patchwork-Id: 703053 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03172EB64DC for ; Fri, 14 Jul 2023 16:56:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236096AbjGNQz7 (ORCPT ); Fri, 14 Jul 2023 12:55:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236069AbjGNQz6 (ORCPT ); Fri, 14 Jul 2023 12:55:58 -0400 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C2AD3594 for ; Fri, 14 Jul 2023 09:55:57 -0700 (PDT) Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-1b8ad8383faso16248515ad.0 for ; Fri, 14 Jul 2023 09:55:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1689353756; x=1689958556; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GPykY2M+iBxgnfF3tLWI+OoGLznOreuMykVpzGzQM9M=; b=azZgM6AeXJmCDZjMcCvpOfGXYgGHNCAAPxNXV/uspW22hdXFA8MPuhazigJp0SbCJS 8tx99+fKEiCI1J31eTc92ZC6uoPPCBIEWn85byNxcOtC1TFjaiCPLzerJL2mujp5NPfe tcQkn3YgmIUEukMMAzAC+lS3FOWn7t2WGAWBaQbDxJ7F45liY/U120jgK6dSI82+FFGs cKJ+9Jrz+roxSXvXdpvhnZk6b+RrV4+d7dKzXAd2+9hgjhFiAUVDWsWNow2J0tlknkrp iXnusxEZA6uchq9Zw64fmDJgWEo8vBJlNrD/7xa/Q9WtmFrZU5dJZpb8ZTdqxtsXQj5e IR/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689353756; x=1689958556; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GPykY2M+iBxgnfF3tLWI+OoGLznOreuMykVpzGzQM9M=; b=aUwPmI/yp/57OSD/RHpIZBOr+Y7peaMXLzG4nq3CHOB1AxV5u3mq/WkiWWN+jkEruv ckfqtxf6eVH0Vssn7Zmq/Kwfsofmerl6nwEbVliDkHzMI730LY67pCruatKZRzahAG1r qVzaZ+/ivZdy4Kg1CTDS+p0hsjgKBj0x/KsojttM3DmRc0AYxyMmX1/aKHSsXCyDNT68 4XCTjso4itRUS5XxsMXQ8lEDZKTDcCHFSHCAUjdEYiDktbeVfLVKuYeHSWAOw3SEvP/A 0QCTDxGIRayXeefIhZyAP4ehCWgvWu4q4dbWLUl2PO4SS/lh6OUJQf7lYIbMb649VUuI vj8w== X-Gm-Message-State: ABy/qLaIh5m5jkbCU294KKpFsdC7dHC1xGcsP/TOPId+bf67ACdM68aZ xcugopyI1TieHnSKoWwenjFeHg== X-Google-Smtp-Source: APBJJlEDGSDEGOdKDXhmmtq/RjWdYGrULh2CJQYPjEZOW+WH3IqJ8qF98vsQhnn68tlVv8hSzAc2BA== X-Received: by 2002:a17:902:e5c2:b0:1b8:4f92:565e with SMTP id u2-20020a170902e5c200b001b84f92565emr5737152plf.21.1689353756696; Fri, 14 Jul 2023 09:55:56 -0700 (PDT) Received: from charlie.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id s8-20020a170902b18800b001b694140d96sm8008081plr.170.2023.07.14.09.55.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jul 2023 09:55:56 -0700 (PDT) From: Charlie Jenkins To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: charlie@rivosinc.com, conor@kernel.org, paul.walmsley@sifive.com, palmer@rivosinc.com, aou@eecs.berkeley.edu, anup@brainfault.org, konstantin@linuxfoundation.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-mm@kvack.org, mick@ics.forth.gr, jrtc27@jrtc27.com, rdunlap@infradead.org, alexghiti@rivosinc.com Subject: [PATCH v6 1/4] RISC-V: mm: Restrict address space for sv39,sv48,sv57 Date: Fri, 14 Jul 2023 09:54:49 -0700 Message-ID: <20230714165508.94561-2-charlie@rivosinc.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230714165508.94561-1-charlie@rivosinc.com> References: <20230714165508.94561-1-charlie@rivosinc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Make sv48 the default address space for mmap as some applications currently depend on this assumption. A hint address passed to mmap will cause the largest address space that fits entirely into the hint to be used. If the hint is less than or equal to 1<<38, an sv39 address will be used. An exception is that if the hint address is 0, then a sv48 address will be used. After an address space is completely full, the next smallest address space will be used. Signed-off-by: Charlie Jenkins --- arch/riscv/include/asm/elf.h | 2 +- arch/riscv/include/asm/pgtable.h | 12 +++++++- arch/riscv/include/asm/processor.h | 46 +++++++++++++++++++++++++----- 3 files changed, 51 insertions(+), 9 deletions(-) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index c24280774caf..5d3368d5585c 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -49,7 +49,7 @@ extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); * the loader. We need to make sure that it is out of the way of the program * that it will "exec", and that there is sufficient room for the brk. */ -#define ELF_ET_DYN_BASE ((TASK_SIZE / 3) * 2) +#define ELF_ET_DYN_BASE ((DEFAULT_MAP_WINDOW / 3) * 2) #ifdef CONFIG_64BIT #ifdef CONFIG_COMPAT diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 75970ee2bda2..e13f5872bfe9 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -63,12 +63,22 @@ * position vmemmap directly below the VMALLOC region. */ #ifdef CONFIG_64BIT +#define VA_BITS_SV39 39 +#define VA_BITS_SV48 48 +#define VA_BITS_SV57 57 + +#define VA_USER_SV39 (UL(1) << (VA_BITS_SV39 - 1)) +#define VA_USER_SV48 (UL(1) << (VA_BITS_SV48 - 1)) +#define VA_USER_SV57 (UL(1) << (VA_BITS_SV57 - 1)) + #define VA_BITS (pgtable_l5_enabled ? \ - 57 : (pgtable_l4_enabled ? 48 : 39)) + VA_BITS_SV57 : (pgtable_l4_enabled ? VA_BITS_SV48 : VA_BITS_SV39)) #else #define VA_BITS 32 #endif +#define MMAP_VA_BITS ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS) + #define VMEMMAP_SHIFT \ (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index c950a8d9edef..14a5396eed3d 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -13,20 +13,52 @@ #include -/* - * This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) - -#define STACK_TOP TASK_SIZE #ifdef CONFIG_64BIT +#define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1)) #define STACK_TOP_MAX TASK_SIZE_64 + +#define arch_get_mmap_end(addr, len, flags) \ +({ \ + unsigned long mmap_end; \ + if ((addr) >= VA_USER_SV57) \ + mmap_end = STACK_TOP_MAX; \ + else if ((((addr) >= VA_USER_SV48)) && (VA_BITS >= VA_BITS_SV48)) \ + mmap_end = VA_USER_SV48; \ + else if ((addr) == 0) \ + mmap_end = DEFAULT_MAP_WINDOW; \ + else \ + mmap_end = VA_USER_SV39; \ + mmap_end; \ +}) + +#define arch_get_mmap_base(addr, base) \ +({ \ + unsigned long mmap_base; \ + if (((addr) >= VA_USER_SV57) && (VA_BITS >= VA_BITS_SV57)) \ + mmap_base = (base) + (VA_USER_SV57 - DEFAULT_MAP_WINDOW); \ + else if ((((addr) >= VA_USER_SV48)) && (VA_BITS >= VA_BITS_SV48)) \ + mmap_base = (base) + (VA_USER_SV48 - DEFAULT_MAP_WINDOW); \ + else if ((addr) == 0) \ + mmap_base = (base); \ + else \ + mmap_base = (base) + (VA_USER_SV39 - DEFAULT_MAP_WINDOW); \ + mmap_base; \ +}) + #else +#define DEFAULT_MAP_WINDOW TASK_SIZE #define STACK_TOP_MAX TASK_SIZE #endif #define STACK_ALIGN 16 +#define STACK_TOP DEFAULT_MAP_WINDOW + +/* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE PAGE_ALIGN(DEFAULT_MAP_WINDOW / 3) + #ifndef __ASSEMBLY__ struct task_struct; From patchwork Fri Jul 14 16:54:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Charlie Jenkins X-Patchwork-Id: 703052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03E49C001E0 for ; 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Fri, 14 Jul 2023 09:55:58 -0700 (PDT) Received: from charlie.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id s8-20020a170902b18800b001b694140d96sm8008081plr.170.2023.07.14.09.55.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jul 2023 09:55:57 -0700 (PDT) From: Charlie Jenkins To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: charlie@rivosinc.com, conor@kernel.org, paul.walmsley@sifive.com, palmer@rivosinc.com, aou@eecs.berkeley.edu, anup@brainfault.org, konstantin@linuxfoundation.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-mm@kvack.org, mick@ics.forth.gr, jrtc27@jrtc27.com, rdunlap@infradead.org, alexghiti@rivosinc.com Subject: [PATCH v6 2/4] RISC-V: mm: Add tests for RISC-V mm Date: Fri, 14 Jul 2023 09:54:50 -0700 Message-ID: <20230714165508.94561-3-charlie@rivosinc.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230714165508.94561-1-charlie@rivosinc.com> References: <20230714165508.94561-1-charlie@rivosinc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Add tests that enforce mmap hint address behavior. mmap should default to sv48. mmap will provide an address at the highest address space that can fit into the hint address, unless the hint address is less than sv39 and not 0, then it will return a sv39 address. In addition, ensure that rlimit changes do not cause mmap to fail. Signed-off-by: Charlie Jenkins --- tools/testing/selftests/riscv/Makefile | 2 +- tools/testing/selftests/riscv/mm/.gitignore | 1 + tools/testing/selftests/riscv/mm/Makefile | 21 +++ .../selftests/riscv/mm/testcases/mmap.c | 133 ++++++++++++++++++ 4 files changed, 156 insertions(+), 1 deletion(-) create mode 100644 tools/testing/selftests/riscv/mm/.gitignore create mode 100644 tools/testing/selftests/riscv/mm/Makefile create mode 100644 tools/testing/selftests/riscv/mm/testcases/mmap.c diff --git a/tools/testing/selftests/riscv/Makefile b/tools/testing/selftests/riscv/Makefile index 9dd629cc86aa..1b79da90396e 100644 --- a/tools/testing/selftests/riscv/Makefile +++ b/tools/testing/selftests/riscv/Makefile @@ -5,7 +5,7 @@ ARCH ?= $(shell uname -m 2>/dev/null || echo not) ifneq (,$(filter $(ARCH),riscv)) -RISCV_SUBTARGETS ?= hwprobe vector +RISCV_SUBTARGETS ?= hwprobe vector mm else RISCV_SUBTARGETS := endif diff --git a/tools/testing/selftests/riscv/mm/.gitignore b/tools/testing/selftests/riscv/mm/.gitignore new file mode 100644 index 000000000000..9a6f303edcd3 --- /dev/null +++ b/tools/testing/selftests/riscv/mm/.gitignore @@ -0,0 +1 @@ +mmap diff --git a/tools/testing/selftests/riscv/mm/Makefile b/tools/testing/selftests/riscv/mm/Makefile new file mode 100644 index 000000000000..cf68e63e7495 --- /dev/null +++ b/tools/testing/selftests/riscv/mm/Makefile @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: GPL-2.0 +# Originally tools/testing/selftests/arm64/signal + +# Additional include paths needed by kselftest.h and local headers +CFLAGS += -D_GNU_SOURCE -std=gnu99 -I. + +SRCS := $(filter-out testcases/testcases.c,$(wildcard testcases/*.c)) +PROGS := $(patsubst %.c,%,$(SRCS)) + +# Generated binaries to be installed by top KSFT script +TEST_GEN_PROGS := $(notdir $(PROGS)) + +# Get Kernel headers installed and use them. + +# Including KSFT lib.mk here will also mangle the TEST_GEN_PROGS list +# to account for any OUTPUT target-dirs optionally provided by +# the toplevel makefile +include ../../lib.mk + +$(TEST_GEN_PROGS): $(PROGS) + cp $(PROGS) $(OUTPUT)/ diff --git a/tools/testing/selftests/riscv/mm/testcases/mmap.c b/tools/testing/selftests/riscv/mm/testcases/mmap.c new file mode 100644 index 000000000000..d8e751f7b8c9 --- /dev/null +++ b/tools/testing/selftests/riscv/mm/testcases/mmap.c @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include + +#include "../../kselftest_harness.h" +struct addresses { + int *no_hint; + int *on_37_addr; + int *on_38_addr; + int *on_46_addr; + int *on_47_addr; + int *on_55_addr; + int *on_56_addr; +}; + +void do_mmaps(struct addresses *mmap_addresses) +{ + // Place all of the hint addresses on the boundaries of mmap + // sv39, sv48, sv57 + // User addresses end at 1<<38, 1<<47, 1<<56 respectively + void *on_37_bits = (void *)(1UL << 37); + void *on_38_bits = (void *)(1UL << 38); + void *on_46_bits = (void *)(1UL << 46); + void *on_47_bits = (void *)(1UL << 47); + void *on_55_bits = (void *)(1UL << 55); + void *on_56_bits = (void *)(1UL << 56); + + int prot = PROT_READ | PROT_WRITE; + int flags = MAP_PRIVATE | MAP_ANONYMOUS; + + mmap_addresses->no_hint = + mmap(NULL, 5 * sizeof(int), prot, flags, 0, 0); + mmap_addresses->on_37_addr = + mmap(on_37_bits, 5 * sizeof(int), prot, flags, 0, 0); + mmap_addresses->on_38_addr = + mmap(on_38_bits, 5 * sizeof(int), prot, flags, 0, 0); + mmap_addresses->on_46_addr = + mmap(on_46_bits, 5 * sizeof(int), prot, flags, 0, 0); + mmap_addresses->on_47_addr = + mmap(on_47_bits, 5 * sizeof(int), prot, flags, 0, 0); + mmap_addresses->on_55_addr = + mmap(on_55_bits, 5 * sizeof(int), prot, flags, 0, 0); + mmap_addresses->on_56_addr = + mmap(on_56_bits, 5 * sizeof(int), prot, flags, 0, 0); +} + +TEST(default_rlimit) +{ +// Only works on 64 bit +#if __riscv_xlen == 64 + struct addresses mmap_addresses; + + do_mmaps(&mmap_addresses); + + EXPECT_NE(mmap_addresses.no_hint, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_37_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_38_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_46_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_47_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_55_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_56_addr, MAP_FAILED); + + EXPECT_LT((unsigned long)mmap_addresses.no_hint, 1UL << 47); + EXPECT_LT((unsigned long)mmap_addresses.on_37_addr, 1UL << 38); + EXPECT_LT((unsigned long)mmap_addresses.on_38_addr, 1UL << 38); + EXPECT_LT((unsigned long)mmap_addresses.on_46_addr, 1UL << 38); + EXPECT_LT((unsigned long)mmap_addresses.on_47_addr, 1UL << 47); + EXPECT_LT((unsigned long)mmap_addresses.on_55_addr, 1UL << 47); + EXPECT_LT((unsigned long)mmap_addresses.on_56_addr, 1UL << 56); +#endif +} + +TEST(zero_rlimit) +{ +// Only works on 64 bit +#if __riscv_xlen == 64 + struct addresses mmap_addresses; + struct rlimit rlim_new = { .rlim_cur = 0, .rlim_max = RLIM_INFINITY }; + + setrlimit(RLIMIT_STACK, &rlim_new); + + do_mmaps(&mmap_addresses); + + EXPECT_NE(mmap_addresses.no_hint, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_37_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_38_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_46_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_47_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_55_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_56_addr, MAP_FAILED); + + EXPECT_LT((unsigned long)mmap_addresses.no_hint, 1UL << 47); + EXPECT_LT((unsigned long)mmap_addresses.on_37_addr, 1UL << 38); + EXPECT_LT((unsigned long)mmap_addresses.on_38_addr, 1UL << 38); + EXPECT_LT((unsigned long)mmap_addresses.on_46_addr, 1UL << 38); + EXPECT_LT((unsigned long)mmap_addresses.on_47_addr, 1UL << 47); + EXPECT_LT((unsigned long)mmap_addresses.on_55_addr, 1UL << 47); + EXPECT_LT((unsigned long)mmap_addresses.on_56_addr, 1UL << 56); +#endif +} + +TEST(infinite_rlimit) +{ +// Only works on 64 bit +#if __riscv_xlen == 64 + struct addresses mmap_addresses; + struct rlimit rlim_new = { .rlim_cur = RLIM_INFINITY, + .rlim_max = RLIM_INFINITY }; + + setrlimit(RLIMIT_STACK, &rlim_new); + + do_mmaps(&mmap_addresses); + + EXPECT_NE(mmap_addresses.no_hint, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_37_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_38_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_46_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_47_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_55_addr, MAP_FAILED); + EXPECT_NE(mmap_addresses.on_56_addr, MAP_FAILED); + + EXPECT_LT((unsigned long)mmap_addresses.no_hint, 1UL << 47); + EXPECT_LT((unsigned long)mmap_addresses.on_37_addr, 1UL << 38); + EXPECT_LT((unsigned long)mmap_addresses.on_38_addr, 1UL << 38); + EXPECT_LT((unsigned long)mmap_addresses.on_46_addr, 1UL << 38); + EXPECT_LT((unsigned long)mmap_addresses.on_47_addr, 1UL << 47); + EXPECT_LT((unsigned long)mmap_addresses.on_55_addr, 1UL << 47); + EXPECT_LT((unsigned long)mmap_addresses.on_56_addr, 1UL << 56); +#endif +} + +TEST_HARNESS_MAIN From patchwork Fri Jul 14 16:54:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Charlie Jenkins X-Patchwork-Id: 703454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC4F7C001B0 for ; Fri, 14 Jul 2023 16:56:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236168AbjGNQ4E (ORCPT ); Fri, 14 Jul 2023 12:56:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236121AbjGNQ4B (ORCPT ); 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Fri, 14 Jul 2023 09:55:59 -0700 (PDT) From: Charlie Jenkins To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: charlie@rivosinc.com, conor@kernel.org, paul.walmsley@sifive.com, palmer@rivosinc.com, aou@eecs.berkeley.edu, anup@brainfault.org, konstantin@linuxfoundation.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-mm@kvack.org, mick@ics.forth.gr, jrtc27@jrtc27.com, rdunlap@infradead.org, alexghiti@rivosinc.com Subject: [PATCH v6 3/4] RISC-V: mm: Update pgtable comment documentation Date: Fri, 14 Jul 2023 09:54:51 -0700 Message-ID: <20230714165508.94561-4-charlie@rivosinc.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230714165508.94561-1-charlie@rivosinc.com> References: <20230714165508.94561-1-charlie@rivosinc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org sv57 is supported in the kernel so pgtable.h should reflect that. Signed-off-by: Charlie Jenkins Reviewed-by: Alexandre Ghiti --- arch/riscv/include/asm/pgtable.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index e13f5872bfe9..28660bab754c 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -840,14 +840,16 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte) * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32. * Note that PGDIR_SIZE must evenly divide TASK_SIZE. * Task size is: - * - 0x9fc00000 (~2.5GB) for RV32. - * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu - * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu + * - 0x9fc00000 (~2.5GB) for RV32. + * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu + * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu + * - 0x100000000000000 ( 64PB) for RV64 using SV57 mmu * * Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V * Instruction Set Manual Volume II: Privileged Architecture" states that * "load and store effective addresses, which are 64bits, must have bits * 63–48 all equal to bit 47, or else a page-fault exception will occur." + * Similarly for SV57, bits 63–57 must be equal to bit 56. */ #ifdef CONFIG_64BIT #define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2) From patchwork Fri Jul 14 16:54:52 2023 Content-Type: text/plain; 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Signed-off-by: Charlie Jenkins --- Documentation/riscv/vm-layout.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/riscv/vm-layout.rst b/Documentation/riscv/vm-layout.rst index 5462c84f4723..892412b91300 100644 --- a/Documentation/riscv/vm-layout.rst +++ b/Documentation/riscv/vm-layout.rst @@ -133,3 +133,25 @@ RISC-V Linux Kernel SV57 ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | modules, BPF ffffffff80000000 | -2 GB | ffffffffffffffff | 2 GB | kernel __________________|____________|__________________|_________|____________________________________________________________ + + +Userspace VAs +-------------------- +To maintain compatibility with software that relies on the VA space with a +maximum of 48 bits the kernel will, by default, return virtual addresses to +userspace from a 48-bit range (sv48). This default behavior is achieved by +passing 0 into the hint address parameter of mmap. On CPUs with an address space +smaller than sv48, the CPU maximum supported address space will be the default. + +Software can "opt-in" to receiving VAs from another VA space by providing +a hint address to mmap. A call to mmap is guaranteed to return an address +that will not override the unset left-aligned bits in the hint address, +unless there is no space left in the address space. If there is no space +available in the requested address space, an address in the next smallest +available address space will be returned. + +For example, in order to obtain 48-bit VA space, a hint address greater than +:code:`1 << 38` must be provided. Note that this is 38 due to sv39 userspace +ending at :code:`1 << 38` and the addresses beyond this are reserved for the +kernel. Similarly, to obtain 57-bit VA space addresses, a hint address greater +than or equal to :code:`1 << 47` must be provided.