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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id p14-20020a2ea40e000000b002b6c8cf48bfsm913135ljn.104.2023.07.12.05.11.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 05:11:46 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 1/8] dt-bindings: display/msm: Add reg bus and rotator interconnects Date: Wed, 12 Jul 2023 15:11:38 +0300 Message-Id: <20230712121145.1994830-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> References: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Konrad Dybcio Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are other connection paths: - a path that connects rotator block to the DDR. - a path that needs to be handled to ensure MDSS register access functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG interconnect. Describe these paths bindings to allow using them in device trees and in the driver Signed-off-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/display/msm/mdss-common.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml index ccd7d6417523..30a8aed4289a 100644 --- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml +++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml @@ -66,12 +66,14 @@ properties: items: - description: Interconnect path from mdp0 (or a single mdp) port to the data bus - description: Interconnect path from mdp1 port to the data bus + - description: Interconnect path from CPU to the reg bus interconnect-names: minItems: 1 items: - const: mdp0-mem - const: mdp1-mem + - const: cpu-cfg resets: items: From patchwork Wed Jul 12 12:11:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 702875 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4702C001DE for ; Wed, 12 Jul 2023 12:11:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232201AbjGLMLv (ORCPT ); Wed, 12 Jul 2023 08:11:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231298AbjGLMLu (ORCPT ); Wed, 12 Jul 2023 08:11:50 -0400 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B0E62E53 for ; Wed, 12 Jul 2023 05:11:49 -0700 (PDT) Received: by mail-lj1-x234.google.com with SMTP id 38308e7fff4ca-2b701e1c80fso107033591fa.2 for ; Wed, 12 Jul 2023 05:11:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689163908; x=1691755908; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ak/4m2ZtLvYsyQLN5mEcIECptOKDjtOww2+EFLTDsFA=; b=UT/DL+yvtZwqu8Bw23s8gXkNmEjkOvr29JajtyZR9zNdl03auXUWImanRKSlZPBJrC Wt5acaLsfMKYnw8oxQI1IhiKwWfbjW9ZJfTPtBqmq/NFT6+GPjGVqqpfUMbPK1Nc4yrW 3qmDC9Ph6gQg78sJeax0MHZKyUa8H0PIlY3rQ+yUnHaUiKrYr23pMlLoR92Tltjay5WZ ekj29n2mclpJ8h6Z033ppqbBN8iSjYBIGxgu/W3bdEOw7SVtRWeIgKgPwJ9C6E6hSpRw 63XKn2KIuBQbZVNKJewLsI4Kt9E7A0fTecABJRV/r/RqClFUM4rCurjde4lEg0i/ZdnT ZMmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689163908; x=1691755908; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ak/4m2ZtLvYsyQLN5mEcIECptOKDjtOww2+EFLTDsFA=; b=IuAbdPGg0lihlfXAuNkRnRm6VAlC5jiY5Zhot36y5fvVZ46vdASdEnrUL6qpO+Kced vC4gNM9Z8OrXkiGSnXbA9IsuahpR/LtRyrbmCL2F06gGlBs6hK8/NinwdUd/xrY/iX1c E0lIESUKwi0DoK0f0CQOGiNIj2hCjGN7h7KOmPsyXjknWCC9v73zHKfFVksmav2CLCUg WZKxuYSrum4Z+aeCHAdOnNeDN/Hol9xAAc+By6esW3nj933cKcAxaB8oNVxZ1KOpPGT1 7m/vzPB6dbNLCwA3yigKPKZwguFpTss0xECET4c9lSe+lzACHwd7F65cdeFt8nLw0uOk Wlqg== X-Gm-Message-State: ABy/qLYS3p7UWdI0DGxOls8QQTgS2xA8EFo2b4rBdGL9CVsf4WwND8CB Kt8YiHEV3PjLTOgnYeJeDVMMUQ== X-Google-Smtp-Source: APBJJlEy9OFzVSND7Rz0PWrlHPMarIxtgAW71RzV0taqj1FGBSFbaTJ11xkPWaHQS1oMiGcJRHm7Jw== X-Received: by 2002:a2e:7019:0:b0:2b6:da64:734f with SMTP id l25-20020a2e7019000000b002b6da64734fmr15443800ljc.47.1689163908053; Wed, 12 Jul 2023 05:11:48 -0700 (PDT) Received: from eriador.lan (dzdqv0yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id p14-20020a2ea40e000000b002b6c8cf48bfsm913135ljn.104.2023.07.12.05.11.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 05:11:47 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 2/8] drm/msm/mdss: correct UBWC programming for SM8550 Date: Wed, 12 Jul 2023 15:11:39 +0300 Message-Id: <20230712121145.1994830-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> References: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The SM8550 platform employs newer UBWC decoder, which requires slightly different programming. Fixes: a2f33995c19d ("drm/msm: mdss: add support for SM8550") Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 05648c910c68..798bd4f3b662 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -189,6 +189,7 @@ static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss) #define UBWC_2_0 0x20000000 #define UBWC_3_0 0x30000000 #define UBWC_4_0 0x40000000 +#define UBWC_4_3 0x40030000 static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss) { @@ -227,7 +228,10 @@ static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss) writel_relaxed(1, msm_mdss->mmio + UBWC_CTRL_2); writel_relaxed(0, msm_mdss->mmio + UBWC_PREDICTION_MODE); } else { - writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2); + if (data->ubwc_dec_version == UBWC_4_3) + writel_relaxed(3, msm_mdss->mmio + UBWC_CTRL_2); + else + writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2); writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE); } } @@ -271,6 +275,7 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) msm_mdss_setup_ubwc_dec_30(msm_mdss); break; case UBWC_4_0: + case UBWC_4_3: msm_mdss_setup_ubwc_dec_40(msm_mdss); break; default: @@ -569,6 +574,16 @@ static const struct msm_mdss_data sm8250_data = { .macrotile_mode = 1, }; +static const struct msm_mdss_data sm8550_data = { + .ubwc_version = UBWC_4_0, + .ubwc_dec_version = UBWC_4_3, + .ubwc_swizzle = 6, + .ubwc_static = 1, + /* TODO: highest_bank_bit = 2 for LP_DDR4 */ + .highest_bank_bit = 3, + .macrotile_mode = 1, +}; + static const struct of_device_id mdss_dt_match[] = { { .compatible = "qcom,mdss" }, { .compatible = "qcom,msm8998-mdss" }, @@ -585,7 +600,7 @@ static const struct of_device_id mdss_dt_match[] = { { .compatible = "qcom,sm8250-mdss", .data = &sm8250_data }, { .compatible = "qcom,sm8350-mdss", .data = &sm8250_data }, { .compatible = "qcom,sm8450-mdss", .data = &sm8250_data }, - { .compatible = "qcom,sm8550-mdss", .data = &sm8250_data }, + { .compatible = "qcom,sm8550-mdss", .data = &sm8550_data }, {} }; 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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id p14-20020a2ea40e000000b002b6c8cf48bfsm913135ljn.104.2023.07.12.05.11.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 05:11:48 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 3/8] drm/msm/mdss: switch mdss to use devm_of_icc_get() Date: Wed, 12 Jul 2023 15:11:40 +0300 Message-Id: <20230712121145.1994830-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> References: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Stop using hand-written reset function for ICC release, use devm_of_icc_get() instead. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 798bd4f3b662..304a6509e1fb 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -58,14 +58,14 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, struct icc_path *path0; struct icc_path *path1; - path0 = of_icc_get(dev, "mdp0-mem"); + path0 = devm_of_icc_get(dev, "mdp0-mem"); if (IS_ERR_OR_NULL(path0)) return PTR_ERR_OR_ZERO(path0); msm_mdss->path[0] = path0; msm_mdss->num_paths = 1; - path1 = of_icc_get(dev, "mdp1-mem"); + path1 = devm_of_icc_get(dev, "mdp1-mem"); if (!IS_ERR_OR_NULL(path1)) { msm_mdss->path[1] = path1; msm_mdss->num_paths++; @@ -74,15 +74,6 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, return 0; } -static void msm_mdss_put_icc_path(void *data) -{ - struct msm_mdss *msm_mdss = data; - int i; - - for (i = 0; i < msm_mdss->num_paths; i++) - icc_put(msm_mdss->path[i]); -} - static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw) { int i; @@ -389,9 +380,6 @@ static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5 dev_dbg(&pdev->dev, "mapped mdss address space @%pK\n", msm_mdss->mmio); ret = msm_mdss_parse_data_bus_icc_path(&pdev->dev, msm_mdss); - if (ret) - return ERR_PTR(ret); - ret = devm_add_action_or_reset(&pdev->dev, msm_mdss_put_icc_path, msm_mdss); if (ret) return ERR_PTR(ret); From patchwork Wed Jul 12 12:11:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 702874 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA20EC00528 for ; Wed, 12 Jul 2023 12:11:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232727AbjGLMLx (ORCPT ); Wed, 12 Jul 2023 08:11:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231918AbjGLMLw (ORCPT ); Wed, 12 Jul 2023 08:11:52 -0400 Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 68EA8E53 for ; Wed, 12 Jul 2023 05:11:51 -0700 (PDT) Received: by mail-lj1-x232.google.com with SMTP id 38308e7fff4ca-2b734aea34aso19723201fa.0 for ; Wed, 12 Jul 2023 05:11:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689163909; x=1691755909; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rgNwhxKw4bZ5s3ucnef5zeiAhvXraBKd19jFSLqsoHo=; b=Xxn+9ZtM1kISF8G9nVeegH/A6WkZuCAm2YNYaVXpgwQFrcxyVO3yDfweNVTo1QQcrI /fLBioGmRtQu+F0rNf3s8E2pUJg7snx91MzqrHPUTSa19+fRvMlT0J0/TmDnLe5LKXvC 5bhFxIuQEZqlLjx7hEzlkxyMKxmc/1CIIKkvJL4NarAEllpvzo5X85W6z75HoJVU4Yfd 0dtW4QvFdpfUjEryhZlHaIXJrdKIeKyBsNcExxFoW7rSkui9NeZRbm488zHQtyUhBYfj FmYz0aEJtLUWS4MkBmXDinhO5XfilIPufWDo6JbZFSyPE866cYtPueRHdSsQbZSK4bIp 8RXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689163909; x=1691755909; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rgNwhxKw4bZ5s3ucnef5zeiAhvXraBKd19jFSLqsoHo=; b=V28Pjur8QpyQAB+r2UqGUWMEN2UFYrKFJ+uO215Hn+Dt4QAY61oRMiFkBmHTYqKifZ Fynkx4B7UfJfxuHtiRoyL+m1anHyDCt/3wDznHfz5o0K22uEHr8D9JR0DgjurJkmMHgG pDJDx7Gi/bdhCo9I+40KhvsWO7sGmRTi4yQOx21TqlCFEJ4Gg1QTyQxQiW/bpnrY5/eb rHGPHALHAatq0DMRLEhOjmObRq+p0ujdjOvaHAgCyfNIvO87KOQZpiev7X/1UXUELavR UOh/vHQcNbuw2jvfMJk5ve27kNHGB8P4mE8GHKFeWtZlgfboRid0PRDqhCtHa7IPbIVr m0Ew== X-Gm-Message-State: ABy/qLZ+R+nl7jOfG2/y+1zAX6sWrNj6SFn/n0/s60IyL3HzrywwIuGb TWwdRgQotWWEPcFwVf78n2UzmQ== X-Google-Smtp-Source: APBJJlEoBVM7oIZB/8fguZjY6IW3oxraLQ8m9VrI4T5KyvjsWvgOEl+fZugMh6fH6yINf2SjFudqWA== X-Received: by 2002:a2e:300a:0:b0:2b5:9d78:213e with SMTP id w10-20020a2e300a000000b002b59d78213emr15976449ljw.22.1689163909736; Wed, 12 Jul 2023 05:11:49 -0700 (PDT) Received: from eriador.lan (dzdqv0yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id p14-20020a2ea40e000000b002b6c8cf48bfsm913135ljn.104.2023.07.12.05.11.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 05:11:49 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 4/8] drm/msm/mdss: Rename path references to mdp_path Date: Wed, 12 Jul 2023 15:11:41 +0300 Message-Id: <20230712121145.1994830-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> References: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Konrad Dybcio The DPU1 driver needs to handle all MDPn<->DDR paths, as well as CPU<->SLAVE_DISPLAY_CFG. The former ones share how their values are calculated, but the latter one has static predefines spanning all SoCs. In preparation for supporting the CPU<->SLAVE_DISPLAY_CFG path, rename the path-related struct members to include "mdp_". Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 304a6509e1fb..809c93b22c9c 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -48,8 +48,8 @@ struct msm_mdss { struct irq_domain *domain; } irq_controller; const struct msm_mdss_data *mdss_data; - struct icc_path *path[2]; - u32 num_paths; + struct icc_path *mdp_path[2]; + u32 num_mdp_paths; }; static int msm_mdss_parse_data_bus_icc_path(struct device *dev, @@ -62,13 +62,13 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, if (IS_ERR_OR_NULL(path0)) return PTR_ERR_OR_ZERO(path0); - msm_mdss->path[0] = path0; - msm_mdss->num_paths = 1; + msm_mdss->mdp_path[0] = path0; + msm_mdss->num_mdp_paths = 1; path1 = devm_of_icc_get(dev, "mdp1-mem"); if (!IS_ERR_OR_NULL(path1)) { - msm_mdss->path[1] = path1; - msm_mdss->num_paths++; + msm_mdss->mdp_path[1] = path1; + msm_mdss->num_mdp_paths++; } return 0; @@ -78,8 +78,8 @@ static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw) { int i; - for (i = 0; i < msm_mdss->num_paths; i++) - icc_set_bw(msm_mdss->path[i], 0, Bps_to_icc(bw)); + for (i = 0; i < msm_mdss->num_mdp_paths; i++) + icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(bw)); } static void msm_mdss_irq(struct irq_desc *desc) From patchwork Wed Jul 12 12:11:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 701918 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 772F0EB64DA for ; Wed, 12 Jul 2023 12:11:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232375AbjGLMLy (ORCPT ); Wed, 12 Jul 2023 08:11:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232444AbjGLMLx (ORCPT ); Wed, 12 Jul 2023 08:11:53 -0400 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B450B0 for ; Wed, 12 Jul 2023 05:11:52 -0700 (PDT) Received: by mail-lj1-x234.google.com with SMTP id 38308e7fff4ca-2b6a6f224a1so113250471fa.1 for ; Wed, 12 Jul 2023 05:11:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689163910; x=1691755910; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5iZ0+Rb7OzxR3irzWy7ik4oLco7UtnIIF/OZqFHjCIs=; b=aSZ9ilttYU+oSle6nCG2IVtk1rk3rDuPmBpxMOfjmKcp8vpugsla43dadeFsxtnWxg fvo/41dbSc9DK4Qc7MPMGXC9oUKyMaaXuVVVoaCHmHG3O9vXh3Dm1g7pJLZQITs7A0tM bGrbkXRwqgIwVFsbu+aO9pdiiPUMCu6feFhJnelOg/4qXVYLYHzslTrvBzkCNDQ+eUS8 GCDUpW7sdRvmvreQCXJ507BdpVeJUr6UpJ4N5z6dO9ZRW8A8AI302T0mRVBqrjgAn6TJ oTY3UWliClm0JkwFIqMrL5t+2xvU7F7NJQ+h86G6bJEFXO7pvklCnVc1+i0b+9hpF38Q /lPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689163910; x=1691755910; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5iZ0+Rb7OzxR3irzWy7ik4oLco7UtnIIF/OZqFHjCIs=; b=Zfp/Tj+GPiyERicnDwQJn++w0xH9XGxzqK2gMG+1AatW6VH4vTwEwF+0TJkgdUIuAG qDAoHlqh4Yw7ywVsJkDMldVFJys5LLrLv5+Rji4A7F5W31Lvtu1C8bRKTeYDjYKPHWHx OAd7z9cS9kfHzwCTMmo20+feVJyUVZfZr0MnSftWVtupRf54P1WrFwmeJxaMtlPEKGCI aoucJsQYaCq/Fu/GIkUd41nvL09Pnyc+f16MbnhZMYgLwHkH4yy3BkfU8XBIjToyMBla epc9AGerfcfT759ipguPaFMbx6tmHvs5UaMhmL33DPYGgmqyt+D5TckY1JQ+kiJaf/kb hBqQ== X-Gm-Message-State: ABy/qLbh5JrbKIqFrBI7ACYfx00t3V0CRUyU+TdLQoqmDCnQy8YfMMhi 24Ds6J91NrvkGlCEKZTH7z47aA== X-Google-Smtp-Source: APBJJlHmYa93PvlTRuFcmYOEMhmlhwu+khLDXsukQ2doZ6JboJHZ9ZKKwGLZ+XfYKmA8LUkqKTWRLQ== X-Received: by 2002:a2e:894d:0:b0:2b6:9ebc:daed with SMTP id b13-20020a2e894d000000b002b69ebcdaedmr17610674ljk.35.1689163910531; Wed, 12 Jul 2023 05:11:50 -0700 (PDT) Received: from eriador.lan (dzdqv0yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id p14-20020a2ea40e000000b002b6c8cf48bfsm913135ljn.104.2023.07.12.05.11.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 05:11:50 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 5/8] drm/msm/mdss: inline msm_mdss_icc_request_bw() Date: Wed, 12 Jul 2023 15:11:42 +0300 Message-Id: <20230712121145.1994830-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> References: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org There are just two places where we set the bandwidth: in the resume and in the suspend paths. Drop the wrapping function msm_mdss_icc_request_bw() and call icc_set_bw() directly. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 809c93b22c9c..eed96976e260 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -74,14 +74,6 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, return 0; } -static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw) -{ - int i; - - for (i = 0; i < msm_mdss->num_mdp_paths; i++) - icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(bw)); -} - static void msm_mdss_irq(struct irq_desc *desc) { struct msm_mdss *msm_mdss = irq_desc_get_handler_data(desc); @@ -229,14 +221,15 @@ static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss) static int msm_mdss_enable(struct msm_mdss *msm_mdss) { - int ret; + int ret, i; /* * Several components have AXI clocks that can only be turned on if * the interconnect is enabled (non-zero bandwidth). Let's make sure * that the interconnects are at least at a minimum amount. */ - msm_mdss_icc_request_bw(msm_mdss, MIN_IB_BW); + for (i = 0; i < msm_mdss->num_mdp_paths; i++) + icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(MIN_IB_BW)); ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks); if (ret) { @@ -284,8 +277,12 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) static int msm_mdss_disable(struct msm_mdss *msm_mdss) { + int i; + clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks); - msm_mdss_icc_request_bw(msm_mdss, 0); + + for (i = 0; i < msm_mdss->num_mdp_paths; i++) + icc_set_bw(msm_mdss->mdp_path[i], 0, 0); return 0; } From patchwork Wed Jul 12 12:11:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 702873 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CD7DC0015E for ; Wed, 12 Jul 2023 12:11:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232876AbjGLML4 (ORCPT ); Wed, 12 Jul 2023 08:11:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33012 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232839AbjGLMLy (ORCPT ); Wed, 12 Jul 2023 08:11:54 -0400 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 165FFE6F for ; Wed, 12 Jul 2023 05:11:53 -0700 (PDT) Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2b6f97c7115so106571131fa.2 for ; Wed, 12 Jul 2023 05:11:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689163911; x=1691755911; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uNZFmX7gcXRBmp8B+5W4dnLTGHdcrGFIl5CEA8Bzego=; b=iCePqPPCMPLuUzlqxQ+lKSUAeSsYTM+SCHjJeNcu6bNOZ37iYIKoaNjUexmxSz3zOe SIZdRD9oOcrRDVmdXmdMw1imzGon/cy7x/Ty72lH6+MLI+QdEaqkWixbEgCsb05bIsRZ P7avd/cUPPxsQyBpKwcAwczf4guqnjmsXIwmoo/Vq2AK1Wx7SEKRCDSaZRW5pcLv+4ey QwqfFaBJUtZuqqWR1CdifoSMrojRyotiabzTGYKY38Nghe54+cWqzmCxYpEtZ0ay3ucx Trnmbtl/9+N8fyihdmn/L5aTvW/Wmq7/x8Xmt40ZfKqIvxavFlmzM6cKOPK4qrMUwsSo LlBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689163911; x=1691755911; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uNZFmX7gcXRBmp8B+5W4dnLTGHdcrGFIl5CEA8Bzego=; b=HYkFHcXldLTnA+AvONrxv7dZtXL0vRGus9WdxIgBlOAtBMjsLhwi14ziE7QHfoEghY bwDPgNEJ1dhEiv77TUGSJpczJJW+ivfqFC40rM0tQ2qtcnDGTJ4k//hY6IoWIgQZcFAm CsmQwuu2gBWY3mSp94jztmQ0RiXYWOUe+DjKAckZ4k2c5RwI9TPMyvSZY6KXxplQYToJ SbFh9rS2rb0u2J9DCMg1CGWE5pkfjyNdLYa5dbps6jkC2+Uq1QAOOl+BX7pkYoLlgmBL AXi3BVOh4QXQfYVqkmo8ZHlPi8I8UyBhd2maXdg4zMAQA5zrKXrM+DZQXeO7hMeM1TSl tCDg== X-Gm-Message-State: ABy/qLbeJhrrDsB85TYAZ//3ohMjG81VQzcLFsNL1TsXs78aDwzIiDhX q0a+4OsPzePK1Q3CQ/ZB25uRWQ== X-Google-Smtp-Source: APBJJlGTHLWHCt+uPNQGZcuNVTTt5bfMQ8LwlI5HzJnPrZf5Ef2Zp3hT55dvGsAQA6XF/k5rA9i6VQ== X-Received: by 2002:a2e:91d7:0:b0:2b6:e0b8:946e with SMTP id u23-20020a2e91d7000000b002b6e0b8946emr16285134ljg.51.1689163911242; Wed, 12 Jul 2023 05:11:51 -0700 (PDT) Received: from eriador.lan (dzdqv0yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id p14-20020a2ea40e000000b002b6c8cf48bfsm913135ljn.104.2023.07.12.05.11.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 05:11:50 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 6/8] drm/msm/mdss: populate missing data Date: Wed, 12 Jul 2023 15:11:43 +0300 Message-Id: <20230712121145.1994830-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> References: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org As we are going to use MDSS data for DPU programming, populate missing MDSS data. The UBWC 1.0 and no UBWC cases do not require MDSS programming, so skip them. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index eed96976e260..b7765e63d549 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -252,6 +252,10 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) * UBWC_n and the rest of params comes from hw data. */ switch (msm_mdss->mdss_data->ubwc_dec_version) { + case 0: /* no UBWC */ + case UBWC_1_0: + /* do nothing */ + break; case UBWC_2_0: msm_mdss_setup_ubwc_dec_20(msm_mdss); break; @@ -491,10 +495,22 @@ static int mdss_remove(struct platform_device *pdev) return 0; } +static const struct msm_mdss_data msm8998_data = { + .ubwc_version = UBWC_1_0, + .ubwc_dec_version = UBWC_1_0, + .highest_bank_bit = 1, +}; + +static const struct msm_mdss_data qcm2290_data = { + /* no UBWC */ + .highest_bank_bit = 0x2, +}; + static const struct msm_mdss_data sc7180_data = { .ubwc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, .ubwc_static = 0x1e, + .highest_bank_bit = 0x3, }; static const struct msm_mdss_data sc7280_data = { @@ -547,6 +563,7 @@ static const struct msm_mdss_data sm6115_data = { .ubwc_dec_version = UBWC_2_0, .ubwc_swizzle = 7, .ubwc_static = 0x11f, + .highest_bank_bit = 0x1, }; static const struct msm_mdss_data sm8250_data = { @@ -571,8 +588,8 @@ static const struct msm_mdss_data sm8550_data = { static const struct of_device_id mdss_dt_match[] = { { .compatible = "qcom,mdss" }, - { .compatible = "qcom,msm8998-mdss" }, - { .compatible = "qcom,qcm2290-mdss" }, + { .compatible = "qcom,msm8998-mdss", .data = &msm8998_data }, + { .compatible = "qcom,qcm2290-mdss", .data = &qcm2290_data }, { .compatible = "qcom,sdm845-mdss", .data = &sdm845_data }, { .compatible = "qcom,sc7180-mdss", .data = &sc7180_data }, { .compatible = "qcom,sc7280-mdss", .data = &sc7280_data }, From patchwork Wed Jul 12 12:11:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 702872 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D10FEB64DD for ; Wed, 12 Jul 2023 12:11:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232777AbjGLML5 (ORCPT ); Wed, 12 Jul 2023 08:11:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232894AbjGLML4 (ORCPT ); Wed, 12 Jul 2023 08:11:56 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DBE2100 for ; Wed, 12 Jul 2023 05:11:53 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id 2adb3069b0e04-4fb73ba3b5dso11230669e87.1 for ; Wed, 12 Jul 2023 05:11:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689163912; x=1691755912; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qyV0+Npg+ldHLypErOjheTdkIjwUmedLsHu5ro4khZQ=; b=iZTvWyXwKefrs/gWaxeLjsB4SJQv8/chLBK7Fc5SaKXKLwbv4i8Ee1mQD0U9kVXTHW pQJur6LkLZdBuEzXWkMOTjWbYM5idIEgaJseVMzyarZl43QDcb20QzGU91/fWo2c2J6z rbCdyVZ5HXDnW5auNyD0G9V0Oba3qSSs2GWGzNOa/4E9DYLSojKTqyJRv2Qut5Itdl6r 9XwA7n/u7a5DSg3E5JAuCirniI5AY4Oc9HMH+bQyA+xiJRpSqR9g5WQULhcYVjwweHFY zr9OyK6XTsl6o72yMjzDyNJ5brnLzxGoGmWiQxkmVyqcg1pQxvhSDzt1q4Vb2MaZL761 CBTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689163912; x=1691755912; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qyV0+Npg+ldHLypErOjheTdkIjwUmedLsHu5ro4khZQ=; b=Um02L8eddAF8R2dfpDtjYkFdjT9tGVNw0z9RuHTSLMy181/ttZINrwj46w/K6o3qid tJdYFt++Wub3WRGQ/2/6DqPHjQFoJkbZyDfZZDNUZGlTumZZGqwhGf7I2HY039H+tLxi WW/d72rnkOS9CPzRECyhfsVgwfFz/aaRie9RigtzAdCdLOAyiovpJXkGNV7me/1PKTqk wGjxFayb1fYm4Na0l48E8fUYPs7SAsGjmj95bUKYZGKqhOzKXNnH/DQpABdx412Mdcts UBhrydaufMh2pskSUgijr4t2YcDc1g5qmpleurUwGhE0T5h0FjItT5gIapcnQ09D2efU xoJQ== X-Gm-Message-State: ABy/qLarY234aua9TNmjUrL1FlD8EMm/YIz02lyTpPoBzIkd2vp15ONW jozx/axL9V/um8csszJsSEP8tg== X-Google-Smtp-Source: APBJJlGzhlyvuLzBg2q+ajIwIRjr/XqGv3G33g9PA25vT4v9H0mvGKAEXyPAFCbIlwlu5/81kKrXWA== X-Received: by 2002:a2e:9959:0:b0:2b6:d495:9467 with SMTP id r25-20020a2e9959000000b002b6d4959467mr15212771ljj.6.1689163912093; Wed, 12 Jul 2023 05:11:52 -0700 (PDT) Received: from eriador.lan (dzdqv0yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id p14-20020a2ea40e000000b002b6c8cf48bfsm913135ljn.104.2023.07.12.05.11.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 05:11:51 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 7/8] drm/msm/mdss: Handle the reg bus ICC path Date: Wed, 12 Jul 2023 15:11:44 +0300 Message-Id: <20230712121145.1994830-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> References: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there's another path that needs to be handled to ensure MDSS functions properly, namely the "reg bus", a.k.a the CPU-MDSS interconnect. Gating that path may have a variety of effects, from none to otherwise inexplicable DSI timeouts. Provide a way for MDSS driver to vote on this bus. A note regarding vote values. Newer platforms have corresponding bandwidth values in the vendor DT files. For the older platforms there was a static vote in the mdss_mdp and rotator drivers. I choose to be conservative here and choose this value as a default. Co-developed-by: Konrad Dybcio Signed-off-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 51 +++++++++++++++++++++++++++++++--- 1 file changed, 47 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index b7765e63d549..ee31a9ab88d4 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -26,6 +26,8 @@ #define MIN_IB_BW 400000000UL /* Min ib vote 400MB */ +#define DEFAULT_REG_BW 153600000UL /* Used in mdss fbdev driver */ + struct msm_mdss_data { u32 ubwc_version; /* can be read from register 0x58 */ @@ -34,6 +36,8 @@ struct msm_mdss_data { u32 ubwc_static; u32 highest_bank_bit; u32 macrotile_mode; + + unsigned long reg_bus_bw; }; struct msm_mdss { @@ -50,6 +54,7 @@ struct msm_mdss { const struct msm_mdss_data *mdss_data; struct icc_path *mdp_path[2]; u32 num_mdp_paths; + struct icc_path *reg_bus_path; }; static int msm_mdss_parse_data_bus_icc_path(struct device *dev, @@ -57,6 +62,7 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, { struct icc_path *path0; struct icc_path *path1; + struct icc_path *reg_bus_path; path0 = devm_of_icc_get(dev, "mdp0-mem"); if (IS_ERR_OR_NULL(path0)) @@ -71,6 +77,10 @@ static int msm_mdss_parse_data_bus_icc_path(struct device *dev, msm_mdss->num_mdp_paths++; } + reg_bus_path = of_icc_get(dev, "cpu-cfg"); + if (!IS_ERR_OR_NULL(reg_bus_path)) + msm_mdss->reg_bus_path = reg_bus_path; + return 0; } @@ -231,6 +241,13 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) for (i = 0; i < msm_mdss->num_mdp_paths; i++) icc_set_bw(msm_mdss->mdp_path[i], 0, Bps_to_icc(MIN_IB_BW)); + if (msm_mdss->mdss_data && msm_mdss->mdss_data->reg_bus_bw) + icc_set_bw(msm_mdss->reg_bus_path, 0, + Bps_to_icc(msm_mdss->mdss_data->reg_bus_bw)); + else + icc_set_bw(msm_mdss->reg_bus_path, 0, + Bps_to_icc(DEFAULT_REG_BW)); + ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks); if (ret) { dev_err(msm_mdss->dev, "clock enable failed, ret:%d\n", ret); @@ -288,6 +305,9 @@ static int msm_mdss_disable(struct msm_mdss *msm_mdss) for (i = 0; i < msm_mdss->num_mdp_paths; i++) icc_set_bw(msm_mdss->mdp_path[i], 0, 0); + if (msm_mdss->reg_bus_path) + icc_set_bw(msm_mdss->reg_bus_path, 0, 0); + return 0; } @@ -374,6 +394,8 @@ static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5 if (!msm_mdss) return ERR_PTR(-ENOMEM); + msm_mdss->mdss_data = of_device_get_match_data(&pdev->dev); + msm_mdss->mmio = devm_platform_ioremap_resource_byname(pdev, is_mdp5 ? "mdss_phys" : "mdss"); if (IS_ERR(msm_mdss->mmio)) return ERR_CAST(msm_mdss->mmio); @@ -464,8 +486,6 @@ static int mdss_probe(struct platform_device *pdev) if (IS_ERR(mdss)) return PTR_ERR(mdss); - mdss->mdss_data = of_device_get_match_data(&pdev->dev); - platform_set_drvdata(pdev, mdss); /* @@ -499,11 +519,13 @@ static const struct msm_mdss_data msm8998_data = { .ubwc_version = UBWC_1_0, .ubwc_dec_version = UBWC_1_0, .highest_bank_bit = 1, + .reg_bus_bw = 76800 * 1000, }; static const struct msm_mdss_data qcm2290_data = { /* no UBWC */ .highest_bank_bit = 0x2, + .reg_bus_bw = 76800 * 1000, }; static const struct msm_mdss_data sc7180_data = { @@ -511,6 +533,7 @@ static const struct msm_mdss_data sc7180_data = { .ubwc_dec_version = UBWC_2_0, .ubwc_static = 0x1e, .highest_bank_bit = 0x3, + .reg_bus_bw = 76800 * 1000, }; static const struct msm_mdss_data sc7280_data = { @@ -520,6 +543,7 @@ static const struct msm_mdss_data sc7280_data = { .ubwc_static = 1, .highest_bank_bit = 1, .macrotile_mode = 1, + .reg_bus_bw = 74000 * 1000, }; static const struct msm_mdss_data sc8180x_data = { @@ -527,6 +551,7 @@ static const struct msm_mdss_data sc8180x_data = { .ubwc_dec_version = UBWC_3_0, .highest_bank_bit = 3, .macrotile_mode = 1, + .reg_bus_bw = 76800 * 1000, }; static const struct msm_mdss_data sc8280xp_data = { @@ -536,12 +561,14 @@ static const struct msm_mdss_data sc8280xp_data = { .ubwc_static = 1, .highest_bank_bit = 2, .macrotile_mode = 1, + .reg_bus_bw = 76800 * 1000, }; static const struct msm_mdss_data sdm845_data = { .ubwc_version = UBWC_2_0, .ubwc_dec_version = UBWC_2_0, .highest_bank_bit = 2, + .reg_bus_bw = 76800 * 1000, }; static const struct msm_mdss_data sm6350_data = { @@ -550,12 +577,14 @@ static const struct msm_mdss_data sm6350_data = { .ubwc_swizzle = 6, .ubwc_static = 0x1e, .highest_bank_bit = 1, + .reg_bus_bw = 76800 * 1000, }; static const struct msm_mdss_data sm8150_data = { .ubwc_version = UBWC_3_0, .ubwc_dec_version = UBWC_3_0, .highest_bank_bit = 2, + .reg_bus_bw = 76800 * 1000, }; static const struct msm_mdss_data sm6115_data = { @@ -564,6 +593,7 @@ static const struct msm_mdss_data sm6115_data = { .ubwc_swizzle = 7, .ubwc_static = 0x11f, .highest_bank_bit = 0x1, + .reg_bus_bw = 76800 * 1000, }; static const struct msm_mdss_data sm8250_data = { @@ -574,6 +604,18 @@ static const struct msm_mdss_data sm8250_data = { /* TODO: highest_bank_bit = 2 for LP_DDR4 */ .highest_bank_bit = 3, .macrotile_mode = 1, + .reg_bus_bw = 76800 * 1000, +}; + +static const struct msm_mdss_data sm8350_data = { + .ubwc_version = UBWC_4_0, + .ubwc_dec_version = UBWC_4_0, + .ubwc_swizzle = 6, + .ubwc_static = 1, + /* TODO: highest_bank_bit = 2 for LP_DDR4 */ + .highest_bank_bit = 3, + .macrotile_mode = 1, + .reg_bus_bw = 74000 * 1000, }; static const struct msm_mdss_data sm8550_data = { @@ -584,6 +626,7 @@ static const struct msm_mdss_data sm8550_data = { /* TODO: highest_bank_bit = 2 for LP_DDR4 */ .highest_bank_bit = 3, .macrotile_mode = 1, + .reg_bus_bw = 57000 * 1000, }; static const struct of_device_id mdss_dt_match[] = { @@ -600,8 +643,8 @@ static const struct of_device_id mdss_dt_match[] = { { .compatible = "qcom,sm6375-mdss", .data = &sm6350_data }, { .compatible = "qcom,sm8150-mdss", .data = &sm8150_data }, { .compatible = "qcom,sm8250-mdss", .data = &sm8250_data }, - { .compatible = "qcom,sm8350-mdss", .data = &sm8250_data }, - { .compatible = "qcom,sm8450-mdss", .data = &sm8250_data }, + { .compatible = "qcom,sm8350-mdss", .data = &sm8350_data }, + { .compatible = "qcom,sm8450-mdss", .data = &sm8350_data }, { .compatible = "qcom,sm8550-mdss", .data = &sm8550_data }, {} }; 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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id p14-20020a2ea40e000000b002b6c8cf48bfsm913135ljn.104.2023.07.12.05.11.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 05:11:52 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Marijn Suijten , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 8/8] arm64: dts: qcom: sm8450: provide MDSS cfg interconnect Date: Wed, 12 Jul 2023 15:11:45 +0300 Message-Id: <20230712121145.1994830-9-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> References: <20230712121145.1994830-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for the MDSS cfg-cpu bus vote on the SM8450 platform. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 595533aeafc4..0b01f3027ee3 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -2672,8 +2673,12 @@ mdss: display-subsystem@ae00000 { /* same path used twice */ interconnects = <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>, - <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>; - interconnect-names = "mdp0-mem", "mdp1-mem"; + <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + interconnect-names = "mdp0-mem", + "mdp1-mem", + "cpu-cfg"; resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;