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Tue, 11 Jul 2023 09:33:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Paolo Bonzini , Michael Tokarev , Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Daniel_P?= =?utf-8?q?=2E_Berrang=C3=A9?= , Alistair Francis , Palmer Dabbelt , Warner Losh , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Thomas Huth , Richard Henderson Subject: [hotfix PATCH-for-8.1 v5] configure: Fix cross-building for RISCV host Date: Tue, 11 Jul 2023 18:33:46 +0200 Message-Id: <20230711163346.69409-1-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=philmd@linaro.org; helo=mail-ed1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org While when building on native Linux the host architecture is reported as "riscv32" or "riscv64": Host machine cpu family: riscv64 Host machine cpu: riscv64 Found pkg-config: /usr/bin/pkg-config (0.29.2) Since commit ba0e733362 ("configure: Merge riscv32 and riscv64 host architectures"), when cross-compiling it is detected as "riscv". Meson handles the cross-detection but displays a warning: WARNING: Unknown CPU family riscv, please report this at https://github.com/mesonbuild/meson/issues/new Host machine cpu family: riscv Host machine cpu: riscv Target machine cpu family: riscv Target machine cpu: riscv Found pkg-config: /usr/bin/riscv64-linux-gnu-pkg-config (1.8.1) Now since commit 278c1bcef5 ("target/riscv: Only unify 'riscv32/64' -> 'riscv' for host cpu in meson") Meson expects the cpu to be in [riscv32, riscv64]. So when cross-building (for example on our cross-riscv64-system Gitlab-CI job) we get: WARNING: Unknown CPU family riscv, please report this at https://github.com/mesonbuild/meson/issues/new Host machine cpu family: riscv Host machine cpu: riscv Target machine cpu family: riscv Target machine cpu: riscv ../meson.build:684:6: ERROR: Problem encountered: Unsupported CPU riscv, try --enable-tcg-interpreter Fix by partially revert commit ba0e733362 so when cross-building the ./configure script passes the proper host architecture to meson. Update $linux_arch to keep using the shared linux-headers/asm-riscv/ include path. Fixes: ba0e733362 ("configure: Merge riscv32 and riscv64 host architectures") Fixes: 278c1bcef5 ("target/riscv: Only unify 'riscv32/64' -> 'riscv' for host cpu in meson") Reported-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- v5: fix linux-headers path --- configure | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/configure b/configure index 2b41c49c0d..26ec5e4f54 100755 --- a/configure +++ b/configure @@ -451,7 +451,11 @@ elif check_define __s390__ ; then cpu="s390" fi elif check_define __riscv ; then - cpu="riscv" + if check_define _LP64 ; then + cpu="riscv64" + else + cpu="riscv32" + fi elif check_define __arm__ ; then cpu="arm" elif check_define __aarch64__ ; then @@ -1722,6 +1726,9 @@ if test "$linux" = "yes" ; then mips64) linux_arch=mips ;; + riscv32|riscv64) + linux_arch=riscv + ;; *) # For most CPUs the kernel architecture name and QEMU CPU name match. linux_arch="$cpu"