From patchwork Mon Jul 3 13:31:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 698921 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E12BEEB64DD for ; Mon, 3 Jul 2023 13:31:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231575AbjGCNbT (ORCPT ); Mon, 3 Jul 2023 09:31:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231559AbjGCNbS (ORCPT ); Mon, 3 Jul 2023 09:31:18 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE999E62 for ; Mon, 3 Jul 2023 06:31:16 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id 2adb3069b0e04-4f86e6e4038so5583992e87.0 for ; Mon, 03 Jul 2023 06:31:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688391075; x=1690983075; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=n/gQKrgv9jl26df4nD8+qhw8ZnBWlEQchlmkvSgMYjQ=; b=l73yEXFOeig5qdtuMpI+ALwg4IVM0aw9hMZjHVFwaUTnXiGtujvGJewYdsk1tleRB2 z5tITNcyfBvWbsRHjpFGGK9a0W/F52UoOdp0EWnav7IOMCgJf0zfkzpmgKx+aFVokbco l3jNynIeC4wwqc+g44wcjQN5AQwMi6M5kzm90uknSp01Mkpti5/bMT90w27Ts3yD+fE7 MvtWhkjLwinbSN/UdfRchpILrNNaHLGs0aIZKmqq2h4ECaoHOUzA/QBvxsgLMOZ3jvvV vnIyUzgheqLU2ZkOn+8epAM/lRzIhipLWJuEU6Q3oNUjF2vCHFMYhU1FA5ilKCKscZRZ DmOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688391075; x=1690983075; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n/gQKrgv9jl26df4nD8+qhw8ZnBWlEQchlmkvSgMYjQ=; b=eCDm+zkxKN6n3PRX7o9T5x5Ja9v3vouCoCH8YOvhPAth9NBLBwGsnkklUf3/ntTK+A 3CjLuedS5yu3a2x0FR7QQLC9ZsuOcWfbIPakykcaP+8+zIc+LpxKUUSzey6l4rq3i/H6 rKT6CIUjU8FOG9zmd2L1JEFVuBda/oRczaVh/GIAwr+dUEAAzX7cQ6V7iwYsOfUgcw0O twuwz+KTp9DFkaijMffXAYZcGU6ikzLJV/4vccIi1yX+v69Tymbcu/67f9PgC7FWRAp/ 5i+AFiJbxc/xcbJI0AdMz64O/TLSkyIOnH8Z+PmG4Xq5QXLffChKm70eLmYqn3pMvxp7 4CZA== X-Gm-Message-State: ABy/qLbAaw6ByYdDfhwjDoTDhkzTmj/lVRTJ7foJqxpd1Yg3RunhZm8q 1c73fZ/9V3dhT5p0CX26GfY6OQ== X-Google-Smtp-Source: APBJJlHpPmW37wHbYhD2VatnWDTXUi9XhtZ9muHG5jeTKYozptLFtx9Ha1cNS8EAgJxO9jLR4qBMmA== X-Received: by 2002:a05:6512:3c87:b0:4f4:a656:2466 with SMTP id h7-20020a0565123c8700b004f4a6562466mr3914367lfv.15.1688391074973; Mon, 03 Jul 2023 06:31:14 -0700 (PDT) Received: from [192.168.1.101] (abyj26.neoplus.adsl.tpnet.pl. [83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:14 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:10 +0200 Subject: [PATCH 1/5] dt-bindings: spi: spi-geni-qcom: Allow no qup-core icc path MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-1-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=1083; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=TQNTCWE+iBjVfoMqrm2paazex7hqvKkpoTz9pkEkyKc=; b=cStngA5XatURTQAcTPIg9usdXNHDCeFjDqHlJO5FM/ZH4iA7azJ01kuuVe06R9jsSSgwZ4aUm VBUl9Y1tbCiDUoxFvB6NfWRfJ1/5XpZHtnKTkXLnTdFJOWHEcbjMsUq X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path. Allow such case. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/spi/qcom,spi-geni-qcom.yaml | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml index 2e20ca313ec1..2890c4968c2a 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml @@ -49,11 +49,16 @@ properties: maxItems: 3 interconnect-names: - minItems: 2 - items: - - const: qup-core - - const: qup-config - - const: qup-memory + oneOf: + - items: + - const: qup-config + - const: qup-memory + + - minItems: 2 + items: + - const: qup-core + - const: qup-config + - const: qup-memory interrupts: maxItems: 1 From patchwork Mon Jul 3 13:31:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 699194 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D47AEB64DC for ; Mon, 3 Jul 2023 13:31:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231605AbjGCNbX (ORCPT ); Mon, 3 Jul 2023 09:31:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231559AbjGCNbT (ORCPT ); Mon, 3 Jul 2023 09:31:19 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7EFB6E3 for ; Mon, 3 Jul 2023 06:31:18 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id 2adb3069b0e04-4fb960b7c9dso6890962e87.0 for ; Mon, 03 Jul 2023 06:31:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688391076; x=1690983076; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=C2RI3+66dTpZ9C4ox3q+m5S+xeRtBMTP/kVw+ytOXk4=; b=inpJ0VovqtQ8g/UFm+SoVRGe0WZPBMO35cPLnHy0FdV/1Ahc3lBjK0HTKkN5e1a53W lMzz63d16Vmju8Xntq635NMcGOtlkK26RKZfE02a+SZ+5G5j6LlXWNk+AXor/fJFh/pN Th8+lcjm+whpcFtu8pB1mLfy4LvPWVEQQNZ9/b01qj9gBcFYxyP2uH1YY9D+fi+riJ5l SeB0EJKFVju8PnKGt1NSHM3W/34IpU4/okoFWrjagX3xbAkyucyfJcZBrgoKdXxmQ0VT LeLW4YpmJbj8F3Z40oqmk/DsonixOjv29pPfbwPMXvnYlPwN6NkBoTQYFHoDIcZHrvIx Q+0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688391076; x=1690983076; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=C2RI3+66dTpZ9C4ox3q+m5S+xeRtBMTP/kVw+ytOXk4=; b=WOX4EHfIdN7Ccz6HqL/+vzAGipoSVx3kyo6reIs1Rqyjd2gsXgN+qhZWXjxgzom+aT zx267M9sPyyXj3kJ2TZ1eh8DdZbDJrsYclbJxS2L+hWh6jCMHeIyyskfCrvO6/8PuPAC tNixsKpUaMb0K+aG0/Ye83OA3eGe7Xl7A86zB8wVW4nLXUi34YGPYRnv041EzL4Igb/J FRexE+JjG+rbBz+fSZIAk/oX8GirZJ+1jHpAhPl+zgr0KyINux8lRoRtKYHynOZ1dvl2 6gEfGSWH0tWIj3YfwD3YLtrDr1DF60vkoCeNW5mvYUQtR4LUcB9GATfMC2sXsW3PJiFR xVkQ== X-Gm-Message-State: ABy/qLYnnH7B5A6zdTBl810D/nvA3Ts/KibCikd+s30BV4Cvjnm5YtNB gDWnaS6SLmajzcun4NZeLyeO2w== X-Google-Smtp-Source: APBJJlGHneF9y50KLLcylEC0u5K7FX2jsNUrQKCxMZuDYkGMyEAvOfpfont9DqrFn9m11FTiJqz+5Q== X-Received: by 2002:a05:6512:3a7:b0:4f3:9136:9cd0 with SMTP id v7-20020a05651203a700b004f391369cd0mr6154596lfp.44.1688391076514; Mon, 03 Jul 2023 06:31:16 -0700 (PDT) Received: from [192.168.1.101] (abyj26.neoplus.adsl.tpnet.pl. [83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:16 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:11 +0200 Subject: [PATCH 2/5] dt-bindings: serial: geni-qcom: Allow no qup-core icc path MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-2-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=1333; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=PHLLf0dYHyrWiNleR3i9qlCgEBMco5J5FnlnRJYIuaA=; b=01sXMPmg4hRNAhe629YzVYzm5DQTEV0QMurBwgyti7/OIjJy3QP2fMez4fgR21njikOPBYNdP nTMfMisnZkeBTo+FNYNjyxjjfHD6CN/00DdYpJG5Ofwlc3CLNwE4Efu X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path. Allow such case. Signed-off-by: Konrad Dybcio --- .../bindings/serial/qcom,serial-geni-qcom.yaml | 26 +++++++++++++++------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml index dd33794b3534..a0acba57bc06 100644 --- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml @@ -25,14 +25,6 @@ properties: clock-names: const: se - interconnects: - maxItems: 2 - - interconnect-names: - items: - - const: qup-core - - const: qup-config - interrupts: minItems: 1 items: @@ -56,6 +48,24 @@ properties: reg: maxItems: 1 +oneOf: + - properties: + interconnects: + maxItems: 1 + + interconnect-names: + items: + - const: qup-config + + - properties: + interconnects: + minItems: 2 + + interconnect-names: + items: + - const: qup-core + - const: qup-config + required: - compatible - clocks From patchwork Mon Jul 3 13:31:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 698920 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06157C001B1 for ; Mon, 3 Jul 2023 13:31:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231670AbjGCNbb (ORCPT ); Mon, 3 Jul 2023 09:31:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231621AbjGCNbX (ORCPT ); Mon, 3 Jul 2023 09:31:23 -0400 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B736EE62 for ; Mon, 3 Jul 2023 06:31:19 -0700 (PDT) Received: by mail-lf1-x131.google.com with SMTP id 2adb3069b0e04-4fba74870abso4347973e87.0 for ; Mon, 03 Jul 2023 06:31:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688391078; x=1690983078; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=renX9kOzKpMBUHmq5hZ3jekycYbJefUYz//61Td5O/s=; b=GQnx9pt3XPrNTI7bDhUV9shv8jqRedMVA93nw4QPRqm1n2msFv+zYB8ujsiGCdElPC t8IkSGHHArjdxfc3xppEsOSWHxvr4V+ec/3/0MnXAm3trjUCNMkkfa4X1f8Md8OM2elV 4/iAzcL+CuuTwYF2WykkblvIUycM5srNmsuyfx76DqZyonY55nLfcK4eOXiblsqqKs67 molg5OpuT+DoI46lFWFP+ocrmrQeRv2yptgr4hifTIxn5THLeizHxJO6wDeZamAG2jc0 3hpYTjGtZ89L93p9sNDLcL1BlKGvteqyQ5Cq7wk+XBUNRU2ADs1gfJI57SFzfpY4sbtq 48tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688391078; x=1690983078; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=renX9kOzKpMBUHmq5hZ3jekycYbJefUYz//61Td5O/s=; b=P+xjf09Q7QVMkVyGczIHmrrE764aLjswvek0D8slkrVWGGzdVQvnMtXWI9GxkJfOkD tTq7TMy2yCmCTBHoH2zJHC1ICcd+EOcb8mypr8XmvBDfseKFxCphMPXy4LC8EsPMdOLa P3/c/E6EHgRs9cGDAxZzmOvJVFFkopNzoXqLDkl2CFFS670w4WHuiJKqvN9mI0sgFnM/ 0KwysAZq2qjrQwnlP4H/DCMWNQpQZQ9eZWTZ2p77gBA2I3mXYcwEB4ceKtDsgzTb+QT3 I3iWd/U1a8FK2SiALiT1SXVsiGsJ40Hal9eTd+irwuHMbw/MBCLrkgAvI3vv7VIyQsnP rBUg== X-Gm-Message-State: ABy/qLZdG+PsrT/alnAbMn8PVRiANIo3+eKtsiIuqa27JKOF21S+9gSb BXUHDI2maETmJKpYFesp+0A2CA== X-Google-Smtp-Source: APBJJlElhw8ALBCPCE8CXubshdOp5BOmnloAfbaU4sclsqsqMLGWGbmRZq0ThGRIh1YvTS7JSiZF5w== X-Received: by 2002:ac2:5f77:0:b0:4f8:4255:16ca with SMTP id c23-20020ac25f77000000b004f8425516camr5813036lfc.38.1688391077959; Mon, 03 Jul 2023 06:31:17 -0700 (PDT) Received: from [192.168.1.101] (abyj26.neoplus.adsl.tpnet.pl. [83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:17 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:12 +0200 Subject: [PATCH 3/5] dt-bindings: i2c: qcom,i2c-geni: Allow no qup-core icc path MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-3-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=1429; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Efov7Nc3L7yYdK02wWwkMS19LIdgHhVcFqBbivRpHHg=; b=l/kFHoXLaDijhcPRgMraezLtExT+uw2/Dx6Ky5TCDCAYZRsOhWk4fguwnDe0BeiOpJwS8kMSZ UrlhHFlGtuPD0B9+mS/r23uC+zxZssYS+zHRdDknp1RU+G/ns8/x+oU X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Some SoCs (like SM8150 and SM8250) don't seem to provide a qup-core path. Allow such case. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../bindings/i2c/qcom,i2c-geni-qcom.yaml | 27 +++++++++++++++------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml index 9f66a3bb1f80..f92b6d7fc7c5 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml @@ -108,14 +108,25 @@ allOf: clock-names: const: se - interconnects: - minItems: 3 - - interconnect-names: - items: - - const: qup-core - - const: qup-config - - const: qup-memory + oneOf: + - properties: + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: qup-config + - const: qup-memory + + - properties: + interconnects: + minItems: 3 + + interconnect-names: + items: + - const: qup-core + - const: qup-config + - const: qup-memory unevaluatedProperties: false From patchwork Mon Jul 3 13:31:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 699193 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA2A4C001B1 for ; Mon, 3 Jul 2023 13:31:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231637AbjGCNbo (ORCPT ); Mon, 3 Jul 2023 09:31:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231650AbjGCNbZ (ORCPT ); Mon, 3 Jul 2023 09:31:25 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0AED6E6C for ; Mon, 3 Jul 2023 06:31:21 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id 2adb3069b0e04-4fb5bcb9a28so6855830e87.3 for ; Mon, 03 Jul 2023 06:31:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688391079; x=1690983079; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=U0Tw3K884EqPljezRBvFH8q3oj/FtWnGBPlC6pRuCDw=; b=qW3/NAVcPirJqJtbsyH+kRmHKIvIUgTk/AzW93yk8n28IMpfwy1cuLTyLConHraNgl 4uf84sfG2b8Xp/SDX/h3gnP3OhZj4hdDuRc335s4naLazI3i9wOfhxEU/zraW3/K9MJs aXqhZfHsKeZOMinT5nsmYYKXU4h9UnVdybQY5VOWEZc+DRJcPPvXCMDFYQfgZAzUPSjn K4NtELU6FwE1q9I1H7jmSGC1UT6SrbrCZM5jpmVC4LV7nXUl/f+Y1opJCZl/Y/RmCyl/ LvwYlFA36QDaGkNCS5eRMbcMQjwuWXGAnG0c/Y0yERirIg6s5uL96ZnoE3lbrmVPUfw6 25Ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688391079; x=1690983079; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U0Tw3K884EqPljezRBvFH8q3oj/FtWnGBPlC6pRuCDw=; b=Ghi0YRNiN5x/HfJc/EsD/sU66L5cZr5Nb0kLqaz+SxfsB0Icf8l64FM//scxoUGT4R iBJQsE9fvI9luFczT4MjbwCcLm9eoKoDvrxJfMTKxtUUm5sg6LBtCYazKP51LEjA96FQ tF5kIPiF1kYGx8F0FQ7KH3qSow0LXr1qhP6q+lodzXZxmnXL0wOLOrNU9KIMHePYe2yl 2A35mzu0Tfxed4FK2eGS21jFlbJEkCcA2sAHr3RgFuKYm0w9LGz+YsT8ImE25bCBZpwI T+23aG1DPHgamsDzlB27Juso/WaTgja+wHag90pscS1Lh/93ZJvVFp4SAzbMPlRGwHPW qSIw== X-Gm-Message-State: ABy/qLYGImr/R5O0UTfibHpDsFAVhrUTn7lVUCO1ayI+uiAyY0uYc19c mfPj+5Ac1MC+fx60tLCMPefYcQ== X-Google-Smtp-Source: APBJJlEVXabz5Lbs4x3OROPIw1FnLVfehVIcKeuvIHlckHEVUZDMlAKu0MUZX7eoO8xfVvtOYGc8tA== X-Received: by 2002:a05:6512:36d1:b0:4fb:9d61:db4d with SMTP id e17-20020a05651236d100b004fb9d61db4dmr6401322lfs.18.1688391079411; Mon, 03 Jul 2023 06:31:19 -0700 (PDT) Received: from [192.168.1.101] (abyj26.neoplus.adsl.tpnet.pl. [83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:19 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:13 +0200 Subject: [PATCH 4/5] soc: qcom: geni-se: Allow any combination of icc paths MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-4-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=1230; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=co9BdW2nWkUZOcUTizkeFw8YjDRYAbLHFxUe7vw2Hi8=; b=Ujk0LJDy05oagsVI8a6ZmnNEpYOuoJq5uyL6lqwIgDGgLZ20MpLNP89MZUyPsBsmv07eQPoRN Ej8VC4qyRHWCZhU8eSpTrxsn3vV2PM+Q5TalSz6YgYzA2YdP3bIRV8v X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Not all SoCs provide all the usual paths. By the looks of it, at least SM8150 and SM8250 don't have one that would resemble "qup-core". Check for the error that icc_get throws and assign a NULL value to each path that can't be found to effectively allow any combination of icc paths (which, like previously, includes no icc paths). The ICC APIs gracefully handle a NULL path by exiting early. Signed-off-by: Konrad Dybcio --- drivers/soc/qcom/qcom-geni-se.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c index ba788762835f..a5e2e8925c8e 100644 --- a/drivers/soc/qcom/qcom-geni-se.c +++ b/drivers/soc/qcom/qcom-geni-se.c @@ -813,8 +813,13 @@ int geni_icc_get(struct geni_se *se, const char *icc_ddr) continue; se->icc_paths[i].path = devm_of_icc_get(se->dev, icc_names[i]); - if (IS_ERR(se->icc_paths[i].path)) - goto err; + if (IS_ERR(se->icc_paths[i].path)) { + /* Not all SoCs implement all the paths */ + if (PTR_ERR(se->icc_paths[i].path) == -ENODATA) + se->icc_paths[i].path = NULL; + else + goto err; + } } return 0; From patchwork Mon Jul 3 13:31:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 698919 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84E6BC001DF for ; Mon, 3 Jul 2023 13:31:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231655AbjGCNbq (ORCPT ); Mon, 3 Jul 2023 09:31:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231623AbjGCNbd (ORCPT ); Mon, 3 Jul 2023 09:31:33 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A1E6E50 for ; Mon, 3 Jul 2023 06:31:23 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id 2adb3069b0e04-4fba8f2197bso3709035e87.3 for ; Mon, 03 Jul 2023 06:31:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688391081; x=1690983081; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=jrefK8/PwFCkX5pIXHy+fvuyVY7YugWgUcP56e2MTgw=; b=HzCv0pW7TPsAck1rWghAm02q2yt/HBzROM1oIyfB5qzGD+iJBee4h44EfePcDKv/ME WlT6+sbB9mIUTLXDQ/mhEoT9Y/1Jb1lIzXQAxk/VSByEcB4sbeBjO1dKppzI177pOtc1 lZfUCewju6od/DqrYi6YvVBBzQfQVbkqUoDGS1MlcCFDCkICp16fXJ3g0ZWe7cjRbA6q ldmTzmMIooF4KNQFYnsbY7jg2rH/n8Roj5Jr4Ye+Xus1I+A5GeYlkB9klbbtdjpG8ab3 FRpQLYJ4ZtYeYLL6dKnpLdIf0cjJAjP1pid2yKak3eOdfPZt23ETyOl81xIzMD8HuGmR dmeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688391081; x=1690983081; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jrefK8/PwFCkX5pIXHy+fvuyVY7YugWgUcP56e2MTgw=; b=aT0sQBIsj2Rij3W8s5aTbIT3dWSL+HF+iO5md2hVgWEYYRx50YhpQOe+1QeAO0bXbC 1Rp/MVmpdRl3YCIWWVKjFkO3fzciDIOSpRE5o2q58CALxoaxdcn8yArCakOjhUeK63IH furL2VWJFvXXjhcJyyG1owE/MfdN8GTTWpcXsV8P8bA80GJkvBkgRAlM2f2wRsDpb25Q wICLeQayp9cF99OYlyACjCbMytYTGw2n59omrLknlDeXWvz7emXcIXWC/aG2xq589PTO ZgYbUfpcJg0YRM/LW4daqIhRicup2rVtMpjDc/ej+6gGqLNU6wu4T9AXRcYDT0OyQTLz qHsg== X-Gm-Message-State: ABy/qLbOe2MozbimkFcenv44+8F+xeKcsWCNwj5LfndlpHx4KSrSOo/8 bjiC6wwAgTHnV0Xae2VcjYlBbg== X-Google-Smtp-Source: APBJJlGy6QEGoSvdZ/JnNulOqJqe4aDlq/q/gjO8UeVoFQoVR5IjBhO4qM2MvR2m24Cc9pbz369Nmg== X-Received: by 2002:a05:6512:3703:b0:4f8:7551:7485 with SMTP id z3-20020a056512370300b004f875517485mr5342676lfr.5.1688391081053; Mon, 03 Jul 2023 06:31:21 -0700 (PDT) Received: from [192.168.1.101] (abyj26.neoplus.adsl.tpnet.pl. [83.9.29.26]) by smtp.gmail.com with ESMTPSA id ep7-20020a056512484700b004fbb1f70ceesm833417lfb.227.2023.07.03.06.31.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 06:31:20 -0700 (PDT) From: Konrad Dybcio Date: Mon, 03 Jul 2023 15:31:14 +0200 Subject: [PATCH 5/5] arm64: dts: qcom: sm8250: Add interconnects and power-domains to QUPs MIME-Version: 1.0 Message-Id: <20230703-topic-8250_qup_icc-v1-5-fea39aa07525@linaro.org> References: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> In-Reply-To: <20230703-topic-8250_qup_icc-v1-0-fea39aa07525@linaro.org> To: Andy Gross , Bjorn Andersson , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Andi Shyti Cc: Marijn Suijten , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-i2c@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1688391072; l=20635; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=6sUJWs3uxT99bYspriYn1C039w1VdT+N8WiwYSJREPo=; b=8lQCglMSF9hO/+Ac5DQiOSr/lbjk+1qBSxdwNkARdIUOVPweSFMlfQfxcfXyajIuNzL9lgKD6 WfxrfHGMwUnDXGK9N/q+0FV5G2Cvwd8g3r9372f54FjcbOQ7uZFbRzX X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Describe the interconnect paths related to QUPs and add the power-domains powering them. This is required for icc sync_state, as otherwise QUP access is gated. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 150 +++++++++++++++++++++++++++++++++++ 1 file changed, 150 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 1efa07f2caff..35111fce898a 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1022,6 +1022,10 @@ i2c14: i2c@880000 { dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>, <&gpi_dma2 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1038,6 +1042,9 @@ spi14: spi@880000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1054,6 +1061,10 @@ i2c15: i2c@884000 { dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>, <&gpi_dma2 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1070,6 +1081,9 @@ spi15: spi@884000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1086,6 +1100,10 @@ i2c16: i2c@888000 { dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>, <&gpi_dma2 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1102,6 +1120,9 @@ spi16: spi@888000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1118,6 +1139,10 @@ i2c17: i2c@88c000 { dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>, <&gpi_dma2 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1134,6 +1159,9 @@ spi17: spi@88c000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1149,6 +1177,8 @@ uart17: serial@88c000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1163,6 +1193,10 @@ i2c18: i2c@890000 { dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>, <&gpi_dma2 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1179,6 +1213,9 @@ spi18: spi@890000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1194,6 +1231,8 @@ uart18: serial@890000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1208,6 +1247,10 @@ i2c19: i2c@894000 { dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>, <&gpi_dma2 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1224,6 +1267,9 @@ spi19: spi@894000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_2 0>, + <&aggre1_noc MASTER_QUP_2 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1276,6 +1322,10 @@ i2c0: i2c@980000 { dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, <&gpi_dma0 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1292,6 +1342,9 @@ spi0: spi@980000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1308,6 +1361,10 @@ i2c1: i2c@984000 { dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, <&gpi_dma0 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1324,6 +1381,9 @@ spi1: spi@984000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1340,6 +1400,10 @@ i2c2: i2c@988000 { dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, <&gpi_dma0 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1356,6 +1420,9 @@ spi2: spi@988000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1371,6 +1438,8 @@ uart2: serial@988000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1385,6 +1454,10 @@ i2c3: i2c@98c000 { dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, <&gpi_dma0 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1401,6 +1474,9 @@ spi3: spi@98c000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1417,6 +1493,10 @@ i2c4: i2c@990000 { dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, <&gpi_dma0 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1433,6 +1513,9 @@ spi4: spi@990000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1449,6 +1532,10 @@ i2c5: i2c@994000 { dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, <&gpi_dma0 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1465,6 +1552,9 @@ spi5: spi@994000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1481,6 +1571,10 @@ i2c6: i2c@998000 { dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, <&gpi_dma0 1 6 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1497,6 +1591,9 @@ spi6: spi@998000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1512,6 +1609,8 @@ uart6: serial@998000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1526,6 +1625,10 @@ i2c7: i2c@99c000 { dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>, <&gpi_dma0 1 7 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1542,6 +1645,9 @@ spi7: spi@99c000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1591,6 +1697,10 @@ i2c8: i2c@a80000 { dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, <&gpi_dma1 1 0 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1607,6 +1717,9 @@ spi8: spi@a80000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1623,6 +1736,10 @@ i2c9: i2c@a84000 { dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, <&gpi_dma1 1 1 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1639,6 +1756,9 @@ spi9: spi@a84000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1655,6 +1775,10 @@ i2c10: i2c@a88000 { dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, <&gpi_dma1 1 2 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1671,6 +1795,9 @@ spi10: spi@a88000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1687,6 +1814,10 @@ i2c11: i2c@a8c000 { dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, <&gpi_dma1 1 3 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1703,6 +1834,9 @@ spi11: spi@a8c000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1719,6 +1853,10 @@ i2c12: i2c@a90000 { dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, <&gpi_dma1 1 4 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1735,6 +1873,9 @@ spi12: spi@a90000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1750,6 +1891,8 @@ uart12: serial@a90000 { interrupts = ; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>; + interconnect-names = "qup-config"; status = "disabled"; }; @@ -1764,6 +1907,10 @@ i2c13: i2c@a94000 { dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, <&gpi_dma1 1 5 QCOM_GPI_I2C>; dma-names = "tx", "rx"; + power-domains = <&rpmhpd SM8250_CX>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1780,6 +1927,9 @@ spi13: spi@a94000 { dma-names = "tx", "rx"; power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&qup_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_1 0>, + <&aggre1_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI_CH0 0>; + interconnect-names = "qup-config", "qup-memory"; #address-cells = <1>; #size-cells = <0>; status = "disabled";