From patchwork Fri Jun 21 18:13:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 167405 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1063867ilk; Fri, 21 Jun 2019 11:14:06 -0700 (PDT) X-Google-Smtp-Source: APXvYqybxoWL/H1BoyvdfGUyXZEb8YmWz1jfcohq1mlKhqXMayXbFMbDrsrWOFcEYufpIDpb2gyn X-Received: by 2002:a63:8b4c:: with SMTP id j73mr9295978pge.11.1561140845997; Fri, 21 Jun 2019 11:14:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561140845; cv=none; d=google.com; s=arc-20160816; b=0G+VbSRes+8r0zY/qclcFKqmPQbHhEtfwvzwLzOw3ITabExxdo1Nw1dyok5ouWC201 J4hq26jAuYW5VrEyWdZBpmWFudxxV4stTtHGdPxd6PY93186T6JUELUaB5JQDF3KC3Jo aqeFLT6RY+sm6qxZ+Dfz80csR3heOrKhwwPT5cyRMjZfg+VAbNqVVeAX4ao5YHwLWWY0 wGuQ4Z1kOf1pBlZaMsCAs6GirouVRTPuTOfZatbyvptnIiE5gVEAcCA9GYV9V0W8nxok 8QwtptvNujJ5DZLzKdIxJr2h9qTMzZrHzj0zjaNOY7ax2pwBTfO/L/huwQWfUXUDm27T zNjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=g9uLF1jjJUIsQ1AcDXMjwDOPIjZXa+0xBvYmXt1MeUk=; b=iCBDzlcU+kIOqGAEkbI/WLqWVZmp5aYzorN3PTp2ojsLLx9CfiQ9D4mw2FMwRbALV/ DFnAO1HQYLV6DbjCZJIa8KtP8UBJEbdkJyGhFc+dlyxnydeANApgRTusovNo6cREzFdM pDDnXEOAQLLTaeYhARxPGvkvcmzLsxhlY4JuNEM6gUOx6/MJ7ZfXoTHWm6CES5XA6J+j XJi0OKKXJZL4AcISm4AgJQowCtduuEM1nkFLtn8TljB8+012jFbAaRmIOGshV69E6nVr VVQ4875PfgElE96EUlV+DpYPqs1p/UJm2tu9MFrQdM/lMx9DxT8gJkh3k2YDDqsuJJFU o7fg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=QSYZufaj; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c16si2017753pgg.202.2019.06.21.11.14.05; Fri, 21 Jun 2019 11:14:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=QSYZufaj; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726420AbfFUSOF (ORCPT + 8 others); Fri, 21 Jun 2019 14:14:05 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:50798 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726017AbfFUSOF (ORCPT ); Fri, 21 Jun 2019 14:14:05 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5LIDeHv044305; Fri, 21 Jun 2019 13:13:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1561140820; bh=g9uLF1jjJUIsQ1AcDXMjwDOPIjZXa+0xBvYmXt1MeUk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QSYZufaj5iFrS1ucxMI0uP3tiHE+ugLdw8LEmlrWn/S/+PQttuJ7em2+elL11bb7Y RelJGFSphs6thLPh/6tBq+JVXxk5SSCkz7BZee6EuAYASSO2TpwUi9Wr47Q3NxsLaN Uq+CjCgqaEpKJS207z+dr2ecRP14Q2QjIm/9O5Vs= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5LIDe37117954 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 21 Jun 2019 13:13:40 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 21 Jun 2019 13:13:40 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 21 Jun 2019 13:13:39 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5LIDdhC092039; Fri, 21 Jun 2019 13:13:39 -0500 From: Grygorii Strashko To: , Ilias Apalodimas , Andrew Lunn , "David S . Miller" , Ivan Khoronzhuk , Jiri Pirko CC: Florian Fainelli , Sekhar Nori , , , Murali Karicheri , Ivan Vecera , Rob Herring , , Grygorii Strashko Subject: [RFC PATCH v4 net-next 03/11] net: ethernet: ti: cpsw: resolve build deps of cpsw drivers Date: Fri, 21 Jun 2019 21:13:06 +0300 Message-ID: <20190621181314.20778-4-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190621181314.20778-1-grygorii.strashko@ti.com> References: <20190621181314.20778-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org A following patches introduce new CPSW switchdev driver which uses common code with legacy CPSW driver. This will introduce build dependency between CPSW switchdev and CPSW legacy drivers related to for_each_slave() and cpsw_slave_index() - they can be compiled both, but only one of them will be not functional depending in Kconfig settings due to duffrences in Slave Ports indexes calculation. To fix this make for_each_slave() local (it's used now only by legacy CPSW driver) and convert cpsw_slave_index() to be a function pointer which is assigned in probe. Driver to probe is defined by DT. Signed-off-by: Grygorii Strashko --- drivers/net/ethernet/ti/cpsw.c | 13 +++++++++++++ drivers/net/ethernet/ti/cpsw_priv.c | 2 ++ drivers/net/ethernet/ti/cpsw_priv.h | 10 ++-------- 3 files changed, 17 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index fe3b3b89931b..79ac7c1db22b 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -74,6 +74,17 @@ MODULE_PARM_DESC(descs_pool_size, "Number of CPDMA CPPI descriptors in pool"); (func)(slave++, ##arg); \ } while (0) +static int cpsw_slave_index_priv(struct cpsw_common *cpsw, + struct cpsw_priv *priv) +{ + return cpsw->data.dual_emac ? priv->emac_port : cpsw->data.active_slave; +} + +static int cpsw_get_slave_port(u32 slave_num) +{ + return slave_num + 1; +} + static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev, __be16 proto, u16 vid); @@ -2368,6 +2379,8 @@ static int cpsw_probe(struct platform_device *pdev) if (!cpsw) return -ENOMEM; + cpsw_slave_index = cpsw_slave_index_priv; + cpsw->dev = dev; mode = devm_gpiod_get_array_optional(dev, "mode", GPIOD_OUT_LOW); diff --git a/drivers/net/ethernet/ti/cpsw_priv.c b/drivers/net/ethernet/ti/cpsw_priv.c index 476d050a022c..a1c83af64835 100644 --- a/drivers/net/ethernet/ti/cpsw_priv.c +++ b/drivers/net/ethernet/ti/cpsw_priv.c @@ -19,6 +19,8 @@ #include "cpsw_sl.h" #include "davinci_cpdma.h" +int (*cpsw_slave_index)(struct cpsw_common *cpsw, struct cpsw_priv *priv); + int cpsw_init_common(struct cpsw_common *cpsw, void __iomem *ss_regs, int ale_ageout, phys_addr_t desc_mem_phys, int descs_pool_size) diff --git a/drivers/net/ethernet/ti/cpsw_priv.h b/drivers/net/ethernet/ti/cpsw_priv.h index 04795b97ee71..57b109d4758f 100644 --- a/drivers/net/ethernet/ti/cpsw_priv.h +++ b/drivers/net/ethernet/ti/cpsw_priv.h @@ -367,14 +367,8 @@ struct cpsw_priv { #define ndev_to_cpsw(ndev) (((struct cpsw_priv *)netdev_priv(ndev))->cpsw) #define napi_to_cpsw(napi) container_of(napi, struct cpsw_common, napi) -#define cpsw_slave_index(cpsw, priv) \ - ((cpsw->data.dual_emac) ? priv->emac_port : \ - cpsw->data.active_slave) - -static inline int cpsw_get_slave_port(u32 slave_num) -{ - return slave_num + 1; -} +extern int (*cpsw_slave_index)(struct cpsw_common *cpsw, + struct cpsw_priv *priv); struct addr_sync_ctx { struct net_device *ndev; From patchwork Fri Jun 21 18:13:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 167411 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1064323ilk; Fri, 21 Jun 2019 11:14:30 -0700 (PDT) X-Google-Smtp-Source: APXvYqycSyBgKA4UKY5D4GL90pSTzmaAu5bEGiXxeK+ZJMEbrQ02XdpXkRNEKoGqisHh8nNuhsgp X-Received: by 2002:a17:902:868f:: with SMTP id g15mr132178203plo.67.1561140870353; Fri, 21 Jun 2019 11:14:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561140870; cv=none; d=google.com; s=arc-20160816; b=ah+ZWQzvjwsBMcSrawsYr9lDzEZoIJs0vixhHeGqwpJmwTbBWufhiGfbR6xJuuRMGB 71bY5W+KTunKTdPoqcPyl7nWQAMI36vgKECLezF72XCP5wWRf7GPr6imx7ybh+2PTYNq bjIgy17UD4B3OL0CTIGrHKgfCBVOCMzqYAU3yABtoUfykqpiSXm6EObc6VXWnZ5zSUCy vQAf/SnHv02tpU2o5WK0zVskuPbLy6Mksf0jzOoj4ovMdmsL3nMRMugyqG180g0ATXGq FxrfGSlPidf6lna8SurAvO2qqOimJU5dV8Q/S4cIQIOw/eReMsWncUJHmQSmHfW7mhw0 gqQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=PIDcKPbOh8VkBOzzNC+6yEWlI/kehcr9w1H0dRe83H4=; b=Q5zxGTyomY/deSFQsTG2fKV6PwOru3Odr6/pRUA6lWuOcrb1NE8srfDe+Epbn4ADwM UI4LVMGJzWOUKYTVzoHiqqVGw6ziwxxYTqOBXXlJlPaTSQOzjT0iwxCKwgmMEtzDe6ei y1kX45ZEKVTQU4JbqZLu361ECTQYz0F8ThU6nwSwtQOHJAeO4C38I3aAruIUdPlg3Y1I OPrsix0BMetW9oy9zm036kYNdrSGTSlRkdPbDWUnOPcWP/ZoSBTBEwuAWH6HhAuJJjcm mNXEr+GcrxuKrE/HAyW1lD5uhhuUNj1OQJMhH7urEXQftY4qY9IPO91Dr8zVRCjPfGK4 HadQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=B5GkkyvW; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Miller" , Ivan Khoronzhuk , Jiri Pirko CC: Florian Fainelli , Sekhar Nori , , , Murali Karicheri , Ivan Vecera , Rob Herring , , Grygorii Strashko Subject: [RFC PATCH v4 net-next 05/11] dt-bindings: net: ti: add new cpsw switch driver bindings Date: Fri, 21 Jun 2019 21:13:08 +0300 Message-ID: <20190621181314.20778-6-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190621181314.20778-1-grygorii.strashko@ti.com> References: <20190621181314.20778-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add bindings for the new TI CPSW switch driver. Comparing to the legacy bindings (net/cpsw.txt): - ports definition follows DSA bindings (net/dsa/dsa.txt) and ports can be marked as "disabled" if not physically wired. - ports definition follows DSA bindings (net/dsa/dsa.txt) and ports can be marked as "disabled" if not physically wired. - all deprecated properties dropped; - all legacy propertiies dropped which represents constant HW cpapbilities (cpdma_channels, ale_entries, bd_ram_size, mac_control, slaves, active_slave) - cpts properties grouped in "cpts" sub-node Signed-off-by: Grygorii Strashko --- .../bindings/net/ti,cpsw-switch.txt | 147 ++++++++++++++++++ 1 file changed, 147 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/ti,cpsw-switch.txt -- 2.17.1 diff --git a/Documentation/devicetree/bindings/net/ti,cpsw-switch.txt b/Documentation/devicetree/bindings/net/ti,cpsw-switch.txt new file mode 100644 index 000000000000..787219cddccd --- /dev/null +++ b/Documentation/devicetree/bindings/net/ti,cpsw-switch.txt @@ -0,0 +1,147 @@ +TI SoC Ethernet Switch Controller Device Tree Bindings (new) +------------------------------------------------------ + +The 3-port switch gigabit ethernet subsystem provides ethernet packet +communication and can be configured as an ethernet switch. It provides the +gigabit media independent interface (GMII),reduced gigabit media +independent interface (RGMII), reduced media independent interface (RMII), +the management data input output (MDIO) for physical layer device (PHY) +management. + +Required properties: +- compatible : be one of the below: + "ti,cpsw-switch" for backward compatible + "ti,am335x-cpsw-switch" for AM335x controllers + "ti,am4372-cpsw-switch" for AM437x controllers + "ti,dra7-cpsw-switch" for DRA7x controllers +- reg : physical base address and size of the CPSW module IO range +- ranges : shall contain the CPSW module IO range available for child devices +- clocks : should contain the CPSW functional clock +- clock-names : should be "fck" + See bindings/clock/clock-bindings.txt +- interrupts : should contain CPSW RX, TX, MISC, RX_THRESH interrupts +- interrupt-names : should contain "rx_thresh", "rx", "tx", "misc" + See bindings/interrupt-controller/interrupts.txt + +Optional properties: +- syscon : phandle to the system control device node which provides access to + efuse IO range with MAC addresses + +Required Sub-nodes: +- ports : contains CPSW external ports descriptions + Required properties: + - #address-cells : Must be 1 + - #size-cells : Must be 0 + - reg : CPSW port number. Should be 1 or 2 + - phys : phandle on phy-gmii-sel PHY (see phy/ti-phy-gmii-sel.txt) + - phy-mode : operation mode of the PHY interface [1] + - phy-handle : phandle to a PHY on an MDIO bus [1] + + Optional properties: + - ti,label : Describes the label associated with this port + - ti,dual_emac_pvid : Specifies default PORT VID to be used to segregate + ports. Default value - CPSW port number. + - mac-address : array of 6 bytes, specifies the MAC address. Always + accounted first if present [1] + - local-mac-address : See [1] + +- mdio : CPSW MDIO bus block description + - bus_freq : MDIO Bus frequency + See bindings/net/mdio.txt and davinci-mdio.txt + +- cpts : The Common Platform Time Sync (CPTS) module description + - clocks : should contain the CPTS reference clock + - clock-names : should be "cpts" + See bindings/clock/clock-bindings.txt + + Optional properties - all ports: + - cpts_clock_mult : Numerator to convert input clock ticks into ns + - cpts_clock_shift : Denominator to convert input clock ticks into ns + Mult and shift will be calculated basing on CPTS + rftclk frequency if both cpts_clock_shift and + cpts_clock_mult properties are not provided. + +[1] See Documentation/devicetree/bindings/net/ethernet.txt + +Examples - SOC: +mac_sw: ethernet_switch@0 { + compatible = "ti,dra7-cpsw-switch","ti,cpsw-switch"; + reg = <0x0 0x4000>; + ranges = <0 0 0x4000>; + clocks = <&gmac_main_clk>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + syscon = <&scm_conf>; + status = "disabled"; + + interrupts = , + , + , + ; + interrupt-names = "rx_thresh", "rx", "tx", "misc" + + ports { + #address-cells = <1>; + #size-cells = <0>; + + cpsw_port1: port@1 { + reg = <1>; + ti,label = "port1"; + /* Filled in by U-Boot */ + mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 1>; + }; + + cpsw_port2: port@2 { + reg = <2>; + ti,label = "port2"; + /* Filled in by U-Boot */ + mac-address = [ 00 00 00 00 00 00 ]; + phys = <&phy_gmii_sel 2>; + }; + }; + + davinci_mdio_sw: mdio@1000 { + compatible = "ti,cpsw-mdio","ti,davinci_mdio"; + #address-cells = <1>; + #size-cells = <0>; + ti,hwmods = "davinci_mdio"; + bus_freq = <1000000>; + reg = <0x1000 0x100>; + }; + + cpts { + clocks = <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 25>; + clock-names = "cpts"; + }; +}; + +Examples - platform/board: + +&mac_sw { + pinctrl-names = "default", "sleep"; + status = "okay"; +}; + +&cpsw_port1 { + phy-handle = <ðphy0_sw>; + phy-mode = "rgmii"; + ti,dual_emac_pvid = <1>; +}; + +&cpsw_port2 { + phy-handle = <ðphy1_sw>; + phy-mode = "rgmii"; + ti,dual_emac_pvid = <2>; +}; + +&davinci_mdio_sw { + ethphy0_sw: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1_sw: ethernet-phy@1 { + reg = <1>; + }; +}; From patchwork Fri Jun 21 18:13:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 167413 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1064574ilk; Fri, 21 Jun 2019 11:14:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqzDWq7JGrC2YhDeyJuwPQ6LX3k/mBeFLGyPAmlmEDryOETfVqjWR5yA6CtW6l/nW3mkHjNY X-Received: by 2002:a63:18d:: with SMTP id 135mr8034608pgb.62.1561140885220; Fri, 21 Jun 2019 11:14:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561140885; cv=none; d=google.com; s=arc-20160816; b=pMjxM0LA0ABLa3DAd1bOEVye6sAJ9KLm5Li0nhj+3H6W5xnihAzhPZPyTUpJbZoAp9 z0LG5OEPRPw/2k7sMzOCEn132A2uAtiYqgOG7dpunuR+jgGBsAId3I6HDHkLwxhGFQks UTn3nBAhxbri7ANIPeq+N9hhZyOy3CUdghV7q9l/cgZsjcZQOzuD5hThHkfgEqig2DYE A54KnvwPOzYKxsVVUivzdRajILYXuFNwGlPsE+bH8Jd5nS+Vm8fqmJ0CZydhIbLtiKRv bhbk/rfqc3fdItTAr0kkC6uIwi8hjqfw9+kcxyr/lWjXWnUgzf9UMpW7nPqpXTvLmVK4 3nPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=X8GqRi5MahIax6EcHx4+El9aoatiMmSDgbQKpSyfgCo=; b=qnNdfhBvQFbYpP6VXkshV4pIuIr+xHtfq0qwUbKInb8hIRAxqv+6mty7Q2ESyu3dcQ wKfvP5WihJnN2fEej33RZgeElF7IuZ/BNgmIzk0vbWMjpD3HGf+XieCNDGF0zqcWjE7h 8qEZH7wUEBBF45wUU+qVDhfyDSYmwdY/0P7ao+o6Jv/qtvgshsbUNkJjZpm7wmg/f3C3 JNQqZ/UZf1tKwYO2OQxWPjLixAeyNq0NewAsC8X3gh76r+VFIa/Lf2WgOUVSGy5+uwcj LAZm/yEmvTOORepBQFsq6PgqMjSIFTm/dh4+9X1lZP3FEMOjn3UbreidX2dXwx9JN+z+ sqpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=icGVjq8x; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Miller" , Ivan Khoronzhuk , Jiri Pirko CC: Florian Fainelli , Sekhar Nori , , , Murali Karicheri , Ivan Vecera , Rob Herring , , Grygorii Strashko Subject: [RFC PATCH v4 net-next 11/11] arm: omap2plus_defconfig: enable CONFIG_TI_CPSW_SWITCHDEV Date: Fri, 21 Jun 2019 21:13:14 +0300 Message-ID: <20190621181314.20778-12-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190621181314.20778-1-grygorii.strashko@ti.com> References: <20190621181314.20778-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Grygorii Strashko --- arch/arm/configs/omap2plus_defconfig | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 927db1d022d2..ef70b5d537de 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -561,3 +561,4 @@ CONFIG_NET_CLS_MATCHALL=m CONFIG_NET_CLS_ACT=y CONFIG_NET_ACT_POLICE=m CONFIG_NET_ACT_GACT=m +CONFIG_TI_CPSW_SWITCHDEV=y