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[83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:49 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:41 +0200 Subject: [PATCH 1/9] dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs MIME-Version: 1.0 Message-Id: <20230622-topic-8998clk-v1-1-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=894; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=F8sCo+8Xd5XxI+0cPZIVX8PD/zdBEi1oKdosoXzGPrA=; b=A04xy8EGlHpSd10ms85yXgvIRB3fkqXy2CskjHYT7oJEcGjyDh3UOhwLi28idwcWGR5jAsHCa 6mNhZkxGrU+CerQACv/uqDtp1BYXsaK6ozrjnN0/9idcqx71HY2n+iI X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org GPLL0 has two separate outputs to both GPUSS and MMSS: one that's 2-divided and one that runs at the same rate as the GPLL0 itself. Add the missing ones to the binding. Signed-off-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/qcom,gcc-msm8998.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/clock/qcom,gcc-msm8998.h b/include/dt-bindings/clock/qcom,gcc-msm8998.h index 1badb4f9c58f..b5456a64d421 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8998.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8998.h @@ -190,6 +190,9 @@ #define AGGRE2_SNOC_NORTH_AXI 181 #define SSC_XO 182 #define SSC_CNOC_AHBS_CLK 183 +#define GCC_MMSS_GPLL0_DIV_CLK 184 +#define GCC_GPU_GPLL0_DIV_CLK 185 +#define GCC_GPU_GPLL0_CLK 186 #define PCIE_0_GDSC 0 #define UFS_GDSC 1 From patchwork Thu Jun 22 11:57:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 696027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2E7FEB64DC for ; Thu, 22 Jun 2023 11:58:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229875AbjFVL5z (ORCPT ); Thu, 22 Jun 2023 07:57:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230426AbjFVL5y (ORCPT ); Thu, 22 Jun 2023 07:57:54 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31643171C for ; Thu, 22 Jun 2023 04:57:53 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2b479d53d48so66541941fa.1 for ; Thu, 22 Jun 2023 04:57:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435071; x=1690027071; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=phgyiyd8NbrxCJu24dU6XdDa1Tp6brfneR4jmAIEZFk=; b=Ky6+3kj7p1NGvyDHXfF6QwkVm4eKnR1VRxBzDU26dbzn4AIKa9SOlFdrBd4l1wesqC CtoA3RkyAkh4dXKUM93UrfYA7uEVw7fDHWsUrZ5ye4a6kMMJfvEdYd4GC9AreQvVIPdm Tmhi1SaAoxpxQd5CkkLSV9P0lYgxw6ecrtAQKo7B1nAo48m/DaNSFSIgmdpMiT2Kw2nG 6Q4pT0B4MyvbIkLxgvcPmmlccy0nD2M7UuJ9sUwoO5KNnk6ePwvyV+vfGMQd49ppgjmO EU6LX8XtwVDtUuoIx3nntRT6OXnKDEdRnrKbwV0lsj3Llmm/r2xJ7eJ4afUPK8AO+B9l zQcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435071; x=1690027071; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=phgyiyd8NbrxCJu24dU6XdDa1Tp6brfneR4jmAIEZFk=; b=L8ojEWd3htBQmyJK/CgSLNLpgq1WhUdTgRQIUdZdI3uPcYg26lH1yIOBBoyeEuDXW+ GGbCTvsfzJBAHv8u7ga0nyTaQmhDUGKCdHs2blTgwVAzzr7Tu2Rbc1IkcmKyB4BtY9RU WBXYf/Rx8tvS6V4+7//OFt1qhWfHeZZG+BzTZm3w38h82BCBpiwG+Q+I2hC8donSFggV 2UbdGXchosWU45H2pnnsBAH3Dvdk/QRd/KN416uTFr56Xh4OVfJMJCPoD/DjUOUB89ta YWrros1+rnMExnDJXneNyRP3KQrxd1LLvkgoPefC0j8b+01KEJlDPaIrbUPxx4DU64vw O+Zg== X-Gm-Message-State: AC+VfDwWaFIxBofTxMhS4ZjYsDGHE/7TwOiIi5FtBEGvMhn0DOEDkCzE CXOZ2JLmlnZLNd0phWuI8dSFoQ== X-Google-Smtp-Source: ACHHUZ6poKDsLFlQD1HpmPD4PKyctd7a/nkkBbNQ7Rfv9ZgP68A0QIMU05Nf4HH7hmzf7nDa/sPpGg== X-Received: by 2002:ac2:4db7:0:b0:4f8:5f19:4b49 with SMTP id h23-20020ac24db7000000b004f85f194b49mr9152682lfe.64.1687435071042; Thu, 22 Jun 2023 04:57:51 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:50 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:42 +0200 Subject: [PATCH 2/9] dt-bindings: clock: qcom,mmcc: Add GPLL0_DIV for MSM8998 MIME-Version: 1.0 Message-Id: <20230622-topic-8998clk-v1-2-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=1020; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=L1ZmGJhvE+3c4nyhdd/kuy9sgSYN3qso+d9Gf0E28bg=; b=Kx7DZaLLz3cEJIXbp9mivyGMd4PNbgP5zWk35jXwsFRj7JGiT5rkci4Mf9psBo5lRJH9qd3Dl NgyA+ZH+KzZA+VuUP5rl+iMpX/+FvhQS8WcWc9r37M83UHbTEKujbRe X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org We've not been consuming that clock for no apparent reason. Describe it. Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/clock/qcom,mmcc.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml index 422f5776a771..67e1eae0bbd0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -297,6 +297,7 @@ allOf: - description: HDMI phy PLL clock - description: DisplayPort phy PLL link clock - description: DisplayPort phy PLL vco clock + - description: Global PLL 0 DIV clock clock-names: items: @@ -309,6 +310,7 @@ allOf: - const: hdmipll - const: dplink - const: dpvco + - const: gpll0_div - if: properties: From patchwork Thu Jun 22 11:57:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 695071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F48BC001DB for ; Thu, 22 Jun 2023 11:58:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231377AbjFVL61 (ORCPT ); Thu, 22 Jun 2023 07:58:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230421AbjFVL5z (ORCPT ); Thu, 22 Jun 2023 07:57:55 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 244BB1992 for ; Thu, 22 Jun 2023 04:57:54 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id 2adb3069b0e04-4f64fb05a8aso9695521e87.0 for ; Thu, 22 Jun 2023 04:57:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435072; x=1690027072; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PPujOzEdWd2GY4HdeqnnNvNNdoqp42lpZiZ5LAokMOw=; b=HeBuPRYREe6zUYplbWauXyEe3mGM3Qm9PJU5r3opg6+KycUj+ZKoP5un8DvTCVpere t8gqZ8vZFExYOncaejZszdpOOx4TqBDwVBckVeZNLJRODHT/IQep/MUhJmTILpfQHLfK 4oIHr/2qEylM2u2bbXE3gyvSZ7MnMnm0BIhp5b1WH+UV/pwFx0K2bN4HuOfMU68rYtTV 7zr1BKDYbtIEJ0bCVFRTsgl8PCq6mldpIZwY/qCTwxSHGtPD5mQRlphYCGrqTusbIxby UDlhKyIbN/G3n+vu4TLEEs3y6eBivZHww0Rks19v0r2hSkDBXRhz1biwh1+QfQv6R98k SnnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435072; x=1690027072; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PPujOzEdWd2GY4HdeqnnNvNNdoqp42lpZiZ5LAokMOw=; b=LYb21mK+3BoiJWINrhHhQwraDshT05u4Jx6Rkyc/1gA0npo+GUU9eGXblV6mMs3Bid okIkvrgc4t0jh9hZsP1YrO+40NntAG+b2Q0NSRFeo730R0BFRgit6VACfKRgJqvEDMwh HAXGpKGcZ6JlbqgDDGTEfDLx3gDxsMDgRgpKLb8t/zoh/SGsFO86u/a1vVeu3v05YSrz Io2hlgoO4NB8ByCuec2rB41VLe1WH29FGK5e75dqDc/zCut1CXOODzV4FoZUZT4aE8/s KgDvrawLFNCWYGk47TmcRpJ3WA88x/Zz7Fw3Mu+mA7J7M6aqzasnGVy6ztxMTEYBiFBc jK6g== X-Gm-Message-State: AC+VfDyyilBXHwyfkJH4BCLdD73YUvVmHTDEjYMkO1TtaRaBvO167lYR mAsj86c//8vy/QiZVeFCbb5uLw== X-Google-Smtp-Source: ACHHUZ4+YIViH/fKrGKR6TtKbJcvQEx7UuRmD/if8S7/gj5oxYEK+DM3iT0tGl1rOGPi5E+ZtXT5Yg== X-Received: by 2002:a05:6512:10c5:b0:4f9:5c89:5b08 with SMTP id k5-20020a05651210c500b004f95c895b08mr3797275lfg.21.1687435072400; Thu, 22 Jun 2023 04:57:52 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:52 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:43 +0200 Subject: [PATCH 3/9] clk: qcom: gcc-msm8998: Control MMSS and GPUSS GPLL0 outputs properly MIME-Version: 1.0 Message-Id: <20230622-topic-8998clk-v1-3-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=3280; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=wORPp1SOzai0xux6F9EqW6IU4OmrOUhUsCj/CQktK9I=; b=3mR5/0vkTCm7oxEnW0JY7n49EAER0TAEA7du9t+GVJsy+6i3aZPJA8czEKOCs6nlId6KF6oM3 JEdpkERivfkCdE70AGqlpC46WbXidxGXkd8XCLIuf1QLYsAeq1Muayo X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Up until now, we've been relying on some non-descript hardware magic to pinkypromise turn the clocks on for us. While new SoCs shine with that feature, MSM8998 can not always be fully trusted. Register the MMSS and GPUSS GPLL0 legs with the CCF to allow for manual enable voting. Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo Tested-by: Jeffrey Hugo --- drivers/clk/qcom/gcc-msm8998.c | 58 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index be024f8093c5..cccb19cae481 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -25,6 +25,9 @@ #include "reset.h" #include "gdsc.h" +#define GCC_MMSS_MISC 0x0902C +#define GCC_GPU_MISC 0x71028 + static struct pll_vco fabia_vco[] = { { 250000000, 2000000000, 0 }, { 125000000, 1000000000, 1 }, @@ -1367,6 +1370,22 @@ static struct clk_branch gcc_boot_rom_ahb_clk = { }, }; +static struct clk_branch gcc_mmss_gpll0_div_clk = { + .halt_check = BRANCH_HALT_DELAY, + .clkr = { + .enable_reg = 0x5200c, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_mmss_gpll0_div_clk", + .parent_hws = (const struct clk_hw *[]) { + &gpll0_out_main.clkr.hw, + }, + .num_parents = 1, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_mmss_gpll0_clk = { .halt_check = BRANCH_HALT_DELAY, .clkr = { @@ -1395,6 +1414,38 @@ static struct clk_branch gcc_mss_gpll0_div_clk_src = { }, }; +static struct clk_branch gcc_gpu_gpll0_div_clk = { + .halt_check = BRANCH_HALT_DELAY, + .clkr = { + .enable_reg = 0x5200c, + .enable_mask = BIT(3), + .hw.init = &(struct clk_init_data){ + .name = "gcc_gpu_gpll0_div_clk", + .parent_hws = (const struct clk_hw *[]) { + &gpll0_out_main.clkr.hw, + }, + .num_parents = 1, + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_gpu_gpll0_clk = { + .halt_check = BRANCH_HALT_DELAY, + .clkr = { + .enable_reg = 0x5200c, + .enable_mask = BIT(4), + .hw.init = &(struct clk_init_data){ + .name = "gcc_gpu_gpll0_clk", + .parent_hws = (const struct clk_hw *[]) { + &gpll0_out_main.clkr.hw, + }, + .num_parents = 1, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_blsp1_ahb_clk = { .halt_reg = 0x17004, .halt_check = BRANCH_HALT_VOTED, @@ -3080,6 +3131,9 @@ static struct clk_regmap *gcc_msm8998_clocks[] = { [AGGRE2_SNOC_NORTH_AXI] = &aggre2_snoc_north_axi_clk.clkr, [SSC_XO] = &ssc_xo_clk.clkr, [SSC_CNOC_AHBS_CLK] = &ssc_cnoc_ahbs_clk.clkr, + [GCC_MMSS_GPLL0_DIV_CLK] = &gcc_mmss_gpll0_div_clk.clkr, + [GCC_GPU_GPLL0_DIV_CLK] = &gcc_gpu_gpll0_div_clk.clkr, + [GCC_GPU_GPLL0_CLK] = &gcc_gpu_gpll0_clk.clkr, }; static struct gdsc *gcc_msm8998_gdscs[] = { @@ -3235,6 +3289,10 @@ static int gcc_msm8998_probe(struct platform_device *pdev) if (ret) return ret; + /* Disable the GPLL0 active input to MMSS and GPU via MISC registers */ + regmap_write(regmap, GCC_MMSS_MISC, 0x10003); + regmap_write(regmap, GCC_GPU_MISC, 0x10003); + return qcom_cc_really_probe(pdev, &gcc_msm8998_desc, regmap); } From patchwork Thu Jun 22 11:57:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 696026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FA05C001DD for ; Thu, 22 Jun 2023 11:58:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229691AbjFVL62 (ORCPT ); Thu, 22 Jun 2023 07:58:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230521AbjFVL56 (ORCPT ); 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[83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:53 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:44 +0200 Subject: [PATCH 4/9] clk: qcom: mmcc-msm8998: Properly consume GPLL0 inputs MIME-Version: 1.0 Message-Id: <20230622-topic-8998clk-v1-4-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=4835; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=9epwHHXm7694llyzrYE8Ibwsw00gm3N8GTw3CFx13Eo=; b=/5bBV3ls3t77na3yYjGyjhu7xsiRfwCJvHKl+HBCsTzQcNyR12Mt3ea+q2bU6DG2PMtnqK14Z EGgxaYz0RrTADqd7ZPNET+VKfwNmfpSsUKCz3+6lnIZzOVkj+iv2gCY X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Up until now, the GPLL0_DIV MMSS input has been modeled as a fixed child of MMSS_GPLL0_DIV that's always-on. Properly representing the former in the GCC driver makes us unable to keep doing so. Consume MSS_GPLL0_DIV through fw_name ("gpll0_div") as well as add a fixed .name link to keep backwards compatibility. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/mmcc-msm8998.c | 35 ++++++++--------------------------- 1 file changed, 8 insertions(+), 27 deletions(-) diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm8998.c index 4490594bde69..040c495e91e4 100644 --- a/drivers/clk/qcom/mmcc-msm8998.c +++ b/drivers/clk/qcom/mmcc-msm8998.c @@ -46,19 +46,6 @@ enum { P_DPLINK, }; -static struct clk_fixed_factor gpll0_div = { - .mult = 1, - .div = 2, - .hw.init = &(struct clk_init_data){ - .name = "mmss_gpll0_div", - .parent_data = &(const struct clk_parent_data){ - .fw_name = "gpll0" - }, - .num_parents = 1, - .ops = &clk_fixed_factor_ops, - }, -}; - static const struct clk_div_table post_div_table_fabia_even[] = { { 0x0, 1 }, { 0x1, 2 }, @@ -354,7 +341,7 @@ static const struct parent_map mmss_xo_gpll0_gpll0_div_map[] = { static const struct clk_parent_data mmss_xo_gpll0_gpll0_div[] = { { .fw_name = "xo" }, { .fw_name = "gpll0" }, - { .hw = &gpll0_div.hw }, + { .fw_name = "gpll0_div", .name = "gcc_mmss_gpll0_div_clk" }, }; static const struct parent_map mmss_xo_mmpll0_gpll0_gpll0_div_map[] = { @@ -368,7 +355,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_gpll0_gpll0_div[] = { { .fw_name = "xo" }, { .hw = &mmpll0_out_even.clkr.hw }, { .fw_name = "gpll0" }, - { .hw = &gpll0_div.hw }, + { .fw_name = "gpll0_div", .name = "gcc_mmss_gpll0_div_clk" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div_map[] = { @@ -384,7 +371,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div[] = { { .hw = &mmpll0_out_even.clkr.hw }, { .hw = &mmpll1_out_even.clkr.hw }, { .fw_name = "gpll0" }, - { .hw = &gpll0_div.hw }, + { .fw_name = "gpll0_div", .name = "gcc_mmss_gpll0_div_clk" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div_map[] = { @@ -400,7 +387,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div[] = { { .hw = &mmpll0_out_even.clkr.hw }, { .hw = &mmpll5_out_even.clkr.hw }, { .fw_name = "gpll0" }, - { .hw = &gpll0_div.hw }, + { .fw_name = "gpll0_div", .name = "gcc_mmss_gpll0_div_clk" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div_map[] = { @@ -418,7 +405,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div { .hw = &mmpll3_out_even.clkr.hw }, { .hw = &mmpll6_out_even.clkr.hw }, { .fw_name = "gpll0" }, - { .hw = &gpll0_div.hw }, + { .fw_name = "gpll0_div", .name = "gcc_mmss_gpll0_div_clk" }, }; static const struct parent_map mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map[] = { @@ -436,7 +423,7 @@ static const struct clk_parent_data mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_di { .hw = &mmpll7_out_even.clkr.hw }, { .hw = &mmpll10_out_even.clkr.hw }, { .fw_name = "gpll0" }, - { .hw = &gpll0_div.hw }, + { .fw_name = "gpll0_div", .name = "gcc_mmss_gpll0_div_clk" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div_map[] = { @@ -454,7 +441,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_di { .hw = &mmpll7_out_even.clkr.hw }, { .hw = &mmpll10_out_even.clkr.hw }, { .fw_name = "gpll0" }, - { .hw = &gpll0_div.hw }, + { .fw_name = "gpll0_div", .name = "gcc_mmss_gpll0_div_clk" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map[] = { @@ -474,7 +461,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_g { .hw = &mmpll7_out_even.clkr.hw }, { .hw = &mmpll10_out_even.clkr.hw }, { .fw_name = "gpll0" }, - { .hw = &gpll0_div.hw }, + { .fw_name = "gpll0_div", .name = "gcc_mmss_gpll0_div_clk" }, }; static struct clk_rcg2 byte0_clk_src = { @@ -2544,10 +2531,6 @@ static struct clk_branch vmem_ahb_clk = { }, }; -static struct clk_hw *mmcc_msm8998_hws[] = { - &gpll0_div.hw, -}; - static struct gdsc video_top_gdsc = { .gdscr = 0x1024, .pd = { @@ -2855,8 +2838,6 @@ static const struct qcom_cc_desc mmcc_msm8998_desc = { .num_resets = ARRAY_SIZE(mmcc_msm8998_resets), .gdscs = mmcc_msm8998_gdscs, .num_gdscs = ARRAY_SIZE(mmcc_msm8998_gdscs), - .clk_hws = mmcc_msm8998_hws, - .num_clk_hws = ARRAY_SIZE(mmcc_msm8998_hws), }; static const struct of_device_id mmcc_msm8998_match_table[] = { From patchwork Thu Jun 22 11:57:45 2023 Content-Type: text/plain; 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[83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:54 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:45 +0200 Subject: [PATCH 5/9] clk: qcom: gpucc-msm8998: Use the correct GPLL0 leg with old DTs MIME-Version: 1.0 Message-Id: <20230622-topic-8998clk-v1-5-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=831; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=i8Lw042X9XBNaAM5OkUSQrnlDPICd5ZeS5J2C6fGlZY=; b=me7knvddhaTPeU8nQVjnZIZmIFOw4YVK/zy9Jno9N9rZoEuEB2x5vTP8eDxWxY3fRQaGj/mek 38sJXMWE1YHDajluayrbOh+rK4B3QARql0uWfUQ/+iR8n7Y4XG5Inpw X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org GPUCC has its own GPLL0 legs - one for 1-1 and one for div-2 output. Add .name lookup to make sure older DTs consume the correct clock. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/gpucc-msm8998.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gpucc-msm8998.c b/drivers/clk/qcom/gpucc-msm8998.c index f929e0f2333f..cc0b43354787 100644 --- a/drivers/clk/qcom/gpucc-msm8998.c +++ b/drivers/clk/qcom/gpucc-msm8998.c @@ -98,7 +98,7 @@ static const struct parent_map gpu_xo_gpll0_map[] = { static const struct clk_parent_data gpu_xo_gpll0[] = { { .hw = &gpucc_cxo_clk.clkr.hw }, - { .fw_name = "gpll0" }, + { .fw_name = "gpll0", .name = "gcc_gpu_gpll0_clk" }, }; static const struct parent_map gpu_xo_gpupll0_map[] = { From patchwork Thu Jun 22 11:57:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 695070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 454BAC001DF for ; Thu, 22 Jun 2023 11:58:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230356AbjFVL62 (ORCPT ); Thu, 22 Jun 2023 07:58:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231157AbjFVL6C (ORCPT ); Thu, 22 Jun 2023 07:58:02 -0400 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E6B21BF4 for ; Thu, 22 Jun 2023 04:57:57 -0700 (PDT) Received: by mail-lj1-x234.google.com with SMTP id 38308e7fff4ca-2b46d4e1b0aso77907321fa.2 for ; Thu, 22 Jun 2023 04:57:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435076; x=1690027076; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=1BeSpE3Uo2n8gHC5/9wqy8m/N9Ajlsi5ROuDjpnkB8E=; b=uN9D9VCrZ/r2UEX6MtywDEFINRAwY0Xmp4Z/J8Qc38fn2mKMGtEH8SxxyGAGkNrJZv XgV/ojRqO28ptAy7Sn3JXO6QLfBHM8Y3UTmUHX8iTw6N52UJSmFrII+Scpemkl5TLW6i 7KUrsepVkTY+Z6wEJ1yMVmMETIB5cfYl8wP5yBWJAGH+MfAdjAsrhxmIHAwjU2gLJvnD Sv4tOhpQaqhrbdPw+xR5ENTnEFBg/CPYoqb2dIgh28Yzdaejy8ylVpaHTnoPIpbqHXkS jcGYk6HZTaW88U9EJXlkyVg8VTd9f2RkxjukzrcSiu28QSC10vUml+WgHgvhBFZqOiki a9og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435076; x=1690027076; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1BeSpE3Uo2n8gHC5/9wqy8m/N9Ajlsi5ROuDjpnkB8E=; b=YtTcr17RasZUM2LrZnbJxKnI68EdVN5vbUVXh8oGevXNSi0blvU7Ses7pfNvHNQWAR egLJ7W+FpX7kCpx+QakqjMVEmMhwVcw/gPw/xnrN0YI6KJ4F7YATFPW4kXQMwBfy/YpQ gML154v/hdNJcDqCX+e+NlLPwIxCdZ5Kl21OmMZcK9FAxusEk+kq1n6kFcH4JHV9eFTh PSRQOEEfNktlkqoyx4DPJO1+bS4KnmjwRQTvlPQosmZe4ByxRq2AUcbK9Wfgt+2JOhpT p0G2KbJsPinuTuDQ6F7416EAtwjpOJRW/D9SL9Ifg92TahFjqtKG+v6KMkHH2v1Vyl6M qyDA== X-Gm-Message-State: AC+VfDzQuNHtsPbqSehuMnPEJSYo2QAUAP8ZUtEn1L3kC3VCJAsBqUNM erd8OKT3eFlGOPP9yUAM02rIUQ== X-Google-Smtp-Source: ACHHUZ4+NaZmD70hTl4GjwDfaM5+0kvxGlaDPhrX+r3D+Ca6PGZQjFY+fu5+mDmEKSPGvsoRUsTL5g== X-Received: by 2002:a05:6512:68:b0:4f6:3ab6:3d9e with SMTP id i8-20020a056512006800b004f63ab63d9emr9859962lfo.59.1687435076336; Thu, 22 Jun 2023 04:57:56 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:56 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:46 +0200 Subject: [PATCH 6/9] clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks MIME-Version: 1.0 Message-Id: <20230622-topic-8998clk-v1-6-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=1420; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=RMdpPTx0djdmSD0IRCOXo7v4qwhogMdk+CvkRbKSXoY=; b=nXGgMQ70zoaumt/TBlld6IqSQFvVaxn2XlqCKqTL97RyXLaeCUKWnUU136fMxxQeDB49j6YkX Nay9tUVEsgPCUFc3D8OUJSnju0/0HSp8deMuJoJKr+0Sy8N7N7hXXor X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some branch clocks are governed externally and we're only supposed to send a request concerning their shutdown, not actually ensure it happens. Use the BRANCH_HALT_SKIP define to skip checking the halt bit. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/gcc-msm8998.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index cccb19cae481..ef410f52f09f 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2112,7 +2112,7 @@ static struct clk_branch gcc_gp3_clk = { static struct clk_branch gcc_bimc_gfx_clk = { .halt_reg = 0x46040, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x46040, .enable_mask = BIT(0), @@ -2125,7 +2125,7 @@ static struct clk_branch gcc_bimc_gfx_clk = { static struct clk_branch gcc_gpu_bimc_gfx_clk = { .halt_reg = 0x71010, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x71010, .enable_mask = BIT(0), @@ -2151,7 +2151,7 @@ static struct clk_branch gcc_gpu_bimc_gfx_src_clk = { static struct clk_branch gcc_gpu_cfg_ahb_clk = { .halt_reg = 0x71004, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x71004, .enable_mask = BIT(0), From patchwork Thu Jun 22 11:57:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 695069 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C20EC0015E for ; Thu, 22 Jun 2023 11:58:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229832AbjFVL6b (ORCPT ); Thu, 22 Jun 2023 07:58:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231176AbjFVL6D (ORCPT ); Thu, 22 Jun 2023 07:58:03 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4CDE61FC2 for ; Thu, 22 Jun 2023 04:57:59 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2b46d4e1b0aso77907761fa.2 for ; Thu, 22 Jun 2023 04:57:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435077; x=1690027077; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ui/BOOndyfM3aIC3fjk2ZOYgUTAS5R3hDINVZmRj27A=; b=G51dqI94M4i4IoL75MXheNZetaeRNUfDFt8S35vZUGj26eZxjgTbZOIzRYJD0HucV8 rAs3iW+wMcnuDoX4mI6iKB+qLUbMm2L7xSSCes9QNqE1o1/akrk+sJw5ELyoDJcY809a tNLjN5qOuj3C8nrdCLNpMxMjEwQiSKJjJKaq3rAPGPix4U25stmqbH08hJxLNcDxqLbI pDZL5bZ+tpTUiazWnAjjXgKGB4OSqD399MM8mwrQ0+9BEzHr/KnD36roAdWj9z9kflWX uPGTIOX5cJ0ytC8hdZPpfyEBUMdIvCNtR2BBnABIQH2oc2NfHFNWkc5O2AQsBRgcDxp/ TzkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435077; x=1690027077; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ui/BOOndyfM3aIC3fjk2ZOYgUTAS5R3hDINVZmRj27A=; b=gmj9tsE7k5KKbfJHbbU/cj2iVoPluzEQ6XJ5gw1gTgdCHlm2rrmmEZ747jVkpxvgPD QANvOSXrTJHkXZdHM9MTwMy/a4mqJSeuy5dfNUev4uv61BupOuoNe2aDxzc1Mcz3uZNx fSpxj2yOzPNuQL5oZo9BsZ0Nkd1pWTpYj8aRlp6GptHnaeRega2tV7aAhYRPQZtNMPBx hLlLyfhwN83WUkZgalnVs63TRBGEi6atk7FccPZKKaA6AdVfmc0mF+V1PcLdBwnaq1lf dORKpc5qg5xxkRZcJEBrD3Zz7jYZf0yja7VlHbpAcJGJaxcYVUI/ZHIirHNYU4d/mmm7 h2lA== X-Gm-Message-State: AC+VfDyB4kAB6VdyoC06rjXLWTQ20berSppfx6FR04iNVFSY3Ab9PFII 8KRicn8F9/zwzOuqTy6a1yv/hg== X-Google-Smtp-Source: ACHHUZ6jZm2wnWtDDlVoHE0YsY6U9Cq2xMNnPCpX781Y1UwaM/Zl4EPP3FI3QQ4a+4v3QKgCCe1EKA== X-Received: by 2002:a19:435a:0:b0:4f8:5905:8e0a with SMTP id m26-20020a19435a000000b004f859058e0amr9990226lfj.6.1687435077710; Thu, 22 Jun 2023 04:57:57 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:57 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:47 +0200 Subject: [PATCH 7/9] clk: qcom: gcc-msm8998: Don't poke at some BIMC GPU clocks MIME-Version: 1.0 Message-Id: <20230622-topic-8998clk-v1-7-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=2115; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=xt2xPT5OWFY9FXJ7H/2LPYsGPu00r53wEVIqMuapaII=; b=2hr6uDLk8/eJg7nshvP5I7TXQUvGJL8vGwFfDFLbEISgkyuS7aAIb5FCtKRIygJ5N7EZdjXrW KWdmpt+lRi2ANl52Dl0WnNjZEpFIn2kDxSk8B92YxqJ2G82pnjvV3rB X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Linux should apparently not be concerned with gcc_gpu_bimc_gfx_src_clk and gcc_gpu_bimc_gfx_src_clk on MSM8998, as they're preconfigured for us. Unregister them to prevent issues. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/gcc-msm8998.c | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index ef410f52f09f..980b5a1b58ae 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2136,19 +2136,6 @@ static struct clk_branch gcc_gpu_bimc_gfx_clk = { }, }; -static struct clk_branch gcc_gpu_bimc_gfx_src_clk = { - .halt_reg = 0x7100c, - .halt_check = BRANCH_HALT, - .clkr = { - .enable_reg = 0x7100c, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "gcc_gpu_bimc_gfx_src_clk", - .ops = &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_gpu_cfg_ahb_clk = { .halt_reg = 0x71004, .halt_check = BRANCH_HALT_SKIP, @@ -2168,19 +2155,6 @@ static struct clk_branch gcc_gpu_cfg_ahb_clk = { }, }; -static struct clk_branch gcc_gpu_snoc_dvm_gfx_clk = { - .halt_reg = 0x71018, - .halt_check = BRANCH_HALT, - .clkr = { - .enable_reg = 0x71018, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "gcc_gpu_snoc_dvm_gfx_clk", - .ops = &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_hmss_ahb_clk = { .halt_reg = 0x48000, .halt_check = BRANCH_HALT_VOTED, @@ -3032,9 +3006,7 @@ static struct clk_regmap *gcc_msm8998_clocks[] = { [GCC_GP3_CLK] = &gcc_gp3_clk.clkr, [GCC_BIMC_GFX_CLK] = &gcc_bimc_gfx_clk.clkr, [GCC_GPU_BIMC_GFX_CLK] = &gcc_gpu_bimc_gfx_clk.clkr, - [GCC_GPU_BIMC_GFX_SRC_CLK] = &gcc_gpu_bimc_gfx_src_clk.clkr, [GCC_GPU_CFG_AHB_CLK] = &gcc_gpu_cfg_ahb_clk.clkr, - [GCC_GPU_SNOC_DVM_GFX_CLK] = &gcc_gpu_snoc_dvm_gfx_clk.clkr, [GCC_HMSS_AHB_CLK] = &gcc_hmss_ahb_clk.clkr, [GCC_HMSS_AT_CLK] = &gcc_hmss_at_clk.clkr, [GCC_HMSS_RBCPR_CLK] = &gcc_hmss_rbcpr_clk.clkr, From patchwork Thu Jun 22 11:57:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 696024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FFF8C001DB for ; Thu, 22 Jun 2023 11:58:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231147AbjFVL6d (ORCPT ); Thu, 22 Jun 2023 07:58:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231204AbjFVL6D (ORCPT ); Thu, 22 Jun 2023 07:58:03 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2E671FF1 for ; Thu, 22 Jun 2023 04:58:00 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id 38308e7fff4ca-2b45e6e1b73so92126651fa.0 for ; Thu, 22 Jun 2023 04:58:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435079; x=1690027079; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZILjfplVkyXwwY/Vk9vNMVAT/CrFw5qFILje9oH7ZxI=; b=LFBzzcgBhdvdLMdLBlLx7ZI7Tbs8dLvXoX+sZiLRdvnn1fl4QQpTvnEsaiC+BagjKr 2XFndg/MxLlKknPcrXMlBOWXB0SWNWyMyS8FiCFTGRq3utGkWa/T2QpN2rZte6NigmUR tiPBaoyKKNyE5NvyH7vm14STfo/RCdqaLQyd1sYX8ts6f3kg0x4icfNr/+m8YX3YKSJh wrRTGLdPOzbKMFiatMpycMLTtgFmujXhcEdEHewhtQoebwEQLl98pEOSEEdzVBO6XBf6 84UdRTCigMjnJCmQ1wEo8+rMR6grFI6lS6zWRzKt9UdpRw+msamfuH7ZrHBLwDer2YZ9 zXXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435079; x=1690027079; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZILjfplVkyXwwY/Vk9vNMVAT/CrFw5qFILje9oH7ZxI=; b=dfnmiUvhnnsMZ9D1lAd30kOsgf2+swdogNaKrhQB6Q+oYnxu4ACq/+hCEHB1cQgGlN gpE3etYRVQ1VHkKOpshPaompIby3oFqKQnrvQuoYHmqPBUrUbs5fBkW7cQK+vfvqcqlm s4VXXl3JUj8vBygZwalO7TUp9C/FK/bfWf2bsnfELGwRBMvtGiWvsoDD78dLoPB6qWma 8QJNaATYbhbbol+Y3ukQZnT5f7mmWslHEqk7BkfJ+PHVNMe6zV84G3Wf4Xenjib05WNi S0GAb2TZazWFo12oSffz+Zz1MeGEl3TvKMKdHa1ExSZR0a6HhhZiTcew4L9eVePDMCGb mw1w== X-Gm-Message-State: AC+VfDwfNHxkZ2OasXcYeElXzyCB1GH1BjtE2Y6tME2aFk+ddlX9H9lD uUBvoOCyl9q1QN8uqDjvsreopg== X-Google-Smtp-Source: ACHHUZ7m4PyiYoTIiAFmkVfe+HaWu+zBYTvJH1Wb7MrWlmzq7NpPoY3WEY2HlcXIYUgaxMcM6zzbWQ== X-Received: by 2002:a19:711c:0:b0:4f6:3000:4d5a with SMTP id m28-20020a19711c000000b004f630004d5amr10848140lfc.38.1687435079156; Thu, 22 Jun 2023 04:57:59 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:58 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:48 +0200 Subject: [PATCH 8/9] arm64: dts: qcom: msm8998: Use the correct GPLL0 leg for GPUCC MIME-Version: 1.0 Message-Id: <20230622-topic-8998clk-v1-8-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=738; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=ih+ryM16TgO1zmWBZ5fg0NCby9pNBTJkiA0FEt7oBOI=; b=3x7GPBHGo/0XQ3mC4GY7XNBfXJTntEfg2XEHTbDuKkHQXoTAbrtUce1oLaNP9lDyknU0kLBdt UNjKraJy5nODREE6ElWLP7/tZhZTPee5Ge0CwmJkHSYDHd7PSGbWTdk X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org GPUCC has its own GPLL0 leg, switch to it to allow shutting it down when it's unused. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index f0e943ff0046..74bd05579796 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -1574,7 +1574,7 @@ gpucc: clock-controller@5065000 { reg = <0x05065000 0x9000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, - <&gcc GPLL0_OUT_MAIN>; + <&gcc GCC_GPU_GPLL0_CLK>; clock-names = "xo", "gpll0"; }; From patchwork Thu Jun 22 11:57:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 695068 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EADD9EB64DA for ; Thu, 22 Jun 2023 11:58:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231157AbjFVL6f (ORCPT ); Thu, 22 Jun 2023 07:58:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231245AbjFVL6I (ORCPT ); Thu, 22 Jun 2023 07:58:08 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 384141995 for ; Thu, 22 Jun 2023 04:58:02 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-4f86e6e4038so697839e87.0 for ; Thu, 22 Jun 2023 04:58:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435080; x=1690027080; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qd4+5bYIJSD1AWeQPTgthQXsn71VUDPalDNC260pIEQ=; b=s0PIpjdHBrUCmeQJXzRAvu/7Mwfkh5y9yHnSBMd/UCbKepsIHfBNbp1Ck5i4GSkk6W Ypof/0JQ4qeLyg4e5sM0TyAwowvArVeU+FnQO5mXoIoyqEkvCdwiL/a9jT8baQZVWdjH jjKfLQOfsufM6WNmjlKHKSF0P/FbW/XEtI57A6VQfdtDuaiM8Gb+8DdXzFH6BBk+Mmml c/bL5/g5YiZm2g2pe9Tqrj+8sM7xfOeGQNYsvesoY7ak0ZaU6cDeHfjQn+1EVGrPf79y rwtB4glx+8vV1qCKtbx9jrcnsU1UeQCLQDGvwmw6fG8TZkZo4aUwQkL/ge9wGP9adtl4 E1vA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435080; x=1690027080; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qd4+5bYIJSD1AWeQPTgthQXsn71VUDPalDNC260pIEQ=; b=eZsGv5MiWBMEKVP15X0EtWj89Kzw9H9juHdjghGhjtqc5Q5aJg93JK43EiueVffx8l blJIsoUvHK9cy6+8+2baKwgvklQrTHk6YIMy7hayvxQm5Re+Hs7D7H71zIURwiXtLIXP 9MIvJYIvml26deQY56mDNbotGhN+ngPcet4Ujec0z3yMlqXlPGNo8MYBld+/02eQDygy 5QfK8XvtJPR2zYaDyWriB/kKTNUIbz0gjkzS2q2EpZcsrbGbgOEe6aA6hBvZbaHrHS3z uK/gqA+0u489VhVoMLmyGWfoG6eve2bxKjoYQXZKjiVY+oW6Lc6rmdO32GhLlutX9LRd ozAQ== X-Gm-Message-State: AC+VfDwc6Yz58f0Yn6WNj1T0lSc6WGnvuQpQQokmXL01PP5yuSkKziaW tgKAOwRzOvk/HlJ0HyYAvu15dg== X-Google-Smtp-Source: ACHHUZ6mSwfTPRX+hOMQU4jgq9OD77Do6O2v/qGaMaDRKmBcy6Ihebui932eq6rSNRtrcEfrp5P2Cw== X-Received: by 2002:a05:6512:12d1:b0:4f7:65a7:4d94 with SMTP id p17-20020a05651212d100b004f765a74d94mr8080678lfg.7.1687435080447; Thu, 22 Jun 2023 04:58:00 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:58:00 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:49 +0200 Subject: [PATCH 9/9] arm64: dts: qcom: msm8998: Use the correct GPLL0_DIV leg for MMCC MIME-Version: 1.0 Message-Id: <20230622-topic-8998clk-v1-9-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=1056; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=gJtjlM23H/np8JPlgrRMMzMMmFruemZY5INaIEO4+Kg=; b=ZOzGxwxyKdjB5CuoCZtPs1vOWhS12y7dZRhQ3MdXQ/4bwzI2xByM4FWZDx1OQatfW2recggXb 6Hy5kqKivQtDFlZuMQ0ki2sV22O+49Wdan7ocq1Q56hCZGjMNz5OB1y X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org MMCC has its own GPLL0 legs - one for 1-1 and one for div-2 output. We've already been using the correct one in the non-div case, start doing so for the other one as well. Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 74bd05579796..c4faba092368 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2718,7 +2718,8 @@ mmcc: clock-controller@c8c0000 { "dsi1byte", "hdmipll", "dplink", - "dpvco"; + "dpvco", + "gpll0_div"; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GCC_MMSS_GPLL0_CLK>, <0>, @@ -2727,7 +2728,8 @@ mmcc: clock-controller@c8c0000 { <0>, <0>, <0>, - <0>; + <0>, + <&gcc GCC_MMSS_GPLL0_DIV_CLK>; }; mmss_smmu: iommu@cd00000 {