From patchwork Thu Jun 22 06:22:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 695865 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4469DEB64DC for ; Thu, 22 Jun 2023 06:23:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230473AbjFVGXQ (ORCPT ); Thu, 22 Jun 2023 02:23:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230503AbjFVGXN (ORCPT ); Thu, 22 Jun 2023 02:23:13 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DEED19AD; Wed, 21 Jun 2023 23:23:08 -0700 (PDT) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35M4s6xa024323; Thu, 22 Jun 2023 06:22:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=m5zDPMjDUmczsmZklZCWVRMSvrMknEgqEwD+AUmnzNI=; b=CVvW97zCOR72eLLT98hnpAsz62SRgkeiR3lS448xBi9AcO6OynMvYg+dJcYuUgLl//Mq AydwxTdrTFnGd7tdWxkNp2bJ/VxRHNqopQlR4H57TE5ETgTbtbxhqpCiKCBIgDtEfEWy 3mEw9f2Yq2DC0JOq1+WdADAgfVG5QXzhkSUnVwMroRTuuJWn++PcYNWk4gNBUMdNWw+T YZkZDLD/EYIOYojQWTnRVBNvIf7AmrDxmss2SQP9oEcBOGk45RNYxq04VLaqGy3VRFhu ++4m+CAgkz8xzoTVzLNWni170edk/XWhzU1Ks3tpanH854J5fV2y94FsdYU5RTJDcg/9 RA== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rbqjbb3av-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jun 2023 06:22:39 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35M6McIo029155 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jun 2023 06:22:38 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 21 Jun 2023 23:22:30 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v2 1/6] dt-bindings: usb: dwc3: Add IPQ5332 compatible Date: Thu, 22 Jun 2023 11:52:08 +0530 Message-ID: <072f84347f18ba0b5fc6bf791b555aa7857c9fdc.1687414716.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 4NNQP6Lf8IZxKZYJ3aX-VoocbMcYgn3w X-Proofpoint-GUID: 4NNQP6Lf8IZxKZYJ3aX-VoocbMcYgn3w X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-22_03,2023-06-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 adultscore=0 suspectscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 mlxlogscore=632 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306220052 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the IPQ5332 dwc3 compatible. Signed-off-by: Varadarajan Narayanan --- v1: Add ipq5332 to interrupts sections --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index ae24dac..9447b54 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -14,6 +14,7 @@ properties: items: - enum: - qcom,ipq4019-dwc3 + - qcom,ipq5332-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8064-dwc3 - qcom,ipq8074-dwc3 @@ -246,6 +247,7 @@ allOf: compatible: contains: enum: + - qcom,ipq5332-dwc3 - qcom,msm8994-dwc3 - qcom,qcs404-dwc3 then: @@ -410,6 +412,7 @@ allOf: compatible: contains: enum: + - qcom,ipq5332-dwc3 - qcom,sdm660-dwc3 then: properties: From patchwork Thu Jun 22 06:22:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 694997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60CB6EB64DD for ; Thu, 22 Jun 2023 06:23:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231160AbjFVGXS (ORCPT ); Thu, 22 Jun 2023 02:23:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230354AbjFVGXQ (ORCPT ); Thu, 22 Jun 2023 02:23:16 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1638199C; Wed, 21 Jun 2023 23:23:10 -0700 (PDT) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35M6BX9h022015; Thu, 22 Jun 2023 06:22:46 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=BUQGp6XKY//q++YwEwPEeWBFKQflOiAkBFx2kYrDYpM=; b=F2Fpm0UeepApdWxIgQX5AeOXQGa5gduEn7Y+9PDVr0/9HGqVn9P0dlk6xxr3kubZsQO2 W1wwC2WqMa7j8JAXWzOcay31HWnafp7GpYyS3F9g+hasPRBfSdxn91ULsz3t2/2tqliV hpGg+5/6blhEJiTJaY7LEMSkj/YG4gFTdq4Sg68dZTTACU1lAfuMMbkR8oVq28IykZqn gNQknKj8m4yd0N3YpMH8e+3BOItgAuQ/i5b+Cc/8LzxyTOU7jTUEkEBMVWyx3Ze078t+ gC8JobMVVNv4gJ2R1t1sRGeE3tUoyAc7l6s/P0wRktCEr6UuBmsjWM3o0QUfXdmHZYVT cw== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rbqjbb3b0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jun 2023 06:22:46 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35M6Mjef022697 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jun 2023 06:22:45 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 21 Jun 2023 23:22:38 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v2 2/6] dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy Date: Thu, 22 Jun 2023 11:52:09 +0530 Message-ID: <4f4136a91b24d3ad35fa12bd19fe14b83da9affe.1687414716.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: W1qHr0IMF1HOcIe1O7rXysUae2QmRHKA X-Proofpoint-GUID: W1qHr0IMF1HOcIe1O7rXysUae2QmRHKA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-22_03,2023-06-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 adultscore=0 suspectscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306220052 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the M31 USB2 phy present in IPQ5332. Signed-off-by: Sricharan Ramabadhran Signed-off-by: Varadarajan Narayanan --- v1: Rename qcom,m31.yaml -> qcom,ipq5332-usb-hsphy.yaml Drop default binding "m31,usb-hsphy" Add clock Remove 'oneOf' from compatible Remove 'qscratch' region from register space as it is not needed Remove reset-names Fix the example definition --- .../bindings/phy/qcom,ipq5332-usb-hsphy.yaml | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml new file mode 100644 index 0000000..ab2e945 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: M31 (https://www.m31tech.com) USB PHY + +maintainers: + - Sricharan Ramabadhran + - Varadarajan Narayanan + +description: + USB M31 PHY found in Qualcomm IPQ5018, IPQ5332 SoCs. + +properties: + compatible: + items: + - enum: + - qcom,ipq5332-usb-hsphy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + contains: + items: + - const: cfg_ahb + + resets: + maxItems: 1 + +additionalProperties: false + +examples: + - | + #include + usbphy0: ipq5332-hsphy@7b000 { + compatible = "qcom,ipq5332-usb-hsphy"; + reg = <0x0007b000 0x12c>; + + clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>; + clock-names = "cfg_ahb"; + + resets = <&gcc GCC_QUSB2_0_PHY_BCR>; + }; + From patchwork Thu Jun 22 06:22:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 695864 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E046EB64DB for ; Thu, 22 Jun 2023 06:23:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231177AbjFVGXb (ORCPT ); Thu, 22 Jun 2023 02:23:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230354AbjFVGX1 (ORCPT ); Thu, 22 Jun 2023 02:23:27 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3298A19BF; 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Thu, 22 Jun 2023 06:22:53 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35M6MqBa016714 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jun 2023 06:22:52 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 21 Jun 2023 23:22:45 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v2 3/6] phy: qcom-m31: Introduce qcom,m31 USB phy driver Date: Thu, 22 Jun 2023 11:52:10 +0530 Message-ID: <51c2d17bc73d1b5ddd62f4022966ff48a511d6ab.1687414716.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: -JD1OmDMBkthTLCdM_XWtD4WlEjogXYr X-Proofpoint-GUID: -JD1OmDMBkthTLCdM_XWtD4WlEjogXYr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-22_03,2023-06-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 adultscore=0 suspectscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306220052 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the M31 USB2 phy driver. Signed-off-by: Varadarajan Narayanan --- v1: Combine driver, makefile and kconfig into 1 patch Remove 'qscratch' region and its usage. The controller driver takes care of those settings Use compatible/data to handle ipq5332 init Drop the default case Get resources by index instead of name as there is only one resource Add clock Fix other review comments in the driver --- drivers/phy/qualcomm/Kconfig | 11 ++ drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-m31.c | 256 ++++++++++++++++++++++++++++++++++++ 3 files changed, 268 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-m31.c diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig index 67a45d9..8a363dd 100644 --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -188,3 +188,14 @@ config PHY_QCOM_IPQ806X_USB This option enables support for the Synopsis PHYs present inside the Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports both HS and SS PHY controllers. + +config PHY_QCOM_M31_USB + tristate "Qualcomm M31 HS PHY driver support" + depends on (USB || USB_GADGET) && ARCH_QCOM + select USB_PHY + help + Enable this to support M31 HS PHY transceivers on Qualcomm chips + with DWC3 USB core. It handles PHY initialization, clock + management required after resetting the hardware and power + management. This driver is required even for peripheral only or + host only mode configurations. diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index de3dc9c..79a6e75 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2)+= phy-qcom-snps-femto-v2.o obj-$(CONFIG_PHY_QCOM_IPQ806X_USB) += phy-qcom-ipq806x-usb.o +obj-$(CONFIG_PHY_QCOM_M31_USB) += phy-qcom-m31.o diff --git a/drivers/phy/qualcomm/phy-qcom-m31.c b/drivers/phy/qualcomm/phy-qcom-m31.c new file mode 100644 index 0000000..8700728 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-m31.c @@ -0,0 +1,256 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2014-2016, 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum clk_reset_action { + CLK_RESET_DEASSERT = 0, + CLK_RESET_ASSERT = 1 +}; + + +#define USB2PHY_PORT_UTMI_CTRL1 0x40 + +#define USB2PHY_PORT_UTMI_CTRL2 0x44 + #define UTMI_ULPI_SEL BIT(7) + #define UTMI_TEST_MUX_SEL BIT(6) + +#define HS_PHY_CTRL_REG 0x10 + #define UTMI_OTG_VBUS_VALID BIT(20) + #define SW_SESSVLD_SEL BIT(28) + +#define USB_PHY_UTMI_CTRL0 0x3c + +#define USB_PHY_UTMI_CTRL5 0x50 + #define POR_EN BIT(1) + #define ATERESET ~BIT(0) + +#define USB_PHY_HS_PHY_CTRL_COMMON0 0x54 + #define COMMONONN BIT(7) + #define FSEL BIT(4) + #define RETENABLEN BIT(3) + #define FREQ_24MHZ (5 << 4) + +#define USB_PHY_HS_PHY_CTRL2 0x64 + #define USB2_SUSPEND_N_SEL BIT(3) + #define USB2_SUSPEND_N BIT(2) + #define USB2_UTMI_CLK_EN BIT(1) + +#define USB_PHY_CFG0 0x94 + #define UTMI_PHY_OVERRIDE_EN BIT(1) + +#define USB_PHY_REFCLK_CTRL 0xa0 + #define CLKCORE BIT(1) + +#define USB2PHY_PORT_POWERDOWN 0xa4 + #define POWER_UP BIT(0) + #define POWER_DOWN 0 + +#define USB_PHY_FSEL_SEL 0xb8 + #define FREQ_SEL BIT(0) + +#define USB2PHY_USB_PHY_M31_XCFGI_1 0xbc + #define USB2_0_TX_ENABLE BIT(2) + +#define USB2PHY_USB_PHY_M31_XCFGI_4 0xc8 + #define HSTX_SLEW_RATE_565PS GENMASK(1, 0) + #define PLL_CHARGING_PUMP_CURRENT_35UA GENMASK(4, 3) + #define ODT_VALUE_38_02_OHM GENMASK(7, 6) + +#define USB2PHY_USB_PHY_M31_XCFGI_5 0xcc + #define ODT_VALUE_45_02_OHM BIT(2) + #define HSTX_PRE_EMPHASIS_LEVEL_0_55MA BIT(0) + +#define USB2PHY_USB_PHY_M31_XCFGI_11 0xe4 + #define XCFG_COARSE_TUNE_NUM BIT(1) + #define XCFG_FINE_TUNE_NUM BIT(3) + +struct m31_phy_regs { + u32 off; + u32 val; + u32 delay; +}; + +struct m31_priv_data { + bool ulpi_mode; + const struct m31_phy_regs *regs; +}; + +#define M31_REG(__o, __v, __d) \ + { .off = __o, .val = __v, .delay = __d } + +#define M31_REG_INVALID 0xffffffffu + +struct m31_phy_regs m31_ipq5332_regs[] = { + M31_REG(USB_PHY_CFG0, UTMI_PHY_OVERRIDE_EN, 0), + M31_REG(USB_PHY_UTMI_CTRL5, POR_EN, 15), + M31_REG(USB_PHY_FSEL_SEL, FREQ_SEL, 0), + M31_REG(USB_PHY_HS_PHY_CTRL_COMMON0, + COMMONONN | FREQ_24MHZ | RETENABLEN, 0), + M31_REG(USB_PHY_UTMI_CTRL5, POR_EN & ATERESET, 0), + M31_REG(USB_PHY_HS_PHY_CTRL2, + USB2_SUSPEND_N_SEL | USB2_SUSPEND_N | USB2_UTMI_CLK_EN, 0), + M31_REG(USB2PHY_USB_PHY_M31_XCFGI_11, + XCFG_COARSE_TUNE_NUM | XCFG_FINE_TUNE_NUM, 0), + M31_REG(USB2PHY_USB_PHY_M31_XCFGI_4, + HSTX_SLEW_RATE_565PS | PLL_CHARGING_PUMP_CURRENT_35UA | + ODT_VALUE_38_02_OHM, 0), + M31_REG(USB2PHY_USB_PHY_M31_XCFGI_1, USB2_0_TX_ENABLE, 0), + M31_REG(USB2PHY_USB_PHY_M31_XCFGI_5, + ODT_VALUE_45_02_OHM | HSTX_PRE_EMPHASIS_LEVEL_0_55MA, 4), + M31_REG(USB_PHY_UTMI_CTRL5, 0x0, 0), + M31_REG(USB_PHY_HS_PHY_CTRL2, USB2_SUSPEND_N | USB2_UTMI_CLK_EN, 0), + M31_REG(M31_REG_INVALID, 0, 0), +}; + +struct m31usb_phy { + struct usb_phy phy; + void __iomem *base; + const struct m31_phy_regs *regs; + + struct clk *cfg_ahb_clk; + struct reset_control *phy_reset; + + bool cable_connected; + bool suspended; + bool ulpi_mode; +}; + +static void m31usb_phy_enable_clock(struct m31usb_phy *qphy) +{ + const struct m31_phy_regs *regs = qphy->regs; + + for (; regs->off != M31_REG_INVALID; regs++) { + writel(regs->val, qphy->base + regs->off); + if (regs->delay) + udelay(regs->delay); + } +} + +static int m31usb_phy_init(struct usb_phy *phy) +{ + int ret; + struct m31usb_phy *qphy = container_of(phy, struct m31usb_phy, phy); + + ret = clk_prepare_enable(qphy->cfg_ahb_clk); + if (ret) { + dev_err(phy->dev, "failed to enable cfg ahb clock, %d\n", ret); + return ret; + } + + /* Perform phy reset */ + reset_control_assert(qphy->phy_reset); + udelay(5); + reset_control_deassert(qphy->phy_reset); + + /* configure for ULPI mode if requested */ + if (qphy->ulpi_mode) + writel(0x0, qphy->base + USB2PHY_PORT_UTMI_CTRL2); + + /* Enable the PHY */ + writel(POWER_UP, qphy->base + USB2PHY_PORT_POWERDOWN); + + /* Make sure above write completed */ + wmb(); + + /* Turn on phy ref clock */ + m31usb_phy_enable_clock(qphy); + + return 0; +} + +static void m31usb_phy_shutdown(struct usb_phy *phy) +{ + struct m31usb_phy *qphy = container_of(phy, struct m31usb_phy, phy); + + /* Disable the PHY */ + writel_relaxed(POWER_DOWN, qphy->base + USB2PHY_PORT_POWERDOWN); + /* Make sure above write completed */ + wmb(); + + clk_disable_unprepare(qphy->cfg_ahb_clk); +} + +static int m31usb_phy_probe(struct platform_device *pdev) +{ + const struct m31_priv_data *data; + struct device *dev = &pdev->dev; + struct m31usb_phy *qphy; + int ret; + + qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); + if (!qphy) + return -ENOMEM; + + qphy->phy.dev = dev; + + qphy->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(qphy->base)) + return PTR_ERR(qphy->base); + + qphy->phy_reset = devm_reset_control_get_exclusive_by_index(dev, 0); + if (IS_ERR(qphy->phy_reset)) + return PTR_ERR(qphy->phy_reset); + + qphy->cfg_ahb_clk = devm_clk_get(dev, "cfg_ahb"); + platform_set_drvdata(pdev, qphy); + + data = of_device_get_match_data(dev); + qphy->regs = data->regs; + qphy->ulpi_mode = data->ulpi_mode; + + qphy->phy.label = "m31-usb-phy"; + qphy->phy.init = m31usb_phy_init; + qphy->phy.shutdown = m31usb_phy_shutdown; + qphy->phy.type = USB_PHY_TYPE_USB2; + + ret = usb_add_phy_dev(&qphy->phy); + + return ret; +} + +static void m31usb_phy_remove(struct platform_device *pdev) +{ + struct m31usb_phy *qphy = platform_get_drvdata(pdev); + + usb_remove_phy(&qphy->phy); +} + +struct m31_priv_data m31_ipq5332_data = { + .ulpi_mode = false, + .regs = m31_ipq5332_regs, +}; + +static const struct of_device_id m31usb_phy_id_table[] = { + { .compatible = "qcom,ipq5332-usb-hsphy", .data = &m31_ipq5332_data }, + { }, +}; +MODULE_DEVICE_TABLE(of, m31usb_phy_id_table); + +static struct platform_driver m31usb_phy_driver = { + .probe = m31usb_phy_probe, + .remove_new = m31usb_phy_remove, + .driver = { + .name = "qcom-m31usb-phy", + .of_match_table = m31usb_phy_id_table, + }, +}; + +module_platform_driver(m31usb_phy_driver); + +MODULE_DESCRIPTION("USB2 Qualcomm M31 HSPHY driver"); +MODULE_LICENSE("GPL"); From patchwork Thu Jun 22 06:22:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 694996 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4072DEB64DA for ; Thu, 22 Jun 2023 06:23:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231186AbjFVGXn (ORCPT ); Thu, 22 Jun 2023 02:23:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231183AbjFVGXb (ORCPT ); Thu, 22 Jun 2023 02:23:31 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D88919B5; 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Thu, 22 Jun 2023 06:23:00 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35M6MxQN029783 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jun 2023 06:22:59 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 21 Jun 2023 23:22:52 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v2 4/6] arm64: dts: qcom: ipq5332: Add USB related nodes Date: Thu, 22 Jun 2023 11:52:11 +0530 Message-ID: <915b3b0ba490dd31573ce5e92b55ff5c0d548f6f.1687414716.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: uHegUWj3XTK4eeY90NQ6dLr_g7Tu8yXg X-Proofpoint-ORIG-GUID: uHegUWj3XTK4eeY90NQ6dLr_g7Tu8yXg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-22_03,2023-06-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 mlxscore=0 adultscore=0 spamscore=0 impostorscore=0 mlxlogscore=769 clxscore=1015 suspectscore=0 phishscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306220052 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add USB phy and controller nodes. Signed-off-by: Varadarajan Narayanan --- v1: Rename phy node Change compatible from m31,ipq5332-usb-hsphy -> qcom,ipq5332-usb-hsphy Remove 'qscratch' from phy node Fix alignment and upper-case hex no.s Add clock definition for the phy Remove snps,ref-clock-period-ns as it is not used. dwc3_ref_clk_period() in dwc3/core.c takes the frequency from ref clock and calculates fladj as appropriate. --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 54 +++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 8bfc2db..c945ff6 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -405,6 +405,60 @@ status = "disabled"; }; }; + + usbphy0: ipq5332-hsphy@7b000 { + compatible = "qcom,ipq5332-usb-hsphy"; + reg = <0x0007b000 0x12c>; + + clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>; + clock-names = "cfg_ahb"; + + resets = <&gcc GCC_QUSB2_0_PHY_BCR>; + + status = "disabled"; + }; + + usb2: usb2@8a00000 { + compatible = "qcom,ipq5332-dwc3", "qcom,dwc3"; + + reg = <0x08af8800 0x400>; + + interrupts = ; + interrupt-names = "hs_phy_irq"; + + clocks = <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_SNOC_USB_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; + clock-names = "core", + "iface", + "sleep", + "mock_utmi"; + + resets = <&gcc GCC_USB_BCR>; + + qcom,select-utmi-as-pipe-clk; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + status = "disabled"; + + usb2_0_dwc: usb@8a00000 { + compatible = "snps,dwc3"; + reg = <0x08a00000 0xe000>; + clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>; + clock-names = "ref"; + interrupts = ; + usb-phy = <&usbphy0>; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + }; + }; }; timer { From patchwork Thu Jun 22 06:22:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 695863 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16DE3EB64D8 for ; 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Thu, 22 Jun 2023 06:23:07 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35M6N67o029879 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jun 2023 06:23:06 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 21 Jun 2023 23:22:59 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v2 5/6] arm64: dts: qcom: ipq5332: Enable USB Date: Thu, 22 Jun 2023 11:52:12 +0530 Message-ID: <7a23cd808f3522b2dc617ad9510e6c0ac5b7184e.1687414716.git.quic_varada@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: QDNk_Zktd64N3FhyLdryDBMT0Iz4SK6B X-Proofpoint-ORIG-GUID: QDNk_Zktd64N3FhyLdryDBMT0Iz4SK6B X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-22_03,2023-06-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 mlxscore=0 adultscore=0 spamscore=0 impostorscore=0 mlxlogscore=482 clxscore=1015 suspectscore=0 phishscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306220052 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable USB2 in host mode. Signed-off-by: Varadarajan Narayanan --- v1: Enable usb-phy node --- arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts index 3b6a5cb..08a78b2 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts @@ -101,3 +101,15 @@ bias-pull-up; }; }; + +&usbphy0 { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; + +&usb2_0_dwc { + dr_mode = "host"; +}; From patchwork Thu Jun 22 06:22:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varadarajan Narayanan X-Patchwork-Id: 694995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2934EB64DB for ; Thu, 22 Jun 2023 06:24:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231235AbjFVGYW (ORCPT ); Thu, 22 Jun 2023 02:24:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231237AbjFVGYI (ORCPT ); Thu, 22 Jun 2023 02:24:08 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7D281FE7; Wed, 21 Jun 2023 23:23:40 -0700 (PDT) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35M5E9L4027991; Thu, 22 Jun 2023 06:23:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=zzWsjhhz2YlZCLB/3/jkEkTqmAGMbDT/EizCCsRa4JA=; b=PGBueS7GxqMGuA7JDiilegSoaKsb5uKtnJUl6WvRQZLZ6DCrfOIfRwA997KnuLm0+7ZY k99Glpza1L1pAWIUvKOnjNthghvb19z4Y8MvamU0bIKZkjILuKWTDxP2aEsepgi1HohQ 1xSMSR6zZiURRKfk4WHS83Q/iGv8xq/GZd1DyTa+5r9iqhCXR1FBHSFlnfsezjErvwtg N9Svymv2t21Re2JESSFHeSvu4aVSdHQ/g/CKpagND5QoFWPZveK7BZZhVygYhxLowgTs y+TZjBJyvKCmhtQKbEmjKDJdr4WJEhklHFiur1GoP81YGGqziTRlO2P55DAZTgGLcSbB 0w== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rbqjbb3bu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jun 2023 06:23:14 +0000 Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35M6ND0v010418 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jun 2023 06:23:13 GMT Received: from varda-linux.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 21 Jun 2023 23:23:06 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH v2 6/6] arm64: defconfig: Enable M31 USB phy driver Date: Thu, 22 Jun 2023 11:52:13 +0530 Message-ID: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: vg2X7X7QVgEmEEqzordl_Gozm04ZvVEZ X-Proofpoint-GUID: vg2X7X7QVgEmEEqzordl_Gozm04ZvVEZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-22_03,2023-06-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 adultscore=0 suspectscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 mlxlogscore=480 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306220052 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable M31 USB phy driver present in IPQ5332. Signed-off-by: Varadarajan Narayanan --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 57c6b7b..aee711c 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1377,6 +1377,7 @@ CONFIG_PHY_QCOM_USB_HS=m CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=m CONFIG_PHY_QCOM_USB_HS_28NM=m CONFIG_PHY_QCOM_USB_SS=m +CONFIG_PHY_QCOM_M31_USB=m CONFIG_PHY_R8A779F0_ETHERNET_SERDES=y CONFIG_PHY_RCAR_GEN3_PCIE=y CONFIG_PHY_RCAR_GEN3_USB2=y