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Wysocki" CC: Len Brown , Huang Rui , , , , Gautham Ranjal Shenoy , Wyes Karny , Perry Yuan , "Mario Limonciello" Subject: [PATCH v3 1/3] ACPI: CPPC: Add definition for undefined FADT preferred PM profile value Date: Tue, 20 Jun 2023 12:24:31 -0500 Message-ID: <20230620172433.21325-2-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230620172433.21325-1-mario.limonciello@amd.com> References: <20230620172433.21325-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C6:EE_|LV2PR12MB5749:EE_ X-MS-Office365-Filtering-Correlation-Id: c84faec9-dfaa-4622-d534-08db71b3a2bf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: H5xT3+fpsM/ba12YoAc4wEBMcPD6Qs6T1XWspAiWI1dyiBbTf/r2PkEQMjc8+3JmjptfFCUa5rkaal/Zm0m4bAYM1dk2UDeocOfGeM4UED9SyH5MDSxad5xFB1gGx/kaQBzXMB+Qwv7j3l0AsUKclOoPPhXfAItIGBHKfRsy7n6hZUhEYtkfW47lNQPJ52uQToTzkQjRb2/nbuvT7Aj+/yWtf74fijJjgeN88hd98c8mFThQ2HXr+ecW+dHQPtjVu2Yk8uA2PvBC82qenLqayW+AvqfX4SF1bDVvwHq2HwDas6S3G07ZQ+z8c8+YpFsd427bFhwwLIShESMaGT/pmsBAZA/HWEWjrpWlmEuATgIrZHMG2jCW1uqdB9nNfJtByLqa2khlKbzAsGErqpDnhJ/jwExhJ4eCG0BuQ+v2kb7YIQ3SsQLF+C3Rtj5OGAForrIeNTMl8QXisF/dkgkVlxYat7cF7HSOURkIyzUepF3PC45nolIlbiqKINnmeXm7epTMmq1EaYSDsm074jSi28WRhghhlSbSTpto0CBBWi51pamOgD1hdnmUQCQ0gSW0dxq5zj7RU7KDxiOAyhfPOCoQtNfGw6mf/gCkgsPLnLVkYZSBK0+p4XXD9Z3RtU6xGc8UFC487kLJ9t/Ytycfm1KJ2jxT1ZbsFtAcD/2ujVjYJnrQOdkCXDqiR8somPEWSvS8aApi5ucEpLECbRYvrLQ6zz1ag4zA3Vd4EiN2hJDnhOTCdLMJEFD1JZsMBgWtyTnAHxzxHp4PxpXnYN6s7Q== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230028)(4636009)(39860400002)(376002)(396003)(136003)(346002)(451199021)(36840700001)(40470700004)(46966006)(1076003)(26005)(2906002)(966005)(7696005)(47076005)(82310400005)(36756003)(40460700003)(86362001)(36860700001)(40480700001)(8676002)(8936002)(70586007)(70206006)(41300700001)(316002)(4326008)(6916009)(426003)(2616005)(186003)(16526019)(82740400003)(81166007)(356005)(478600001)(83380400001)(336012)(54906003)(5660300002)(44832011)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jun 2023 17:27:34.5997 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c84faec9-dfaa-4622-d534-08db71b3a2bf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5749 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org In the event a new preferred PM profile value is introduced it's best for code to be able to defensively guard against it so that the wrong settings don't get applied on a new system that uses this profile but ancient kernels. Acked-by: Huang Rui Suggested-by: Gautham Ranjal Shenoy Link: https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/05_ACPI_Software_Programming_Model/ACPI_Software_Programming_Model.html#fixed-acpi-description-table-fadt Signed-off-by: Mario Limonciello Reviewed-by: Perry Yuan --- v2->v3: * Drop new symbols (they fold into patch 2) * Update commit message * Add Ray's tag --- include/acpi/actbl.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/acpi/actbl.h b/include/acpi/actbl.h index e5dfb6f4de52..451f6276da49 100644 --- a/include/acpi/actbl.h +++ b/include/acpi/actbl.h @@ -307,7 +307,8 @@ enum acpi_preferred_pm_profiles { PM_SOHO_SERVER = 5, PM_APPLIANCE_PC = 6, PM_PERFORMANCE_SERVER = 7, - PM_TABLET = 8 + PM_TABLET = 8, + NR_PM_PROFILES = 9 }; /* Values for sleep_status and sleep_control registers (V5+ FADT) */ From patchwork Tue Jun 20 17:24:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 694667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09316C001B3 for ; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SA2PEPF000015C6.mail.protection.outlook.com (10.167.241.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6521.19 via Frontend Transport; Tue, 20 Jun 2023 17:27:35 +0000 Received: from SITE-L-T34-2.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Tue, 20 Jun 2023 12:27:34 -0500 From: Mario Limonciello To: "Rafael J . Wysocki" CC: Len Brown , Huang Rui , , , , Gautham Ranjal Shenoy , Wyes Karny , Perry Yuan , "Mario Limonciello" Subject: [PATCH v3 2/3] cpufreq: amd-pstate: Set a fallback policy based on preferred_profile Date: Tue, 20 Jun 2023 12:24:32 -0500 Message-ID: <20230620172433.21325-3-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230620172433.21325-1-mario.limonciello@amd.com> References: <20230620172433.21325-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C6:EE_|PH7PR12MB5975:EE_ X-MS-Office365-Filtering-Correlation-Id: fa29dc9f-4c06-4e8b-cfa6-08db71b3a33b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: wlYJzZhPoMwnvbU++M1XxWehUWOGE6+BNLwgnaWVIBD71oivZpnNjZgkPF4glVsCw3I5TP/CukyNDmaRiaDbMPtx/6Tfq6rLhpujMAIRUuDh49kYhWeWQCYRFV5AVOfnOh8SIiR6u52EqXqUfURrj/Zt4XzEqojblCkANFKE/qJSZxthyWWjTcL8o1FcTXmqhgRn56OYFL4zVMj0iHbnPuTOfiK4PvVxvVE+dr3bnHiLZCDyY8sH2jZ13TfnaMO8/sW5xUALMhdILYIDH+RAM8a9nPaGxhEzcVWsidWy4BEq1PGt2aORi2q/ziiGXLXUE8ZOxomO6rsWMHhlVl9zNxJs800HMAioBgbgd0irZHYgG8kKe2PrKhVaCQGNVG+nXbkSavjlZIPZFjwUnjDGKVAz2mRZhGa8V9/cuon/5/+jbjHMm4PakLDSbYoZ9aez2kceAuB1vL3fzMXoWk1kwxv/qo0NKaiZAQOkKc+LuU9P4vU9et60/5U1wqUABZad8yMsIWBGDFcwkZ7rw8GqxXJtOhEnOIroX9fmrhLvSufXGQXTNnyFpBOvoNMmEGppATO6ri/OBl8Isr45ixpUfXbLZnCYcXgi5di9U+Bs0IfmD1VDTDN50drV5jx8JJMDPwA8yp63FNJa8gOjGxZwMLdIq4u9Yd0Oho4qzLIL28B9U1nUSq3VcmfHBgkst/pLlVmtt+tN2WFwWk04x5dYeuaxLxSFb+wYK49EdtV75jAB7c4oor4mvL8X8JruuWL+ X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230028)(4636009)(396003)(346002)(39860400002)(376002)(136003)(451199021)(36840700001)(46966006)(40470700004)(83380400001)(47076005)(7696005)(54906003)(316002)(8676002)(8936002)(2616005)(86362001)(36756003)(26005)(1076003)(4326008)(16526019)(186003)(82310400005)(426003)(336012)(41300700001)(5660300002)(70586007)(70206006)(6916009)(44832011)(356005)(40460700003)(82740400003)(966005)(81166007)(40480700001)(478600001)(36860700001)(2906002)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jun 2023 17:27:35.4122 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa29dc9f-4c06-4e8b-cfa6-08db71b3a33b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5975 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org If a user's configuration doesn't explicitly specify the cpufreq scaling governor then the code currently explicitly falls back to 'powersave'. This default is fine for notebooks and desktops, but servers and undefined machines should default to 'performance'. Look at the 'preferred_profile' field from the FADT to set this policy accordingly. Link: https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/05_ACPI_Software_Programming_Model/ACPI_Software_Programming_Model.html#fixed-acpi-description-table-fadt Acked-by: Huang Rui Suggested-by: Wyes Karny Reviewed-by: Gautham R. Shenoy Signed-off-by: Mario Limonciello Reviewed-by: Perry Yuan --- v2->v3: * Move new symbols out of patch 1 into this patch * Add Ray's tag --- drivers/cpufreq/amd-pstate.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index d8269994322e..3546d7db614d 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1071,6 +1071,26 @@ static const struct attribute_group amd_pstate_global_attr_group = { .attrs = pstate_global_attributes, }; +static bool amd_pstate_acpi_pm_profile_server(void) +{ + switch (acpi_gbl_FADT.preferred_profile) { + case PM_ENTERPRISE_SERVER: + case PM_SOHO_SERVER: + case PM_PERFORMANCE_SERVER: + return true; + } + return false; +} + +static bool amd_pstate_acpi_pm_profile_undefined(void) +{ + if (acpi_gbl_FADT.preferred_profile == PM_UNSPECIFIED) + return true; + if (acpi_gbl_FADT.preferred_profile >= NR_PM_PROFILES) + return true; + return false; +} + static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) { int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; @@ -1128,10 +1148,14 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) policy->max = policy->cpuinfo.max_freq; /* - * Set the policy to powersave to provide a valid fallback value in case + * Set the policy to provide a valid fallback value in case * the default cpufreq governor is neither powersave nor performance. */ - policy->policy = CPUFREQ_POLICY_POWERSAVE; + if (amd_pstate_acpi_pm_profile_server() || + amd_pstate_acpi_pm_profile_undefined()) + policy->policy = CPUFREQ_POLICY_PERFORMANCE; + else + policy->policy = CPUFREQ_POLICY_POWERSAVE; if (boot_cpu_has(X86_FEATURE_CPPC)) { ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value); From patchwork Tue Jun 20 17:24:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 694858 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70F92EB64D7 for ; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SA2PEPF000015C6.mail.protection.outlook.com (10.167.241.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6521.19 via Frontend Transport; Tue, 20 Jun 2023 17:27:37 +0000 Received: from SITE-L-T34-2.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Tue, 20 Jun 2023 12:27:34 -0500 From: Mario Limonciello To: "Rafael J . Wysocki" CC: Len Brown , Huang Rui , , , , Gautham Ranjal Shenoy , Wyes Karny , Perry Yuan , "Mario Limonciello" Subject: [PATCH v3 3/3] cpufreq: amd-pstate: Add a kernel config option to set default mode Date: Tue, 20 Jun 2023 12:24:33 -0500 Message-ID: <20230620172433.21325-4-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230620172433.21325-1-mario.limonciello@amd.com> References: <20230620172433.21325-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C6:EE_|IA0PR12MB7532:EE_ X-MS-Office365-Filtering-Correlation-Id: 1be68254-a608-406b-3877-08db71b3a468 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: KcPQK1Rm00DI5SvSXAm5nAfk8XJIP3i41THa6sRF4m9f7MdZaRz+jDv6f6rP5XXVqWDC/EyLh9SLNOc9sEXG8kUuJMgr1Z3JcmWPI5iOQOCvd5bRBvZKiu9lEMervw6WHWaNZo+gsmbUN5Kd91mvsHXltdNcIW6EY631bKYZrPX87XhSQtblleEBRETSP9g/6HeGfzxjGSF9x+W2yb4VRzBnSw9FrRjXgYZ88ZA15U4mKq4fADMnEdSkJU9bJAI+4dbMQEtysBoF4m2YoE+aiaGAfLVHJ4EPI7pMm8FhYDUjoBMxbts8sYN3bsOK1d7AaLy+Ds7hNwuCsk2rBbzCyi8EuRksVOljuCG5jngTV7oZ0jN+zCMBu4b6K66cvzQEHew0r224Mdpi8k4Nl8C/il+TFhpQWkfqzuNfId31aTkMvlfIfrxRYQNF+VE3u/WwEZNeUY8LTg/17EafRiEdxJ9p3fnutljslr/yrP7eoO+xbY9gtYJC4Mo1H+3y+C2dDhuDt7Na1MjAaY6vRooRjiLnbNtdJIGS696G/D0MrWQPYk9DsxFEJkDlGiIjzAotUPn6a9l6v9WB/pg4uihGctudzGpLO0a/yRqzrxsjWS7wFNVE4W8Ava/4GnomA1wehoFyy2MOvmYZEsWtfYkSAQciUE1lbgtoXaunzM2qtwRO6rXT/2yo6vO6lCvNbZYFqCZpHO5Gqlnh8EbLFJdLz59wkK/6EycAUnYYeUDQ6+J0+sxf/FLvMPxhqU+35vW8 X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230028)(4636009)(376002)(39860400002)(136003)(346002)(396003)(451199021)(40470700004)(46966006)(36840700001)(4326008)(7696005)(478600001)(54906003)(1076003)(40460700003)(26005)(16526019)(186003)(40480700001)(966005)(36756003)(2906002)(41300700001)(8676002)(8936002)(70586007)(70206006)(6916009)(316002)(5660300002)(44832011)(82310400005)(86362001)(47076005)(83380400001)(426003)(336012)(81166007)(356005)(2616005)(36860700001)(82740400003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jun 2023 17:27:37.3810 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1be68254-a608-406b-3877-08db71b3a468 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7532 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Users are having more success with amd-pstate since the introduction of EPP and Guided modes. To expose the driver to more users by default introduce a kernel configuration option for setting the default mode. Users can use an integer to map out which default mode they want to use in lieu of a kernel command line option. This will default to EPP, but only if: 1) The CPU supports an MSR. 2) The system profile is identified 3) The system profile is identified as a non-server by the FADT. Link: https://gitlab.freedesktop.org/hadess/power-profiles-daemon/-/merge_requests/121 Acked-by: Huang Rui Reviewed-by: Gautham R. Shenoy Co-developed-by: Perry Yuan Signed-off-by: Perry Yuan Signed-off-by: Mario Limonciello --- v2->v3: * Use new symbol names from being folded into this patch * Add Ray's tag --- drivers/cpufreq/Kconfig.x86 | 17 +++++++++ drivers/cpufreq/amd-pstate.c | 73 ++++++++++++++++++++++++------------ include/linux/amd-pstate.h | 4 +- 3 files changed, 68 insertions(+), 26 deletions(-) diff --git a/drivers/cpufreq/Kconfig.x86 b/drivers/cpufreq/Kconfig.x86 index 00476e94db90..438c9e75a04d 100644 --- a/drivers/cpufreq/Kconfig.x86 +++ b/drivers/cpufreq/Kconfig.x86 @@ -51,6 +51,23 @@ config X86_AMD_PSTATE If in doubt, say N. +config X86_AMD_PSTATE_DEFAULT_MODE + int "AMD Processor P-State default mode" + depends on X86_AMD_PSTATE + default 3 if X86_AMD_PSTATE + range 1 4 + help + Select the default mode the amd-pstate driver will use on + supported hardware. + The value set has the following meanings: + 1 -> Disabled + 2 -> Passive + 3 -> Active (EPP) + 4 -> Guided + + For details, take a look at: + . + config X86_AMD_PSTATE_UT tristate "selftest for AMD Processor P-State driver" depends on X86 && ACPI_PROCESSOR diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 3546d7db614d..81fba0dcbee9 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -62,7 +62,7 @@ static struct cpufreq_driver *current_pstate_driver; static struct cpufreq_driver amd_pstate_driver; static struct cpufreq_driver amd_pstate_epp_driver; -static int cppc_state = AMD_PSTATE_DISABLE; +static int cppc_state = AMD_PSTATE_UNDEFINED; static bool cppc_enabled; /* @@ -1410,6 +1410,25 @@ static struct cpufreq_driver amd_pstate_epp_driver = { .attr = amd_pstate_epp_attr, }; +static int __init amd_pstate_set_driver(int mode_idx) +{ + if (mode_idx >= AMD_PSTATE_DISABLE && mode_idx < AMD_PSTATE_MAX) { + cppc_state = mode_idx; + if (cppc_state == AMD_PSTATE_DISABLE) + pr_info("driver is explicitly disabled\n"); + + if (cppc_state == AMD_PSTATE_ACTIVE) + current_pstate_driver = &amd_pstate_epp_driver; + + if (cppc_state == AMD_PSTATE_PASSIVE || cppc_state == AMD_PSTATE_GUIDED) + current_pstate_driver = &amd_pstate_driver; + + return 0; + } + + return -EINVAL; +} + static int __init amd_pstate_init(void) { struct device *dev_root; @@ -1417,15 +1436,6 @@ static int __init amd_pstate_init(void) if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) return -ENODEV; - /* - * by default the pstate driver is disabled to load - * enable the amd_pstate passive mode driver explicitly - * with amd_pstate=passive or other modes in kernel command line - */ - if (cppc_state == AMD_PSTATE_DISABLE) { - pr_info("driver load is disabled, boot with specific mode to enable this\n"); - return -ENODEV; - } if (!acpi_cpc_valid()) { pr_warn_once("the _CPC object is not present in SBIOS or ACPI disabled\n"); @@ -1436,6 +1446,33 @@ static int __init amd_pstate_init(void) if (cpufreq_get_current_driver()) return -EEXIST; + switch (cppc_state) { + case AMD_PSTATE_UNDEFINED: + /* Disable on the following configs by default: + * 1. Undefined platforms + * 2. Server platforms + * 3. Shared memory designs + */ + if (amd_pstate_acpi_pm_profile_undefined() || + amd_pstate_acpi_pm_profile_server() || + !boot_cpu_has(X86_FEATURE_CPPC)) { + pr_info("driver load is disabled, boot with specific mode to enable this\n"); + return -ENODEV; + } + ret = amd_pstate_set_driver(CONFIG_X86_AMD_PSTATE_DEFAULT_MODE); + if (ret) + return ret; + break; + case AMD_PSTATE_DISABLE: + return -ENODEV; + case AMD_PSTATE_PASSIVE: + case AMD_PSTATE_ACTIVE: + case AMD_PSTATE_GUIDED: + break; + default: + return -EINVAL; + } + /* capability check */ if (boot_cpu_has(X86_FEATURE_CPPC)) { pr_debug("AMD CPPC MSR based functionality is supported\n"); @@ -1488,21 +1525,7 @@ static int __init amd_pstate_param(char *str) size = strlen(str); mode_idx = get_mode_idx_from_str(str, size); - if (mode_idx >= AMD_PSTATE_DISABLE && mode_idx < AMD_PSTATE_MAX) { - cppc_state = mode_idx; - if (cppc_state == AMD_PSTATE_DISABLE) - pr_info("driver is explicitly disabled\n"); - - if (cppc_state == AMD_PSTATE_ACTIVE) - current_pstate_driver = &amd_pstate_epp_driver; - - if (cppc_state == AMD_PSTATE_PASSIVE || cppc_state == AMD_PSTATE_GUIDED) - current_pstate_driver = &amd_pstate_driver; - - return 0; - } - - return -EINVAL; + return amd_pstate_set_driver(mode_idx); } early_param("amd_pstate", amd_pstate_param); diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index c10ebf8c42e6..446394f84606 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -94,7 +94,8 @@ struct amd_cpudata { * enum amd_pstate_mode - driver working mode of amd pstate */ enum amd_pstate_mode { - AMD_PSTATE_DISABLE = 0, + AMD_PSTATE_UNDEFINED = 0, + AMD_PSTATE_DISABLE, AMD_PSTATE_PASSIVE, AMD_PSTATE_ACTIVE, AMD_PSTATE_GUIDED, @@ -102,6 +103,7 @@ enum amd_pstate_mode { }; static const char * const amd_pstate_mode_string[] = { + [AMD_PSTATE_UNDEFINED] = "undefined", [AMD_PSTATE_DISABLE] = "disable", [AMD_PSTATE_PASSIVE] = "passive", [AMD_PSTATE_ACTIVE] = "active",