From patchwork Mon Jun 19 14:23:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 694019 Delivered-To: patch@linaro.org Received: by 2002:a5d:4d91:0:0:0:0:0 with SMTP id b17csp2399243wru; Mon, 19 Jun 2023 07:25:22 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7zFWrJxGwjxtcf0QM8Wv6Vsi4PAtMWqKlVU9YOI93woNKII5aUshQw0hwehvftoyDVP90G X-Received: by 2002:a05:620a:8a83:b0:763:9a95:ee80 with SMTP id qu3-20020a05620a8a8300b007639a95ee80mr2456742qkn.77.1687184722239; Mon, 19 Jun 2023 07:25:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687184722; cv=none; d=google.com; s=arc-20160816; b=x1kKzxO/aiXKDjRNK7fVBurC41jeq3/ngvKqucj7ndusY3ViTug/fobCmK4ZehVYV9 UPunatSTqapPXSufVahsLVKCCt9PXYa1qOjlDyAikQ76UOfRRJXwPHCGwkmSN6mgWAvL WOnAwQMmLsMrdCIALXQpPVxVGAY2fJyITg2xMuZTMP02ZDiN0Yf47iAAhe3Irorot4f1 p3pAGgmKKI8pRRUJHDfHEO79u2J3qkSx+PtwV3A7UcWJ9c2hYlGsTyON5QSWHuFmzAXl zDA/kZIRdSBPfL6PmweQhJ91TBORNGUrjADAh3WK+OvVhIn+1ZzpUVRVbpto/qc5Z8lw 7g6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5BMeKkCZ73ncSnRSQ8wFapQINfHHQYDpYeSup4OEv0g=; b=Nwgrnvg6Ya+1GSeZcdYEGoXY3sIm1b6cJ45PDkzxWdXSTZz/wnqyGwkIEhCY0m35ir vjti++j4onG8G0njEv0+78GZNLH80DCJp3adi20bGNC8i6rdRWzPDHweFRkaAhAOpqUX wveId/gWIaYVVSpJtXA+/jZZvZNSWhgKN1sKD2PE+/L+s4yqF40+whFgc0NL3uZtGQe3 PxIZScdrMHq7bIx4nyJDrOLapTXnbbUAgLpplw8sEVtebcCZVeWBSrBAm7kYPssdDa/F NsIj7gYuE2Yi8wf+6hh5ZaYhG9lIiAJ/VCVP86lKPO4mFvYG1wyD1nc9CbVCyF+QDica Duhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=StgFz48u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id oq31-20020a05620a611f00b0075785c1637bsi13234277qkn.565.2023.06.19.07.25.22 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Jun 2023 07:25:22 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=StgFz48u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qBFnI-0004EN-2U; Mon, 19 Jun 2023 10:23:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qBFnC-0004Df-3w for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:42 -0400 Received: from mail-lf1-x135.google.com ([2a00:1450:4864:20::135]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qBFnA-0000jG-B8 for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:41 -0400 Received: by mail-lf1-x135.google.com with SMTP id 2adb3069b0e04-4f63ab1ac4aso4428948e87.0 for ; Mon, 19 Jun 2023 07:23:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687184618; x=1689776618; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5BMeKkCZ73ncSnRSQ8wFapQINfHHQYDpYeSup4OEv0g=; b=StgFz48uCx+29aZCuPdBk7TolilPjz6pkV4RLCWgmLBfA/PH29H3JJRO1Od5FzLwxq u1LujkyV3chv1WvKBzyC6y50VWf3C2gZMmmRZhIstL/lhijFHvnQXTMlup7Tqm126Rqa cJIhwvTGyQL4M/i1NClzx61ie8Qn3IroX1Q5GF+sKHomnfHQ5zSrqGkCk8XdjWH5l8qC 7TuyAzcBHWoWll8UXTeiulMlyzJj6gQSe5xSsX0gfA+tkznmwR1CpX6e9oVu5cbcSZbj EomW/qRznw1jzIJeWiPLkgt2A8y507dWnvYANp4eup5PBK/kllD5r/chZ6nEsnNkK5l5 qtMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687184618; x=1689776618; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5BMeKkCZ73ncSnRSQ8wFapQINfHHQYDpYeSup4OEv0g=; b=LaDQZCX875Hzu3D7pCEJkTt7ByZeAydWc/5VXZzFjMLKCQElJ0bGfs/0JD+kIx1iXM iYQ2vQih3Ob1R/Rj2cOmxUmmFVCw3G9IiUEThUTZRHPUfd46SdKW5JwHLXZGbI8ODl2u Tx6phMTKtU1hRWtUPXU4zt9rL5JMlbG76m4lTnh4+lT63NJ+FnpCwh7KYNrmjeikEuRO gA2Tb1y0MYRKyYvbeq7Pnbxlopcdy3BDl9JHsdwrwnpxP5x2vP9RuOn+0Q7JwlouxrFa lcoYM6iu72NrfKxIxSSbtaKGniIGwt5mU6n+r5fqcA6quIm5KfT6ZY3HC+ow6FphBTXn hMbw== X-Gm-Message-State: AC+VfDwuoCBn6HMXczLpx+Io8TMeaYv95wF6luSS+GxLO3jrHUOnOPtK euEz/NGWcSaJeWlI5VWA2Da3yr3OkWba9dTJJ/NFNZQV X-Received: by 2002:a05:6512:55a:b0:4f3:94b5:3274 with SMTP id h26-20020a056512055a00b004f394b53274mr6201824lfl.63.1687184618283; Mon, 19 Jun 2023 07:23:38 -0700 (PDT) Received: from stoup.lan (sar95-h02-176-184-10-225.dsl.sta.abo.bbox.fr. [176.184.10.225]) by smtp.gmail.com with ESMTPSA id k25-20020a7bc419000000b003f96d10eafbsm4143467wmi.12.2023.06.19.07.23.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 07:23:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Alistair Francis , "Edgar E . Iglesias" Subject: [PATCH v3 1/5] target/microblaze: Define TCG_GUEST_DEFAULT_MO Date: Mon, 19 Jun 2023 16:23:29 +0200 Message-Id: <20230619142333.429028-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619142333.429028-1-richard.henderson@linaro.org> References: <20230619142333.429028-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=richard.henderson@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The microblaze architecture does not reorder instructions. While there is an MBAR wait-for-data-access instruction, this concerns synchronizing with DMA. This should have been defined when enabling MTTCG. Cc: Alistair Francis Cc: Edgar E. Iglesias Fixes: d449561b130 ("configure: microblaze: Enable mttcg") Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias --- target/microblaze/cpu.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 88324d0bc1..b474abcc2a 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -24,6 +24,9 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" +/* MicroBlaze is always in-order. */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + typedef struct CPUArchState CPUMBState; #if !defined(CONFIG_USER_ONLY) #include "mmu.h" From patchwork Mon Jun 19 14:23:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 694015 Delivered-To: patch@linaro.org Received: by 2002:a5d:4d91:0:0:0:0:0 with SMTP id b17csp2398965wru; Mon, 19 Jun 2023 07:24:43 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ76JihLtJjoKdmAlWc8KSwCgc32P6fFq53rhJf+jOnMnJMINwDMiDXpddsT0c9hTcuSKE4C X-Received: by 2002:a05:620a:2b4e:b0:762:41d6:c3d0 with SMTP id dp14-20020a05620a2b4e00b0076241d6c3d0mr7316887qkb.48.1687184683126; Mon, 19 Jun 2023 07:24:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687184683; cv=none; d=google.com; s=arc-20160816; b=UlBfS40lC81KJn0q2+Y9FedO1txmzRzkyPCPHmqD/GSJ6SYPFCs4o/9lhZ7c03+aQs wfOAOBc2PfbzAwth1pTnC/LwrY53V0GXM4dI3ALcJsufPJkOzeP1d6EZQEZz4GLAOJuk bhEKCWvsmMkaDXasPry49btJ/t/Rffw0FehStmyJFVuBGwilpgd6exxNBeQ/VRI7JWhm aN5FtYZHYUlC8i9EAXmgiE37toV4kgm6WLTt2sXsVHIAaTfWxQYpPLrfBHCrNf+agPjt 3ee2pyQNpTaXXAvvoYKkMXydAI4b0bZ4lOzl4mKi2wvpK435ldNstMsj3KV+EVWgWcs3 iM1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=qMEBKL6knLVKab7hTTzt13ET959rfX68OW/IE4hZmWo=; b=uj7uw57csTAyJ0iZFtZO25zNk2IuYGF+C9lkSrR/apd4l14bkeby6J1T2sHuJO7JEg DGGbBWfMBSdD1FtxGQDxUD17CUk873I2Km3DwyOwd/WC/yFRepGRFJN8Zl6W0BC2Tgj6 qKZEtmMPdmcTZpiJkEdXp0W0+MoMZW8d1bv57yNUQgRM4gnly8BGytc9EYqfg1UeSXnH 4jZTdVYutW4PCRr0ECr+9ZYB36rfcEnVQlo+4zbBcxOwfo/BSSGiKbshjDlxcqI3m7FG MXnlezQvAVddpaGwr9TETy1XsNYBlQlcEFUh1pO8nqyC5jbiXul/JWFp5etgxtJtpaiA ErMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iL7duy8M; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id p20-20020a05620a133400b00761f57e9c59si18079qkj.86.2023.06.19.07.24.42 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Jun 2023 07:24:43 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iL7duy8M; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qBFnJ-0004FL-6z; Mon, 19 Jun 2023 10:23:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qBFnD-0004Dt-NL for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:45 -0400 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qBFnB-0000jd-3u for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:42 -0400 Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-3f906d8fca3so19903885e9.1 for ; Mon, 19 Jun 2023 07:23:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687184620; x=1689776620; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=qMEBKL6knLVKab7hTTzt13ET959rfX68OW/IE4hZmWo=; b=iL7duy8Mm1gdLHukDRVquaxKLu4bLM1ooJVce2XzoXPc1lcAdRCKzvsdCOstMpsjjd z9KCJITAoO3MuzADbmiijkOFrKhrMKdS8Dc9FkD1BocsAUGe3O7F4sD17ueABJg18YjT RjBngxskh9c5rSQAID3HhRkD8jLHw81BGDR8ouJNQ3rI29r8RHCkYotUibnkyCsQ+7ye fy2w5ANlpQme/dR359aQFnSjEqkxkbc51jDcdB3ZgW+2nv5jlw+khEdPrQ0aGyTjVXOa MaCJdIVbbM0lkWs0M2KN2YXQ1u44aii2JNWBNKO0rnY34itTGG1mWuu7Y296vUiH0UGt r+1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687184620; x=1689776620; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qMEBKL6knLVKab7hTTzt13ET959rfX68OW/IE4hZmWo=; b=jKdXX6ej+pPX8JsR5Ti7lcPNcVRluCGIrQ3HPwd9I7BsFCBmio2WhdwAd9Bcot1bvZ 6wMbKbeHHYaqIBvjLl0Xm59XscYMqyHycthU4l9CaEdBJ32OYbB8rL5QCI0LmzD3SQfB bGYn0VTe9QS1RSQNJUTzof55kCBqdM+1lFS760SWTsNSDCSnHv6EpiEADjCyFn4FmAsr AY3aBhl+HZ8xbhZcVyG7UcNybY5z7YbPV6dH96FEnQ3sY1ug/KnJ/jHacDHFX6JODJqQ mTArssA60wWv/QZSrVNOM53oD64Y9ro/cs8P3Gm6SKDbFj+sFPa+xWxyVYLGg7L1Fz3J wodQ== X-Gm-Message-State: AC+VfDz6KhqTpvOeamlGu4S5omfidlKTtfZrakGwEbP4jU95L9sfp1zT ap9pe1D+T7ZcE/63F735PPb+HYFGVQgJjlE5J5izuyUf X-Received: by 2002:a7b:cb4e:0:b0:3f7:f884:7be3 with SMTP id v14-20020a7bcb4e000000b003f7f8847be3mr7275839wmj.4.1687184619815; Mon, 19 Jun 2023 07:23:39 -0700 (PDT) Received: from stoup.lan (sar95-h02-176-184-10-225.dsl.sta.abo.bbox.fr. [176.184.10.225]) by smtp.gmail.com with ESMTPSA id k25-20020a7bc419000000b003f96d10eafbsm4143467wmi.12.2023.06.19.07.23.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 07:23:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 2/5] tcg: Do not elide memory barriers for !CF_PARALLEL in system mode Date: Mon, 19 Jun 2023 16:23:30 +0200 Message-Id: <20230619142333.429028-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619142333.429028-1-richard.henderson@linaro.org> References: <20230619142333.429028-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The virtio devices require proper memory ordering between the vcpus and the iothreads. Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index c07de5d9f8..7aadb37756 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -102,7 +102,19 @@ void tcg_gen_br(TCGLabel *l) void tcg_gen_mb(TCGBar mb_type) { - if (tcg_ctx->gen_tb->cflags & CF_PARALLEL) { +#ifdef CONFIG_USER_ONLY + bool parallel = tcg_ctx->gen_tb->cflags & CF_PARALLEL; +#else + /* + * It is tempting to elide the barrier in a uniprocessor context. + * However, even with a single cpu we have i/o threads running in + * parallel, and lack of memory order can result in e.g. virtio + * queue entries being read incorrectly. + */ + bool parallel = true; +#endif + + if (parallel) { tcg_gen_op1(INDEX_op_mb, mb_type); } } From patchwork Mon Jun 19 14:23:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 694014 Delivered-To: patch@linaro.org Received: by 2002:a5d:4d91:0:0:0:0:0 with SMTP id b17csp2398896wru; Mon, 19 Jun 2023 07:24:33 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5MAeOJeHckjXZaEORdfgl3WWwOz8a1OxdxJhtK6L/VtZ10FlkOQbGBeMsAeLaiXCfq2+tR X-Received: by 2002:a05:620a:8bc2:b0:762:5965:c41d with SMTP id qy2-20020a05620a8bc200b007625965c41dmr3670392qkn.28.1687184673126; Mon, 19 Jun 2023 07:24:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687184673; cv=none; d=google.com; s=arc-20160816; b=nbXn6ibs8B404EDclH8KhajkRrpQwjxDhocqc0jtpCdc95Vx+vO/gnNBDDa3cpy88h GeB0qTqih4twb4vqSCqF+xxvvVQixEnO0r4uzVoFb9iz0ngjOvChR0ZfExpLIsW6dy1d /eZAbWpBF9XDv11BbNg6RKEvwSXJHF1r+GcqtjP+ZIMouQcKMRAUb8CyBrqGOveqpR5q 7JVCYuCEU38cGurDuEfyRsqF4bIOjdqLNGI3Gmd8JWTxz4BGEBJOJkEHraf41RXYClXa fWF/n+kyUTmbEiVq9QKJIrhZGbronBYv+67xFUuNcv7/rDBP24nbOdVml6zlIVptOi8P PnPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=pwqG4bOndCwR7WWKOm2/D1bdEjIJvQWtHJFzguX9raY=; b=g0Bl15FfYBO7Zt0yIATD+B+o1b/FDufHySYMyKtlSmsiNftszeXywd3RfhJj3JtDHf 25oNmxSaJHZ7inDorC3kc6XJgmmk6L5ePSKTMFk7Qdv8FWE2SRFuviEBHjDmQKj1WR4V Dbeusheo25xRHELtg5eOieAp8Hvg8X+2UHcHkw6/aa55jjbzT1qhh1VpDihERUivtXp6 ygcUpkCZbaHXOQGM255m9jiWxPA+ppnMQ4S0q7E+qMb570D3TFdW4NDtKODIr3Zr98AB TDmQOfvP2tbnoWsyFsKDevNFsGPKlj9buQ6YNpe8rUj/6d7Ky4blCybN1w+miZKviupx lF4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wgMAUfaq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id bn38-20020a05620a2ae600b0075b0f18584asi13200334qkb.445.2023.06.19.07.24.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Jun 2023 07:24:33 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wgMAUfaq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qBFnM-0004Fz-0J; Mon, 19 Jun 2023 10:23:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qBFnG-0004E4-Li for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:47 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qBFnD-0000kl-FO for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:46 -0400 Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-3f90bff0f27so12017835e9.1 for ; Mon, 19 Jun 2023 07:23:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687184621; x=1689776621; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=pwqG4bOndCwR7WWKOm2/D1bdEjIJvQWtHJFzguX9raY=; b=wgMAUfaq3czt70PcOIIf0zuUDTpaGVvWHb2rTR92yNK5umgGeahY2ube/nakNCj+kF B1RyNPF1T+o3xvxGJwJv4XPuDSqtNtjFXL8HC+cbS8mqHFehzUYBmYGPy1IQkJFiRFDO zg4eWXCXG6Apa+GxWfT+D7p8ukViSSCxt/kCzz+wjYPX2JOCuZ0BOex6JS4YrGa9C4bw 3i5sze2VlCm0EhBgkxGHARd9c6OY4+9wotF9bt1tgQ+1x7P6fAI+ESp9kOT4zwUb9V6F h8cUUaH+yWASvGUvwAnGUiLRNyql18DPjwGDcy/SJoEADXQhE9cTLe9BRLx/4FsWlnJt 7GJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687184621; x=1689776621; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pwqG4bOndCwR7WWKOm2/D1bdEjIJvQWtHJFzguX9raY=; b=QR3sAgIhnWflHl5QqP/ZP58jm3MSFsvm66Ucq5DwvqiLvldOGb4Ushinbei5PCaPmf Z0SD0mv8ePrrN8QGIEu/0zcWKEh+AvYKHfhh1hytqUwaSEv31NqGVqNqK/gcAQcUPkBP it7bp1OtR3af+UsVyfi/94CVZEGo2L8+pu+ywTGqpoM61lO7fBVmMdcX8qRM3i698USo NLFISAUznlp6fWzbZkANQCBOz6DmtqQLLT59e9l6p+ygBeB2IszmHRiHYlwgvh4yp1Ya mJzfODDBX7wLDbVLo/SFyNEkVjEijkKbb0oj7Y5d72MLoR6brMlewyFBRUtlE2HKGCAT +T9Q== X-Gm-Message-State: AC+VfDwFGeHovCorN5EybXviWEtjO1/tg5Gd+Cj4O5qP8fPKO2Sg5Iz/ ZxvhTG6AuymE4pcwIlPSEMyQqBx9C98Z0RP0+3HPFkMu X-Received: by 2002:a05:600c:3799:b0:3f9:b540:862d with SMTP id o25-20020a05600c379900b003f9b540862dmr278293wmr.28.1687184621344; Mon, 19 Jun 2023 07:23:41 -0700 (PDT) Received: from stoup.lan (sar95-h02-176-184-10-225.dsl.sta.abo.bbox.fr. [176.184.10.225]) by smtp.gmail.com with ESMTPSA id k25-20020a7bc419000000b003f96d10eafbsm4143467wmi.12.2023.06.19.07.23.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 07:23:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 3/5] tcg: Elide memory barriers implied by the host memory model Date: Mon, 19 Jun 2023 16:23:31 +0200 Message-Id: <20230619142333.429028-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619142333.429028-1-richard.henderson@linaro.org> References: <20230619142333.429028-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Reduce the set of required barriers to those needed by the host right from the beginning. Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 7aadb37756..574001c221 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -115,7 +115,11 @@ void tcg_gen_mb(TCGBar mb_type) #endif if (parallel) { - tcg_gen_op1(INDEX_op_mb, mb_type); + /* We can elide anything which the host provides for free. */ + mb_type &= ~TCG_TARGET_DEFAULT_MO; + if (mb_type & TCG_MO_ALL) { + tcg_gen_op1(INDEX_op_mb, mb_type); + } } } From patchwork Mon Jun 19 14:23:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 694018 Delivered-To: patch@linaro.org Received: by 2002:a5d:4d91:0:0:0:0:0 with SMTP id b17csp2399230wru; Mon, 19 Jun 2023 07:25:20 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6QyQi0f1inI98LV/VoKDXK4RGSX4VhQY3A/qdgN6g7cPnipij34YCKqkdWKHZb9iVH8Q4g X-Received: by 2002:a05:6214:411b:b0:630:18d6:18b with SMTP id kc27-20020a056214411b00b0063018d6018bmr3814271qvb.19.1687184720584; Mon, 19 Jun 2023 07:25:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687184720; cv=none; d=google.com; s=arc-20160816; b=za9sN9OnwPASFtX0LrmssQppAmUT74CqsYD0Z2n9IIAdK1dsylegDJc5u9F1/GCpcD Z9nIrR0yQ7cdBeW8etRoHsSlPE7eF7aF71ZmcQfR45FBS0NTYDTMynrGMBaRoZaLbvoy EACOM3D32TO5xeDdBa/HgSbuzFY5gLkRHzSlvdPmMA2L1YtgquqoklWSKYlal0uS7+I3 kWSbu0Esh5Q+DTynyg7w2WvX4tpYcFx6SiKvII0DvHW6cNTvwzH2Wcp2/7orMzBgupVw 138Ot4gNd7gGbUkYl4PhrgWnkr/YEsyUDaZzjS5nGMqQERYLYvosrcwE0w1v2cF7QfpP 5cgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=wYaXVLSy7te17IjoR6ZeNkrXoDozUSIUDyj3cihp+Jg=; b=i13SaaNtQku1dSJk2dul8xzHMkI/QEwkiGUi3Xrwp55CW/1Qz3s1vWlP7wHah4t1x9 PyPMVLtJQM6S7NcD4CcZmk95ZUOhCWmRUia3IZmU9ZLZsFVtlX2wLaDs1vgkp0Wj860X nopARRx6tpuc9XUEgRWy9EsVyA4+cEVofXAWkdypH10VTO+Hf7hiC6mOJ9ZXommgCrQ9 P608JZqN5+O8Z20NFJHSS/egHj21KkTQn12en15CA0EtKXEkJ+Sutk6Yflxj4Gczi0T9 Ok14rsnk71tfs9T2Bz7JTzDId/uQ1U3+iJMOVrKpxiRHw5N9R+cVUfY01o7ei4VGeDEG SIgw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GsMASvLt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id jo24-20020a056214501800b0062de32cc1a3si7203qvb.302.2023.06.19.07.25.20 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Jun 2023 07:25:20 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GsMASvLt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qBFnK-0004FN-BH; Mon, 19 Jun 2023 10:23:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qBFnH-0004ED-I5 for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:47 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qBFnF-0000lV-78 for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:47 -0400 Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-3f9b4a71623so3163855e9.1 for ; Mon, 19 Jun 2023 07:23:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687184623; x=1689776623; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=wYaXVLSy7te17IjoR6ZeNkrXoDozUSIUDyj3cihp+Jg=; b=GsMASvLtD8hdEgx+CsONDgKpyFnqmLl7DO3hlnrlkAPsJvr+yz8cwY3pQEzpF5xUg6 KkAMdgHaeA6+9M8d94G2SSDBZMsQVyXk5JMQrA0cGFJYMO999wCQuVxQj0XBrzybaXxq XvyymparhakZzXWSYPcjM0yYCAfsy+lOiL7NCkJ149tdIWx6+5krMAJuiBlVjHAQHLkm hhDya6PFg2DcKo5xZ2EX39tr/brnwB5jtt0mKfacqV6Ijg/U85jTW3/9FT1G6IESmmIo Dfvqz8xOPYDSFoZcvwggxl/luMOPTVKZzID/cqKZd9WLxdUiKxZjj7V9x202RAHrQ9EK d6ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687184623; x=1689776623; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wYaXVLSy7te17IjoR6ZeNkrXoDozUSIUDyj3cihp+Jg=; b=DomWEa1batAHo7yy458omcnOfpabpiQTK2nKeAcYyDL3hiocSZOmOMjGwYfUoWBp/M CCG/WS5Y+sSXHJbFOaxzBtJrE/jv8pSQvntv3uNifZW4tXp813CstTPfUdbmq4abAXy1 LWoGCHeEEp+Pt6ZKexi0N7dk94kNjwYG9+wvkCxdCpI2Q7PkmiYBT5jgjk+NR/HXNbAO NTy7tAUSVT805/zWwKvwA5WGXn+5J3JA7xVEoQBbab5JFTlyoli+ndy2fN4d4cGj2DHN 6rr95gMiyK4QnhknGF1Ec8yd5TTeLfT+ISI9YeD3Rpy7IPv+3v9rdvPFbboAAdt5jzPm IuGw== X-Gm-Message-State: AC+VfDzpWf63MWFPfl5vrUwlRb+NZkUe71s14LzfJ7S1iu+Xi6KhWpBY MriEDPZ17jqYozaO4A8APiMkwxxV1zwBQMhZ3FxQ4uhD X-Received: by 2002:a05:600c:203:b0:3f7:f24b:b2ed with SMTP id 3-20020a05600c020300b003f7f24bb2edmr6990245wmi.19.1687184622904; Mon, 19 Jun 2023 07:23:42 -0700 (PDT) Received: from stoup.lan (sar95-h02-176-184-10-225.dsl.sta.abo.bbox.fr. [176.184.10.225]) by smtp.gmail.com with ESMTPSA id k25-20020a7bc419000000b003f96d10eafbsm4143467wmi.12.2023.06.19.07.23.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 07:23:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 4/5] tcg: Add host memory barriers to cpu_ldst.h interfaces Date: Mon, 19 Jun 2023 16:23:32 +0200 Message-Id: <20230619142333.429028-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619142333.429028-1-richard.henderson@linaro.org> References: <20230619142333.429028-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Bring the helpers into line with the rest of tcg in respecting guest memory ordering. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- accel/tcg/internal.h | 34 ++++++++++++++++++++++++++++++++++ accel/tcg/cputlb.c | 10 ++++++++++ accel/tcg/user-exec.c | 10 ++++++++++ 3 files changed, 54 insertions(+) diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index 24f225cac7..be0c7753fb 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -78,4 +78,38 @@ extern int64_t max_advance; extern bool one_insn_per_tb; +/** + * tcg_req_mo: + * @type: TCGBar + * + * Filter @type to the barrier that is required for the guest + * memory ordering vs the host memory ordering. A non-zero + * result indicates that some barrier is required. + * + * If TCG_GUEST_DEFAULT_MO is not defined, assume that the + * guest requires strict ordering. + * + * This is a macro so that it's constant even without optimization. + */ +#ifdef TCG_GUEST_DEFAULT_MO +# define tcg_req_mo(type) \ + ((type) & TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) +#else +# define tcg_req_mo(type) ((type) & ~TCG_TARGET_DEFAULT_MO) +#endif + +/** + * cpu_req_mo: + * @type: TCGBar + * + * If tcg_req_mo indicates a barrier for @type is required + * for the guest memory model, issue a host memory barrier. + */ +#define cpu_req_mo(type) \ + do { \ + if (tcg_req_mo(type)) { \ + smp_mb(); \ + } \ + } while (0) + #endif /* ACCEL_TCG_INTERNAL_H */ diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 5e2ca47243..a48e1c9693 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2342,6 +2342,7 @@ static uint8_t do_ld1_mmu(CPUArchState *env, target_ulong addr, MemOpIdx oi, MMULookupLocals l; bool crosspage; + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); crosspage = mmu_lookup(env, addr, oi, ra, access_type, &l); tcg_debug_assert(!crosspage); @@ -2363,6 +2364,7 @@ static uint16_t do_ld2_mmu(CPUArchState *env, target_ulong addr, MemOpIdx oi, uint16_t ret; uint8_t a, b; + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); crosspage = mmu_lookup(env, addr, oi, ra, access_type, &l); if (likely(!crosspage)) { return do_ld_2(env, &l.page[0], l.mmu_idx, access_type, l.memop, ra); @@ -2393,6 +2395,7 @@ static uint32_t do_ld4_mmu(CPUArchState *env, target_ulong addr, MemOpIdx oi, bool crosspage; uint32_t ret; + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); crosspage = mmu_lookup(env, addr, oi, ra, access_type, &l); if (likely(!crosspage)) { return do_ld_4(env, &l.page[0], l.mmu_idx, access_type, l.memop, ra); @@ -2420,6 +2423,7 @@ static uint64_t do_ld8_mmu(CPUArchState *env, target_ulong addr, MemOpIdx oi, bool crosspage; uint64_t ret; + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); crosspage = mmu_lookup(env, addr, oi, ra, access_type, &l); if (likely(!crosspage)) { return do_ld_8(env, &l.page[0], l.mmu_idx, access_type, l.memop, ra); @@ -2472,6 +2476,7 @@ static Int128 do_ld16_mmu(CPUArchState *env, target_ulong addr, Int128 ret; int first; + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); crosspage = mmu_lookup(env, addr, oi, ra, MMU_DATA_LOAD, &l); if (likely(!crosspage)) { /* Perform the load host endian. */ @@ -2804,6 +2809,7 @@ void helper_stb_mmu(CPUArchState *env, uint64_t addr, uint32_t val, bool crosspage; tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_8); + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); crosspage = mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE, &l); tcg_debug_assert(!crosspage); @@ -2817,6 +2823,7 @@ static void do_st2_mmu(CPUArchState *env, target_ulong addr, uint16_t val, bool crosspage; uint8_t a, b; + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); crosspage = mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE, &l); if (likely(!crosspage)) { do_st_2(env, &l.page[0], val, l.mmu_idx, l.memop, ra); @@ -2845,6 +2852,7 @@ static void do_st4_mmu(CPUArchState *env, target_ulong addr, uint32_t val, MMULookupLocals l; bool crosspage; + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); crosspage = mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE, &l); if (likely(!crosspage)) { do_st_4(env, &l.page[0], val, l.mmu_idx, l.memop, ra); @@ -2872,6 +2880,7 @@ static void do_st8_mmu(CPUArchState *env, target_ulong addr, uint64_t val, MMULookupLocals l; bool crosspage; + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); crosspage = mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE, &l); if (likely(!crosspage)) { do_st_8(env, &l.page[0], val, l.mmu_idx, l.memop, ra); @@ -2901,6 +2910,7 @@ static void do_st16_mmu(CPUArchState *env, target_ulong addr, Int128 val, uint64_t a, b; int first; + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); crosspage = mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE, &l); if (likely(!crosspage)) { /* Swap to host endian if necessary, then store. */ diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index dc8d6b5d40..ce65021cd4 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -914,6 +914,7 @@ static uint8_t do_ld1_mmu(CPUArchState *env, abi_ptr addr, uint8_t ret; tcg_debug_assert((mop & MO_SIZE) == MO_8); + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_LOAD); ret = ldub_p(haddr); clear_helper_retaddr(); @@ -947,6 +948,7 @@ static uint16_t do_ld2_mmu(CPUArchState *env, abi_ptr addr, uint16_t ret; tcg_debug_assert((mop & MO_SIZE) == MO_16); + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_LOAD); ret = load_atom_2(env, ra, haddr, mop); clear_helper_retaddr(); @@ -984,6 +986,7 @@ static uint32_t do_ld4_mmu(CPUArchState *env, abi_ptr addr, uint32_t ret; tcg_debug_assert((mop & MO_SIZE) == MO_32); + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_LOAD); ret = load_atom_4(env, ra, haddr, mop); clear_helper_retaddr(); @@ -1021,6 +1024,7 @@ static uint64_t do_ld8_mmu(CPUArchState *env, abi_ptr addr, uint64_t ret; tcg_debug_assert((mop & MO_SIZE) == MO_64); + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_LOAD); ret = load_atom_8(env, ra, haddr, mop); clear_helper_retaddr(); @@ -1052,6 +1056,7 @@ static Int128 do_ld16_mmu(CPUArchState *env, abi_ptr addr, Int128 ret; tcg_debug_assert((mop & MO_SIZE) == MO_128); + cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_LOAD); ret = load_atom_16(env, ra, haddr, mop); clear_helper_retaddr(); @@ -1087,6 +1092,7 @@ static void do_st1_mmu(CPUArchState *env, abi_ptr addr, uint8_t val, void *haddr; tcg_debug_assert((mop & MO_SIZE) == MO_8); + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_STORE); stb_p(haddr, val); clear_helper_retaddr(); @@ -1111,6 +1117,7 @@ static void do_st2_mmu(CPUArchState *env, abi_ptr addr, uint16_t val, void *haddr; tcg_debug_assert((mop & MO_SIZE) == MO_16); + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_STORE); if (mop & MO_BSWAP) { @@ -1139,6 +1146,7 @@ static void do_st4_mmu(CPUArchState *env, abi_ptr addr, uint32_t val, void *haddr; tcg_debug_assert((mop & MO_SIZE) == MO_32); + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_STORE); if (mop & MO_BSWAP) { @@ -1167,6 +1175,7 @@ static void do_st8_mmu(CPUArchState *env, abi_ptr addr, uint64_t val, void *haddr; tcg_debug_assert((mop & MO_SIZE) == MO_64); + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_STORE); if (mop & MO_BSWAP) { @@ -1195,6 +1204,7 @@ static void do_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val, void *haddr; tcg_debug_assert((mop & MO_SIZE) == MO_128); + cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); haddr = cpu_mmu_lookup(env, addr, mop, ra, MMU_DATA_STORE); if (mop & MO_BSWAP) { From patchwork Mon Jun 19 14:23:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 694017 Delivered-To: patch@linaro.org Received: by 2002:a5d:4d91:0:0:0:0:0 with SMTP id b17csp2399213wru; Mon, 19 Jun 2023 07:25:18 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6EmeCmONNFWLVeBlhC0ObiSc40TXCTWvGXWVErlT4lI5JJga3qafxry8zs5eiW6CQe2TNY X-Received: by 2002:ac8:5796:0:b0:3f5:2582:65d1 with SMTP id v22-20020ac85796000000b003f5258265d1mr12983063qta.37.1687184718498; Mon, 19 Jun 2023 07:25:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687184718; cv=none; d=google.com; s=arc-20160816; b=FW0XZ+ctLGT4TjTj8rzyprLX+PkpusOYTBH2yg6MGzFlViH9oMyZosv9RlftfXsw8B zhKALR8XawK+htPT4vL+B913uH9PFxAcG7u5Q4xsj2J3m9MepnisUukPu+36hrPkKTXw AECad3uX33ilYHdnwwmJ6+8zvu0yl/iG0tX2ntMgv/37z9O0bUIEEcn9FqLNoub3bG1p O+D+UsmTk5jVG5ySIPFcFwUaj5hnNq4Taa1Odq1qzBJZ8UYJk7Jx6nNZkDhI0lbeQP2Q fQqVctqFo//CPtFS5YChl+w5A+M8PICPMCpC9E1XOmNVZhF6fk3uf2+6cXQGMY+1sf6n r2fQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xizQ7tZRgd5GaOFhlyM3OwuFvyke8QeFNMuDXQV/YyE=; b=UvMj3fShQlok8jHMepl2LuwGe0KUJBAfAEv8FkR9xr5K0vL6jHQB38PA8wlUO8xhGe tme5/8xo8cT4BNg03KtAQ1QGamcNDM6v2Co4fd8qEmKjFr+oXhiTpbXIn3NT2YTrNUED kGh7ZTtSYK0UZzD+de0hKPwzLVTDpXorFvbnp7ZZHuZ91zbXaf4L2AogpvKS22s49JRk cHBQbSo3YdeaWlg4O6uT0WA3ohTGn2qL2MFcQ/wXjLdS1arK9rvwlgVDaTyEV7+r6H+o BcHUu5XQOZksaaqa/zjwpQC/fnf7G1MA2L0Ep7w4l/WsUYUbdO/51HjQLVAToygt4wng MLVw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KBBmwaTU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g20-20020ac87f54000000b003ff222a2c04si226883qtk.687.2023.06.19.07.25.18 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Jun 2023 07:25:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KBBmwaTU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qBFnL-0004Fs-3o; Mon, 19 Jun 2023 10:23:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qBFnI-0004ER-18 for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:48 -0400 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qBFnF-0000lk-F9 for qemu-devel@nongnu.org; Mon, 19 Jun 2023 10:23:47 -0400 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-3f9b258f3a2so8550605e9.0 for ; Mon, 19 Jun 2023 07:23:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687184624; x=1689776624; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=xizQ7tZRgd5GaOFhlyM3OwuFvyke8QeFNMuDXQV/YyE=; b=KBBmwaTULmC/6FtqOs1WxnJemAB7IsMFoe4IfnKjDx+dYXr1PlTDwU3oeI5HEBC/nd OaAd+9m6j7OOt2rEd57UMp+6etvW3gOWB323fZxzQkXqsECEE1HN494Y/cWJHh68DjaY 63lKrXAK38nE5KQN7LnwTRRLAwYweBtN4NkksGtiSTWbpM4DT70m8EUfdG9nD6wirq6y s+ltsuPIxcXy/xrra8w9P8ZgOAPLzM42Ccowi0mN213wrUh07HXavfO5I+FebHwFORVY 9O4bAw5mhctteAsyVQb9O1JAGB6QmgAPXmOMw/hhbpdpmbbeEO67fCwjQFFA+ga2wVLG 8uiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687184624; x=1689776624; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xizQ7tZRgd5GaOFhlyM3OwuFvyke8QeFNMuDXQV/YyE=; b=kPIlxqNGWVU0dplrBjmJV+anNmjEyzTZ7P3KNXkDgHS0+JMYMj7/PJXyjrR899f5fB eXkL19PpF/RN6qJWOZYTaeTM7PBDVM9b9zX9sxXBWCSLU31UtAGjC6gYcqlxWpSGaiXs P9qCqTapWVSQ7mGJj/D2iE0xHOMaU3gmrMRKlFugNwPs2Sr9Gc0UTajgtXV2DzvuVkd0 l7EoT2qvNOsW19QmTy6jE0wQqqd76L724riZIHFCLXSOobUFQopwukyW2JmLys2fjOc0 oTt2gIde7TwmvhROp3kCkFLPma7zx2pIun8Y9Y8AlZCV/VE3SzJ9tdc+aZH+aE0pVNnr i6ow== X-Gm-Message-State: AC+VfDzp5x4D6LxpAN+brXzdxAz3o0yKmtoNSZRiURzTZGVFq0CcQjlY cE88h4kSD2hAFR+kGWKft+ZYUyvTGB7R5fUimKSTINiX X-Received: by 2002:a05:600c:2313:b0:3f7:f884:7be4 with SMTP id 19-20020a05600c231300b003f7f8847be4mr11046556wmo.21.1687184624130; Mon, 19 Jun 2023 07:23:44 -0700 (PDT) Received: from stoup.lan (sar95-h02-176-184-10-225.dsl.sta.abo.bbox.fr. [176.184.10.225]) by smtp.gmail.com with ESMTPSA id k25-20020a7bc419000000b003f96d10eafbsm4143467wmi.12.2023.06.19.07.23.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jun 2023 07:23:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 5/5] accel/tcg: Remove check_tcg_memory_orders_compatible Date: Mon, 19 Jun 2023 16:23:33 +0200 Message-Id: <20230619142333.429028-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619142333.429028-1-richard.henderson@linaro.org> References: <20230619142333.429028-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We now issue host memory barriers to match the guest memory order. Continue to disable MTTCG only if the guest has not been ported. Signed-off-by: Richard Henderson --- accel/tcg/tcg-all.c | 39 ++++++++++----------------------------- 1 file changed, 10 insertions(+), 29 deletions(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 02af6a2891..03dfd67e9e 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -64,37 +64,23 @@ DECLARE_INSTANCE_CHECKER(TCGState, TCG_STATE, * they can set the appropriate CONFIG flags in ${target}-softmmu.mak * * Once a guest architecture has been converted to the new primitives - * there are two remaining limitations to check. - * - * - The guest can't be oversized (e.g. 64 bit guest on 32 bit host) - * - The host must have a stronger memory order than the guest - * - * It may be possible in future to support strong guests on weak hosts - * but that will require tagging all load/stores in a guest with their - * implicit memory order requirements which would likely slow things - * down a lot. + * there is one remaining limitation to check: + * - The guest can't be oversized (e.g. 64 bit guest on 32 bit host) */ -static bool check_tcg_memory_orders_compatible(void) -{ -#if defined(TCG_GUEST_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO) - return (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0; -#else - return false; -#endif -} - static bool default_mttcg_enabled(void) { if (icount_enabled() || TCG_OVERSIZED_GUEST) { return false; - } else { -#ifdef TARGET_SUPPORTS_MTTCG - return check_tcg_memory_orders_compatible(); -#else - return false; -#endif } +#ifdef TARGET_SUPPORTS_MTTCG +# ifndef TCG_GUEST_DEFAULT_MO +# error "TARGET_SUPPORTS_MTTCG without TCG_GUEST_DEFAULT_MO" +# endif + return true; +#else + return false; +#endif } static void tcg_accel_instance_init(Object *obj) @@ -162,11 +148,6 @@ static void tcg_set_thread(Object *obj, const char *value, Error **errp) warn_report("Guest not yet converted to MTTCG - " "you may get unexpected results"); #endif - if (!check_tcg_memory_orders_compatible()) { - warn_report("Guest expects a stronger memory ordering " - "than the host provides"); - error_printf("This may cause strange/hard to debug errors\n"); - } s->mttcg_enabled = true; } } else if (strcmp(value, "single") == 0) {