From patchwork Tue Jun 13 13:00:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 692242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6C7DC88CB6 for ; Tue, 13 Jun 2023 13:01:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242483AbjFMNBM (ORCPT ); Tue, 13 Jun 2023 09:01:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242397AbjFMNBJ (ORCPT ); Tue, 13 Jun 2023 09:01:09 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7BF821738 for ; Tue, 13 Jun 2023 06:01:05 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-4f640e48bc3so6699497e87.2 for ; Tue, 13 Jun 2023 06:01:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; t=1686661264; x=1689253264; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+xJuMWym61lAEVxXUiTue+H/o7LcrO2jH0iNPvdmqYU=; b=LZ554JGK/zXIUQdGLcTIlzX3rHyujMe7o5jnsteRYfwba1zjXfbIijsAxJUTqfVdi6 LkYCRuULWSMbRWUw9Ba0J9CeyUj8cDhtVmPI3As/dDfgqrfLqBmetoUrRVNcUb1RtLpG /uiAbehGWTIUscnTWW3bRyT7vhE+Eos+jxBm0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686661264; x=1689253264; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+xJuMWym61lAEVxXUiTue+H/o7LcrO2jH0iNPvdmqYU=; b=W/wsjIoHgwN4FZQsCiLQ1XhiQL1FfGsrdw03fRE8wQ7I7H6ZGVR9RZtJg+kKtrBdDd wlH6QicTlEp4H/GuNQdKYOaZKuOpRPobwi6R5Am0WFxwWAhLEvkCU407qfRyJPGy/2PQ HRqiMj1A63KovysiHLUsr11f6mJzSGJc4xGyQontNpxdBk8SSlTmjluO+NTk7sgcBe1+ jTdpjlEljKjxZVT9xYjnB0/RhgVU8FGlEaVSd5cyaHirFykC93U5tsRawwrWG9VpdSPd VxE3LIgLhRGWeFCdlWCBgF87tf8awaBeO9hRClScUtpGOJPN2X162uFB0Ncc8Sn+N9cy 07bg== X-Gm-Message-State: AC+VfDzgNom56FwO0lR7MMBKI495hHze+dGgmjAtSslqvTdaJNRL4eBF Rdnc+iCr80h+6TfRXgEkI/BrMg== X-Google-Smtp-Source: ACHHUZ7tCa0q1BAkEP3y2uWu1//37M6R75CuHHWbDdaW0T2zY7TFjMq1RkFvolTE0S2Qe6AkLZjCmw== X-Received: by 2002:a05:6512:3130:b0:4ef:eda6:c14 with SMTP id p16-20020a056512313000b004efeda60c14mr6073313lfd.35.1686661263750; Tue, 13 Jun 2023 06:01:03 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id u24-20020ac243d8000000b004f14ae5ded8sm1793786lfl.28.2023.06.13.06.01.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Jun 2023 06:01:03 -0700 (PDT) From: Rasmus Villemoes To: Alessandro Zummo , Alexandre Belloni Cc: Andy Shevchenko , devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-rtc@vger.kernel.org, Rasmus Villemoes , linux-kernel@vger.kernel.org Subject: [PATCH v2 2/8] dt-bindings: rtc: Move isil,isl12022 from trivial-rtc.yaml into own schema file Date: Tue, 13 Jun 2023 15:00:04 +0200 Message-Id: <20230613130011.305589-3-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230613130011.305589-1-linux@rasmusvillemoes.dk> References: <20230612113059.247275-1-linux@rasmusvillemoes.dk> <20230613130011.305589-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move the isil,isl12022 RTC bindings from trivial-rtc.yaml into its own intersil,isl12022.yaml file, in preparation for adding more bindings. Signed-off-by: Rasmus Villemoes --- .../bindings/rtc/intersil,isl12022.yaml | 45 +++++++++++++++++++ .../devicetree/bindings/rtc/trivial-rtc.yaml | 2 - 2 files changed, 45 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/rtc/intersil,isl12022.yaml diff --git a/Documentation/devicetree/bindings/rtc/intersil,isl12022.yaml b/Documentation/devicetree/bindings/rtc/intersil,isl12022.yaml new file mode 100644 index 000000000000..7c1e638d657a --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/intersil,isl12022.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/intersil,isl12022.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intersil ISL12022 Real-time Clock + +maintainers: + - Alexandre Belloni + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + const: isil,isl12022 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc@6f { + compatible = "isil,isl12022"; + reg = <0x6f>; + interrupts-extended = <&gpio1 5 IRQ_TYPE_LEVEL_LOW>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml index a3603e638c37..b062c64266a6 100644 --- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml @@ -45,8 +45,6 @@ properties: - isil,isl1208 # Intersil ISL1218 Low Power RTC with Battery Backed SRAM - isil,isl1218 - # Intersil ISL12022 Real-time Clock - - isil,isl12022 # Loongson-2K Socs/LS7A bridge Real-time Clock - loongson,ls2x-rtc # Real Time Clock Module with I2C-Bus From patchwork Tue Jun 13 13:00:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 692241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7E75C88CBC for ; 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Tue, 13 Jun 2023 06:01:05 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id u24-20020ac243d8000000b004f14ae5ded8sm1793786lfl.28.2023.06.13.06.01.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Jun 2023 06:01:04 -0700 (PDT) From: Rasmus Villemoes To: Alessandro Zummo , Alexandre Belloni Cc: Andy Shevchenko , devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-rtc@vger.kernel.org, Rasmus Villemoes , linux-kernel@vger.kernel.org Subject: [PATCH v2 3/8] dt-bindings: rtc: isl12022: add bindings for battery alarm trip levels Date: Tue, 13 Jun 2023 15:00:05 +0200 Message-Id: <20230613130011.305589-4-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230613130011.305589-1-linux@rasmusvillemoes.dk> References: <20230612113059.247275-1-linux@rasmusvillemoes.dk> <20230613130011.305589-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The isl12022 has a built-in support for monitoring the voltage of the backup battery, and setting bits in the status register when that voltage drops below two predetermined levels (usually 85% and 75% of the nominal voltage). However, since it can operate at wide range of battery voltages (2.5V - 5.5V), one must configure those trip levels according to which battery is used on a given board. Add bindings for defining these two trip levels. While the register and bit names suggest that they should correspond to 85% and 75% of the nominal battery voltage, the data sheet also says There are total of 7 levels that could be selected for the first alarm. Any of the of levels could be selected as the first alarm with no reference as to nominal Battery voltage level. Hence this provides the hardware designer the ability to choose values based on the discharge characteristics of the battery chosen for the given product, rather than just having one battery-microvolt property and having the driver choose levels close to 0.85/0.75 times that. Signed-off-by: Rasmus Villemoes --- .../devicetree/bindings/rtc/intersil,isl12022.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/intersil,isl12022.yaml b/Documentation/devicetree/bindings/rtc/intersil,isl12022.yaml index 7c1e638d657a..d5d3a687a34d 100644 --- a/Documentation/devicetree/bindings/rtc/intersil,isl12022.yaml +++ b/Documentation/devicetree/bindings/rtc/intersil,isl12022.yaml @@ -22,6 +22,18 @@ properties: interrupts: maxItems: 1 + isil,trip-level85-microvolt: + description: | + The battery voltage at which the first alarm should trigger + (normally ~85% of nominal V_BAT). + enum: [2125000, 2295000, 2550000, 2805000, 3060000, 4250000, 4675000] + + isil,trip-level75-microvolt: + description: | + The battery voltage at which the second alarm should trigger + (normally ~75% of nominal V_BAT). + enum: [1875000, 2025000, 2250000, 2475000, 2700000, 3750000, 4125000] + required: - compatible - reg @@ -39,6 +51,8 @@ examples: compatible = "isil,isl12022"; reg = <0x6f>; interrupts-extended = <&gpio1 5 IRQ_TYPE_LEVEL_LOW>; + isil,trip-level85-microvolt = <2550000>; + isil,trip-level75-microvolt = <2250000>; }; }; From patchwork Tue Jun 13 13:00:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 692240 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7BF30C88CB7 for ; Tue, 13 Jun 2023 13:01:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242503AbjFMNBQ (ORCPT ); Tue, 13 Jun 2023 09:01:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242489AbjFMNBN (ORCPT ); Tue, 13 Jun 2023 09:01:13 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90E3CA6 for ; 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Tue, 13 Jun 2023 06:01:09 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id u24-20020ac243d8000000b004f14ae5ded8sm1793786lfl.28.2023.06.13.06.01.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Jun 2023 06:01:09 -0700 (PDT) From: Rasmus Villemoes To: Alessandro Zummo , Alexandre Belloni Cc: Andy Shevchenko , devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-rtc@vger.kernel.org, Rasmus Villemoes , linux-kernel@vger.kernel.org Subject: [PATCH v2 6/8] rtc: isl12022: trigger battery level detection during probe Date: Tue, 13 Jun 2023 15:00:08 +0200 Message-Id: <20230613130011.305589-7-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230613130011.305589-1-linux@rasmusvillemoes.dk> References: <20230612113059.247275-1-linux@rasmusvillemoes.dk> <20230613130011.305589-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Since the meaning of the SR_LBAT85 and SR_LBAT75 bits are different in battery backup mode, they may very well be set after power on, and stay set for up to a minute (i.e. until the battery detection in VDD mode happens when the seconds counter hits 59). This would mean that userspace doing a ioctl(RTC_VL_READ) early on could get a false positive. The battery level detection can also be triggered by explicitly writing a 1 to the TSE bit in the BETA register. Do that once during boot. Empirically, this does not immediately update the bits in the status register (i.e., an immediate read of SR after this write can still show stale values), but the update is done after a few milliseconds, so certainly before the RTC device gets registered and userspace has a chance of doing the ioctl() on this device. Signed-off-by: Rasmus Villemoes --- drivers/rtc/rtc-isl12022.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/rtc/rtc-isl12022.c b/drivers/rtc/rtc-isl12022.c index bf0d65643897..44603169e575 100644 --- a/drivers/rtc/rtc-isl12022.c +++ b/drivers/rtc/rtc-isl12022.c @@ -268,6 +268,16 @@ static void isl12022_set_trip_levels(struct device *dev) ret = regmap_update_bits(regmap, ISL12022_REG_PWR_VBAT, mask, val); if (ret) dev_warn(dev, "unable to set battery alarm levels: %d\n", ret); + + /* + * Force a write of the TSE bit in the BETA register, in order + * to trigger an update of the LBAT75 and LBAT85 bits in the + * status register. In battery backup mode, those bits have + * another meaning, so without this, they may contain stale + * values for up to a minute after power-on. + */ + regmap_write_bits(regmap, ISL12022_REG_BETA, + ISL12022_BETA_TSE, ISL12022_BETA_TSE); } static int isl12022_probe(struct i2c_client *client) From patchwork Tue Jun 13 13:00:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasmus Villemoes X-Patchwork-Id: 692239 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00811C7EE29 for ; Tue, 13 Jun 2023 13:01:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242538AbjFMNBe (ORCPT ); Tue, 13 Jun 2023 09:01:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55124 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242479AbjFMNBQ (ORCPT ); Tue, 13 Jun 2023 09:01:16 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 467741720 for ; Tue, 13 Jun 2023 06:01:14 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id 2adb3069b0e04-4f649db9b25so6691341e87.0 for ; Tue, 13 Jun 2023 06:01:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; t=1686661272; x=1689253272; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=46KkCoyCaP4pL/jEPklf2fuk5AVWyAvfGth05Co0T18=; b=haQOPWKa3ER2duykMm+Sd0Nw4FfDB0m4UkrtopsZoLbZe5z0EQuBlcfaZjRcVf7oI7 gSOYW1J5eCDYEE938vG6q9t9zkVV1LYsz1/P0Ya6BTaYoYiY2lRDk6SfKNE6FV+Qc1+D QK/hgXfh4ct2iLAwQgA0Z8UuyFOUsvcCdAGS0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686661272; x=1689253272; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=46KkCoyCaP4pL/jEPklf2fuk5AVWyAvfGth05Co0T18=; b=k3mNPdR42hufmC+pBGfcc+yy3/goE/svcq6gNhOg+CpHqSzJf683m1uV20wjgya1iM mv7X1l3wJPG3lXtRy5OZHKBV0ULp8Q3GQsijzAkUsNf0YvXE937IlIdNEfxCgphVj0hP 2gk1Q8QkcXkr2JYXSrlQE8zq53n3ErKIiTrRMelcCwv/uiHOVBlVypLmKojdMeg88utt Oy0wU3PAKOmxHUov/xcLE8hxBVSrO96LZQLC6LJxECgzjgnsIfpPmDra7qc8FVYxu291 nsvwfLN/KhoYUTfrP/pDzQvrqYCb+jMo6+bkQCIQEb6I8c+ZcaRVrlVEOYwSJu1Lu9II GD5Q== X-Gm-Message-State: AC+VfDxHFQcXMh/28a4fmJGJw8v88o0ic//M7s1lcohcC5GgreqRr8yJ O2KxztSgBMDvAQGI1ErFRUITFA== X-Google-Smtp-Source: ACHHUZ73JuWNHjEuDGnIJzA9IFe0ASfyWKtlyLgVfjFM/EXl0T/cvjy8lsrXXCSpjHmDHJbHAFtFnQ== X-Received: by 2002:a19:771d:0:b0:4f6:217a:561e with SMTP id s29-20020a19771d000000b004f6217a561emr5797407lfc.37.1686661272390; Tue, 13 Jun 2023 06:01:12 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id u24-20020ac243d8000000b004f14ae5ded8sm1793786lfl.28.2023.06.13.06.01.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Jun 2023 06:01:11 -0700 (PDT) From: Rasmus Villemoes To: Alessandro Zummo , Alexandre Belloni Cc: Andy Shevchenko , devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-rtc@vger.kernel.org, Rasmus Villemoes , linux-kernel@vger.kernel.org Subject: [PATCH v2 8/8] rtc: isl12022: implement support for the #clock-cells DT property Date: Tue, 13 Jun 2023 15:00:10 +0200 Message-Id: <20230613130011.305589-9-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230613130011.305589-1-linux@rasmusvillemoes.dk> References: <20230612113059.247275-1-linux@rasmusvillemoes.dk> <20230613130011.305589-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If device tree implies that the chip's IRQ/F_OUT pin is used as a clock, expose that in the driver. For now, pretend it is a fixed-rate (32kHz) clock; if other use cases appear the driver can be updated to provide its own clk_ops etc. When the clock output is not used on a given board, one can prolong the battery life by ensuring that the FOx bits are 0. For the hardware I'm currently working on, the RTC draws 1.2uA with the FOx bits at their default 0001 value, dropping to 0.88uA when those bits are cleared. Signed-off-by: Rasmus Villemoes --- drivers/rtc/rtc-isl12022.c | 40 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/rtc/rtc-isl12022.c b/drivers/rtc/rtc-isl12022.c index 44603169e575..3e69f1a5dc12 100644 --- a/drivers/rtc/rtc-isl12022.c +++ b/drivers/rtc/rtc-isl12022.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -44,6 +45,9 @@ #define ISL12022_SR_LBAT75 (1 << 1) #define ISL12022_INT_WRTC (1 << 6) +#define ISL12022_INT_FO_MASK GENMASK(3, 0) +#define ISL12022_INT_FO_OFF 0x0 +#define ISL12022_INT_FO_32K 0x1 #define ISL12022_REG_VB85_MASK GENMASK(5, 3) #define ISL12022_REG_VB75_MASK GENMASK(2, 0) @@ -241,6 +245,37 @@ static const struct regmap_config regmap_config = { .use_single_write = true, }; +static int isl12022_register_clock(struct device *dev) +{ + struct regmap *regmap = dev_get_drvdata(dev); + struct clk_hw *hw; + int ret; + + if (!device_property_present(dev, "#clock-cells")) { + /* + * Disabling the F_OUT pin reduces the power + * consumption in battery mode by ~25%. + */ + regmap_update_bits(regmap, ISL12022_REG_INT, ISL12022_INT_FO_MASK, + ISL12022_INT_FO_OFF); + + return 0; + } + + /* + * For now, only support a fixed clock of 32768Hz (the reset default). + */ + ret = regmap_update_bits(regmap, ISL12022_REG_INT, ISL12022_INT_FO_MASK, ISL12022_INT_FO_32K); + if (ret) + return ret; + + hw = devm_clk_hw_register_fixed_rate(dev, "isl12022", NULL, 0, 32768); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw); +} + static const u32 trip_level85[] = { 2125000, 2295000, 2550000, 2805000, 3060000, 4250000, 4675000 }; static const u32 trip_level75[] = { 1875000, 2025000, 2250000, 2475000, 2700000, 3750000, 4125000 }; @@ -284,6 +319,7 @@ static int isl12022_probe(struct i2c_client *client) { struct rtc_device *rtc; struct regmap *regmap; + int ret; if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) return -ENODEV; @@ -296,6 +332,10 @@ static int isl12022_probe(struct i2c_client *client) dev_set_drvdata(&client->dev, regmap); + ret = isl12022_register_clock(&client->dev); + if (ret) + return ret; + isl12022_set_trip_levels(&client->dev); isl12022_hwmon_register(&client->dev);