From patchwork Mon Jun 12 09:23:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691739 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55BC1C7EE43 for ; Mon, 12 Jun 2023 09:30:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232881AbjFLJaT (ORCPT ); Mon, 12 Jun 2023 05:30:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233163AbjFLJ3g (ORCPT ); Mon, 12 Jun 2023 05:29:36 -0400 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66D5511B for ; Mon, 12 Jun 2023 02:24:28 -0700 (PDT) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-3f6dfc4dffaso29770045e9.0 for ; Mon, 12 Jun 2023 02:24:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561867; x=1689153867; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=F1RtgufzwN5zkIc6lOIXx9j+jgAzsHOFWAyMRveQqLo=; b=jxFUBvkZ4Lg20XupS3NzkHFqhu8SEtVVfcnXOO+b6K6/t0uzorkTHwYRDrMhd2dJIU tdhzK6iKF6+sYaQwrNwnE3nbalQyEeuelBYndZA4Zlh1ic3fnVO7sRut7VoIEBGZqyTT j7X7mK1z0w+BQ2GjWcZZVMaxzDmSNJFStDd6l63u1LsPuVC+IR1W1QtTzlOsR9JLI+Vp /C2z7U/al+XLw+5ktMrKm6sW96aoMXXs83R5MH7rwPztSggbFtGmzEURIWOz4sSzPa4R 7fu5lNM2p2uS5s2x+WETMW9u7Bl5Y9cMoLBsyEonGg0j/q1FpAfYpaSsN/KMSudrABVj RkUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561867; x=1689153867; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=F1RtgufzwN5zkIc6lOIXx9j+jgAzsHOFWAyMRveQqLo=; b=PqbAVczhslK9K2bGIF3ITK2C+wkimFVpfVw1SiCocpGXvrcPWnEU8vYhYKYoDXhknv bYo5F5DBruazFZqEXYj30dyMi9dCUOoMfxlSEAiUfjsI3OrncuuOUqJWb4wjZMwDw5TU OdD6N4xUzxfKUpmlyJhMOpbYeIXxZw7m4y8D2BkYPAVYSqjZJj7ftObnY032I1mLHoZx iEQLSt9UDgC93hKMJgFJQQK41B4/4vR0cilKK2rjB2vEvxxYI/nkDIz7qV8p+a0i3qTo C0u+0yPbaOrLxULU9v0RxZ6w1dI9v/zpXjGRo0MKBg/DX65u/lJHGvJjZnDw0xNr6pCv FjjA== X-Gm-Message-State: AC+VfDyoszBWCza3BzmuK9a4Ghl11Yg9/OqjcXupj3ENcsSJESezmSwl 0fQxAyBaqq/us5Fo731ulauYyw== X-Google-Smtp-Source: ACHHUZ4X9DW5v3nm9ETabAEnO/zHuXwpBxjwwwHIiRMD9OibOaCyO+b+AitZRY7pXVt/6xW+wsS/3g== X-Received: by 2002:a1c:4b13:0:b0:3f7:f264:3edc with SMTP id y19-20020a1c4b13000000b003f7f2643edcmr5877256wma.14.1686561866564; Mon, 12 Jun 2023 02:24:26 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:25 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 01/26] phy: qualcomm: fix indentation in Makefile Date: Mon, 12 Jun 2023 11:23:30 +0200 Message-Id: <20230612092355.87937-2-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Align all entries in Makefile. Signed-off-by: Bartosz Golaszewski --- drivers/phy/qualcomm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index de3dc9ccf067..5fb33628566b 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -20,4 +20,4 @@ obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2)+= phy-qcom-snps-femto-v2.o -obj-$(CONFIG_PHY_QCOM_IPQ806X_USB) += phy-qcom-ipq806x-usb.o +obj-$(CONFIG_PHY_QCOM_IPQ806X_USB) += phy-qcom-ipq806x-usb.o From patchwork Mon Jun 12 09:23:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C5A2C83005 for ; Mon, 12 Jun 2023 09:30:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233589AbjFLJaW (ORCPT ); Mon, 12 Jun 2023 05:30:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233740AbjFLJ3l (ORCPT ); Mon, 12 Jun 2023 05:29:41 -0400 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2ABFE5F for ; Mon, 12 Jun 2023 02:24:30 -0700 (PDT) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-3f7fc9014fdso29580515e9.3 for ; Mon, 12 Jun 2023 02:24:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561869; x=1689153869; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=E2Q9u8nL2MctzBi0bIbdVww9XI393qnIbj9hxLOi3Yc=; b=YqGBg5XuLWiS2RlwLB4NV3xSgXE2hRiq7NBwm5OyzaaQVK/mXNE/YlJV9ZLPByWU+q Moji+ZB5Oh3Cqv+PfmZuxiftwIlrvkg+W4pSbH/PxJNtcYqGF+RMhekQFoyv5kVBnB4Q zxfhwYb4mK7qpypVJCU9fBcwx0kQfiLBz5aW1lAbDLYg+jCZdFHNUFdn0CMG6AxXT1SP zj0AnDbdscKe6kVJ4Jiz7RGtj0Me9ClkFbRa3to9uKd/Ju2K4ZyEl7eCcGG6R5i/g32R jOPHZtO9SW34Sfy7+Z6gx30m9o/UqHRqoMW3HoX08cuMr5kVGgLO5TCJxWJ7iJGm2rj8 BAng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561869; x=1689153869; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E2Q9u8nL2MctzBi0bIbdVww9XI393qnIbj9hxLOi3Yc=; b=lePiGCZByvzUonu3uTLnTwNu3bQYNuuCNNcrtDyvYDJCq4x7Xs38FCdOFGgvrLpNxv mmKPIf4hfPzUbPgwwWLSqksNfb+E3e8hDhVfN/PVomK0JcKiB8eHt4/8POrU0GsiRBWX c9ynksx/Qk62gXz1AyLLdh/eNDtAfOUIB5Eupqg8SZluvL6ITqhlVkO1AubTqKG/+T/j OmuVD/Swy8nPRFTxqk574onSF06GeKSfmOJkjlKOPWeTKCIy0xg2RFiyd4fnL2C4JqJU BhRQtGwfKjdOG+hl6aVCZLC3iXd1NgVuoLx8ubcw1uz4smdCtXqhTyAcC+LfdcaJlk7y RAew== X-Gm-Message-State: AC+VfDyKpq6ZZJi4VamF6UW4YcEgEs3ZWUIBJPj8MBgB2JWDcKrD5Wml wIy99Bab5dekQaHP/4SPpCbPNA== X-Google-Smtp-Source: ACHHUZ4G35Z4OZRWGqxy6YPjTtJQL9p2CbJKOb0iN7gMv2ixQZx0nAD3OFQFqaa+nNxj3yAE8mbgkA== X-Received: by 2002:a05:600c:aca:b0:3f7:fa21:f66 with SMTP id c10-20020a05600c0aca00b003f7fa210f66mr6133978wmr.26.1686561869424; Mon, 12 Jun 2023 02:24:29 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:28 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 03/26] phy: qcom: add the SGMII SerDes PHY driver Date: Mon, 12 Jun 2023 11:23:32 +0200 Message-Id: <20230612092355.87937-4-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Implement support for the SGMII/SerDes PHY present on various Qualcomm platforms. Signed-off-by: Bartosz Golaszewski --- drivers/phy/qualcomm/Kconfig | 9 + drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-sgmii-eth.c | 446 ++++++++++++++++++++++ 3 files changed, 456 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-sgmii-eth.c diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig index 67a45d95250d..97ca5952e34e 100644 --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -188,3 +188,12 @@ config PHY_QCOM_IPQ806X_USB This option enables support for the Synopsis PHYs present inside the Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports both HS and SS PHY controllers. + +config PHY_QCOM_SGMII_ETH + tristate "Qualcomm DWMAC SGMII SerDes/PHY driver" + depends on OF && (ARCH_QCOM || COMPILE_TEST) + depends on HAS_IOMEM + select GENERIC_PHY + help + Enable this to support the internal SerDes/SGMII PHY on various + Qualcomm chipsets. diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index 5fb33628566b..b030858e0f8d 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2)+= phy-qcom-snps-femto-v2.o obj-$(CONFIG_PHY_QCOM_IPQ806X_USB) += phy-qcom-ipq806x-usb.o +obj-$(CONFIG_PHY_QCOM_SGMII_ETH) += phy-qcom-sgmii-eth.o diff --git a/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c b/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c new file mode 100644 index 000000000000..c9f0324a987c --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c @@ -0,0 +1,446 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023, Linaro Limited + */ + +#include +#include +#include +#include +#include +#include +#include + +#define QSERDES_QMP_PLL 0x0 +#define QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE0 (QSERDES_QMP_PLL + 0x1ac) +#define QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE0 (QSERDES_QMP_PLL + 0x1b0) +#define QSERDES_COM_BIN_VCOCAL_HSCLK_SEL (QSERDES_QMP_PLL + 0x1bc) +#define QSERDES_COM_CORE_CLK_EN (QSERDES_QMP_PLL + 0x174) +#define QSERDES_COM_CORECLK_DIV_MODE0 (QSERDES_QMP_PLL + 0x168) +#define QSERDES_COM_CP_CTRL_MODE0 (QSERDES_QMP_PLL + 0x74) +#define QSERDES_COM_DEC_START_MODE0 (QSERDES_QMP_PLL + 0xbc) +#define QSERDES_COM_DIV_FRAC_START1_MODE0 (QSERDES_QMP_PLL + 0xcc) +#define QSERDES_COM_DIV_FRAC_START2_MODE0 (QSERDES_QMP_PLL + 0xd0) +#define QSERDES_COM_DIV_FRAC_START3_MODE0 (QSERDES_QMP_PLL + 0xd4) +#define QSERDES_COM_HSCLK_HS_SWITCH_SEL (QSERDES_QMP_PLL + 0x15c) +#define QSERDES_COM_HSCLK_SEL (QSERDES_QMP_PLL + 0x158) +#define QSERDES_COM_LOCK_CMP1_MODE0 (QSERDES_QMP_PLL + 0xac) +#define QSERDES_COM_LOCK_CMP2_MODE0 (QSERDES_QMP_PLL + 0xb0) +#define QSERDES_COM_PLL_CCTRL_MODE0 (QSERDES_QMP_PLL + 0x84) +#define QSERDES_COM_PLL_IVCO (QSERDES_QMP_PLL + 0x58) +#define QSERDES_COM_PLL_RCTRL_MODE0 (QSERDES_QMP_PLL + 0x7c) +#define QSERDES_COM_SYSCLK_EN_SEL (QSERDES_QMP_PLL + 0x94) +#define QSERDES_COM_VCO_TUNE1_MODE0 (QSERDES_QMP_PLL + 0x110) +#define QSERDES_COM_VCO_TUNE2_MODE0 (QSERDES_QMP_PLL + 0x114) +#define QSERDES_COM_VCO_TUNE_INITVAL2 (QSERDES_QMP_PLL + 0x124) +#define QSERDES_COM_C_READY_STATUS (QSERDES_QMP_PLL + 0x178) +#define QSERDES_COM_CMN_STATUS (QSERDES_QMP_PLL + 0x140) + +#define QSERDES_RX 0x600 +#define QSERDES_RX_UCDR_FO_GAIN (QSERDES_RX + 0x8) +#define QSERDES_RX_UCDR_SO_GAIN (QSERDES_RX + 0x14) +#define QSERDES_RX_UCDR_FASTLOCK_FO_GAIN (QSERDES_RX + 0x30) +#define QSERDES_RX_UCDR_SO_SATURATION_AND_ENABLE (QSERDES_RX + 0x34) +#define QSERDES_RX_UCDR_FASTLOCK_COUNT_LOW (QSERDES_RX + 0x3c) +#define QSERDES_RX_UCDR_FASTLOCK_COUNT_HIGH (QSERDES_RX + 0x40) +#define QSERDES_RX_UCDR_PI_CONTROLS (QSERDES_RX + 0x44) +#define QSERDES_RX_UCDR_PI_CTRL2 (QSERDES_RX + 0x48) +#define QSERDES_RX_RX_TERM_BW (QSERDES_RX + 0x80) +#define QSERDES_RX_VGA_CAL_CNTRL2 (QSERDES_RX + 0xd8) +#define QSERDES_RX_GM_CAL (QSERDES_RX + 0xdc) +#define QSERDES_RX_RX_EQU_ADAPTOR_CNTRL1 (QSERDES_RX + 0xe8) +#define QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2 (QSERDES_RX + 0xec) +#define QSERDES_RX_RX_EQU_ADAPTOR_CNTRL3 (QSERDES_RX + 0xf0) +#define QSERDES_RX_RX_EQU_ADAPTOR_CNTRL4 (QSERDES_RX + 0xf4) +#define QSERDES_RX_RX_IDAC_TSETTLE_LOW (QSERDES_RX + 0xf8) +#define QSERDES_RX_RX_IDAC_TSETTLE_HIGH (QSERDES_RX + 0xfc) +#define QSERDES_RX_RX_IDAC_MEASURE_TIME (QSERDES_RX + 0x100) +#define QSERDES_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 (QSERDES_RX + 0x110) +#define QSERDES_RX_RX_OFFSET_ADAPTOR_CNTRL2 (QSERDES_RX + 0x114) +#define QSERDES_RX_SIGDET_CNTRL (QSERDES_RX + 0x11c) +#define QSERDES_RX_SIGDET_DEGLITCH_CNTRL (QSERDES_RX + 0x124) +#define QSERDES_RX_RX_BAND (QSERDES_RX + 0x128) +#define QSERDES_RX_RX_MODE_00_LOW (QSERDES_RX + 0x15c) +#define QSERDES_RX_RX_MODE_00_HIGH (QSERDES_RX + 0x160) +#define QSERDES_RX_RX_MODE_00_HIGH2 (QSERDES_RX + 0x164) +#define QSERDES_RX_RX_MODE_00_HIGH3 (QSERDES_RX + 0x168) +#define QSERDES_RX_RX_MODE_00_HIGH4 (QSERDES_RX + 0x16c) +#define QSERDES_RX_RX_MODE_01_LOW (QSERDES_RX + 0x170) +#define QSERDES_RX_RX_MODE_01_HIGH (QSERDES_RX + 0x174) +#define QSERDES_RX_RX_MODE_01_HIGH2 (QSERDES_RX + 0x178) +#define QSERDES_RX_RX_MODE_01_HIGH3 (QSERDES_RX + 0x17c) +#define QSERDES_RX_RX_MODE_01_HIGH4 (QSERDES_RX + 0x180) +#define QSERDES_RX_RX_MODE_10_LOW (QSERDES_RX + 0x184) +#define QSERDES_RX_RX_MODE_10_HIGH (QSERDES_RX + 0x188) +#define QSERDES_RX_RX_MODE_10_HIGH2 (QSERDES_RX + 0x18c) +#define QSERDES_RX_RX_MODE_10_HIGH3 (QSERDES_RX + 0x190) +#define QSERDES_RX_RX_MODE_10_HIGH4 (QSERDES_RX + 0x194) +#define QSERDES_RX_DCC_CTRL1 (QSERDES_RX + 0x1a8) + +#define QSERDES_TX 0x400 +#define QSERDES_TX_TX_BAND (QSERDES_TX + 0x24) +#define QSERDES_TX_SLEW_CNTL (QSERDES_TX + 0x28) +#define QSERDES_TX_RES_CODE_LANE_OFFSET_TX (QSERDES_TX + 0x3c) +#define QSERDES_TX_RES_CODE_LANE_OFFSET_RX (QSERDES_TX + 0x40) +#define QSERDES_TX_LANE_MODE_1 (QSERDES_TX + 0x84) +#define QSERDES_TX_LANE_MODE_3 (QSERDES_TX + 0x8c) +#define QSERDES_TX_RCV_DETECT_LVL_2 (QSERDES_TX + 0xa4) +#define QSERDES_TX_TRAN_DRVR_EMP_EN (QSERDES_TX + 0xc0) + +#define QSERDES_PCS 0xC00 +#define QSERDES_PCS_PHY_START (QSERDES_PCS + 0x0) +#define QSERDES_PCS_POWER_DOWN_CONTROL (QSERDES_PCS + 0x4) +#define QSERDES_PCS_SW_RESET (QSERDES_PCS + 0x8) +#define QSERDES_PCS_LINE_RESET_TIME (QSERDES_PCS + 0xc) +#define QSERDES_PCS_TX_LARGE_AMP_DRV_LVL (QSERDES_PCS + 0x20) +#define QSERDES_PCS_TX_SMALL_AMP_DRV_LVL (QSERDES_PCS + 0x28) +#define QSERDES_PCS_TX_MID_TERM_CTRL1 (QSERDES_PCS + 0xd8) +#define QSERDES_PCS_TX_MID_TERM_CTRL2 (QSERDES_PCS + 0xdc) +#define QSERDES_PCS_SGMII_MISC_CTRL8 (QSERDES_PCS + 0x118) +#define QSERDES_PCS_PCS_READY_STATUS (QSERDES_PCS + 0x94) + +#define QSERDES_COM_C_READY BIT(0) +#define QSERDES_PCS_READY BIT(0) +#define QSERDES_PCS_SGMIIPHY_READY BIT(7) +#define QSERDES_COM_C_PLL_LOCKED BIT(1) + +struct qcom_dwmac_sgmii_phy_data { + struct regmap *regmap; + int speed; +}; + +static void qcom_dwmac_sgmii_phy_init_1g(struct regmap *regmap) +{ + regmap_write(regmap, QSERDES_PCS_SW_RESET, 0x01); + regmap_write(regmap, QSERDES_PCS_POWER_DOWN_CONTROL, 0x01); + + regmap_write(regmap, QSERDES_COM_PLL_IVCO, 0x0F); + regmap_write(regmap, QSERDES_COM_CP_CTRL_MODE0, 0x06); + regmap_write(regmap, QSERDES_COM_PLL_RCTRL_MODE0, 0x16); + regmap_write(regmap, QSERDES_COM_PLL_CCTRL_MODE0, 0x36); + regmap_write(regmap, QSERDES_COM_SYSCLK_EN_SEL, 0x1A); + regmap_write(regmap, QSERDES_COM_LOCK_CMP1_MODE0, 0x0A); + regmap_write(regmap, QSERDES_COM_LOCK_CMP2_MODE0, 0x1A); + regmap_write(regmap, QSERDES_COM_DEC_START_MODE0, 0x82); + regmap_write(regmap, QSERDES_COM_DIV_FRAC_START1_MODE0, 0x55); + regmap_write(regmap, QSERDES_COM_DIV_FRAC_START2_MODE0, 0x55); + regmap_write(regmap, QSERDES_COM_DIV_FRAC_START3_MODE0, 0x03); + regmap_write(regmap, QSERDES_COM_VCO_TUNE1_MODE0, 0x24); + + regmap_write(regmap, QSERDES_COM_VCO_TUNE2_MODE0, 0x02); + regmap_write(regmap, QSERDES_COM_VCO_TUNE_INITVAL2, 0x00); + regmap_write(regmap, QSERDES_COM_HSCLK_SEL, 0x04); + regmap_write(regmap, QSERDES_COM_HSCLK_HS_SWITCH_SEL, 0x00); + regmap_write(regmap, QSERDES_COM_CORECLK_DIV_MODE0, 0x0A); + regmap_write(regmap, QSERDES_COM_CORE_CLK_EN, 0x00); + regmap_write(regmap, QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0xB9); + regmap_write(regmap, QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x1E); + regmap_write(regmap, QSERDES_COM_BIN_VCOCAL_HSCLK_SEL, 0x11); + + regmap_write(regmap, QSERDES_TX_TX_BAND, 0x05); + regmap_write(regmap, QSERDES_TX_SLEW_CNTL, 0x0A); + regmap_write(regmap, QSERDES_TX_RES_CODE_LANE_OFFSET_TX, 0x09); + regmap_write(regmap, QSERDES_TX_RES_CODE_LANE_OFFSET_RX, 0x09); + regmap_write(regmap, QSERDES_TX_LANE_MODE_1, 0x05); + regmap_write(regmap, QSERDES_TX_LANE_MODE_3, 0x00); + regmap_write(regmap, QSERDES_TX_RCV_DETECT_LVL_2, 0x12); + regmap_write(regmap, QSERDES_TX_TRAN_DRVR_EMP_EN, 0x0C); + + regmap_write(regmap, QSERDES_RX_UCDR_FO_GAIN, 0x0A); + regmap_write(regmap, QSERDES_RX_UCDR_SO_GAIN, 0x06); + regmap_write(regmap, QSERDES_RX_UCDR_FASTLOCK_FO_GAIN, 0x0A); + regmap_write(regmap, QSERDES_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x7F); + regmap_write(regmap, QSERDES_RX_UCDR_FASTLOCK_COUNT_LOW, 0x00); + regmap_write(regmap, QSERDES_RX_UCDR_FASTLOCK_COUNT_HIGH, 0x01); + regmap_write(regmap, QSERDES_RX_UCDR_PI_CONTROLS, 0x81); + regmap_write(regmap, QSERDES_RX_UCDR_PI_CTRL2, 0x80); + regmap_write(regmap, QSERDES_RX_RX_TERM_BW, 0x04); + regmap_write(regmap, QSERDES_RX_VGA_CAL_CNTRL2, 0x08); + regmap_write(regmap, QSERDES_RX_GM_CAL, 0x0F); + regmap_write(regmap, QSERDES_RX_RX_EQU_ADAPTOR_CNTRL1, 0x04); + regmap_write(regmap, QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2, 0x00); + regmap_write(regmap, QSERDES_RX_RX_EQU_ADAPTOR_CNTRL3, 0x4A); + regmap_write(regmap, QSERDES_RX_RX_EQU_ADAPTOR_CNTRL4, 0x0A); + regmap_write(regmap, QSERDES_RX_RX_IDAC_TSETTLE_LOW, 0x80); + regmap_write(regmap, QSERDES_RX_RX_IDAC_TSETTLE_HIGH, 0x01); + regmap_write(regmap, QSERDES_RX_RX_IDAC_MEASURE_TIME, 0x20); + regmap_write(regmap, QSERDES_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x17); + regmap_write(regmap, QSERDES_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x00); + regmap_write(regmap, QSERDES_RX_SIGDET_CNTRL, 0x0F); + regmap_write(regmap, QSERDES_RX_SIGDET_DEGLITCH_CNTRL, 0x1E); + regmap_write(regmap, QSERDES_RX_RX_BAND, 0x05); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_LOW, 0xE0); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_HIGH, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_HIGH2, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_HIGH3, 0x09); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_HIGH4, 0xB1); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_LOW, 0xE0); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_HIGH, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_HIGH2, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_HIGH3, 0x09); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_HIGH4, 0xB1); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_LOW, 0xE0); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_HIGH, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_HIGH2, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_HIGH3, 0x3B); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_HIGH4, 0xB7); + regmap_write(regmap, QSERDES_RX_DCC_CTRL1, 0x0C); + + regmap_write(regmap, QSERDES_PCS_LINE_RESET_TIME, 0x0C); + regmap_write(regmap, QSERDES_PCS_TX_LARGE_AMP_DRV_LVL, 0x1F); + regmap_write(regmap, QSERDES_PCS_TX_SMALL_AMP_DRV_LVL, 0x03); + regmap_write(regmap, QSERDES_PCS_TX_MID_TERM_CTRL1, 0x83); + regmap_write(regmap, QSERDES_PCS_TX_MID_TERM_CTRL2, 0x08); + regmap_write(regmap, QSERDES_PCS_SGMII_MISC_CTRL8, 0x0C); + regmap_write(regmap, QSERDES_PCS_SW_RESET, 0x00); + + regmap_write(regmap, QSERDES_PCS_PHY_START, 0x01); +} + +static void qcom_dwmac_sgmii_phy_init_2p5g(struct regmap *regmap) +{ + regmap_write(regmap, QSERDES_PCS_SW_RESET, 0x01); + regmap_write(regmap, QSERDES_PCS_POWER_DOWN_CONTROL, 0x01); + + regmap_write(regmap, QSERDES_COM_PLL_IVCO, 0x0F); + regmap_write(regmap, QSERDES_COM_CP_CTRL_MODE0, 0x06); + regmap_write(regmap, QSERDES_COM_PLL_RCTRL_MODE0, 0x16); + regmap_write(regmap, QSERDES_COM_PLL_CCTRL_MODE0, 0x36); + regmap_write(regmap, QSERDES_COM_SYSCLK_EN_SEL, 0x1A); + regmap_write(regmap, QSERDES_COM_LOCK_CMP1_MODE0, 0x1A); + regmap_write(regmap, QSERDES_COM_LOCK_CMP2_MODE0, 0x41); + regmap_write(regmap, QSERDES_COM_DEC_START_MODE0, 0x7A); + regmap_write(regmap, QSERDES_COM_DIV_FRAC_START1_MODE0, 0x00); + regmap_write(regmap, QSERDES_COM_DIV_FRAC_START2_MODE0, 0x20); + regmap_write(regmap, QSERDES_COM_DIV_FRAC_START3_MODE0, 0x01); + regmap_write(regmap, QSERDES_COM_VCO_TUNE1_MODE0, 0xA1); + + regmap_write(regmap, QSERDES_COM_VCO_TUNE2_MODE0, 0x02); + regmap_write(regmap, QSERDES_COM_VCO_TUNE_INITVAL2, 0x00); + regmap_write(regmap, QSERDES_COM_HSCLK_SEL, 0x03); + regmap_write(regmap, QSERDES_COM_HSCLK_HS_SWITCH_SEL, 0x00); + regmap_write(regmap, QSERDES_COM_CORECLK_DIV_MODE0, 0x05); + regmap_write(regmap, QSERDES_COM_CORE_CLK_EN, 0x00); + regmap_write(regmap, QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0xCD); + regmap_write(regmap, QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x1C); + regmap_write(regmap, QSERDES_COM_BIN_VCOCAL_HSCLK_SEL, 0x11); + + regmap_write(regmap, QSERDES_TX_TX_BAND, 0x04); + regmap_write(regmap, QSERDES_TX_SLEW_CNTL, 0x0A); + regmap_write(regmap, QSERDES_TX_RES_CODE_LANE_OFFSET_TX, 0x09); + regmap_write(regmap, QSERDES_TX_RES_CODE_LANE_OFFSET_RX, 0x02); + regmap_write(regmap, QSERDES_TX_LANE_MODE_1, 0x05); + regmap_write(regmap, QSERDES_TX_LANE_MODE_3, 0x00); + regmap_write(regmap, QSERDES_TX_RCV_DETECT_LVL_2, 0x12); + regmap_write(regmap, QSERDES_TX_TRAN_DRVR_EMP_EN, 0x0C); + + regmap_write(regmap, QSERDES_RX_UCDR_FO_GAIN, 0x0A); + regmap_write(regmap, QSERDES_RX_UCDR_SO_GAIN, 0x06); + regmap_write(regmap, QSERDES_RX_UCDR_FASTLOCK_FO_GAIN, 0x0A); + regmap_write(regmap, QSERDES_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x7F); + regmap_write(regmap, QSERDES_RX_UCDR_FASTLOCK_COUNT_LOW, 0x00); + regmap_write(regmap, QSERDES_RX_UCDR_FASTLOCK_COUNT_HIGH, 0x01); + regmap_write(regmap, QSERDES_RX_UCDR_PI_CONTROLS, 0x81); + regmap_write(regmap, QSERDES_RX_UCDR_PI_CTRL2, 0x80); + regmap_write(regmap, QSERDES_RX_RX_TERM_BW, 0x00); + regmap_write(regmap, QSERDES_RX_VGA_CAL_CNTRL2, 0x08); + regmap_write(regmap, QSERDES_RX_GM_CAL, 0x0F); + regmap_write(regmap, QSERDES_RX_RX_EQU_ADAPTOR_CNTRL1, 0x04); + regmap_write(regmap, QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2, 0x00); + regmap_write(regmap, QSERDES_RX_RX_EQU_ADAPTOR_CNTRL3, 0x4A); + regmap_write(regmap, QSERDES_RX_RX_EQU_ADAPTOR_CNTRL4, 0x0A); + regmap_write(regmap, QSERDES_RX_RX_IDAC_TSETTLE_LOW, 0x80); + regmap_write(regmap, QSERDES_RX_RX_IDAC_TSETTLE_HIGH, 0x01); + regmap_write(regmap, QSERDES_RX_RX_IDAC_MEASURE_TIME, 0x20); + regmap_write(regmap, QSERDES_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x17); + regmap_write(regmap, QSERDES_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x00); + regmap_write(regmap, QSERDES_RX_SIGDET_CNTRL, 0x0F); + regmap_write(regmap, QSERDES_RX_SIGDET_DEGLITCH_CNTRL, 0x1E); + regmap_write(regmap, QSERDES_RX_RX_BAND, 0x18); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_LOW, 0x18); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_HIGH, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_HIGH2, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_HIGH3, 0x0C); + regmap_write(regmap, QSERDES_RX_RX_MODE_00_HIGH4, 0xB8); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_LOW, 0xE0); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_HIGH, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_HIGH2, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_HIGH3, 0x09); + regmap_write(regmap, QSERDES_RX_RX_MODE_01_HIGH4, 0xB1); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_LOW, 0xE0); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_HIGH, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_HIGH2, 0xC8); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_HIGH3, 0x3B); + regmap_write(regmap, QSERDES_RX_RX_MODE_10_HIGH4, 0xB7); + regmap_write(regmap, QSERDES_RX_DCC_CTRL1, 0x0C); + + regmap_write(regmap, QSERDES_PCS_LINE_RESET_TIME, 0x0C); + regmap_write(regmap, QSERDES_PCS_TX_LARGE_AMP_DRV_LVL, 0x1F); + regmap_write(regmap, QSERDES_PCS_TX_SMALL_AMP_DRV_LVL, 0x03); + regmap_write(regmap, QSERDES_PCS_TX_MID_TERM_CTRL1, 0x83); + regmap_write(regmap, QSERDES_PCS_TX_MID_TERM_CTRL2, 0x08); + regmap_write(regmap, QSERDES_PCS_SGMII_MISC_CTRL8, 0x8C); + regmap_write(regmap, QSERDES_PCS_SW_RESET, 0x00); + + regmap_write(regmap, QSERDES_PCS_PHY_START, 0x01); +} + +static inline int +qcom_dwmac_sgmii_phy_poll_status(struct regmap *regmap, unsigned int reg, + unsigned int bit) +{ + unsigned int val; + + return regmap_read_poll_timeout(regmap, reg, val, + val & bit, 1500, 750000); +} + +static int qcom_dwmac_sgmii_phy_init(struct phy *phy) +{ + struct qcom_dwmac_sgmii_phy_data *data = phy_get_drvdata(phy); + struct device *dev = phy->dev.parent; + + switch (data->speed) { + case SPEED_10: + case SPEED_100: + case SPEED_1000: + qcom_dwmac_sgmii_phy_init_1g(data->regmap); + break; + case SPEED_2500: + qcom_dwmac_sgmii_phy_init_2p5g(data->regmap); + break; + } + + if (qcom_dwmac_sgmii_phy_poll_status(data->regmap, + QSERDES_COM_C_READY_STATUS, + QSERDES_COM_C_READY)) { + dev_err(dev, "QSERDES_COM_C_READY_STATUS timedout"); + return -ETIMEDOUT; + } + + if (qcom_dwmac_sgmii_phy_poll_status(data->regmap, + QSERDES_PCS_PCS_READY_STATUS, + QSERDES_PCS_READY)) { + dev_err(dev, "PCS_READY timedout"); + return -ETIMEDOUT; + } + + if (qcom_dwmac_sgmii_phy_poll_status(data->regmap, + QSERDES_PCS_PCS_READY_STATUS, + QSERDES_PCS_SGMIIPHY_READY)) { + dev_err(dev, "SGMIIPHY_READY timedout"); + return -ETIMEDOUT; + } + + if (qcom_dwmac_sgmii_phy_poll_status(data->regmap, + QSERDES_COM_CMN_STATUS, + QSERDES_COM_C_PLL_LOCKED)) { + dev_err(dev, "PLL Lock Status timedout"); + return -ETIMEDOUT; + } + + return 0; +} + +static int qcom_dwmac_sgmii_phy_exit(struct phy *phy) +{ + struct qcom_dwmac_sgmii_phy_data *data = phy_get_drvdata(phy); + + regmap_write(data->regmap, QSERDES_PCS_TX_MID_TERM_CTRL2, 0x08); + regmap_write(data->regmap, QSERDES_PCS_SW_RESET, 0x01); + udelay(100); + regmap_write(data->regmap, QSERDES_PCS_SW_RESET, 0x00); + regmap_write(data->regmap, QSERDES_PCS_PHY_START, 0x01); + + return 0; +} + +static int qcom_dwmac_sgmii_phy_set_speed(struct phy *phy, int speed) +{ + struct qcom_dwmac_sgmii_phy_data *data = phy_get_drvdata(phy); + + if (speed != data->speed) + data->speed = speed; + + return 0; +} + +static int qcom_dwmac_sgmii_phy_calibrate(struct phy *phy) +{ + return qcom_dwmac_sgmii_phy_init(phy); +} + +static const struct phy_ops qcom_dwmac_sgmii_phy_ops = { + .init = qcom_dwmac_sgmii_phy_init, + .exit = qcom_dwmac_sgmii_phy_exit, + .set_speed = qcom_dwmac_sgmii_phy_set_speed, + .calibrate = qcom_dwmac_sgmii_phy_calibrate, + .owner = THIS_MODULE, +}; + +static const struct regmap_config qcom_dwmac_sgmii_phy_regmap_cfg = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .use_relaxed_mmio = true, + .disable_locking = true, +}; + +static int qcom_dwmac_sgmii_phy_probe(struct platform_device *pdev) +{ + struct qcom_dwmac_sgmii_phy_data *data; + struct device *dev = &pdev->dev; + struct phy_provider *provider; + struct clk *refclk; + void __iomem *base; + struct phy *phy; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + data->regmap = devm_regmap_init_mmio(dev, base, + &qcom_dwmac_sgmii_phy_regmap_cfg); + if (IS_ERR(data->regmap)) + return PTR_ERR(data->regmap); + + phy = devm_phy_create(dev, NULL, &qcom_dwmac_sgmii_phy_ops); + if (IS_ERR(phy)) + return PTR_ERR(phy); + + refclk = devm_clk_get_enabled(dev, "sgmi_ref"); + if (IS_ERR(refclk)) + return PTR_ERR(refclk); + + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + if (IS_ERR(provider)) + return PTR_ERR(provider); + + phy_set_drvdata(phy, data); + platform_set_drvdata(pdev, data); + + return 0; +} + +static const struct of_device_id qcom_dwmac_sgmii_phy_of_match[] = { + { .compatible = "qcom,sa8775p-dwmac-sgmii-phy" }, + { }, +}; +MODULE_DEVICE_TABLE(of, qcom_dwmac_sgmii_phy_of_match); + +static struct platform_driver qcom_dwmac_sgmii_phy_driver = { + .probe = qcom_dwmac_sgmii_phy_probe, + .driver = { + .name = "qcom-dwmac-sgmii-phy", + .of_match_table = qcom_dwmac_sgmii_phy_of_match, + } +}; + +module_platform_driver(qcom_dwmac_sgmii_phy_driver); + +MODULE_DESCRIPTION("Qualcomm DWMAC SGMII PHY driver"); +MODULE_LICENSE("GPL"); From patchwork Mon Jun 12 09:23:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6CCCC7EE43 for ; Mon, 12 Jun 2023 09:30:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234835AbjFLJad (ORCPT ); Mon, 12 Jun 2023 05:30:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233109AbjFLJ3o (ORCPT ); Mon, 12 Jun 2023 05:29:44 -0400 Received: from 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l7-20020a7bc347000000b003f7e7d56123mr5820770wmj.41.1686561873262; Mon, 12 Jun 2023 02:24:33 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:32 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 05/26] net: stmmac: dwmac-qcom-ethqos: shrink clock code with devres Date: Mon, 12 Jun 2023 11:23:34 +0200 Message-Id: <20230612092355.87937-6-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski We can use a devm action to completely drop the remove callback and use stmmac_pltfr_remove() directly for remove. We can also drop one of the goto labels. Signed-off-by: Bartosz Golaszewski --- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 24 +++++++++---------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index c801838fae2a..2da0738eed24 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -586,6 +586,11 @@ static int ethqos_clks_config(void *priv, bool enabled) return ret; } +static void ethqos_clks_disable(void *data) +{ + ethqos_clks_config(data, false); +} + static int qcom_ethqos_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -636,6 +641,10 @@ static int qcom_ethqos_probe(struct platform_device *pdev) if (ret) goto err_mem; + ret = devm_add_action_or_reset(&pdev->dev, ethqos_clks_disable, ethqos); + if (ret) + goto err_mem; + ethqos->speed = SPEED_1000; ethqos_update_rgmii_clk(ethqos, SPEED_1000); ethqos_set_func_clk_en(ethqos); @@ -653,27 +662,16 @@ static int qcom_ethqos_probe(struct platform_device *pdev) ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); if (ret) - goto err_clk; + goto err_mem; return ret; -err_clk: - ethqos_clks_config(ethqos, false); - err_mem: stmmac_remove_config_dt(pdev, plat_dat); return ret; } -static void qcom_ethqos_remove(struct platform_device *pdev) -{ - struct qcom_ethqos *ethqos = get_stmmac_bsp_priv(&pdev->dev); - - stmmac_pltfr_remove(pdev); - ethqos_clks_config(ethqos, false); -} - static const struct of_device_id qcom_ethqos_match[] = { { .compatible = "qcom,qcs404-ethqos", .data = &emac_v2_3_0_data}, { .compatible = "qcom,sc8280xp-ethqos", .data = &emac_v3_0_0_data}, @@ -684,7 +682,7 @@ MODULE_DEVICE_TABLE(of, qcom_ethqos_match); static struct platform_driver qcom_ethqos_driver = { .probe = qcom_ethqos_probe, - .remove_new = qcom_ethqos_remove, + .remove_new = stmmac_pltfr_remove, .driver = { .name = "qcom-ethqos", .pm = &stmmac_pltfr_pm_ops, From patchwork Mon Jun 12 09:23:36 2023 Content-Type: text/plain; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 07/26] net: stmmac: dwmac-qcom-ethqos: tweak the order of local variables Date: Mon, 12 Jun 2023 11:23:36 +0200 Message-Id: <20230612092355.87937-8-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Make sure we follow the reverse-xmas tree convention. Signed-off-by: Bartosz Golaszewski --- drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 16e856861558..28d2514a8795 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -594,9 +594,9 @@ static void ethqos_clks_disable(void *data) static int qcom_ethqos_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; + const struct ethqos_emac_driver_data *data; struct plat_stmmacenet_data *plat_dat; struct stmmac_resources stmmac_res; - const struct ethqos_emac_driver_data *data; struct qcom_ethqos *ethqos; int ret; From patchwork Mon Jun 12 09:23:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72817C7EE23 for ; Mon, 12 Jun 2023 09:30:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234673AbjFLJaz (ORCPT ); Mon, 12 Jun 2023 05:30:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234859AbjFLJ3t (ORCPT ); Mon, 12 Jun 2023 05:29:49 -0400 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96CD61FDC for ; Mon, 12 Jun 2023 02:24:39 -0700 (PDT) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-3f7f4819256so29873375e9.1 for ; Mon, 12 Jun 2023 02:24:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561879; x=1689153879; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9517L+m6kHVlackMfaxSN+CNphejP2hqUH4D90m9Olw=; b=niV8zcJpx+FM/U+qoIxdAubWZD03pWCf8LOroYc/q2tXxGMobXAhRDTkiRBScpbEha nmxGS6K4K+sMXcJWCBnsRrq2MLQI+me1BzhofFvIbxfFBqtqVfBnlU9NnJ+S/3YdL81N /pMUKBNVFHGFG4pB4KMmO0Tm3YSZ/mtio9kHJMTOzA12sEv0MYYTtbBZ0g1XISkS4YXu HIpSDd0gsNCx9eAULp0cL5z0caPJYHrM67slR1Ji1AyGcoXvSRtRttHMVkb6nWUiHY1I 3Vr6JmgkhnmHSgmjDaKJSXOBVvR+k1fRIz9MfUkxMIHyJffKzIcI+Zs0Ptrp3HHe31Zi 31rw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561879; x=1689153879; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9517L+m6kHVlackMfaxSN+CNphejP2hqUH4D90m9Olw=; b=VlaFYaUibdyfCqPTj25rm9qJRys7gGwubLgmY5XVrQXg0GlGcYT2kOPhEj4hkh/XoW 598RXA5BiSIDCmBTBs+KLCtvYt3nhGSYFzKJHO+FIBBHYJfawqiqk2VuaetK3jHRo45G Mw3VLAh6KwPBIhBGqb2seHlDFYGJY3ZKPqR3utUs3Rlduqf+AnnBQpBLdeq7YfM4BiAy IbxK3x/O/SOHDx+jNOMjcyaBvSshjHCeSvX7zmzH/Max79cXHOicblkF9phsoZc4Oxjp OlLm1K9a/MLLiWna3uZQ+pwMkhTZxYZNR+rR/zeo7VRrgL3SJldy7LojYSM9zR3Abg/d eV+Q== X-Gm-Message-State: AC+VfDwLLVCHc64SGFc5EHSQtXKDt7bKxq0bEwrxzAA9bU1EhSBEl31a q54l0Df1wGJMt/sl84AMwkLV0g== X-Google-Smtp-Source: ACHHUZ7OmuBoNhbMPtzJgMKKXL9pAuDmUXCPSMeBXS0fx0sGH2DzxWk99X8iZUVMp3kJqiLAHi07Gg== X-Received: by 2002:a7b:c84c:0:b0:3f7:33cf:707b with SMTP id c12-20020a7bc84c000000b003f733cf707bmr6349917wml.1.1686561879026; Mon, 12 Jun 2023 02:24:39 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:38 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 09/26] net: stmmac: dwmac-qcom-ethqos: add missing include Date: Mon, 12 Jun 2023 11:23:38 +0200 Message-Id: <20230612092355.87937-10-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski device_get_phy_mode() is declared in linux/property.h but this header is not included. Signed-off-by: Bartosz Golaszewski --- drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index e19d142630d3..ecb94e5388c7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -6,6 +6,7 @@ #include #include #include +#include #include "stmmac.h" #include "stmmac_platform.h" From patchwork Mon Jun 12 09:23:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E26AEC7EE23 for ; Mon, 12 Jun 2023 09:31:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230262AbjFLJbY (ORCPT ); Mon, 12 Jun 2023 05:31:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231318AbjFLJaD (ORCPT ); Mon, 12 Jun 2023 05:30:03 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A3F412D4A for ; Mon, 12 Jun 2023 02:24:43 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-3f6e4554453so29316195e9.3 for ; Mon, 12 Jun 2023 02:24:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561882; x=1689153882; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zNG+hKxvwpveqfTw49rcUFiC9HYNGdqxVXCMwf/CgoQ=; b=Sjg97FxEsWi1+NhQKvwlVEh51XvKpb7L8qjO3eSPmnCp+RHYjPs6m0g4elcX7e4Gmk q3U1vLjkmrqHZnROyBs/n7xJkk00XMII9dTC69A/BMsdgUAKh6CQ1iVENWho3ieFJxOn kpyrUeEyJN+JmDe79C2O+6cXxwvHb2t7vltcUEEX9l5t3wSl7DONd9L87ujMUkqnmc3f QLazLkrv1GDOV/9vOl0n3uQDl7CvHNk+dcol5Iwbbh8SCOOuXpQsG0n4CHEkKYj0lKtl KjhlWUbdcnrDvJneJ/NH/roITps7vNV+XakPuvBg42ntql0DPxtDl5zempMyWZOl9HON Bzzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561882; x=1689153882; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zNG+hKxvwpveqfTw49rcUFiC9HYNGdqxVXCMwf/CgoQ=; b=dEh0XIqr7lI/vMXTFDv2FlI+gDvfeZHSAUG3puO7Lx0Tm3cHEkmSvbPkkgCzIqb+rP fC9HcdAioeffZaHi4R++y8fpq16XWly57fD5eI2Gn7ambbLwxOYSimAnSNlPRwn9gTwj 78Hxc17bjuZleSa39d4MKDBs5Jo26fP87Nc+v9nm6ooepQrexB5EHoR194vMf51wLXYI GNsTw7H7qFQUUPPyDHxJwLQT8UkkLScxXQx1/FW++RkjO/5S+pS9zsTxiuc5OuqxpbOu zWWdyYA5poCCSMtf1mez/izK64LS2UfR85nttStofPe7gpaMErm4G3eoGnwWrxUAmCK8 7PYQ== X-Gm-Message-State: AC+VfDz70M8jOSx75xryDv/KvjMcjhArhTTAVhRZ/kKUc7tNfxwAk1fG YXvx1tj6cnFwi/b447AddWJCcA== X-Google-Smtp-Source: ACHHUZ7VSDx8D3GXZ4VcJcb/TSs+3b96OTltaJznbz319l8jyj/BU/MtAxrNF5k8MF/YomUni4Onnw== X-Received: by 2002:a1c:4c0c:0:b0:3f7:3699:c294 with SMTP id z12-20020a1c4c0c000000b003f73699c294mr5458505wmf.29.1686561882035; Mon, 12 Jun 2023 02:24:42 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:41 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 11/26] net: stmmac: dwmac-qcom-ethqos: remove stray space Date: Mon, 12 Jun 2023 11:23:40 +0200 Message-Id: <20230612092355.87937-12-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski There's an unnecessary space in the rgmii_updatel() function, remove it. Signed-off-by: Bartosz Golaszewski --- drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 5b56abacbf6b..8ed05f29fe8b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -117,7 +117,7 @@ static void rgmii_updatel(struct qcom_ethqos *ethqos, { unsigned int temp; - temp = rgmii_readl(ethqos, offset); + temp = rgmii_readl(ethqos, offset); temp = (temp & ~(mask)) | val; rgmii_writel(ethqos, temp, offset); } From patchwork Mon Jun 12 09:23:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D238C7EE43 for ; Mon, 12 Jun 2023 09:31:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232004AbjFLJbf (ORCPT ); Mon, 12 Jun 2023 05:31:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49148 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232086AbjFLJaN (ORCPT ); Mon, 12 Jun 2023 05:30:13 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3EA5630E4 for ; Mon, 12 Jun 2023 02:24:47 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id 2adb3069b0e04-4f61d79b0f2so4896384e87.3 for ; Mon, 12 Jun 2023 02:24:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561885; x=1689153885; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0jrHnz846sKSAurRWEc8dAdWpKHrp05uQC5lgmZ9ncs=; b=Wv5XrDDvy4LtM5L7MWCbVK9pWAo3LoUNOvZQEasGmTIxOi38BcIRca8Fde80aXxOwM aXfV6t3++WM8D2t43nXQPbThzdlcHTowM1+1hywltCEBkdLNk5WIBKbHdgnFrbTu6NN6 G7hD3xTxSxdg2OJyJhkZKd/bIlY8HQYl9S3d+OKQOv7jN/dCgI9Jja2/dN9fpneUfi06 MbuoGh0EvHikS8mSs/EC9zdBr5OUOZtHEXtCxm4XNW8D1WYAC2ZSXNjfDklDyA/HF1uk rv1AHJwKXY2AlZUFovyBCJwKKAz5+/DTFFMP1V3lPGCXMSQIXrZnHCpFQWA4YSRq5Alp 0QbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561885; x=1689153885; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0jrHnz846sKSAurRWEc8dAdWpKHrp05uQC5lgmZ9ncs=; b=Ksnik0QodLBDN0OohfWrsH7rFALrON7FgrIMHhQLPaYk/Vo8z7mRRW96wnq8EbuDFH 6Sr9jjeYpHBwV4ZtB2qyS5YBSYOPQ/6o4WADPzTChc9E/rE9HPyh5S9HISGQAlRUYqrf WYEBjPA0ApLMXtT54VrYjmI+xlf3K31lDWRSjkf9+PTVXpK4lPfIOPu4157RWgxYbh3V kApdAI90/ZvqfXeHnuUDt8Mg2duBAmTrmoT1SQ4v3MKFT6H45Gqp2KVzXzEhd2vBavRU 8xuIQnVXdTjzbxiKwqxHH1H1+OGshIQlBB4FRdc5szN/JZ+uVA/TeCH0NtgXaY3UU2cw 4ERQ== X-Gm-Message-State: AC+VfDz6ci5DujP1omBg0ryQpR48cyVPT6qhSWddRNadRkenkHLhkYWj ApZXX1feo1qEY/v4k5txyKDKOA== X-Google-Smtp-Source: ACHHUZ6uIGRfB9PUuO1IdV3Ad+qQfGck8wohxMrNY4KVFcykXH7H2id2cyMCwfjwU4a96k2jo3xMxA== X-Received: by 2002:a19:6706:0:b0:4f4:2b83:f4a3 with SMTP id b6-20020a196706000000b004f42b83f4a3mr3564114lfc.51.1686561885364; Mon, 12 Jun 2023 02:24:45 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:44 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 13/26] net: stmmac: dwmac-qcom-ethqos: make the rgmii clock optional Date: Mon, 12 Jun 2023 11:23:42 +0200 Message-Id: <20230612092355.87937-14-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski On sa8775p there's no RGMII clock so make it optional in the driver. Signed-off-by: Bartosz Golaszewski --- drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 3438b6229351..252dca400071 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -663,7 +663,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) ethqos->rgmii_config_loopback_en = data->rgmii_config_loopback_en; ethqos->has_emac3 = data->has_emac3; - ethqos->rgmii_clk = devm_clk_get(dev, "rgmii"); + ethqos->rgmii_clk = devm_clk_get_optional(dev, "rgmii"); if (IS_ERR(ethqos->rgmii_clk)) { ret = PTR_ERR(ethqos->rgmii_clk); goto out_config_dt; From patchwork Mon Jun 12 09:23:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691732 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26879C7EE2E for ; Mon, 12 Jun 2023 09:31:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235009AbjFLJbs (ORCPT ); Mon, 12 Jun 2023 05:31:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232548AbjFLJaR (ORCPT ); Mon, 12 Jun 2023 05:30:17 -0400 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7307830F8 for ; Mon, 12 Jun 2023 02:24:49 -0700 (PDT) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-3f7ff69824dso25623845e9.1 for ; Mon, 12 Jun 2023 02:24:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561888; x=1689153888; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cjVXwVFp50u0PUxr/5pPlG4sgNjLclV10ezIygBZf1w=; b=2LxLhnK7e46mui8dhof9QAMYFAXj+RyNY51koDXFIyUq+oeAgfB5Yunm2wkRuj1JMn kZaCwUavQC6RW+LqMlWJwEmkbL8jYXkjd+0ANuO3gB4RfugPiO63GVGDem2oaXmUGXY6 eAlLWzfGQJsrYyk6s/qe+xejpzIL2oEbCV4biO8JIzCtGSZlK2U1RNqppXvdTzoPFYj1 3uySIa1BuTRWIipEsHrVcQc4yvQ9rYYM8rlnBgv7OYXKE2GKN9SYzVWyi+JBty3FKAs6 AGFFcXEHyxxr14wTLOjNholiBRGWtf+J2xMsFuYww1sG2cHVlfE8DjukIKEYzRH+nuip 3ZBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561888; x=1689153888; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cjVXwVFp50u0PUxr/5pPlG4sgNjLclV10ezIygBZf1w=; b=GROFBbcEye6lTT6h8tg09c3i+o2lGui8iX69m2/Hk3/uLYhPUYJUP+NSIoTTUAdDLP neLJUzMaFX/p8v9OhACUj2Wo69QJYcq4S9MRaF79URyMu12f8sb56Yd8GGkh59yJJps7 qBVdhKPZi+pMB8C+Q9mY1t78gYncQWPdoHF3ArMZrXO6r/PZ+XI0tqv0VxzqwQBkDjdk Id3ty1iG9JeAN/1GeDq1y3qR3YtaJvwna6L3V49VgLavSyHsQY0wWYm28PBQGAmjBAEN QeUmNtA9hHQ5VH64L93TIFCV63jGr5ISqqlbruGXzZY6ma7QhX1AT+CzMUDHmJoIp84/ z2VQ== X-Gm-Message-State: AC+VfDxz9RCGo+cZ/oG6T9oNwKSP+a9DMjkn8oZEOuCNqWo5vG6uD2Da 6JxsO1mokAcqUWxYonnjDElcfA== X-Google-Smtp-Source: ACHHUZ5VMYcwm8OhSaptz22TDIOQZKg2qtYe5RLNTkB2yZzQSZhIqFe5Wt+EaJyET4ed5soNUXNxKQ== X-Received: by 2002:a05:600c:880f:b0:3f7:148b:c310 with SMTP id gy15-20020a05600c880f00b003f7148bc310mr8862440wmb.13.1686561888007; Mon, 12 Jun 2023 02:24:48 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:47 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 15/26] net: stmmac: dwmac-qcom-ethqos: add support for the optional phy-supply Date: Mon, 12 Jun 2023 11:23:44 +0200 Message-Id: <20230612092355.87937-16-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski On sa8775p-ride we need to enable the power supply for the external PHY. Signed-off-by: Bartosz Golaszewski --- drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 2f6b9b419601..21f329d2f7eb 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -8,6 +8,7 @@ #include #include #include +#include #include "stmmac.h" #include "stmmac_platform.h" @@ -692,6 +693,10 @@ static int qcom_ethqos_probe(struct platform_device *pdev) if (ret) goto out_config_dt; + ret = devm_regulator_get_enable_optional(dev, "phy"); + if (ret < 0 && ret != -ENODEV) + goto out_config_dt; + ethqos->serdes_phy = devm_phy_optional_get(dev, "serdes"); if (IS_ERR(ethqos->serdes_phy)) { ret = PTR_ERR(ethqos->serdes_phy); From patchwork Mon Jun 12 09:23:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691731 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28F65C7EE43 for ; Mon, 12 Jun 2023 09:32:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234649AbjFLJcI (ORCPT ); Mon, 12 Jun 2023 05:32:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233750AbjFLJa3 (ORCPT ); Mon, 12 Jun 2023 05:30:29 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D27DC4EC4 for ; Mon, 12 Jun 2023 02:24:52 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id 2adb3069b0e04-4f64fb05a8aso4792335e87.0 for ; Mon, 12 Jun 2023 02:24:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561891; x=1689153891; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Gu6Hj8PYw+w5Smr4EMXMmc+WADcALPo6VlL++XAkFkQ=; b=KgztPCwzL7tQDDy797REtkk6bu9zfPBV1CItjq2k4V9QtMfVqe7RQDCXQ+XLPJ+Tnu as8pYDlZiiycSsvjx0FeTP5FWiqBhfePAPUFcTmRWIbqULZz4GzxMxSYa6wh8l/ZdnX8 19eJideh6H6lNdJyPVL8ku4IHc43sCPTWCXZwSYq9N9lKCdNc1tcn/DsRUUbRH4jkopC 4m3O+6XeduNEMSUdeIrKAAqOR2554WPPuGg8oI5fw2O+aNCrNLvyIgTVYq+T3am/k4Ak GtUlY9r08SUm7vHfrQ4KlyXcElHqGru24EzP2b4Dg5v4sIQkXWI9ZdASbzNYVUtZhgM6 Y07g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561891; x=1689153891; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Gu6Hj8PYw+w5Smr4EMXMmc+WADcALPo6VlL++XAkFkQ=; b=NHLkb+eTMm3syf8IgUAi/g8b5f32oLovDoNKaCtMHRfIMnWCbNF2nZRE3wdSEKhnPh PpDiKXLb/Qh1caXNgrnKylgNi2nvVI9p0nadoR9vdeOQzn6B0JndMlD0N8OweYqSZarv W+bo4sGfadi7K0gp+tdkbsWgEv9BY1do94QC7xB/X7klDplXYlVb+pP4zMj7MDfVsPiV rvsYeSi/Xwc+pve0Tf28Qp8viSv7PrH2StulGH5DVFJRoRWst2bTgxo8TB68UjHDRote 1TXAqE5VmdU8HcC8bxw2dnGlRFRPb8Tx0J5fe1bS6ZvsMv3hHtdQTOx+nirEaAKVfZIw 8Wog== X-Gm-Message-State: AC+VfDxmTfzlbReZS60bigsfcbt6m1VqLQ5BxhleF/WxboExSFfSSmZV sLNG0XxB9J/gKpNLjHD31F54uQ== X-Google-Smtp-Source: ACHHUZ5PHuc52bGQHAJIwWPqQKW+7sxCfjsz+LzdXKKiWQG+l/yIe4x3JNrpAOl59yTb3Z2wEnrkzw== X-Received: by 2002:ac2:5b11:0:b0:4f3:b32d:f739 with SMTP id v17-20020ac25b11000000b004f3b32df739mr4457643lfn.19.1686561891077; Mon, 12 Jun 2023 02:24:51 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:50 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 17/26] net: stmmac: dwmac-qcom-ethqos: add support for SGMII Date: Mon, 12 Jun 2023 11:23:46 +0200 Message-Id: <20230612092355.87937-18-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski On sa8775p the MAC is connected to the external PHY over SGMII so add support for it to the driver. Signed-off-by: Bartosz Golaszewski --- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 2f96f2c11278..247e3888cca0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -76,6 +76,10 @@ #define RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL BIT(6) #define RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN BIT(5) +/* MAC_CTRL_REG bits */ +#define ETHQOS_MAC_CTRL_SPEED_MODE BIT(14) +#define ETHQOS_MAC_CTRL_PORT_SEL BIT(15) + struct ethqos_emac_por { unsigned int offset; unsigned int value; @@ -92,6 +96,7 @@ struct ethqos_emac_driver_data { struct qcom_ethqos { struct platform_device *pdev; void __iomem *rgmii_base; + void __iomem *mac_base; int (*configure_func)(struct qcom_ethqos *ethqos); unsigned int rgmii_clk_rate; @@ -561,6 +566,33 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos) return 0; } +static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos) +{ + int val; + + val = readl(ethqos->mac_base + MAC_CTRL_REG); + + switch (ethqos->speed) { + case SPEED_1000: + val &= ~ETHQOS_MAC_CTRL_PORT_SEL; + rgmii_updatel(ethqos, RGMII_CONFIG2_RGMII_CLK_SEL_CFG, + RGMII_CONFIG2_RGMII_CLK_SEL_CFG, + RGMII_IO_MACRO_CONFIG2); + break; + case SPEED_100: + val |= ETHQOS_MAC_CTRL_PORT_SEL | ETHQOS_MAC_CTRL_SPEED_MODE; + break; + case SPEED_10: + val |= ETHQOS_MAC_CTRL_PORT_SEL; + val &= ~ETHQOS_MAC_CTRL_SPEED_MODE; + break; + } + + writel(val, ethqos->mac_base + MAC_CTRL_REG); + + return val; +} + static int ethqos_configure(struct qcom_ethqos *ethqos) { return ethqos->configure_func(ethqos); @@ -673,6 +705,9 @@ static int qcom_ethqos_probe(struct platform_device *pdev) case PHY_INTERFACE_MODE_RGMII_TXID: ethqos->configure_func = ethqos_configure_rgmii; break; + case PHY_INTERFACE_MODE_SGMII: + ethqos->configure_func = ethqos_configure_sgmii; + break; case -ENODEV: ret = -ENODEV; goto out_config_dt; @@ -688,6 +723,8 @@ static int qcom_ethqos_probe(struct platform_device *pdev) goto out_config_dt; } + ethqos->mac_base = stmmac_res.addr; + data = of_device_get_match_data(dev); ethqos->por = data->por; ethqos->num_por = data->num_por; From patchwork Mon Jun 12 09:23:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691730 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BC90C8300C for ; Mon, 12 Jun 2023 09:32:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234825AbjFLJcS (ORCPT ); Mon, 12 Jun 2023 05:32:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234846AbjFLJaj (ORCPT ); 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Mon, 12 Jun 2023 02:24:53 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 19/26] dt-bindings: net: snps,dwmac: add compatible for sa8775p ethqos Date: Mon, 12 Jun 2023 11:23:48 +0200 Message-Id: <20230612092355.87937-20-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the compatible string for the MAC controller on sa8775p platforms. Signed-off-by: Bartosz Golaszewski Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 363b3e3ea3a6..ddf9522a5dc2 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -67,6 +67,7 @@ properties: - loongson,ls2k-dwmac - loongson,ls7a-dwmac - qcom,qcs404-ethqos + - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos - qcom,sm8150-ethqos - renesas,r9a06g032-gmac @@ -582,6 +583,7 @@ allOf: - ingenic,x1600-mac - ingenic,x1830-mac - ingenic,x2000-mac + - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos - snps,dwmac-3.50a - snps,dwmac-4.10a @@ -638,6 +640,7 @@ allOf: - ingenic,x1830-mac - ingenic,x2000-mac - qcom,qcs404-ethqos + - qcom,sa8775p-ethqos - qcom,sc8280xp-ethqos - qcom,sm8150-ethqos - snps,dwmac-4.00 From patchwork Mon Jun 12 09:23:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691729 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0BFB5C7EE43 for ; Mon, 12 Jun 2023 09:32:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235130AbjFLJc3 (ORCPT ); Mon, 12 Jun 2023 05:32:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234845AbjFLJa6 (ORCPT ); Mon, 12 Jun 2023 05:30:58 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 376634EC8 for ; Mon, 12 Jun 2023 02:24:58 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-3f732d37d7bso29602505e9.0 for ; Mon, 12 Jun 2023 02:24:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561896; x=1689153896; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=daR94dVplG+ZI9i0IDfMIEFWnwE1eSwGkl16IK6pqwI=; b=uoRxZiUPtxnfmNryRY5Rnwq1ha8eB/FcnBi2lahhDqg941OiFCwgMJdV5vgRId9uq4 /TyZwSbQWan6lMJfE7LV4PJs/RmG9lUGpm9CQl3UDwa8I4V9rGcvZR3ICmwfe7UURu5C Bqb5yljGhjDVR0x36RuIYypr9JevX+iHfhUG4LIEvPPOyNEbG48oRl4XsmphWMAb7iLy +Zn0VrCahCaKLP0tPf4sEfrnJNcHkyEIPP2IZw7fTxGKacoGuzEulIEIATBzR26s9AuA Rw6qAUeAkGBlwewnJvAEzhUnUvU32AjdHyn9AZpXKWcMh65K+O05T+95QC/Kof8VMOzR cG3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561896; x=1689153896; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=daR94dVplG+ZI9i0IDfMIEFWnwE1eSwGkl16IK6pqwI=; b=Ewp0UbAO3Y7wCFB7IN64LDAXGVhrRyBZHt3Jq+IKzpAgLCLBwc4Pyl5uI666GaxxVU IngwrFxiqX29T5+hwHYEgWdScYcSCZCYSf/xY1kcGwfpaVTPf6gzPJtC4sdeXy3ntlz7 aQ18OmyajEEt2B09XRl+eF1KMTD5JRjuoST3WAeXOOg64v/XAYrtF/HkvdEdhtdFM6Sw YkInoWkSnAAdyFK/WNFhkXkXmqJod0xjuPnxr6l8JmmysTj+EIJ1B4bpBMwvDst6CMw7 rKrWoxqxyD+Q4kAU26ucW4wGj3JDrAGSjvHAkRPl2lx/ek79EUOfFCPIZwb2ympYkeIs J7ww== X-Gm-Message-State: AC+VfDyeFRSdUc8basCwks92d8rK2O7QGxmnVZCjTVW7mQBCB9pfjv4Q JGRb85YGutYtgkSwGz8iVG2uAQ== X-Google-Smtp-Source: ACHHUZ4cn5tCD9DUU4uEafGOaguGceHqrEtxN9LZgaLUZ8+0eUk7TqL8Z4NXEU23GZsCCJkFLtDV6Q== X-Received: by 2002:a05:600c:224d:b0:3f8:1110:60c2 with SMTP id a13-20020a05600c224d00b003f8111060c2mr4009580wmm.33.1686561896419; Mon, 12 Jun 2023 02:24:56 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:56 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 21/26] net: stmmac: dwmac-qcom-ethqos: add support for emac4 on sa8775p platforms Date: Mon, 12 Jun 2023 11:23:50 +0200 Message-Id: <20230612092355.87937-22-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski sa8775p uses EMAC version 4, add the relevant defines, rename the has_emac3 switch to has_emac_ge_3 (has emac greater-or-equal than 3) and add the new compatible. Signed-off-by: Bartosz Golaszewski --- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 64 +++++++++++++++---- 1 file changed, 50 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 247e3888cca0..047c569e5480 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -89,7 +89,8 @@ struct ethqos_emac_driver_data { const struct ethqos_emac_por *por; unsigned int num_por; bool rgmii_config_loopback_en; - bool has_emac3; + bool has_emac_ge_3; + bool has_integrated_pcs; struct dwmac4_addrs dwmac4_addrs; }; @@ -109,7 +110,7 @@ struct qcom_ethqos { const struct ethqos_emac_por *por; unsigned int num_por; bool rgmii_config_loopback_en; - bool has_emac3; + bool has_emac_ge_3; }; static int rgmii_readl(struct qcom_ethqos *ethqos, unsigned int offset) @@ -203,7 +204,7 @@ static const struct ethqos_emac_driver_data emac_v2_3_0_data = { .por = emac_v2_3_0_por, .num_por = ARRAY_SIZE(emac_v2_3_0_por), .rgmii_config_loopback_en = true, - .has_emac3 = false, + .has_emac_ge_3 = false, }; static const struct ethqos_emac_por emac_v2_1_0_por[] = { @@ -219,7 +220,7 @@ static const struct ethqos_emac_driver_data emac_v2_1_0_data = { .por = emac_v2_1_0_por, .num_por = ARRAY_SIZE(emac_v2_1_0_por), .rgmii_config_loopback_en = false, - .has_emac3 = false, + .has_emac_ge_3 = false, }; static const struct ethqos_emac_por emac_v3_0_0_por[] = { @@ -235,7 +236,40 @@ static const struct ethqos_emac_driver_data emac_v3_0_0_data = { .por = emac_v3_0_0_por, .num_por = ARRAY_SIZE(emac_v3_0_0_por), .rgmii_config_loopback_en = false, - .has_emac3 = true, + .has_emac_ge_3 = true, + .dwmac4_addrs = { + .dma_chan = 0x00008100, + .dma_chan_offset = 0x1000, + .mtl_chan = 0x00008000, + .mtl_chan_offset = 0x1000, + .mtl_ets_ctrl = 0x00008010, + .mtl_ets_ctrl_offset = 0x1000, + .mtl_txq_weight = 0x00008018, + .mtl_txq_weight_offset = 0x1000, + .mtl_send_slp_cred = 0x0000801c, + .mtl_send_slp_cred_offset = 0x1000, + .mtl_high_cred = 0x00008020, + .mtl_high_cred_offset = 0x1000, + .mtl_low_cred = 0x00008024, + .mtl_low_cred_offset = 0x1000, + }, +}; + +static const struct ethqos_emac_por emac_v4_0_0_por[] = { + { .offset = RGMII_IO_MACRO_CONFIG, .value = 0x40c01343 }, + { .offset = SDCC_HC_REG_DLL_CONFIG, .value = 0x2004642c }, + { .offset = SDCC_HC_REG_DDR_CONFIG, .value = 0x80040800 }, + { .offset = SDCC_HC_REG_DLL_CONFIG2, .value = 0x00200000 }, + { .offset = SDCC_USR_CTL, .value = 0x00010800 }, + { .offset = RGMII_IO_MACRO_CONFIG2, .value = 0x00002060 }, +}; + +static const struct ethqos_emac_driver_data emac_v4_0_0_data = { + .por = emac_v4_0_0_por, + .num_por = ARRAY_SIZE(emac_v3_0_0_por), + .rgmii_config_loopback_en = false, + .has_emac_ge_3 = true, + .has_integrated_pcs = true, .dwmac4_addrs = { .dma_chan = 0x00008100, .dma_chan_offset = 0x1000, @@ -276,7 +310,7 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN, SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG); - if (!ethqos->has_emac3) { + if (!ethqos->has_emac_ge_3) { rgmii_updatel(ethqos, SDCC_DLL_MCLK_GATING_EN, 0, SDCC_HC_REG_DLL_CONFIG); @@ -317,7 +351,7 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_HC_REG_DLL_CONFIG2); - if (!ethqos->has_emac3) { + if (!ethqos->has_emac_ge_3) { rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS, 0, SDCC_HC_REG_DLL_CONFIG2); @@ -387,7 +421,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) /* PRG_RCLK_DLY = TCXO period * TCXO_CYCLES_CNT / 2 * RX delay ns, * in practice this becomes PRG_RCLK_DLY = 52 * 4 / 2 * RX delay ns */ - if (ethqos->has_emac3) { + if (ethqos->has_emac_ge_3) { /* 0.9 ns */ rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY, 115, SDCC_HC_REG_DDR_CONFIG); @@ -422,7 +456,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, 0, RGMII_IO_MACRO_CONFIG2); - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_IO_MACRO_CONFIG2); @@ -462,7 +496,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) RGMII_IO_MACRO_CONFIG); rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, 0, RGMII_IO_MACRO_CONFIG2); - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_IO_MACRO_CONFIG2); @@ -512,7 +546,7 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG_PDN, SDCC_DLL_CONFIG_PDN, SDCC_HC_REG_DLL_CONFIG); - if (ethqos->has_emac3) { + if (ethqos->has_emac_ge_3) { if (ethqos->speed == SPEED_1000) { rgmii_writel(ethqos, 0x1800000, SDCC_TEST_CTL); rgmii_writel(ethqos, 0x2C010800, SDCC_USR_CTL); @@ -542,7 +576,7 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos) SDCC_HC_REG_DLL_CONFIG); /* Set USR_CTL bit 26 with mask of 3 bits */ - if (!ethqos->has_emac3) + if (!ethqos->has_emac_ge_3) rgmii_updatel(ethqos, GENMASK(26, 24), BIT(26), SDCC_USR_CTL); @@ -729,7 +763,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) ethqos->por = data->por; ethqos->num_por = data->num_por; ethqos->rgmii_config_loopback_en = data->rgmii_config_loopback_en; - ethqos->has_emac3 = data->has_emac3; + ethqos->has_emac_ge_3 = data->has_emac_ge_3; ethqos->rgmii_clk = devm_clk_get_optional(dev, "rgmii"); if (IS_ERR(ethqos->rgmii_clk)) { @@ -769,12 +803,13 @@ static int qcom_ethqos_probe(struct platform_device *pdev) plat_dat->fix_mac_speed = ethqos_fix_mac_speed; plat_dat->dump_debug_regs = rgmii_dump; plat_dat->has_gmac4 = 1; - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) plat_dat->dwmac4_addrs = &data->dwmac4_addrs; plat_dat->pmt = 1; plat_dat->tso_en = of_property_read_bool(np, "snps,tso"); if (of_device_is_compatible(np, "qcom,qcs404-ethqos")) plat_dat->rx_clk_runs_in_lpi = 1; + plat_dat->has_integrated_pcs = data->has_integrated_pcs; if (ethqos->serdes_phy) { plat_dat->serdes_powerup = qcom_ethqos_serdes_powerup; @@ -795,6 +830,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) static const struct of_device_id qcom_ethqos_match[] = { { .compatible = "qcom,qcs404-ethqos", .data = &emac_v2_3_0_data}, + { .compatible = "qcom,sa8775p-ethqos", .data = &emac_v4_0_0_data}, { .compatible = "qcom,sc8280xp-ethqos", .data = &emac_v3_0_0_data}, { .compatible = "qcom,sm8150-ethqos", .data = &emac_v2_1_0_data}, { } From patchwork Mon Jun 12 09:23:53 2023 Content-Type: text/plain; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 24/26] arm64: dts: qcom: sa8775p-ride: enable the SerDes PHY Date: Mon, 12 Jun 2023 11:23:53 +0200 Message-Id: <20230612092355.87937-25-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Enable the internal PHY on sa8775p-ride. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index ab767cfa51ff..7754788ea775 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -355,6 +355,10 @@ &qupv3_id_2 { status = "okay"; }; +&serdes_phy { + status = "okay"; +}; + &sleep_clk { clock-frequency = <32764>; }; From patchwork Mon Jun 12 09:23:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 691727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CD72C7EE45 for ; Mon, 12 Jun 2023 09:32:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235206AbjFLJcn (ORCPT ); Mon, 12 Jun 2023 05:32:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232536AbjFLJbT (ORCPT ); Mon, 12 Jun 2023 05:31:19 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 309844ECD for ; Mon, 12 Jun 2023 02:25:02 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-3f730c1253fso29567005e9.1 for ; Mon, 12 Jun 2023 02:25:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561901; x=1689153901; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CLaMx9+e4iuA9k0HKzXztUaaZBEZ9bpdRm0ATPtxSFs=; b=Z0vGtlAOr73GZC/Gj6eNFC/9k2Sm7GthQ5ThOHdTEND/fWcqoz9SHGZU7g4Oejo0+B RaV6BZ/igQvP2b+/IrEGbCH17+t+nX1v97JhXRnct3KrN+NH+rKKSmNU5mCdV4b8VRdx LxPR1YJ1FiMBcCV/4psL9l/br0kTlIiTM9S2TXH8Yt5k/l/Yji6lXbMjA3yDLYaN1t5F yTkATjmoZYcy0mVncUpNLUH8UkjQNLy9HERgoOXFhfpbFPFdkrhehA7+aktL68oKI3fc VfoghKsM37C8k9q6fKStc7pJd2JFqcOuHZ/fiUcQndVgIGO+EMPW0QhTOi40Ae765TFr GNLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561901; x=1689153901; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CLaMx9+e4iuA9k0HKzXztUaaZBEZ9bpdRm0ATPtxSFs=; b=VI5reqRlYnYOgxJ+kiRl6P8gHkIfXf1JFAeZCw7BDPLXA5vg26o9tlUyTaJIRYPNKt sed0DrAXjeVeL9ACGrrJ8hEtkGEBpy2hdoYXx4/gjyBmrh9kULYtcgsKs5/Whbtaajr0 JB7IY2tH01qqa8VywA+jjcFHu1omLGIgemTctN6mWgUd26sbB/AwUuUoizf1nope3LO0 lv7C8ogFksaXpZtNXipwVRef/Ai2yAEen5Qvf7vxrlp/8YJc9s5st/jMN+A8GqF5P0xA cXRC2AQA9CNrHHodalqReTnhjyu61A18I0cx0act+zjGN+oYcV5WshrtyqymqZRTXRHQ /aRQ== X-Gm-Message-State: AC+VfDwg+13CWdgBreQxxywWD+pjhFo6jYJHuYgkuy74rLytVU0j2qtd a3tibeCIWxGPZ6laARuwrMO0zomwiWGFHhBetUE= X-Google-Smtp-Source: ACHHUZ7qP7/SyTOU8/DDIX68G7BFQneP8olbAA34G/JnNTqmm2c9ABxgMYXONRfwTSOTiB3F/nspiw== X-Received: by 2002:a05:600c:284a:b0:3f7:e818:1eb with SMTP id r10-20020a05600c284a00b003f7e81801ebmr5507867wmb.40.1686561901784; Mon, 12 Jun 2023 02:25:01 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.25.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:25:01 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 25/26] arm64: dts: qcom: sa8775p-ride: add pin functions for ethernet0 Date: Mon, 12 Jun 2023 11:23:54 +0200 Message-Id: <20230612092355.87937-26-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the MDC and MDIO pin functions for ethernet0 on sa8775p-ride. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index 7754788ea775..dbd9553aa5c7 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -370,6 +370,22 @@ &spi16 { }; &tlmm { + ethernet0_default: ethernet0-default-state { + ethernet0_mdc: ethernet0-mdc-pins { + pins = "gpio8"; + function = "emac0_mdc"; + drive-strength = <16>; + bias-pull-up; + }; + + ethernet0_mdio: ethernet0-mdio-pins { + pins = "gpio9"; + function = "emac0_mdio"; + drive-strength = <16>; + bias-pull-up; + }; + }; + qup_uart10_default: qup-uart10-state { pins = "gpio46", "gpio47"; function = "qup1_se3";