From patchwork Fri Jun 9 08:25:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raag Jadav X-Patchwork-Id: 691533 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96870C7EE43 for ; Fri, 9 Jun 2023 08:27:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240517AbjFII0k (ORCPT ); Fri, 9 Jun 2023 04:26:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57226 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241656AbjFII0S (ORCPT ); Fri, 9 Jun 2023 04:26:18 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBF573A88; Fri, 9 Jun 2023 01:26:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686299163; x=1717835163; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=FdOUg0wrIHPy8S0vIosISMVGhprK8AkkqdGWBQxA5zY=; b=ZG8wtSDRucr0V6x7dRWIb/aLTq35esGqxL2smpKzEj0R/lLFy4FcSVCe mVz3T+XDWAKY2433pQ2hDs5TOW4d2kwIi2P7SJjdi0Ep22RjRiKc8XKCF 7+Gtihi81BhtlK4wRiSEQKFiRffKX14Z2dX/f+ntjAac+VefC0U46ZlH/ ixmEcXecSnd0KpagsTuuQOn+lwuZYVW0zJrSvQXGABhd48e3IwiTprBa6 xs1jTvUpfc5U6R+09lwwAaNjfRvj/MjbU0ICBmOk7N5i/mTgGGu2G9hLW vnX14liewaWirwrgwzBYTBRGQSf04Pc2ETodaih49eiAU1x0NElebdsmT w==; X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="342222300" X-IronPort-AV: E=Sophos;i="6.00,228,1681196400"; d="scan'208";a="342222300" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2023 01:26:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="713424276" X-IronPort-AV: E=Sophos;i="6.00,228,1681196400"; d="scan'208";a="713424276" Received: from inesxmail01.iind.intel.com ([10.223.154.20]) by fmsmga007.fm.intel.com with ESMTP; 09 Jun 2023 01:25:59 -0700 Received: from inlubt0316.iind.intel.com (inlubt0316.iind.intel.com [10.191.20.213]) by inesxmail01.iind.intel.com (Postfix) with ESMTP id 060B71435B; Fri, 9 Jun 2023 13:55:59 +0530 (IST) Received: by inlubt0316.iind.intel.com (Postfix, from userid 12101951) id F387DAB; Fri, 9 Jun 2023 13:55:58 +0530 (IST) From: Raag Jadav To: linus.walleij@linaro.org, mika.westerberg@linux.intel.com, andriy.shevchenko@linux.intel.com Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, mallikarjunappa.sangannavar@intel.com, pandith.n@intel.com, Raag Jadav Subject: [PATCH v2 1/4] pinctrl: intel: refine set_mux hook Date: Fri, 9 Jun 2023 13:55:36 +0530 Message-Id: <20230609082539.24311-2-raag.jadav@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230609082539.24311-1-raag.jadav@intel.com> References: <20230609082539.24311-1-raag.jadav@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Utilize a temporary variable for common shift operation inside ->set_mux() hook and improve readability. Signed-off-by: Raag Jadav --- drivers/pinctrl/intel/pinctrl-intel.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index c7a71c49df0a..e8adf2580321 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -411,18 +411,19 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, /* Now enable the mux setting for each pin in the group */ for (i = 0; i < grp->grp.npins; i++) { void __iomem *padcfg0; - u32 value; + u32 value, pmode; padcfg0 = intel_get_padcfg(pctrl, grp->grp.pins[i], PADCFG0); - value = readl(padcfg0); + value = readl(padcfg0); value &= ~PADCFG0_PMODE_MASK; if (grp->modes) - value |= grp->modes[i] << PADCFG0_PMODE_SHIFT; + pmode = grp->modes[i]; else - value |= grp->mode << PADCFG0_PMODE_SHIFT; + pmode = grp->mode; + value |= pmode << PADCFG0_PMODE_SHIFT; writel(value, padcfg0); } From patchwork Fri Jun 9 08:25:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raag Jadav X-Patchwork-Id: 691012 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52F0DC7EE2E for ; Fri, 9 Jun 2023 08:27:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240336AbjFII0j (ORCPT ); Fri, 9 Jun 2023 04:26:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241654AbjFII0S (ORCPT ); Fri, 9 Jun 2023 04:26:18 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACE8930EC; Fri, 9 Jun 2023 01:26:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686299163; x=1717835163; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=qAYVBXdl5GPI2VnNJdr1EfODyAMusq9BtjJGbz/NqZE=; b=WEpz45GWGJvKb/5Qw+eTQipmYMCeK8Cvxsr/1ccAwwsmA+HzTbC/PBVd wJphektzHAdhHtbXdleEWsQze2yswAEP3dhiIzEPOtXTLNkJ2WPZf2zds o4q2EOHw4PKLwvY/7s3QesQu4UdZh7x3vpRFRp2nZ8cOTsiM9oTRO7fYT H7R1s/kixWUQr239d/hi9GGB6ZucNcAkZ7JnSdpJFMDfqOYFUgtC+Xfwp 1EXkiGxF3ROE6WPCL8l996zRFy1mdnaXuBxWnRYcIzMOd0opbO7NtpCA7 XGCBpvPhVfcGULINXVk5jKE5Kza+9wcA8gAY/UDT3FMtkGTJOTDD+Z+NA w==; X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="342222298" X-IronPort-AV: E=Sophos;i="6.00,228,1681196400"; d="scan'208";a="342222298" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2023 01:26:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="713424278" X-IronPort-AV: E=Sophos;i="6.00,228,1681196400"; d="scan'208";a="713424278" Received: from inesxmail01.iind.intel.com ([10.223.154.20]) by fmsmga007.fm.intel.com with ESMTP; 09 Jun 2023 01:25:59 -0700 Received: from inlubt0316.iind.intel.com (inlubt0316.iind.intel.com [10.191.20.213]) by inesxmail01.iind.intel.com (Postfix) with ESMTP id 09A2918636; Fri, 9 Jun 2023 13:55:59 +0530 (IST) Received: by inlubt0316.iind.intel.com (Postfix, from userid 12101951) id 016C1B6; Fri, 9 Jun 2023 13:55:58 +0530 (IST) From: Raag Jadav To: linus.walleij@linaro.org, mika.westerberg@linux.intel.com, andriy.shevchenko@linux.intel.com Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, mallikarjunappa.sangannavar@intel.com, pandith.n@intel.com, Raag Jadav Subject: [PATCH v2 2/4] pinctrl: intel: refine irq_set_type hook Date: Fri, 9 Jun 2023 13:55:37 +0530 Message-Id: <20230609082539.24311-3-raag.jadav@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230609082539.24311-1-raag.jadav@intel.com> References: <20230609082539.24311-1-raag.jadav@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Utilize a temporary variable for common shift operation inside ->irq_set_type() hook and improve readability. While at it, simplify if-else-if chain and save a few bytes. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-16 (-16) Function old new delta intel_gpio_irq_type 317 301 -16 Total: Before=10469, After=10453, chg -0.15% Signed-off-by: Raag Jadav --- drivers/pinctrl/intel/pinctrl-intel.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index e8adf2580321..3f78066b1837 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -1128,8 +1128,8 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type) struct intel_pinctrl *pctrl = gpiochip_get_data(gc); unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL); unsigned long flags; + u32 value, rxevcfg; void __iomem *reg; - u32 value; reg = intel_get_padcfg(pctrl, pin, PADCFG0); if (!reg) @@ -1150,23 +1150,24 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type) intel_gpio_set_gpio_mode(reg); value = readl(reg); - value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV); if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { - value |= PADCFG0_RXEVCFG_EDGE_BOTH << PADCFG0_RXEVCFG_SHIFT; + rxevcfg = PADCFG0_RXEVCFG_EDGE_BOTH; } else if (type & IRQ_TYPE_EDGE_FALLING) { - value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT; - value |= PADCFG0_RXINV; + rxevcfg = PADCFG0_RXEVCFG_EDGE; } else if (type & IRQ_TYPE_EDGE_RISING) { - value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT; + rxevcfg = PADCFG0_RXEVCFG_EDGE; } else if (type & IRQ_TYPE_LEVEL_MASK) { - if (type & IRQ_TYPE_LEVEL_LOW) - value |= PADCFG0_RXINV; + rxevcfg = PADCFG0_RXEVCFG_LEVEL; } else { - value |= PADCFG0_RXEVCFG_DISABLED << PADCFG0_RXEVCFG_SHIFT; + rxevcfg = PADCFG0_RXEVCFG_DISABLED; } + if (type == IRQ_TYPE_EDGE_FALLING || type == IRQ_TYPE_LEVEL_LOW) + value |= PADCFG0_RXINV; + + value |= rxevcfg << PADCFG0_RXEVCFG_SHIFT; writel(value, reg); if (type & IRQ_TYPE_EDGE_BOTH) From patchwork Fri Jun 9 08:25:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raag Jadav X-Patchwork-Id: 691532 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E14AC87FE1 for ; Fri, 9 Jun 2023 08:27:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240598AbjFII0r (ORCPT ); Fri, 9 Jun 2023 04:26:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241658AbjFII0S (ORCPT ); Fri, 9 Jun 2023 04:26:18 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F4543A8B; Fri, 9 Jun 2023 01:26:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; 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09 Jun 2023 01:25:59 -0700 Received: from inlubt0316.iind.intel.com (inlubt0316.iind.intel.com [10.191.20.213]) by inesxmail01.iind.intel.com (Postfix) with ESMTP id 0ABF119740; Fri, 9 Jun 2023 13:55:59 +0530 (IST) Received: by inlubt0316.iind.intel.com (Postfix, from userid 12101951) id 03724163; Fri, 9 Jun 2023 13:55:58 +0530 (IST) From: Raag Jadav To: linus.walleij@linaro.org, mika.westerberg@linux.intel.com, andriy.shevchenko@linux.intel.com Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, mallikarjunappa.sangannavar@intel.com, pandith.n@intel.com, Raag Jadav Subject: [PATCH v2 3/4] pinctrl: intel: simplify exit path of set_mux hook Date: Fri, 9 Jun 2023 13:55:38 +0530 Message-Id: <20230609082539.24311-4-raag.jadav@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230609082539.24311-1-raag.jadav@intel.com> References: <20230609082539.24311-1-raag.jadav@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Simplify exit path of ->set_mux() hook and save a few bytes. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-22 (-22) Function old new delta intel_pinmux_set_mux 242 220 -22 Total: Before=10453, After=10431, chg -0.21% Signed-off-by: Raag Jadav --- drivers/pinctrl/intel/pinctrl-intel.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 3f78066b1837..2338e84615cc 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -393,7 +393,7 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); const struct intel_pingroup *grp = &pctrl->soc->groups[group]; unsigned long flags; - int i; + int i, ret = 0; raw_spin_lock_irqsave(&pctrl->lock, flags); @@ -403,8 +403,8 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, */ for (i = 0; i < grp->grp.npins; i++) { if (!intel_pad_usable(pctrl, grp->grp.pins[i])) { - raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return -EBUSY; + ret = -EBUSY; + goto out_unlock; } } @@ -427,9 +427,10 @@ static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, writel(value, padcfg0); } +out_unlock: raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return 0; + return ret; } static void __intel_gpio_set_direction(void __iomem *padcfg0, bool input) From patchwork Fri Jun 9 08:25:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raag Jadav X-Patchwork-Id: 691011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAE56C83005 for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="342222305" X-IronPort-AV: E=Sophos;i="6.00,228,1681196400"; d="scan'208";a="342222305" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2023 01:26:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10735"; a="713424282" X-IronPort-AV: E=Sophos;i="6.00,228,1681196400"; d="scan'208";a="713424282" Received: from inesxmail01.iind.intel.com ([10.223.154.20]) by fmsmga007.fm.intel.com with ESMTP; 09 Jun 2023 01:25:59 -0700 Received: from inlubt0316.iind.intel.com (inlubt0316.iind.intel.com [10.191.20.213]) by inesxmail01.iind.intel.com (Postfix) with ESMTP id 0C0F119742; Fri, 9 Jun 2023 13:55:59 +0530 (IST) Received: by inlubt0316.iind.intel.com (Postfix, from userid 12101951) id 08E3F17C; Fri, 9 Jun 2023 13:55:59 +0530 (IST) From: Raag Jadav To: linus.walleij@linaro.org, mika.westerberg@linux.intel.com, andriy.shevchenko@linux.intel.com Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, mallikarjunappa.sangannavar@intel.com, pandith.n@intel.com, Raag Jadav Subject: [PATCH v2 4/4] pinctrl: intel: simplify exit path of gpio_request_enable hook Date: Fri, 9 Jun 2023 13:55:39 +0530 Message-Id: <20230609082539.24311-5-raag.jadav@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230609082539.24311-1-raag.jadav@intel.com> References: <20230609082539.24311-1-raag.jadav@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Simplify exit path of ->gpio_request_enable() hook and save a few bytes. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-36 (-36) Function old new delta intel_gpio_request_enable 186 150 -36 Total: Before=10431, After=10395, chg -0.35% Signed-off-by: Raag Jadav --- drivers/pinctrl/intel/pinctrl-intel.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 2338e84615cc..12b994fa2aad 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -486,20 +486,19 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev, struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); void __iomem *padcfg0; unsigned long flags; + int ret = 0; padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0); raw_spin_lock_irqsave(&pctrl->lock, flags); if (!intel_pad_owned_by_host(pctrl, pin)) { - raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return -EBUSY; + ret = -EBUSY; + goto out_unlock; } - if (!intel_pad_is_unlocked(pctrl, pin)) { - raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return 0; - } + if (!intel_pad_is_unlocked(pctrl, pin)) + goto out_unlock; /* * If pin is already configured in GPIO mode, we assume that @@ -507,16 +506,15 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev, * potential glitches on the pin. Otherwise, for the pin in * alternative mode, consumer has to supply respective flags. */ - if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO) { - raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return 0; - } + if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO) + goto out_unlock; intel_gpio_set_gpio_mode(padcfg0); +out_unlock: raw_spin_unlock_irqrestore(&pctrl->lock, flags); - return 0; + return ret; } static int intel_gpio_set_direction(struct pinctrl_dev *pctldev,