From patchwork Mon Jun 5 16:20:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 690013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41A03C7EE2C for ; Mon, 5 Jun 2023 16:21:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233079AbjFEQV3 (ORCPT ); Mon, 5 Jun 2023 12:21:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232988AbjFEQV1 (ORCPT ); Mon, 5 Jun 2023 12:21:27 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C38BC94; Mon, 5 Jun 2023 09:21:26 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 51F236605840; Mon, 5 Jun 2023 17:21:23 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685982085; bh=ATz/rOCQK/30QpZGojesEllhUcbCxgG6yCEU3vGr3XY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AUdKxlsBSpoteFxUFwz5M/rh+iK0lAMHfnQTu9vVSa4MmYwD6UIW5J5kdH0UOcKgV mvA2puSQ0KrQXzt5QqpYefEbBoCXtb7uDrINRj04CEaAhKMbAK4x0APzlEQosIthFO IkPpQg0xlMHsty2D/qCp/RiT2TMETjYZx9Xq0DZvTVvHpSQqV84kGen81Pi12dowNW 3aSyP8DCPv+l6yFbb8F3jEjQRw7SxSoKxS8LxvtqBZSf2E5QoLf1mdmh0RkdgQqhSj j7iiRiozlSOjqzgGAaG584JoRxZWKDfvigsFB1RJtxqomAXNWlxf0A03GYRo5I7Asd rhlHlpNqKK3ng== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH 1/6] media: dt-bindings: mediatek,vcodec: Allow single clock for mt8183 Date: Mon, 5 Jun 2023 12:20:25 -0400 Message-Id: <20230605162030.274395-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230605162030.274395-1-nfraprado@collabora.com> References: <20230605162030.274395-1-nfraprado@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org MT8173 and MT8183 have different clocks, and consequently clock-names. Relax the number of clocks and set clock-names based on compatible. Signed-off-by: Nícolas F. R. A. Prado --- .../media/mediatek,vcodec-decoder.yaml | 29 +++++++++++++------ 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index fad59b486d5d..57d5ca776df0 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -27,18 +27,12 @@ properties: maxItems: 1 clocks: + minItems: 1 maxItems: 8 clock-names: - items: - - const: vcodecpll - - const: univpll_d2 - - const: clk_cci400_sel - - const: vdec_sel - - const: vdecpll - - const: vencpll - - const: venc_lt_sel - - const: vdec_bus_clk_src + minItems: 1 + maxItems: 8 assigned-clocks: true @@ -88,6 +82,11 @@ allOf: required: - mediatek,scp + properties: + clock-names: + items: + - const: vdec + - if: properties: compatible: @@ -99,6 +98,18 @@ allOf: required: - mediatek,vpu + properties: + clock-names: + items: + - const: vcodecpll + - const: univpll_d2 + - const: clk_cci400_sel + - const: vdec_sel + - const: vdecpll + - const: vencpll + - const: venc_lt_sel + - const: vdec_bus_clk_src + additionalProperties: false examples: From patchwork Mon Jun 5 16:20:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 689604 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD86CC7EE2F for ; Mon, 5 Jun 2023 16:21:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234755AbjFEQVg (ORCPT ); Mon, 5 Jun 2023 12:21:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234656AbjFEQVb (ORCPT ); Mon, 5 Jun 2023 12:21:31 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DE58ED2; Mon, 5 Jun 2023 09:21:29 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1A5546606E75; Mon, 5 Jun 2023 17:21:25 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685982088; bh=hpuSfUwRgpVJ50aSOdpyF/fGgsKVyjO2zFPFVOsBbR0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BgQDAyVS5lY/HAGajbGzPNci3f/nLj+mgvCtY43vmi5C9uwzdn2auEh89rl5U8v8q utcPbqNSWLqK+JOYWVOlqIjKlNv9bxM8NLsVsVvNpJz/VTXna3jpHGahFBkLC1Sg9T 0SWxfgZUWDlpGgs2Io83WC1quPUMN5s8Zusxmf+SK9CCKViMAPhOKeihx878HP08KF 2PvcDGUk0Dj9NN3jCfSxfvvg35DnM0Y9qQDtCOhYOlnQvw9Ghy2aC3U5cegPItOzk3 PfkX5gjsNAdq7EZHBLQr2vPp6a/Ziqilm6GsOkrXXBWwuee9x+BGu6Jtx6L625t73i gjpT4MdgQ5fLg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH 2/6] media: dt-bindings: mediatek,vcodec: Don't require assigned-clocks Date: Mon, 5 Jun 2023 12:20:26 -0400 Message-Id: <20230605162030.274395-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230605162030.274395-1-nfraprado@collabora.com> References: <20230605162030.274395-1-nfraprado@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org On MT8183 it's not necessary to configure the parent for the clocks. Remove the assigned-clocks and assigned-clock-parents from the required list. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/media/mediatek,vcodec-decoder.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index 57d5ca776df0..6447e6c86f29 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -67,8 +67,6 @@ required: - clocks - clock-names - iommus - - assigned-clocks - - assigned-clock-parents allOf: - if: From patchwork Mon Jun 5 16:20:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 690012 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1385C7EE2D for ; Mon, 5 Jun 2023 16:21:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234747AbjFEQVk (ORCPT ); Mon, 5 Jun 2023 12:21:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234668AbjFEQVd (ORCPT ); Mon, 5 Jun 2023 12:21:33 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B131EA; Mon, 5 Jun 2023 09:21:32 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id DB2896606E8F; Mon, 5 Jun 2023 17:21:28 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685982091; bh=FBxkyNk+wH42mt6PnhdzeId5YI52PJ33/87A7v+PAUw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WjIsU6PBPQljs3cQ78Cgl3WM66ZSuCLbOq5VIHZioKLnkOeABvFutQ6grd6TD3vk6 xwjYiWrpsAji/CfOAUSGybbUcMMOXplj4rqdJ8sfCb6ffrbnirCMI4MerrgFD5jKjw R6GPE3W/yPlYSYJhRtYvny8+cT/IM43tkOB7k/mbchRqjvZbU6fniXBFC2XIwEhrHE 2xGvvoWP/OfQ38BUzu45bjim1SUxYND4Ka1yH7NRYhoFlKsjwZ+N0c7iHMES046Aj+ jWOHzBtjIcCfJkrOBXTCJg/plkgykkiy98zFO2JDGnocRCaCYWozJwBeyI8FxUjZCQ 294Sym1jSsP5Q== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Conor Dooley , Krzysztof Kozlowski , Mauro Carvalho Chehab , Rob Herring , Tiffany Lin , Yunfei Dong , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH 3/6] media: dt-bindings: mediatek, vcodec: Remove VDEC_SYS for mt8183 Date: Mon, 5 Jun 2023 12:20:27 -0400 Message-Id: <20230605162030.274395-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230605162030.274395-1-nfraprado@collabora.com> References: <20230605162030.274395-1-nfraprado@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The binding expects the first register space to be VDEC_SYS. But on mt8183, which uses the stateless decoders, this space is used only for controlling clocks and resets, which are better described as separate clock-controller and reset-controller nodes. In fact, in mt8173's devicetree there are already such separate clock-controller nodes, which cause duplicate addresses between the vdecsys node and the vcodec node. But for this SoC, since the stateful decoder code makes other uses of the VDEC_SYS register space, it's not straightforward to remove it. In order to avoid the same address conflict to happen on mt8183, since the only current use of the VDEC_SYS register space in the driver is to read the status of a clock that indicates the hardware is active, remove the VDEC_SYS register space from the binding and describe an extra clock that will be used to directly check the hardware status. Also add reg-names to be able to tell that this new register schema is used, so the driver can keep backward compatibility. Signed-off-by: Nícolas F. R. A. Prado --- .../media/mediatek,vcodec-decoder.yaml | 29 +++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml index 6447e6c86f29..36a53b2484d6 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml @@ -21,17 +21,21 @@ properties: - mediatek,mt8183-vcodec-dec reg: + minItems: 11 maxItems: 12 + reg-names: + minItems: 11 + interrupts: maxItems: 1 clocks: - minItems: 1 + minItems: 2 maxItems: 8 clock-names: - minItems: 1 + minItems: 2 maxItems: 8 assigned-clocks: true @@ -84,6 +88,24 @@ allOf: clock-names: items: - const: vdec + - const: active + + reg: + maxItems: 11 + + reg-names: + items: + - const: misc + - const: ld + - const: top + - const: cm + - const: ad + - const: av + - const: pp + - const: hwd + - const: hwq + - const: hwb + - const: hwg - if: properties: @@ -108,6 +130,9 @@ allOf: - const: venc_lt_sel - const: vdec_bus_clk_src + reg: + minItems: 12 + additionalProperties: false examples: From patchwork Mon Jun 5 16:20:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 689603 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C06AC7EE37 for ; Mon, 5 Jun 2023 16:21:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234935AbjFEQVl (ORCPT ); Mon, 5 Jun 2023 12:21:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234801AbjFEQVg (ORCPT ); Mon, 5 Jun 2023 12:21:36 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB8FDE6; Mon, 5 Jun 2023 09:21:34 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id A1C676605840; Mon, 5 Jun 2023 17:21:31 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685982093; bh=LS7cN4RBxcl8sllo4Y3gVv2KC3BFqrCKLyuDQi01anc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dFrp470exFqNjDXip/2dVacgLH8+NGfi6s9aOb5c3Xd/NNA2cniQpYP6pqD4WvWKz 0UeBz67010w+WI7BcBKabhyDmxWIJrmk8wTInHuRzsk8rjLIkquECK3izIa+Y7ole+ V4JzirlMIqyy8T0fhbdZ31B0lQ+SnJPwtQAGfH7cAYDbS1A1dqn1Vljp7bZm0IwZ2U HEzTbNfYVLq5t59SelN2UnuxqtNwX4bDa05a8t0U1Hl2UzPOTioEBY4SQuvcSDB6J7 h1SeQ8BLKUhIixTN8IBiSGzadB3OxHB+tnl1c0JGx2zBWPBgUrsm0H1j6d6gkofwU9 Gi6owjuw6kdOg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger , Hans Verkuil Cc: AngeloGioacchino Del Regno , kernel@collabora.com, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Andrew-CT Chen , Mauro Carvalho Chehab , Tiffany Lin , Yunfei Dong , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH 4/6] media: mediatek: vcodec: Read HW active status from clock Date: Mon, 5 Jun 2023 12:20:28 -0400 Message-Id: <20230605162030.274395-5-nfraprado@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230605162030.274395-1-nfraprado@collabora.com> References: <20230605162030.274395-1-nfraprado@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Remove the requirement of a VDEC_SYS reg iospace. To achieve that, rely on the "active" clock being passed through the DT, and read its status during IRQ handling to check whether the HW is active. The old behavior is still present when reg-names aren't supplied, as to keep backward compatibility. Signed-off-by: Nícolas F. R. A. Prado --- .../mediatek/vcodec/mtk_vcodec_dec_drv.c | 59 +++++++++++++++---- .../mediatek/vcodec/mtk_vcodec_dec_hw.c | 20 +++++-- .../mediatek/vcodec/mtk_vcodec_dec_pm.c | 12 +++- .../platform/mediatek/vcodec/mtk_vcodec_drv.h | 1 + 4 files changed, 74 insertions(+), 18 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c index 9c652beb3f19..8038472fb67b 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "mtk_vcodec_drv.h" #include "mtk_vcodec_dec.h" @@ -38,22 +39,29 @@ static int mtk_vcodec_get_hw_count(struct mtk_vcodec_dev *dev) } } +static bool mtk_vcodec_is_hw_active(struct mtk_vcodec_dev *dev) +{ + u32 cg_status = 0; + + if (!dev->reg_base[VDEC_SYS]) + return __clk_is_enabled(dev->pm.vdec_active_clk); + + cg_status = readl(dev->reg_base[VDEC_SYS]); + return (cg_status & VDEC_HW_ACTIVE) == 0; +} + static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv) { struct mtk_vcodec_dev *dev = priv; struct mtk_vcodec_ctx *ctx; - u32 cg_status = 0; unsigned int dec_done_status = 0; void __iomem *vdec_misc_addr = dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG; ctx = mtk_vcodec_get_curr_ctx(dev, MTK_VDEC_CORE); - /* check if HW active or not */ - cg_status = readl(dev->reg_base[0]); - if ((cg_status & VDEC_HW_ACTIVE) != 0) { - mtk_v4l2_err("DEC ISR, VDEC active is not 0x0 (0x%08x)", - cg_status); + if (!mtk_vcodec_is_hw_active(dev)) { + mtk_v4l2_err("DEC ISR, VDEC active is not 0x0"); return IRQ_HANDLED; } @@ -82,6 +90,25 @@ static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev) { struct platform_device *pdev = dev->plat_dev; int reg_num, i; + struct resource *res; + bool no_vdecsys_reg = false; + static const char * const mtk_dec_reg_names[] = { + "misc", + "ld", + "top", + "cm", + "ad", + "av", + "pp", + "hwd", + "hwq", + "hwb", + "hwg" + }; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "misc"); + if (res) + no_vdecsys_reg = true; /* Sizeof(u32) * 4 bytes for each register base. */ reg_num = of_property_count_elems_of_size(pdev->dev.of_node, "reg", @@ -91,12 +118,22 @@ static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev) return -EINVAL; } - for (i = 0; i < reg_num; i++) { - dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i); - if (IS_ERR(dev->reg_base[i])) - return PTR_ERR(dev->reg_base[i]); + if (!no_vdecsys_reg) { + for (i = 0; i < reg_num; i++) { + dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i); + if (IS_ERR(dev->reg_base[i])) + return PTR_ERR(dev->reg_base[i]); - mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]); + mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]); + } + } else { + for (i = 0; i < reg_num; i++) { + dev->reg_base[i+1] = devm_platform_ioremap_resource_byname(pdev, mtk_dec_reg_names[i]); + if (IS_ERR(dev->reg_base[i+1])) + return PTR_ERR(dev->reg_base[i+1]); + + mtk_v4l2_debug(2, "reg[%d] base=%p", i+1, dev->reg_base[i+1]); + } } return 0; diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c index b753bf54ebd9..4e786821015d 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c @@ -11,6 +11,7 @@ #include #include #include +#include #include "mtk_vcodec_drv.h" #include "mtk_vcodec_dec.h" @@ -63,22 +64,29 @@ static int mtk_vdec_hw_prob_done(struct mtk_vcodec_dev *vdec_dev) return 0; } +static bool mtk_vcodec_is_hw_active(struct mtk_vdec_hw_dev *dev) +{ + u32 cg_status; + + if (!dev->reg_base[VDEC_HW_SYS]) + return __clk_is_enabled(dev->pm.vdec_active_clk); + + cg_status = readl(dev->reg_base[VDEC_HW_SYS]); + return (cg_status & VDEC_HW_ACTIVE) == 0; +} + static irqreturn_t mtk_vdec_hw_irq_handler(int irq, void *priv) { struct mtk_vdec_hw_dev *dev = priv; struct mtk_vcodec_ctx *ctx; - u32 cg_status; unsigned int dec_done_status; void __iomem *vdec_misc_addr = dev->reg_base[VDEC_HW_MISC] + VDEC_IRQ_CFG_REG; ctx = mtk_vcodec_get_curr_ctx(dev->main_dev, dev->hw_idx); - /* check if HW active or not */ - cg_status = readl(dev->reg_base[VDEC_HW_SYS]); - if (cg_status & VDEC_HW_ACTIVE) { - mtk_v4l2_err("vdec active is not 0x0 (0x%08x)", - cg_status); + if (!mtk_vcodec_is_hw_active(dev)) { + mtk_v4l2_err("vdec active is not 0x0"); return IRQ_HANDLED; } diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c index 777d445999e9..53e621965950 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c @@ -51,6 +51,9 @@ int mtk_vcodec_init_dec_clk(struct platform_device *pdev, struct mtk_vcodec_pm * clk_info->clk_name); return PTR_ERR(clk_info->vcodec_clk); } + + if (strcmp(clk_info->clk_name, "active") == 0) + pm->vdec_active_clk = clk_info->vcodec_clk; } return 0; @@ -84,6 +87,9 @@ static void mtk_vcodec_dec_clock_on(struct mtk_vcodec_pm *pm) dec_clk = &pm->vdec_clk; for (i = 0; i < dec_clk->clk_num; i++) { + if (strcmp(dec_clk->clk_info[i].clk_name, "active") == 0) + continue; + ret = clk_prepare_enable(dec_clk->clk_info[i].vcodec_clk); if (ret) { mtk_v4l2_err("clk_prepare_enable %d %s fail %d", i, @@ -104,8 +110,12 @@ static void mtk_vcodec_dec_clock_off(struct mtk_vcodec_pm *pm) int i; dec_clk = &pm->vdec_clk; - for (i = dec_clk->clk_num - 1; i >= 0; i--) + for (i = dec_clk->clk_num - 1; i >= 0; i--) { + if (strcmp(dec_clk->clk_info[i].clk_name, "active") == 0) + continue; + clk_disable_unprepare(dec_clk->clk_info[i].vcodec_clk); + } } static void mtk_vcodec_dec_enable_irq(struct mtk_vcodec_dev *vdec_dev, int hw_idx) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h index 9acab54fd650..180e74c69042 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h @@ -208,6 +208,7 @@ struct mtk_vcodec_pm { struct mtk_vcodec_clk vdec_clk; struct mtk_vcodec_clk venc_clk; struct device *dev; + struct clk *vdec_active_clk; }; /**