From patchwork Fri Jun 14 14:07:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 166814 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2111438ilk; Fri, 14 Jun 2019 07:09:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqzbYCtpByCr0tw8Q8f8xpirp2PExW96PpAWABOplirDxLRXawPb705n1difrm05AjJwoRxN X-Received: by 2002:a17:90a:2506:: with SMTP id j6mr11741284pje.129.1560521374233; Fri, 14 Jun 2019 07:09:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560521374; cv=none; d=google.com; s=arc-20160816; b=UwRhDykJaS0AJfI5+Ps14en9Li55xufg1bHHz1jrW0o2BJWmemwMGjasx3FQnlOKjR U706kb16HkL0EvmQetKmGRdB/tkTk8VKs292agcaWZfSQgwzoFMVxMafqDC3zvgc31Z3 Y5T4majuvIWcdIn8KZvWkC9zQ/iRgA2XhRSUNK5fORufLQVgAAZ3n9tBz8WXrVjd7nPN kg2LPk/fEM3CXhM3JQo74KqRyzPgXUt31oh67mg6zhb9+rkm7l5HkoU7oLl/M9i0di3Z o3hqealM2oiw51Tb8gkeTD62s1L2kLzW9LqS8mz8p8Rrk8+XuHo4apY9B0SN82dEVf7h VP7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=Okrq2jn1bGVWk0ID3KNHcuAnL1v0i/ZwRERnUFr2RQc=; b=DZbMZ9RiHHAAXLOyBXh3U8p4WZHJrsX+bD2twu06zPw9JeiCI5LvkASaa4fzolAAyI qjBhJQ4Eorwz/3rcHN1akghFjUcHWnb2DShcuyGw3mHw9XmMu3L//ksjpvLQVB6TySbl 26TTlsHotyjqPxa2ThVg7gMTlghOCXkSHKV2OgKEr3w0z6R0UakTo4kZlLepcL+flU3l OA0/a1PSSOvJaug5hzcD8AsEQQ2KXHQY9Ia6jeRt1W4LFvdH7T7oINeJ1bX4lARCCcHy smiLcwjkpgQZqvpQb0aUWvG1LqWU91Y9qsyEIme4niAiDlw1dVxuSI8CNFQtzmPlN0kZ C18A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y21si2518750pfe.116.2019.06.14.07.09.33; Fri, 14 Jun 2019 07:09:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728676AbfFNOJc (ORCPT + 16 others); Fri, 14 Jun 2019 10:09:32 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:48064 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728619AbfFNOJb (ORCPT ); Fri, 14 Jun 2019 10:09:31 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id C657F890C7430FEBB34A; Fri, 14 Jun 2019 22:09:29 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Fri, 14 Jun 2019 22:09:22 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , "John Garry" Subject: [PATCH v2 1/5] perf pmu: Fix uncore PMU alias list for ARM64 Date: Fri, 14 Jun 2019 22:07:59 +0800 Message-ID: <1560521283-73314-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560521283-73314-1-git-send-email-john.garry@huawei.com> References: <1560521283-73314-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In commit 292c34c10249 ("perf pmu: Fix core PMU alias list for X86 platform"), we fixed the issue of CPU events being aliased to uncore events. Fix this same issue for ARM64, since the said commit left the (broken) behaviour untouched for ARM64. Signed-off-by: John Garry --- tools/perf/util/pmu.c | 28 ++++++++++++---------------- 1 file changed, 12 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index f2eff272279b..7e7299fee550 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -709,9 +709,7 @@ static void pmu_add_cpu_aliases(struct list_head *head, struct perf_pmu *pmu) { int i; struct pmu_events_map *map; - struct pmu_event *pe; const char *name = pmu->name; - const char *pname; map = perf_pmu__find_map(pmu); if (!map) @@ -722,28 +720,26 @@ static void pmu_add_cpu_aliases(struct list_head *head, struct perf_pmu *pmu) */ i = 0; while (1) { + const char *cpu_name = is_arm_pmu_core(name) ? name : "cpu"; + struct pmu_event *pe = &map->table[i++]; + const char *pname = pe->pmu ? pe->pmu : cpu_name; - pe = &map->table[i++]; if (!pe->name) { if (pe->metric_group || pe->metric_name) continue; break; } - if (!is_arm_pmu_core(name)) { - pname = pe->pmu ? pe->pmu : "cpu"; - - /* - * uncore alias may be from different PMU - * with common prefix - */ - if (pmu_is_uncore(name) && - !strncmp(pname, name, strlen(pname))) - goto new_alias; + /* + * uncore alias may be from different PMU + * with common prefix + */ + if (pmu_is_uncore(name) && + !strncmp(pname, name, strlen(pname))) + goto new_alias; - if (strcmp(pname, name)) - continue; - } + if (strcmp(pname, name)) + continue; new_alias: pr_err("%s new_alias name=%s pe->name=%s\n", __func__, name, pe->name); From patchwork Fri Jun 14 14:08:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 166816 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2111608ilk; Fri, 14 Jun 2019 07:09:42 -0700 (PDT) X-Google-Smtp-Source: APXvYqxliwNNgNtVd6uBtknTQ09/cxMX8CjmbhR4Jkf/9pah5LTYVJvg0MsaFDAnBhAJpJ3nbWtP X-Received: by 2002:a63:6157:: with SMTP id v84mr35306739pgb.36.1560521382083; Fri, 14 Jun 2019 07:09:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560521382; cv=none; d=google.com; s=arc-20160816; b=qqDD0VphO7I4ZZeoSzvKpbRNzogLSLW9qac9oebUJyedqlU5iPxk2IpBwL8spg+09v id+ZtWw8E1fVoh1B+XU8o5hlxMn16SfXGpQA2bo5Gg2YGWYRKwjN2Fszv9CHom0B9hOs KHE6BjkZdrN6oirT0gB3fgvRkyLQigiOJsHvzN5wVDfe5fu1wJLdWHBw/3IOXPo6nuW0 kItPuvfODxMe86eYgvoBBeaIravwfclTavAxee8bsq+nc34ciYy/zMVecwVuHmYK8lIc DmbbT9K1tt126NE9+1JaeBxT/QtBXJeIB3Dwge4QCgcVetrVKdxaR1rvzSBuQh0sIIa3 DbgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=qyn936JVCBE9ubzmo2vBtGkdBfg4MTm0PJp8dvQUEi0=; b=Szp1VSAdyFaMlyNtU8URNea66Cip3OnUJKeYofiLwrTrrW4nwzu23vgdIy3Axs4x9E 3Xo57BpVToFzOdF8LUgiHssoeeQPP+LDOsNrtnxxBuLNHZDO6mryPU9cQOOM7xTf1obD B9difE2L7H6Ge1J/lM+ObrRgwn6u2tMh0AYk3+2Typdl6NNZUN5S9AZwG2rDGM1r2ftX 6n3pjHQfKsV8Tbr1vVlNMHOyiGjIeJ1Q9pCqz6PGBe1T4f0J6x/soZu8I+EEHrzi4yJ7 a6o1w8esgWr3ub7AsTzQfSfyn3xycOjWoBkKydq6SVcorRTL6g4/RaVkcCGvD+gSHhG9 acCA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a10si2523399pff.277.2019.06.14.07.09.41; Fri, 14 Jun 2019 07:09:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728804AbfFNOJg (ORCPT + 16 others); Fri, 14 Jun 2019 10:09:36 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:48062 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728616AbfFNOJd (ORCPT ); Fri, 14 Jun 2019 10:09:33 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id E1D6B358CEDAD55C03A2; Fri, 14 Jun 2019 22:09:29 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Fri, 14 Jun 2019 22:09:23 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , "John Garry" Subject: [PATCH v2 2/5] perf pmu: Support more complex PMU event aliasing Date: Fri, 14 Jun 2019 22:08:00 +0800 Message-ID: <1560521283-73314-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560521283-73314-1-git-send-email-john.garry@huawei.com> References: <1560521283-73314-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The jevent "Unit" field is used for uncore PMU alias definition. The form uncore_pmu_example_X is supported, where "X" is a wildcard, to support multiple instances of the same PMU in a system. Unfortunately this format not suitable for all uncore PMUs; take the Hisi DDRC uncore PMU for example, where the name is in the form hisi_scclX_ddrcY. For the current jevent parsing, we would be required to hardcode an uncore alias translation for each possible value of X. This is not scalable. Instead, add support for "Unit" field in the form "hisi_sccl,ddrc", where we can match by hisi_scclX and ddrcY. Tokens in Unit field are delimited by ','. Signed-off-by: John Garry --- tools/perf/util/pmu.c | 39 ++++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 7e7299fee550..bc71c60589b5 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -700,6 +700,39 @@ struct pmu_events_map *perf_pmu__find_map(struct perf_pmu *pmu) return map; } +static bool pmu_uncore_alias_match(const char *pmu_name, const char *name) +{ + char *tmp, *tok, *str; + bool res; + + str = strdup(pmu_name); + if (!str) + return false; + + /* + * uncore alias may be from different PMU with common + * prefix or matching tokens. + */ + tok = strtok_r(str, ",", &tmp); + if (strncmp(pmu_name, tok, strlen(tok))) { + res = false; + goto out; + } + + for (; tok; name += strlen(tok), tok = strtok_r(NULL, ",", &tmp)) { + name = strstr(name, tok); + if (!name) { + res = false; + goto out; + } + } + + res = true; +out: + free(str); + return res; +} + /* * From the pmu_events_map, find the table of PMU events that corresponds * to the current running CPU. Then, add all PMU events from that table @@ -730,12 +763,8 @@ static void pmu_add_cpu_aliases(struct list_head *head, struct perf_pmu *pmu) break; } - /* - * uncore alias may be from different PMU - * with common prefix - */ if (pmu_is_uncore(name) && - !strncmp(pname, name, strlen(pname))) + pmu_uncore_alias_match(pname, name)) goto new_alias; if (strcmp(pname, name)) From patchwork Fri Jun 14 14:08:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 166819 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2111825ilk; Fri, 14 Jun 2019 07:09:53 -0700 (PDT) X-Google-Smtp-Source: APXvYqxk1rT65jMvMk+Jl9/f/ivcvZzgTsEPzZCKCZrDCvWXIeawhdpYbn6fQOThVuyBgoYhSKt0 X-Received: by 2002:a17:90a:2562:: with SMTP id j89mr11341273pje.123.1560521393770; Fri, 14 Jun 2019 07:09:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560521393; cv=none; d=google.com; s=arc-20160816; b=MYU0mlWWPR3Rr8+zD+2JMOYsssYOerr8D/rFr4TVtWBYIgllAfiYqEmse3bdJC5KRS M57Cj2JE4739oVX8GCdHGcM8JJZjTeh486ERGz2onl1Q4U679EZzlIQV4QdzLeWpRjQ8 idN9J+vHQSoG0qruP+z6xn2NsqU0lnZ+ueO5yswN83XGTT9Nn6dY1ZLmNoHS69FW8MA7 qOZhZtQf6Z4LLzzXhuEyqom2iF8JejAjImjZ8TXFSq68NFe06eJEWbKT67P7SVTodcyr w/4CAPNq7yWMLviCzflIu4gwXxctRHzNP1VmT4l5Q7joZ2mbuIA8alMDDyprEeoLJH2a htgQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=XM8mb1mUb95Nw9ejnd5H4HAkHgKC/7DSu3qcyCQgMSQ=; b=qMgqhC7740U51ghT9mMaKwvg50qvrAXYEiR7IjZtdsw+fVSfuaWVeJPCXPRMk3FFcB DEsugks+NK+wAfCY9BHpNHy6tjbN27SOpnJSOEoEtXUv8criBNnRdrdepxucl9KynRmb jbzbyItBKqYsgiyU0Asx44os9AcO4QVyyHkG1VHRq8NLopYJfmZw83VHvsdrNXX8qVf9 /eg7XiUESOT6fJCgrIFeMl5r4TMzSBgxfk+brS0jJ+2O1NqAOa86GZUwU2zRK8Qxw2kz 8xlK4to6j25ij1pxNIQIGOwCwKG30ZQZJs+l6TjrHt6stDMLPbOe/NgCa5Ec8CLJtpRs NJKg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x140si2705009pgx.376.2019.06.14.07.09.53; Fri, 14 Jun 2019 07:09:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728881AbfFNOJv (ORCPT + 16 others); Fri, 14 Jun 2019 10:09:51 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:48068 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727382AbfFNOJd (ORCPT ); Fri, 14 Jun 2019 10:09:33 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id CF56D180660588AC652B; Fri, 14 Jun 2019 22:09:29 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Fri, 14 Jun 2019 22:09:23 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , "John Garry" Subject: [PATCH v2 3/5] perf jevents: Add support for Hisi hip08 DDRC PMU aliasing Date: Fri, 14 Jun 2019 22:08:01 +0800 Message-ID: <1560521283-73314-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560521283-73314-1-git-send-email-john.garry@huawei.com> References: <1560521283-73314-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for Hisi hip08 DDRC PMU event aliasing. We can now do something like this: $perf list [snip] uncore ddrc: uncore_hisi_ddrc.act_cmd [DDRC active commands. Unit: hisi_sccl,ddrc] uncore_hisi_ddrc.flux_rcmd [DDRC read commands. Unit: hisi_sccl,ddrc] uncore_hisi_ddrc.flux_wcmd [DDRC write commands. Unit: hisi_sccl,ddrc] uncore_hisi_ddrc.flux_wr [DDRC precharge commands. Unit: hisi_sccl,ddrc] uncore_hisi_ddrc.rnk_chg [DDRC rank commands. Unit: hisi_sccl,ddrc] uncore_hisi_ddrc.rw_chg [DDRC read and write changes. Unit: hisi_sccl,ddrc] $sudo ./perf stat -e uncore_hisi_ddrc.flux_rcmd --no-merge sleep 1 Performance counter stats for 'system wide': 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl1_ddrc0] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl3_ddrc1] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl5_ddrc2] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl7_ddrc3] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl5_ddrc0] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl7_ddrc1] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl1_ddrc3] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl1_ddrc1] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl3_ddrc2] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl5_ddrc3] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl3_ddrc0] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl5_ddrc1] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl7_ddrc2] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl7_ddrc0] 20,421 uncore_hisi_ddrc.flux_rcmd [hisi_sccl1_ddrc2] 0 uncore_hisi_ddrc.flux_rcmd [hisi_sccl3_ddrc3] 1.001559011 seconds time elapsed The kernel driver is in drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c Signed-off-by: John Garry --- .../arm64/hisilicon/hip08/uncore-ddrc.json | 44 +++++++++++++++++++ tools/perf/pmu-events/jevents.c | 1 + 2 files changed, 45 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json -- 2.17.1 diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json new file mode 100644 index 000000000000..0d1556fcdffe --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json @@ -0,0 +1,44 @@ +[ + { + "EventCode": "0x02", + "EventName": "uncore_hisi_ddrc.flux_wcmd", + "BriefDescription": "DDRC write commands", + "PublicDescription": "DDRC write commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x03", + "EventName": "uncore_hisi_ddrc.flux_rcmd", + "BriefDescription": "DDRC read commands", + "PublicDescription": "DDRC read commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x04", + "EventName": "uncore_hisi_ddrc.flux_wr", + "BriefDescription": "DDRC precharge commands", + "PublicDescription": "DDRC precharge commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x05", + "EventName": "uncore_hisi_ddrc.act_cmd", + "BriefDescription": "DDRC active commands", + "PublicDescription": "DDRC active commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x06", + "EventName": "uncore_hisi_ddrc.rnk_chg", + "BriefDescription": "DDRC rank commands", + "PublicDescription": "DDRC rank commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x07", + "EventName": "uncore_hisi_ddrc.rw_chg", + "BriefDescription": "DDRC read and write changes", + "PublicDescription": "DDRC read and write changes", + "Unit": "hisi_sccl,ddrc", + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 58f77fd0f59f..cf9a60333554 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -236,6 +236,7 @@ static struct map { { "CPU-M-CF", "cpum_cf" }, { "CPU-M-SF", "cpum_sf" }, { "UPI LL", "uncore_upi" }, + { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, {} }; 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[209.132.180.67]) by mx.google.com with ESMTP id a10si2523399pff.277.2019.06.14.07.09.44; Fri, 14 Jun 2019 07:09:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728853AbfFNOJn (ORCPT + 16 others); Fri, 14 Jun 2019 10:09:43 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:18575 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728764AbfFNOJg (ORCPT ); Fri, 14 Jun 2019 10:09:36 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id D5F4B8F76EC02D1F2677; Fri, 14 Jun 2019 22:09:34 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Fri, 14 Jun 2019 22:09:23 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , "John Garry" Subject: [PATCH v2 4/5] perf jevents: Add support for Hisi hip08 HHA PMU aliasing Date: Fri, 14 Jun 2019 22:08:02 +0800 Message-ID: <1560521283-73314-5-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560521283-73314-1-git-send-email-john.garry@huawei.com> References: <1560521283-73314-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for Hisi hip08 HHA PMU aliasing. The kernel driver is in drivers/perf/hisilicon/hisi_uncore_hha_pmu.c Signed-off-by: John Garry --- .../arm64/hisilicon/hip08/uncore-hha.json | 51 +++++++++++++++++++ tools/perf/pmu-events/jevents.c | 1 + 2 files changed, 52 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json -- 2.17.1 diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json new file mode 100644 index 000000000000..447d3064de90 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json @@ -0,0 +1,51 @@ +[ + { + "EventCode": "0x00", + "EventName": "uncore_hisi_hha.rx_ops_num", + "BriefDescription": "The number of all operations received by the HHA", + "PublicDescription": "The number of all operations received by the HHA", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x01", + "EventName": "uncore_hisi_hha.rx_outer", + "BriefDescription": "The number of all operations received by the HHA from another socket", + "PublicDescription": "The number of all operations received by the HHA from another socket", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x02", + "EventName": "uncore_hisi_hha.rx_sccl", + "BriefDescription": "The number of all operations received by the HHA from another SCCL in this socket", + "PublicDescription": "The number of all operations received by the HHA from another SCCL in this socket", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x1c", + "EventName": "uncore_hisi_hha.rd_ddr_64b", + "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes", + "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 64bytes", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x1d", + "EventName": "uncore_hisi_hha.wr_dr_64b", + "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes", + "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x1e", + "EventName": "uncore_hisi_hha.rd_ddr_128b", + "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes", + "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x1f", + "EventName": "uncore_hisi_hha.wr_ddr_128b", + "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes", + "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes", + "Unit": "hisi_sccl,hha", + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index cf9a60333554..909e53e3b5bd 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -237,6 +237,7 @@ static struct map { { "CPU-M-SF", "cpum_sf" }, { "UPI LL", "uncore_upi" }, { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, + { "hisi_sccl,hha", "hisi_sccl,hha" }, {} }; From patchwork Fri Jun 14 14:08:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 166818 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2111714ilk; Fri, 14 Jun 2019 07:09:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqwAiHlHLJRgXf5JncSJekJq+3uSVfCKa13oCtn6VrDDVtU8q1tXPOuNyxUQTa1V9poJj78j X-Received: by 2002:a17:90a:cf0d:: with SMTP id h13mr10662911pju.63.1560521387358; Fri, 14 Jun 2019 07:09:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560521387; cv=none; d=google.com; s=arc-20160816; b=zvj04yQm2DfvdaY3MErVovk3XeogsRMmOz7qDOLZsPacLnddBuh4Bsj+ejxE/uk3ux NNzsHiDqPC++/Buo0KIIIcS6Nmupbo0t3P66V2s9wDMuqZKJUleSygE9IYQcfqHNkfS3 1UEwB0mx/6mWUfmn5TgaAZIbJl8fQu8novtor6L6z8tfJ1n4+csUiC7NwcWx3gFzEuB/ imI/CLv7YeO70OF72mQTzi0pfcUMRdLUSm0fsTIRW3PtsUv4Uj9R8L1GL/kEzyfnd4th bIdvFp9RvnCxs7uwB2+besu+lm8ctdag7PGVxUUoQYco1Y9tRbFt5a3dUyVVKue06HgL jU5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=TI25TindjYvlLNLnWCSEHkmETJBVjxzm1GU/9+TbXHc=; b=qg0xladOp8h6X+r5Yw0I//hBYU6m85anF6KoBcI++H8S8uraqFX7XeHCwep/sSJiPm g1xb/DlftKyqtzaivh9Y7NxK5JzM1I4AWHdXDVIZ2ZE6c86T9WwgW3UCvAIIYH08LT7D TItD94bvA6RnYblopFK9OvSD5DSL98jfjNZ2CoH3I2ZVhEO2AfdeO2ZaYkKRjddmIaza JTzkWxmb5dzQYoeSie8UBoiAwQnBPJ4heABzmE8H1ZnrtEW9Wnw/HRYZMUPCWo0jdDOU fIXJBrWttseeheH8paDOnIbiKIobN3Xxe2oNsYRjI9AyZm8HqnUV4wHG0N6HVvyMBejF A28w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a10si2523399pff.277.2019.06.14.07.09.46; Fri, 14 Jun 2019 07:09:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728865AbfFNOJp (ORCPT + 16 others); Fri, 14 Jun 2019 10:09:45 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:18574 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728762AbfFNOJg (ORCPT ); Fri, 14 Jun 2019 10:09:36 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id CBC109D5139CFB18DE92; Fri, 14 Jun 2019 22:09:34 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Fri, 14 Jun 2019 22:09:24 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , "John Garry" Subject: [PATCH v2 5/5] perf jevents: Add support for Hisi hip08 L3C PMU aliasing Date: Fri, 14 Jun 2019 22:08:03 +0800 Message-ID: <1560521283-73314-6-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560521283-73314-1-git-send-email-john.garry@huawei.com> References: <1560521283-73314-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for Hisi hip08 L3C PMU aliasing. The kernel driver is in drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c Signed-off-by: John Garry --- .../arm64/hisilicon/hip08/uncore-l3c.json | 37 +++++++++++++++++++ tools/perf/pmu-events/jevents.c | 1 + 2 files changed, 38 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json -- 2.17.1 diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json new file mode 100644 index 000000000000..ca48747642e1 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json @@ -0,0 +1,37 @@ +[ + { + "EventCode": "0x00", + "EventName": "uncore_hisi_l3c.rd_cpipe", + "BriefDescription": "Total read accesses", + "PublicDescription": "Total read accesses", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x01", + "EventName": "uncore_hisi_l3c.wr_cpipe", + "BriefDescription": "Total write accesses", + "PublicDescription": "Total write accesses", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x02", + "EventName": "uncore_hisi_l3c.rd_hit_cpipe", + "BriefDescription": "Total read hits", + "PublicDescription": "Total read hits", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x03", + "EventName": "uncore_hisi_l3c.wr_hit_cpipe", + "BriefDescription": "Total write hits", + "PublicDescription": "Total write hits", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x04", + "EventName": "uncore_hisi_l3c.victim_num", + "BriefDescription": "l3c precharge commands", + "PublicDescription": "l3c precharge commands", + "Unit": "hisi_sccl,l3c", + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 909e53e3b5bd..7d241efd03de 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -238,6 +238,7 @@ static struct map { { "UPI LL", "uncore_upi" }, { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, { "hisi_sccl,hha", "hisi_sccl,hha" }, + { "hisi_sccl,l3c", "hisi_sccl,l3c" }, {} };