From patchwork Wed Jun 12 07:54:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 166520 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp3361735ilk; Wed, 12 Jun 2019 00:55:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqyPw8/WYrf7zNbA0nZCC0kdWEva1+1w/mkiizJplwiPuxtDl0I4GuMrUrOSPHUYAo6uSd1C X-Received: by 2002:a63:3008:: with SMTP id w8mr24344373pgw.11.1560326118822; Wed, 12 Jun 2019 00:55:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560326118; cv=none; d=google.com; s=arc-20160816; b=CzGXdCt57G2Lr+944krZ8blTQ4fmnLXLHP5XDEmw/cskwwyR2+QeqJm5p8r6neqoSw 1f/jyQ5OBhHwscyjl/ddv7kwUFQE6DmYhl9L1wxzfm26C9ubDgTshZ8yCvnlmQtbdnzZ 0NAeCCLHHdZ138feg2kmOrfSeV7vcpSBIb4tua/KbIfvoreT/xEa1mJ8Hu8j+DOvWfNz pw1WWku/jSUkwJyctSXDs4PhFeD97RCzcRyGs6I0JTM5+jwZiIEb7yVmzZJ4+kfKRSCF Iu+KF97L8eDWVrb3ibE2880SC/JXLT2ymJcHXaJ9Wy17UFtW1rToThGGOet1/KqbRNDh GhxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ddmyf9yTEwlfHCzubut1+DzdJc/PcrZsJL5uTZc4yfE=; b=zYmBYAOpGu0P6vj7RWjOqVSuyMMv/8XqTFbMxzqOSSmClw9XdCHrGskcR2FMjeE/5m 033/4EfzRgiWiZYabQB3j9XB+xA3IidvVMrGtkjZnyeZ2eQZCFGAPUzUu8Qd5wknEEIJ dHwfWBm94Pdmr/tlAfBPH8oODa5IBTWobVn7FmDOMlzQ0Uiq28AzPayo36W1BDHNLHuI r33MOteNZMb5xivrMFs6D3xVMgAIMpCCpLkGZOLfPdhvlmZy6IpEOaRytnaCHrRm9gVg 4rE2evd99MmH2mZ49qn3HlJ3FidB6rHG0uJoBgnaoCyHOukV1UUzH5SnlJUcToPxpS2/ U4Gg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=naECvcLA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d12si4593719pjw.16.2019.06.12.00.55.18; Wed, 12 Jun 2019 00:55:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=naECvcLA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731591AbfFLHzR (ORCPT + 30 others); Wed, 12 Jun 2019 03:55:17 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:33021 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725791AbfFLHzQ (ORCPT ); Wed, 12 Jun 2019 03:55:16 -0400 Received: by mail-pl1-f194.google.com with SMTP id c14so15081plo.0 for ; Wed, 12 Jun 2019 00:55:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ddmyf9yTEwlfHCzubut1+DzdJc/PcrZsJL5uTZc4yfE=; b=naECvcLA5b+ikhmyDk1YLXvhPLPCup9xIr0OEPfNZq/YqaOQKD1US6XtcnKca3PyrX bS4UZiBYiQmNmGgQ0PHd0Pc5zsJFZJte92oiMsouZ/6hZL5caUyz5JVsLCSMfcMwekA5 W8GFIeuttEZGufRFlCDfOWDY6meAbjQfHmhtnqmKMl97G8fpOsIGpMdAr2Sx2or9umrH HGKJLY2DI7pkC2v9OSawkWU+Q8oq9CyE39MCKWWLqQEW17vncFA7PjIeEAyeF5vORafF +eTbVWyCkWrnw7G2YeduVn3IGEasK2w9lxkHgo8d5n/wtLwv0f3frqGhWVK86HxSmRZ0 UgzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ddmyf9yTEwlfHCzubut1+DzdJc/PcrZsJL5uTZc4yfE=; b=jMZa3CeGSaWwg1atYA86OGtHmgNkXgDkhAqtxgN23UnTD55MQa4DqKZa0fMaPwRLoh Z53V4bCUyJVrtCC4Sn51QanciDtPEB4toPhbp7Lpl9Q7khq6/PjEEM4XISowh4OT0nkj q+VqJv8VD0QDMOZ9mu/sfedE81WbOD4e17HOF4EpCGLIlAZ0IN1hp1tYr7IiQB9HH7Ji 8eiwyimW0kBitLxfmL8mP0y+uF+0ycVm2BQeulp4gwkIDDtXrtMSIJzprwrOvLb721mq iHCXg7skxNNV+BrVcAxC3fL/+fd9L2BU4ZfUvM7mZUDDLo2wGQpB9+nwcRf09pil5cpT wacA== X-Gm-Message-State: APjAAAWX6mSucnE+9WI0KUSqfsNJ7pU5fhUj1xQS4feEC8VoKdDcMvut ScLZ30Y1chnJ7jbr8nRBdUNQ X-Received: by 2002:a17:902:b905:: with SMTP id bf5mr80896870plb.155.1560326114920; Wed, 12 Jun 2019 00:55:14 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:894:d456:15b5:9ca9:e3ec:c06a]) by smtp.gmail.com with ESMTPSA id b15sm16846399pfi.141.2019.06.12.00.55.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Jun 2019 00:55:14 -0700 (PDT) From: Manivannan Sadhasivam To: mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, robh+dt@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, loic.pallardy@st.com, Manivannan Sadhasivam Subject: [PATCH v4 2/4] dt-bindings: arm: stm32: Convert STM32 SoC bindings to DT schema Date: Wed, 12 Jun 2019 13:24:49 +0530 Message-Id: <20190612075451.8643-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190612075451.8643-1-manivannan.sadhasivam@linaro.org> References: <20190612075451.8643-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This commit converts STM32 SoC bindings to DT schema using jsonschema. Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/arm/stm32/stm32.txt | 10 ------- .../devicetree/bindings/arm/stm32/stm32.yaml | 29 +++++++++++++++++++ 2 files changed, 29 insertions(+), 10 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/stm32/stm32.txt create mode 100644 Documentation/devicetree/bindings/arm/stm32/stm32.yaml -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.txt b/Documentation/devicetree/bindings/arm/stm32/stm32.txt deleted file mode 100644 index 6808ed9ddfd5..000000000000 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.txt +++ /dev/null @@ -1,10 +0,0 @@ -STMicroelectronics STM32 Platforms Device Tree Bindings - -Each device tree must specify which STM32 SoC it uses, -using one of the following compatible strings: - - st,stm32f429 - st,stm32f469 - st,stm32f746 - st,stm32h743 - st,stm32mp157 diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml new file mode 100644 index 000000000000..f53dc0f2d7b3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/stm32/stm32.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 Platforms Device Tree Bindings + +maintainers: + - Alexandre Torgue + +properties: + compatible: + oneOf: + - items: + - const: st,stm32f429 + + - items: + - const: st,stm32f469 + + - items: + - const: st,stm32f746 + + - items: + - const: st,stm32h743 + + - items: + - const: st,stm32mp157 +... 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[209.132.180.67]) by mx.google.com with ESMTP id 66si5781458plc.85.2019.06.12.00.55.24; Wed, 12 Jun 2019 00:55:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DyFfgQQE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731608AbfFLHzX (ORCPT + 30 others); Wed, 12 Jun 2019 03:55:23 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:40129 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725791AbfFLHzV (ORCPT ); Wed, 12 Jun 2019 03:55:21 -0400 Received: by mail-pl1-f196.google.com with SMTP id a93so6297864pla.7 for ; Wed, 12 Jun 2019 00:55:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Fl90wvGVk9jQf/e3ED2nkXc10vHdjJ0BRJ8wEykJJm4=; b=DyFfgQQEx33mWJYiam6MYxvlG5nNkiPk4WCy+71VVasj+drxJg4JufGNFag39gfBEH zSr0p6ZySEs9Vb4s9fSruFnjk083UoQt1dAJ4v9r36BI/G4+w6wc6YDXy8MznwFvb6PI xzXGKBOgdDXnJ6KvOtldHLy7rk0UPyZ/Ft0P8nTKlNScfLIYyaBJhBdneF3HNjOtP5Dw J6CAweQoC3TLOnsXB9kf9xDoMJQKV8fdD2/AOPlBBy8PnfnoUFUrNt4PZ4G0cSrX/2BG 1p34vLC0YZAaptN62xEiP6S45+MFJgjIVD2HV14gVazd9qNgNEjFwswjK/vwsWG+xD0L vgMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Fl90wvGVk9jQf/e3ED2nkXc10vHdjJ0BRJ8wEykJJm4=; b=pYIKmuu2InFQ0WFgLDLfYR6YZQwJCRkewhHoDvZgmoPI0xHTIMTVCzLpJqpVaIji6b DPinxj3/bc+I+JXBvkI6NNn/R1eIMUDgckv9+cD3Qm52vUCvQQ8Re7PMEXBrSlBzqxCM IfohjqVzre3S9inKVoFlUVIqaDVMK6Uelq6RadKm4E/72KfsHUE/9K4em93rubzMOsG1 dN9cx0hffer3obwSoe2opILxpsnvle7AX0ND8SWXMqf75nZQUMRcQPuqRDrqi6yUjv2J gwP2Das/IXCz4Su5bu2gzqGMLQDzzMaCkXcy9ZcTeyeEvrnY5tLHSWRyuRjXpnF1LgkU MU+A== X-Gm-Message-State: APjAAAUUoufRxwmclyZzq6a8bAKW54Rc5s6ZNNkf+nkryA6GrXUnquYo vmELla+iW+akYykQFUcmVx0w X-Received: by 2002:a17:902:61:: with SMTP id 88mr3378053pla.50.1560326121013; Wed, 12 Jun 2019 00:55:21 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:894:d456:15b5:9ca9:e3ec:c06a]) by smtp.gmail.com with ESMTPSA id b15sm16846399pfi.141.2019.06.12.00.55.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Jun 2019 00:55:20 -0700 (PDT) From: Manivannan Sadhasivam To: mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, robh+dt@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, loic.pallardy@st.com, Manivannan Sadhasivam Subject: [PATCH v4 3/4] dt-bindings: arm: stm32: Document Avenger96 devicetree binding Date: Wed, 12 Jun 2019 13:24:50 +0530 Message-Id: <20190612075451.8643-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190612075451.8643-1-manivannan.sadhasivam@linaro.org> References: <20190612075451.8643-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This commit documents Avenger96 devicetree binding based on STM32MP157 SoC. Reviewed-by: Rob Herring Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index f53dc0f2d7b3..4d194f1eb03a 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -25,5 +25,7 @@ properties: - const: st,stm32h743 - items: + - enum: + - arrow,stm32mp157a-avenger96 # Avenger96 - const: st,stm32mp157 ... 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[209.132.180.67]) by mx.google.com with ESMTP id j3si15362343pff.101.2019.06.12.00.55.29; Wed, 12 Jun 2019 00:55:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yvSF1zZk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731624AbfFLHz3 (ORCPT + 30 others); Wed, 12 Jun 2019 03:55:29 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:47057 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726956AbfFLHz1 (ORCPT ); Wed, 12 Jun 2019 03:55:27 -0400 Received: by mail-pf1-f196.google.com with SMTP id 81so9142200pfy.13 for ; Wed, 12 Jun 2019 00:55:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dX8ayxbG6dv3ymS6EHBWk6+IbbfEAXYHv1SHsYeWqgY=; b=yvSF1zZk6pvNg3yFSmYEkBkETtB1a1JUR6L7bc1OTd/8jnUDx8NpWPT+rMvSSxmler bAa3EkGpAMX/kK/42QdaOAs0fZoppiIq5RbF0NdfvKZt4tu/cVvpB2NmsQiv2TIp1YAs bjHEbIPH1T2yhCQTobs8pQpHJxCYgZBQTuiFdLJLs6N/bv9MHC3LstILSi7dH+SvrUZN IuVUCuEC2db48RsElxYwBeIbSM2kqmPsNIeImGzlgPuaOjFnqMARqk6e62uk42LsUiwb vCWlA3zMDijl5Kz44kxGMPxD+BtjOJ6TOffTTsj/BwA+6v90GgDJRTnuDUMWnEzqvYbb +ylA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dX8ayxbG6dv3ymS6EHBWk6+IbbfEAXYHv1SHsYeWqgY=; b=FtdiQVO+M8+991FyjQvN6pGm6PNDIQnACszny4sMM0ISn3bRK0bAHokMJsVt4VquWG bWEMoJ+o0Fmxo35GzU/YIYS/+fVTeq2PoXNx1cI/hc1xXnFpHEbaozfdS2Mb/VnLFikC /scyMAlOjSt8/R05vf+bzCagxm0WcPRRXIGsYkLSXOaBqkV4PaNb4PqT8aMOPtTkdjhe TTpT238aTYQXaNguf7nWp7YxOThHrCs0oYhFpkHkLVzEBOgyZpABtLzZkcEev4uYUK3X +Y6xHclgyTpm17TfFuY3t87qWNSezRsIuTD1RbJmJ5F1/KqXlJIz3vbQTGNC2SiKo9uu vYVA== X-Gm-Message-State: APjAAAUiPtRWoVcPHdkbHVlFGu1+onnXpPshz2+DhPJpxhfdUshTSP0r Iz3ta05L47mRyWAoPF3MahK1 X-Received: by 2002:a65:668e:: with SMTP id b14mr19917390pgw.407.1560326126600; Wed, 12 Jun 2019 00:55:26 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:894:d456:15b5:9ca9:e3ec:c06a]) by smtp.gmail.com with ESMTPSA id b15sm16846399pfi.141.2019.06.12.00.55.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Jun 2019 00:55:26 -0700 (PDT) From: Manivannan Sadhasivam To: mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, robh+dt@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, loic.pallardy@st.com, Manivannan Sadhasivam Subject: [PATCH v4 4/4] ARM: dts: Add Avenger96 devicetree support based on STM32MP157A Date: Wed, 12 Jun 2019 13:24:51 +0530 Message-Id: <20190612075451.8643-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190612075451.8643-1-manivannan.sadhasivam@linaro.org> References: <20190612075451.8643-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add devicetree support for Avenger96 board based on STM32MP157A MPU from ST Micro. This board is one of the 96Boards Consumer Edition board from Arrow Electronics and has the following features: SoC: STM32MP157AAC PMIC: STPMIC1A RAM: 1024 Mbyte @ 533MHz Storage: eMMC v4.51: 8 Gbyte microSD Socket: UHS-1 v3.01 Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac Bluetooth®v4.2 (BR/EDR/BLE) USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4 LED: 4x User LED, 1x WiFi LED, 1x BT LED More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/stm32mp157a-avenger96.dts | 321 ++++++++++++++++++++ 2 files changed, 322 insertions(+) create mode 100644 arch/arm/boot/dts/stm32mp157a-avenger96.dts -- 2.17.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index dab2914fa293..918c85c227b5 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -975,6 +975,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32746g-eval.dtb \ stm32h743i-eval.dtb \ stm32h743i-disco.dtb \ + stm32mp157a-avenger96.dtb \ stm32mp157a-dk1.dtb \ stm32mp157c-dk2.dtb \ stm32mp157c-ed1.dtb \ diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts new file mode 100644 index 000000000000..9d00be78010f --- /dev/null +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved + * Author: Manivannan Sadhasivam + */ + +/dts-v1/; + +#include "stm32mp157c.dtsi" +#include "stm32mp157-pinctrl.dtsi" +#include +#include + +/ { + model = "Arrow Electronics STM32MP157A Avenger96 board"; + compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157"; + + aliases { + ethernet0 = ðernet0; + mmc0 = &sdmmc1; + serial0 = &uart4; + serial1 = &uart7; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x40000000>; + }; + + led { + compatible = "gpio-leds"; + led1 { + label = "green:user1"; + gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + + led2 { + label = "green:user2"; + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + + led3 { + label = "green:user3"; + gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc1"; + default-state = "off"; + }; + + led4 { + label = "green:user3"; + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "none"; + default-state = "off"; + panic-indicator; + }; + + led5 { + label = "yellow:wifi"; + gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + led6 { + label = "blue:bt"; + gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "bluetooth-power"; + default-state = "off"; + }; + }; +}; + +ðernet0 { + status = "okay"; + pinctrl-0 = <ðernet0_rgmii_pins_a>; + pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>; + pinctrl-names = "default", "sleep"; + phy-mode = "rgmii"; + max-speed = <1000>; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@7 { + reg = <7>; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_b>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_b1 &i2c2_pins_b2>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; + + pmic: stpmic@33 { + compatible = "st,stpmic1"; + reg = <0x33>; + interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + status = "okay"; + + st,main-control-register = <0x04>; + st,vin-control-register = <0xc0>; + st,usb-control-register = <0x30>; + + regulators { + compatible = "st,stpmic1-regulators"; + + ldo1-supply = <&v3v3>; + ldo2-supply = <&v3v3>; + ldo3-supply = <&vdd_ddr>; + ldo5-supply = <&v3v3>; + ldo6-supply = <&v3v3>; + pwr_sw1-supply = <&bst_out>; + pwr_sw2-supply = <&bst_out>; + + vddcore: buck1 { + regulator-name = "vddcore"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd_ddr: buck2 { + regulator-name = "vdd_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd: buck3 { + regulator-name = "vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + st,mask_reset; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + v3v3: buck4 { + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-over-current-protection; + regulator-initial-mode = <0>; + }; + + vdda: ldo1 { + regulator-name = "vdda"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + interrupts = ; + interrupt-parent = <&pmic>; + }; + + v2v8: ldo2 { + regulator-name = "v2v8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + interrupts = ; + interrupt-parent = <&pmic>; + }; + + vtt_ddr: ldo3 { + regulator-name = "vtt_ddr"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + regulator-over-current-protection; + }; + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + interrupts = ; + interrupt-parent = <&pmic>; + }; + + vdd_sd: ldo5 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-boot-on; + }; + + v1v8: ldo6 { + regulator-name = "v1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-enable-ramp-delay = <300000>; + }; + + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; + regulator-over-current-protection; + }; + + bst_out: boost { + regulator-name = "bst_out"; + interrupts = ; + interrupt-parent = <&pmic>; + }; + + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-active-discharge; + }; + + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-active-discharge; + }; + }; + + onkey { + compatible = "st,stpmic1-onkey"; + interrupts = , ; + interrupt-names = "onkey-falling", "onkey-rising"; + status = "okay"; + }; + + watchdog { + compatible = "st,stpmic1-wdt"; + status = "disabled"; + }; + }; +}; + +&iwdg2 { + timeout-sec = <32>; + status = "okay"; +}; + +&rng1 { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + broken-cd; + st,sig-dir; + st,neg-edge; + st,use-ckin; + bus-width = <4>; + vmmc-supply = <&vdd_sd>; + status = "okay"; +}; + +&uart4 { + /* On Low speed expansion header */ + label = "LS-UART1"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_b>; + status = "okay"; +}; + +&uart7 { + /* On Low speed expansion header */ + label = "LS-UART0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart7_pins_a>; + status = "okay"; +};