From patchwork Mon Jun 10 19:31:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166361 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410217ilk; Mon, 10 Jun 2019 12:33:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqwMVezJsfn3AfvhxuJf9IZhavnvYoaYVtJf3L5RNesm8Sbd8adCA0DsiJugV1y7TS25BPRA X-Received: by 2002:a6b:7208:: with SMTP id n8mr41151963ioc.151.1560195228182; Mon, 10 Jun 2019 12:33:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195228; cv=none; d=google.com; s=arc-20160816; b=F1od+jOsN5SuRPaAuzAIy7FUP7bk5SBrogy1F+nj5y1V4wuYapAJwwnE6EQzYpGW70 A9VWMCO31XtYIriffibiR3dFIqXiOr2YVs852fb7RfiqjdB2dplQLPYzTp6rLwC8eQ+g 3O6b3ZmpwiQDCcrycKfKwfHZeD9TLUAi4c2w1wKO/9YdHtnrkDG+rr19twERP2WWJwy2 PUm0os04Oz+FakvDZahWYNlMOf5fxIvEx+inDrMlQ82/+XA/JFGaoGsRwiyjRLu4uwoc QppgtuWe85xkZLRAuDKEI9zrWaBi8PH0HaOuhLceXE6QN0/+9KYOWEXsbhIQ5B1yhHkE r37Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=stNoIKzS5AEm4qABPG6qgnkWmktf4llpWv17UQy68xo=; b=fvgPFF/iWruDNXWgoPnbb6LeZ5qSD5mjk3HH1m+pm3D2EMpgt8TipPLm04v6hPQUVg F3LMLZQlf4HzzW9u46BHB0YshwetTbmGC4lL9jM/4QQffbE4K/P2KDPEn26OW5/oEv65 PcHtZ2hAkUlvn253oxo+tt7Y8UUvGmDzoYBxNTAqTUEvg6MIafWKzobnL/HSvi/xy6b8 dBNp9s+fcZdS/fDstIclBcsw4hVAhfNfOs5zNrCW/iOtD1PehNIkGrIqbSZJGuKnsqKw 0vclO4bpYgOLsengtijBil2IlbN6qrDQCGXS6obYvhHa203o3TKBrZz7MJL1/alWYIGv 47zQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id t199si179085ita.116.2019.06.10.12.33.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1n-0007cY-KF; Mon, 10 Jun 2019 19:32:23 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1m-0007cJ-Vv for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:23 +0000 X-Inumbo-ID: 7763f4f6-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 7763f4f6-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:21 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3C956346; Mon, 10 Jun 2019 12:32:21 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5468B3F73C; Mon, 10 Jun 2019 12:32:20 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:31:59 +0100 Message-Id: <20190610193215.23704-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 01/17] xen/arm64: head Mark the end of subroutines with ENDPROC X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" putn() and puts() are two subroutines. Add ENDPROC for the benefits of static analysis tools and the reader. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/arm64/head.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index ddd3a33108..c8bbdf05a6 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -646,6 +646,7 @@ puts: b puts 1: ret +ENDPROC(puts) /* Print a 32-bit number in hex. Specific to the PL011 UART. * x0: Number to print. @@ -664,6 +665,7 @@ putn: subs x3, x3, #1 b.ne 1b ret +ENDPROC(putn) hex: .ascii "0123456789abcdef" .align 2 From patchwork Mon Jun 10 19:32:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166362 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410228ilk; Mon, 10 Jun 2019 12:33:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqwyscwllANrV28J70GCu8/lFcmeXP98hPhXcyKgNrbos8X5LX/6vAOeqShY32DRCkaHMEkF X-Received: by 2002:a5e:db02:: with SMTP id q2mr21402595iop.306.1560195228546; Mon, 10 Jun 2019 12:33:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195228; cv=none; d=google.com; s=arc-20160816; b=Y5ew1q6sVS/iW0TiBWfQODjKfBwK/XW1wWHqSiRnBTYdJqHXjo6MczBvovreBj0TWV 2cYePDb6xwmvcPj7RjBhr5RJphCliDsbHrJ88lzQ8jpYBoPiN1G5JE+Hrke/QRA+5zaQ NRXA8CSLLBUrf9uKaNYjVq+06nHlTL8ahpeDByFo1TwKI/bHXzkhSC3IwDE/iNUs9b/m 0Hn7WEvLj0eCyU8ziAfgoKj23lraEsH9X8JX4qnli7QhdZCe3bGaDo7LTQpQRAJSjAc8 TpHgDUCRI5CHLqqIvV0aADepdiR6jdjpOyGyVvBmBYbcuQurSKOLfcKDkIXaXOxIU7Yj loJg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=+GBwWnKF4fPfhll9nS/XOtNFk6tne1Lb1DuPUIdv5fo=; b=L/veDIzJqERQkl5P5uGaHsqTDPrKeNnLGfDH8jpua/EPa0Q6XthaUwPB2FI6gFPWQf fUlkVqpkOiYcGb+vUHS7E/KEmln75CklY+84sXaGsDOtTuCapE0wbFJljRyLHkQngNs6 QHQe3gTLjxBmKIuGXvaV813s+0XOGgBeIEJtSn/GogEExJmec7Eth9Sswqjl7y6oGxHS wASHtyKk0bJ6+tmN8mYVZ/yYYRhPLkSzZfTZta9oP6XRlmJZBd/tnTJDnCDoSt6ZjSqJ 1/4mZipm1g/PLBwDa0xzbR0QY6w2p8FcfA5TNfVzXgvTMXva56BgKfUPxQv8k0b3N1bQ aMIw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id k17si6503234iok.52.2019.06.10.12.33.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1n-0007ce-U4; Mon, 10 Jun 2019 19:32:23 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1n-0007cO-8a for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:23 +0000 X-Inumbo-ID: 780e1bbf-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 780e1bbf-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:22 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5892BC0A; Mon, 10 Jun 2019 12:32:22 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 708313F73C; Mon, 10 Jun 2019 12:32:21 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:00 +0100 Message-Id: <20190610193215.23704-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 02/17] xen/arm64: head: Don't clobber x30/lr in the macro PRINT X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The current implementation of the macro PRINT will clobber x30/lr. This means the user should save lr if it cares about it. Follow-up patches will introduce more use of PRINT in place where lr should be preserved. Rather than requiring all the users to preserve lr, the macro PRINT is modified to save and restore it. While the comment state x3 will be clobbered, this is not the case. So PRINT will use x3 to preserve lr. Lastly, take the opportunity to move the comment on top of PRINT and use PRINT in init_uart. Both changes will be helpful in a follow-up patch. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/arm64/head.S | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index c8bbdf05a6..a5147c8d80 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -78,12 +78,17 @@ * x30 - lr */ -/* Macro to print a string to the UART, if there is one. - * Clobbers x0-x3. */ #ifdef CONFIG_EARLY_PRINTK +/* + * Macro to print a string to the UART, if there is one. + * + * Clobbers x0 - x3 + */ #define PRINT(_s) \ + mov x3, lr ; \ adr x0, 98f ; \ bl puts ; \ + mov lr, x3 ; \ RODATA_STR(98, _s) #else /* CONFIG_EARLY_PRINTK */ #define PRINT(s) @@ -630,9 +635,8 @@ init_uart: #ifdef EARLY_PRINTK_INIT_UART early_uart_init x23, 0 #endif - adr x0, 1f - b puts -RODATA_STR(1, "- UART enabled -\r\n") + PRINT("- UART enabled -\r\n") + ret /* Print early debug messages. * x0: Nul-terminated string to print. From patchwork Mon Jun 10 19:32:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166367 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410357ilk; Mon, 10 Jun 2019 12:33:54 -0700 (PDT) X-Google-Smtp-Source: APXvYqwivDs0ygwpDI+slQ51nxP68AtSbjvdAZlFEtEiqWRwARoFrEPtqbNrGQXDPwlPmNfeh8YY X-Received: by 2002:a6b:b256:: with SMTP id b83mr43439542iof.48.1560195234466; Mon, 10 Jun 2019 12:33:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195234; cv=none; d=google.com; s=arc-20160816; b=aIKO0md9SPjLCzCDxy8FzxTbyaZhu3Kyf9CL+envFSETBO3Gz7EOALj6iKk33LhDc4 2NtJP9bhPdt0LQnvX3iKDSZH/veYNDS8dZfgMX/IGwBr/AQqdHAnm4UA061Th5MhENnt KUMiq2aiE225Qsgnzmv37qJzqa6PfdsQTPWvJ/ZAVzcTAKsKaP/mhi6+AEnE1fd/9Ivv +LrXSU6cr12ECpXTuc6LuVdwvFemIt4l26fvqmaNRKcrcBahHGNab9z8wug2rd3njdnA ApXJjvQbCiYKnd7G3vNn8zei4mlPytDM7sNVrP2FtYDL0wjV0yGvpA4yanW1frHSDnp/ sbPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=Sv/6dSL98aVO1rByFdP3G6KIDgIf/H2L2u27iBAIPnc=; b=Zjq90g4nzDzxeiktCB9S7okPL22DtO26d4mNxk+4Q8w4VjAKyM1n3xKzYkyVAyUMsF 7pWmZCxkfLyFF6yOcpdlM7SagLT88BDIEncrtJOEWApG/17tLtVVqfaLhvTun48Y6TJZ 1CkFid8rXwxkQFQXPcU/uvex406r11BOBk08eelNZVuo8tgnjRHnxNP+TaXeMSNMFCgp 3im5+QfQwktNUTA2KcYoivD5QrCDWxJnzXHWMdU153LCBJzOBSpoVMY3JblT4hNSWMVI 2aJcWzE6/Zrp2MsCvfBzoq4LPmRVSYICbLKNsqK34yhi8vhefgto5gZY4JewE6ke70CX 1nwg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id y75si174273itc.128.2019.06.10.12.33.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1q-0007d1-I0; Mon, 10 Jun 2019 19:32:26 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1o-0007ck-Hi for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:24 +0000 X-Inumbo-ID: 78b1c5f8-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 78b1c5f8-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:23 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 746D3C15; Mon, 10 Jun 2019 12:32:23 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8C61F3F73C; Mon, 10 Jun 2019 12:32:22 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:01 +0100 Message-Id: <20190610193215.23704-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 03/17] xen/arm64: head: Rework UART initialization on boot CPU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Anything executed after the label common_start can be executed on all CPUs. However most of the instructions executed between the label common_start and init_uart are not executed on the boot CPU. The only instructions executed are to lookup the CPUID so it can be printed on the console (if earlyprintk is enabled). Printing the CPUID is not entirely useful to have for the boot CPU and requires a conditional branch to bypass unused instructions. Furthermore, the function init_uart is only called for boot CPU requiring another conditional branch. This makes the code a bit tricky to follow. The UART initialization is now moved before the label common_start. This now requires to have a slightly altered print for the boot CPU and set the early UART base address in each the two path (boot CPU and secondary CPUs). This has the nice effect to remove a couple of conditional branch in the code. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/arm64/head.S | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index a5147c8d80..fd432ee15d 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -265,6 +265,12 @@ real_start_efi: load_paddr x21, _sdtb #endif + /* Initialize the UART if earlyprintk has been enabled. */ +#ifdef CONFIG_EARLY_PRINTK + bl init_uart +#endif + PRINT("- Boot CPU booting -\r\n") + mov x22, #0 /* x22 := is_secondary_cpu */ b common_start @@ -281,14 +287,11 @@ GLOBAL(init_secondary) /* Boot CPU already zero BSS so skip it on secondary CPUs. */ mov x26, #1 /* X26 := skip_zero_bss */ -common_start: mrs x0, mpidr_el1 ldr x13, =(~MPIDR_HWID_MASK) bic x24, x0, x13 /* Mask out flags to get CPU ID */ - /* Non-boot CPUs wait here until __cpu_up is ready for them */ - cbz x22, 1f - + /* Wait here until __cpu_up is ready to handle the CPU */ load_paddr x0, smp_up_cpu dsb sy 2: ldr x1, [x0] @@ -300,14 +303,14 @@ common_start: #ifdef CONFIG_EARLY_PRINTK ldr x23, =EARLY_UART_BASE_ADDRESS /* x23 := UART base address */ - cbnz x22, 1f - bl init_uart /* Boot CPU sets up the UART too */ -1: PRINT("- CPU ") + PRINT("- CPU ") mov x0, x24 bl putn PRINT(" booting -\r\n") #endif +common_start: + PRINT("- Current EL ") mrs x4, CurrentEL mov x0, x4 @@ -628,10 +631,16 @@ ENTRY(switch_ttbr) ret #ifdef CONFIG_EARLY_PRINTK -/* Bring up the UART. - * x23: Early UART base address - * Clobbers x0-x1 */ +/* + * Initialize the UART. Should only be called on the boot CPU. + * + * Ouput: + * x23: Early UART base physical address + * + * Clobbers x0 - x1 + */ init_uart: + ldr x23, =EARLY_UART_BASE_ADDRESS #ifdef EARLY_PRINTK_INIT_UART early_uart_init x23, 0 #endif From patchwork Mon Jun 10 19:32:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166373 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410256ilk; Mon, 10 Jun 2019 12:33:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqy7DqdqWxOFemLm31exUwAauEYugl1Xj2DpwB/BG49H1B/oA9eQuRBXv0ps0FjJsz2bQG/0 X-Received: by 2002:a6b:7d49:: with SMTP id d9mr24143025ioq.50.1560195229534; Mon, 10 Jun 2019 12:33:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195229; cv=none; d=google.com; s=arc-20160816; b=gnWjlfhEDQaZOzelciFg33MuYRpGz8TtblTuxjFxvDpxw+znijUHMk8MyrdugERoZc xge+7z3nJXbMPi9j8VlN1FFMgnR2A4NcwF5ISV58iiWO/HuriLvZD6z32kEyAvABnUEK GSl8w6hF80LwmwVyBH0sqHBtQdS+etXYpisPt05zt+d0gxac3hHy0qodro1OnLiHK8rT FnN0SBgJ24s0KW/0i2WfUbecbP/RZSBDJ2zcXIEAr6NoTTYye0q+E6L8gD7qldADGQNc MAzAS9vghdXv+b2LTEwLIDUm5PVzX+tJDXxlpWjSTh3lzc/eIGO/2DiXAkbd+/+UitN4 oZDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=tLCHm9MhVRJEvoR0LaePO/rqw31LIgLcj+hoyNXaTHE=; b=RCuRtCWR77Ruclh6QUG0s37k6cGug4uR79LdJr2MgnNd4l/iVLJc3Xq3Rzd7KKs+LN qAzYP6zRPcVB39ijH2c4XJL8cbANqdpA04mRbFcoSmOGFjgfeq+bCgCvLmL3pPd3s3/H +DxHRJ89t/uzBGoCQkzJP9zKjinwuELd36DsXoQ0sBUjv0jXQRojGUF/I6O9ssI6Uwki MAGSQBhY/Hc7mY6OPYXUweS5PynDnfkN1Jul9Tac1ZMOMoijDKEGMXT5o4K5/kcFYGki 17ShiRZV8jqvmizpLrKP4ov7QpP8RI/d8zh8ZAT6cZi8buXUPiphk7x01hCOZIFlfAHn kQdw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id o130si509424itb.1.2019.06.10.12.33.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1t-0007dp-7s; Mon, 10 Jun 2019 19:32:29 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1r-0007dM-KE for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:27 +0000 X-Inumbo-ID: 794fea56-8bb6-11e9-83b0-8b88c32ede0b Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 794fea56-8bb6-11e9-83b0-8b88c32ede0b; Mon, 10 Jun 2019 19:32:24 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9070E344; Mon, 10 Jun 2019 12:32:24 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A86193F73C; Mon, 10 Jun 2019 12:32:23 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:02 +0100 Message-Id: <20190610193215.23704-5-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 04/17] xen/arm64: head: Don't "reserve" x24 for the CPUID X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" After the recent rework, the CPUID is only used at the very beginning of the secondary CPUs boot path. So there is no need to "reserve" x24 for he CPUID. Signed-off-by: Julien Grall Acked-by: Stefano Stabellini --- xen/arch/arm/arm64/head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index fd432ee15d..84e26582c4 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -69,7 +69,7 @@ * x21 - DTB address (boot cpu only) * x22 - is_secondary_cpu * x23 - UART address - * x24 - cpuid + * x24 - * x25 - identity map in place * x26 - skip_zero_bss * x27 - From patchwork Mon Jun 10 19:32:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166368 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410376ilk; Mon, 10 Jun 2019 12:33:55 -0700 (PDT) X-Google-Smtp-Source: APXvYqxTwGDH8V5VXQl4F2UP32Af4YVBFnEveEDwqR1wnal3rRkSM/JntZFoDy9xQmeC/ZK2aE8W X-Received: by 2002:a24:b8c2:: with SMTP id m185mr14806458ite.0.1560195235913; Mon, 10 Jun 2019 12:33:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195235; cv=none; d=google.com; s=arc-20160816; b=MfNfOTP0vwxfeYmTxtuBzLtjfY/y97ZNssVL/voV3jTj7k4EmLKzs6pNPDxJdZzI9a kb60MFOo3r2br4Xhwl6ngYQDwfbIzsOuVnHFA0luvOAISPP6/1/MkoYfheul0L/nlV1k rh8uzpZK84qxE1uIyGULmzqXOegzjcNb4k0jyOwBZKylBOAV0f0DaCRyDy9PPbyRPlv3 /6mIlvu3Dx1HFu8VgngtS0oEN9CvxHMlVogLTH5XioePrg4MnqkWBrz/JHjFIit3+OUM efYxlLrSQbwb+4h8DGDL+nKMqwzCl8OLSXdVdjW6NyjJekmJWcKTo/Da/LNIyOirrjYM 6REw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=N4oJNDunGDa/Td/RLdifXCu+8Y6Q5w+eLQjyw2EDgkk=; b=ocfeCUa05N6+XGcb22CJPfCnlj/HQuI1iBqtPbAu0v9p7WwGZ/Y2cJgpp16zZgvZ5H 8MyoN29xQ0vkj5zgr9mONG4OQpEIU5tZGpToPXJYHsdGFQV8iA1S09hkDpvMmcoRb4mu Oy393Q2wRR0EMOxxzBMitEag63A92gsQH8qrpKwgJvSvdZ3l9JALASTl5N97Omp3MxUZ 8DNNL1t6UitYnuLjYSfBIB+jrlPnY6glk3NKKF6cS/c1oUNH3/DH7JKlKb6uoGTvieGC XUCvv5EYS8rvDmkl95+fxA/Xe4kbs5l71Tr+18t5fn7gwCLseEb8RTlgJVk5KOJsySg0 6Oiw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id m15si6468147ioo.117.2019.06.10.12.33.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1r-0007dR-Ts; Mon, 10 Jun 2019 19:32:27 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1r-0007dH-AH for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:27 +0000 X-Inumbo-ID: 79f136ad-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 79f136ad-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:25 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ACA74346; Mon, 10 Jun 2019 12:32:25 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C49683F73C; Mon, 10 Jun 2019 12:32:24 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:03 +0100 Message-Id: <20190610193215.23704-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 05/17] xen/arm64: head: Introduce print_reg X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" At the moment, the user should save x30/lr if it cares about it. Follow-up patches will introduce more use of putn in place where lr should be preserved. Furthermore, any user of putn should also move the value to register x0 if it was stored in a different register. For convenience, a new macro is introduced to print a given register. The macro will take care for us to move the value to x0 and also preserve lr. Lastly the new macro is used to replace all the callsite of putn. This will simplify rework/review later on. Note that CurrentEL is now stored in x5 instead of x4 because the latter will be clobbered by the macro print_reg. Signed-off-by: Julien Grall --- xen/arch/arm/arm64/head.S | 29 ++++++++++++++++++++++------- 1 file changed, 22 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 84e26582c4..9142b4a774 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -90,8 +90,25 @@ bl puts ; \ mov lr, x3 ; \ RODATA_STR(98, _s) + +/* + * Macro to print the value of register \xb + * + * Clobbers x0 - x4 + */ +.macro print_reg xb + mov x4, lr + mov x0, \xb + bl putn + mov lr, x4 +.endm + #else /* CONFIG_EARLY_PRINTK */ #define PRINT(s) + +.macro print_reg xb +.endm + #endif /* !CONFIG_EARLY_PRINTK */ /* Load the physical address of a symbol into xb */ @@ -304,22 +321,20 @@ GLOBAL(init_secondary) #ifdef CONFIG_EARLY_PRINTK ldr x23, =EARLY_UART_BASE_ADDRESS /* x23 := UART base address */ PRINT("- CPU ") - mov x0, x24 - bl putn + print_reg x24 PRINT(" booting -\r\n") #endif common_start: PRINT("- Current EL ") - mrs x4, CurrentEL - mov x0, x4 - bl putn + mrs x5, CurrentEL + print_reg x5 PRINT(" -\r\n") /* Are we in EL2 */ - cmp x4, #PSR_MODE_EL2t - ccmp x4, #PSR_MODE_EL2h, #0x4, ne + cmp x5, #PSR_MODE_EL2t + ccmp x5, #PSR_MODE_EL2h, #0x4, ne b.eq el2 /* Yes */ /* OK, we're boned. */ From patchwork Mon Jun 10 19:32:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166363 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410224ilk; Mon, 10 Jun 2019 12:33:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqwJ58fA+RiMH7OdD4rliYFOI36gJMTR2Sa+uf4MZJaI4C63ZsDJluP2Pg8RClI8mXks5Lwb X-Received: by 2002:a24:90c4:: with SMTP id x187mr8641252itd.172.1560195228413; Mon, 10 Jun 2019 12:33:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195228; cv=none; d=google.com; s=arc-20160816; b=POkCTdbwQ/0jlTLafQ1oke90YUUj1Gjhe5ceZ1GLU7+/cut4xaZ4BhegJLXgE7mBck zLYUAGcukxe1aBKk1YdA+cN/WJNbeCRT5ioqzHFl1kmOYATJ5SBoXzhn0TD1Ouiwa/Kd NaM/jE25RR5eIbu4FyZ1kQB1SropK46VAm33XA9hMAXrrZo09sj0VPkuPaGO8ARToNAt oubx4kGbYoIMkJSv7AgWfyh8C/lS/GGpCkGPwd11emk5o+sZLtS3v3gVgUBb7NeZVyX8 mky5zf4enSlpzKbQfN0uInbzxff2lFw+YuA+CPrg04fJJl4Q4wLgB5ruilQ2u2E6+laU W9IQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=stI3LuhrLkBVwotN3m+5tAIqayaM8tyd96UBAHV5Fv0=; b=TKXZQDpv1wCSJcskqqrwDj48kOKXy7MyrqYFrY1ED00OWHScxYKDhy8PepTZ5XTxHX 1Is2FZNGuUv6gPD4xCN5a0cuJxwbZ6OR07sErtSmYoWqvEZEQ9JMVvb71AeVNJfTvsp4 A06O+RdWYz/HChuMPI0ySzPClHMYPX9ULVitkwu95reD2bCUmzRs1Krg8GH12WXv8oLR GGv0F0UIBZ06ogYXvVQZzRF6guqsft2i/4JKLrBteWuhhAq8+rtU0yWm4lQs6K/V9f/z ZzBOj7b+DajFONOPh15blR9VO878x3sxFSnJS4QWxDO+f0bGlY0ruCRMjDriQHWSo6we d+3Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id g127si7083732jag.119.2019.06.10.12.33.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1u-0007et-Jd; Mon, 10 Jun 2019 19:32:30 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1s-0007dd-JN for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:28 +0000 X-Inumbo-ID: 7aa408ec-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 7aa408ec-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:26 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C921CC0A; Mon, 10 Jun 2019 12:32:26 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E0B713F73C; Mon, 10 Jun 2019 12:32:25 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:04 +0100 Message-Id: <20190610193215.23704-7-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 06/17] xen/arm64: head: Introduce distinct paths for the boot CPU and secondary CPUs X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The boot code is currently quite difficult to go through because of the lack of documentation and a number of indirection to avoid executing some path in either the boot CPU or secondary CPUs. In an attempt to make the boot code easier to follow, each parts of the boot are now in separate functions. Furthermore, the paths for the boot CPU and secondary CPUs are now distincted and for now will call each functions. Follow-ups will remove unecessary calls and do further improvement (such as adding documentation and reshuffling). Note that the switch from using the ID mapping to the runtime mapping is duplicated for each path. This is because in the future we will need to stay longer in the ID mapping for the boot CPU. Signed-off-by: Julien Grall --- xen/arch/arm/arm64/head.S | 57 ++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 49 insertions(+), 8 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 9142b4a774..ccd8a1b0a8 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -290,7 +290,19 @@ real_start_efi: mov x22, #0 /* x22 := is_secondary_cpu */ - b common_start + bl check_cpu_mode + bl zero_bss + bl cpu_init + bl create_page_tables + bl enable_mmu + + /* We are still in the ID map. Jump to the runtime Virtual Address. */ + ldr x0, =primary_switched + br x0 +primary_switched: + bl setup_fixmap + b launch +ENDPROC(real_start) GLOBAL(init_secondary) msr DAIFSet, 0xf /* Disable all interrupts */ @@ -324,9 +336,21 @@ GLOBAL(init_secondary) print_reg x24 PRINT(" booting -\r\n") #endif - -common_start: - + bl check_cpu_mode + bl zero_bss + bl cpu_init + bl create_page_tables + bl enable_mmu + + /* We are still in the ID map. Jump to the runtime Virtual Address. */ + ldr x0, =secondary_switched + br x0 +secondary_switched: + bl setup_fixmap + b launch +ENDPROC(init_secondary) + +check_cpu_mode: PRINT("- Current EL ") mrs x5, CurrentEL print_reg x5 @@ -343,7 +367,10 @@ common_start: b fail el2: PRINT("- Xen starting at EL2 -\r\n") + ret +ENDPROC(check_cpu_mode) +zero_bss: /* Zero BSS only when requested */ cbnz x26, skip_bss @@ -356,6 +383,10 @@ el2: PRINT("- Xen starting at EL2 -\r\n") b.lo 1b skip_bss: + ret +ENDPROC(zero_bss) + +cpu_init: PRINT("- Setting up control registers -\r\n") /* Set up memory attribute type tables */ @@ -390,7 +421,10 @@ skip_bss: * are handled using the EL2 stack pointer, rather * than SP_EL0. */ msr spsel, #1 + ret +ENDPROC(cpu_init) +create_page_tables: /* Rebuild the boot pagetable's first-level entries. The structure * is described in mm.c. * @@ -515,6 +549,10 @@ virtphys_clash: b fail 1: + ret +ENDPROC(create_page_tables) + +enable_mmu: PRINT("- Turning on paging -\r\n") /* @@ -524,16 +562,16 @@ virtphys_clash: tlbi alle2 /* Flush hypervisor TLBs */ dsb nsh - ldr x1, =paging /* Explicit vaddr, not RIP-relative */ mrs x0, SCTLR_EL2 orr x0, x0, #SCTLR_Axx_ELx_M /* Enable MMU */ orr x0, x0, #SCTLR_Axx_ELx_C /* Enable D-cache */ dsb sy /* Flush PTE writes and finish reads */ msr SCTLR_EL2, x0 /* now paging is enabled */ isb /* Now, flush the icache */ - br x1 /* Get a proper vaddr into PC */ -paging: + ret +ENDPROC(enable_mmu) +setup_fixmap: /* Now we can install the fixmap and dtb mappings, since we * don't need the 1:1 map any more */ dsb sy @@ -575,7 +613,10 @@ paging: tlbi alle2 dsb sy /* Ensure completion of TLB flush */ isb + ret +ENDPROC(setup_fixmap) +launch: PRINT("- Ready -\r\n") /* The boot CPU should go straight into C now */ @@ -594,7 +635,6 @@ paging: dsb sy /* Ensure completion of TLB flush */ isb -launch: ldr x0, =init_data add x0, x0, #INITINFO_stack /* Find the boot-time stack */ ldr x0, [x0] @@ -609,6 +649,7 @@ launch: b start_xen /* and disappear into the land of C */ 1: b start_secondary /* (to the appropriate entry point) */ +ENDPROC(launch) /* Fail-stop */ fail: PRINT("- Boot failed -\r\n") From patchwork Mon Jun 10 19:32:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166371 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410404ilk; Mon, 10 Jun 2019 12:33:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqxVj4CzMQwqXbGitu/KbnDWwxr3+c2CCS7gtL4njJSOMddiRFAzWlU8py0QgRpzj6kbG/yi X-Received: by 2002:a6b:b204:: with SMTP id b4mr11855395iof.177.1560195237598; Mon, 10 Jun 2019 12:33:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195237; cv=none; d=google.com; s=arc-20160816; b=EzsVMhBH+go3hb/cGz453l8TziEmGahra+5WXvvnah54tvPrKrHA2tpzefoBVdTLIX 73Std28JemAtYoOL9bYeMJfPDcCB7jsQqkj1m1ZcHmFE+vlvUIiv2KCyxphNj126d1HO GATSw1WN6qpK7EDKnVi00CsgzCWgXxx1xybTiJoq5ScFVZgIHrF0B4W4Zoa2YNZSBpTv 0jn4LGNbcBYh0+MpxbSNKlig7vAsPY4HSiUStk5aJ8zyRsvwIsZgQS75G6Vghxs6IU8c Hiy2e00AwrofRjDZaNFUexx4NCpIm5dY6y+hx1bZV+djfUUKjzRRFgUxRlgfmmFdD03t mIkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=/2efVw76EpIlAWOmz7Lpp+ufSJVO7tyorxPJ5n4UkVA=; b=CjAnOcmdM61mf8S+FAcNMBX2Io48WXewYkF/71BgGmqWtdJYDlIC+f/UXQVwGi86mC Ss0idoIGBJqKRrvb2ILMdKeT8i+H5ZQ4rL81lEPCcFp2szanVc71aRVVEPub3sMhmVnw AUoR9LGTz3qNHNL651PkvYTO8C5b/jT/xkZLlJld9HcvxKpycIVXNjgwcKm+DZyGgyb6 M5gWJb9XI9gobOb2z24Cmi75o5JMww7XXfHQyGlqWQImhXaAjOEDRQPntQldrWms1dIh GFH8reZdeV8W+lxrdna7N79svrsYBvkJtQ0ZXqD/UOHX0lg5toEhgya1AgVSP0ojp48C gxZA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id a101si7726467jai.2.2019.06.10.12.33.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1u-0007fE-Vf; Mon, 10 Jun 2019 19:32:30 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1s-0007di-Ri for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:28 +0000 X-Inumbo-ID: 7b48ac70-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 7b48ac70-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:28 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E5F4A344; Mon, 10 Jun 2019 12:32:27 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0922F3F73C; Mon, 10 Jun 2019 12:32:26 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:05 +0100 Message-Id: <20190610193215.23704-8-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 07/17] xen/arm64: head: Rework and document check_cpu_mode() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" A branch in the success case can be avoided by inverting the branch condition. At the same time, remove a pointless comment as Xen can only run at EL2. Lastly, document the behavior and the main registers usage within the function. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/arm64/head.S | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index ccd8a1b0a8..87fcd3be6c 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -350,6 +350,13 @@ secondary_switched: b launch ENDPROC(init_secondary) +/* + * Check if the CPU has been booted in Hypervisor mode. + * This function will never return when the CPU is booted in another mode + * than Hypervisor mode. + * + * Clobbers x0 - x5 + */ check_cpu_mode: PRINT("- Current EL ") mrs x5, CurrentEL @@ -359,15 +366,13 @@ check_cpu_mode: /* Are we in EL2 */ cmp x5, #PSR_MODE_EL2t ccmp x5, #PSR_MODE_EL2h, #0x4, ne - b.eq el2 /* Yes */ - + b.ne 1f /* No */ + ret +1: /* OK, we're boned. */ PRINT("- Xen must be entered in NS EL2 mode -\r\n") PRINT("- Please update the bootloader -\r\n") b fail - -el2: PRINT("- Xen starting at EL2 -\r\n") - ret ENDPROC(check_cpu_mode) zero_bss: From patchwork Mon Jun 10 19:32:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166365 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410269ilk; Mon, 10 Jun 2019 12:33:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqzhLpx8Dc+D1AeCz47AGDfsPZzBOxflsxXjgJ2fbj8s/NoTaNiQAw8D4UduVfkGGm7hvLqC X-Received: by 2002:a24:c3c5:: with SMTP id s188mr1636554itg.17.1560195230274; Mon, 10 Jun 2019 12:33:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195230; cv=none; d=google.com; s=arc-20160816; b=byf45M2TjEgBHvDGN1YjB7PyAxNIhNC8oSO2wFvbGqlU3sL2qpuFPiWfBSItMVLpUo sFAfEib0qcNkEcd6cZYZU/yGdfAOCAsIpqEKsWVabMErlh3eILpfRFR9/XmJuORq4Jz8 oskM4PsBcGK5fE+Qo9jDzL7jgUoAkxIel+jyA3ra8c0athTEb91SE+KzYo/43Fwhpnyl 9+ZwXHDGIivQcf1fLxrbqigS72avIJ4EgMXNZQo7v9vM6VRihHWN0s3Pp9s/pA8DLEPy 2Dxne2RoYC7YHWb9WIyoOffSIgK30P4DK8Oz2hisYoO1Z0phrD/0K5G8RhY7qUJGI0iM UypA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=toLMwV51nwk3tyYHMbZHqJfezWKBnIhVGofydTZX5cU=; b=n7wxmqkyQ6Tg/n2mDwNvYGXElSkPd0ciuKx7Z3BK/aO7ZozaeAQw3Lgu9Z9XpP2PmQ U3vusIML8TuNuI+mABkrib3Pri0roay/kRdwVdz4BJ2xur3Avn62uWVlNn6KFefc8MTe O8KM0vno+LISoNAWybOzSANYJdRQ3B7wN0n8hHvmKW2Eimf9yfxklt7QDJwGbntp/RRe WquB1ov7SYojqcpSJE+CQVEcIiufDsgJPTMGnnKQr/9YKCLw724EpJ0o7fnprBVv14/k +33ecESCJcny19aSHZbKwWXNjf5HO8C+ufWQhZk90mIRgp+qWKlTamJXp8nKeu0IjwAe JQYw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id b81si185694itb.103.2019.06.10.12.33.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1w-0007hY-WB; Mon, 10 Jun 2019 19:32:32 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1v-0007fS-7t for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:31 +0000 X-Inumbo-ID: 7bfa0d68-8bb6-11e9-a239-6f7b6f0f0c80 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 7bfa0d68-8bb6-11e9-a239-6f7b6f0f0c80; Mon, 10 Jun 2019 19:32:29 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0E115346; Mon, 10 Jun 2019 12:32:29 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 25EDD3F73C; Mon, 10 Jun 2019 12:32:28 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:06 +0100 Message-Id: <20190610193215.23704-9-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 08/17] xen/arm64: head: Rework and document zero_bss() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" On secondary CPUs, zero_bss() will be a NOP because BSS only need to be zeroed once at boot. So the call in the secondary CPUs path can be removed. It also means that x26 does not need to set and is now only used by the boot CPU. Lastly, document the behavior and the main registers usage within the function. Signed-off-by: Julien Grall --- xen/arch/arm/arm64/head.S | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 87fcd3be6c..6aa3148192 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -71,7 +71,7 @@ * x23 - UART address * x24 - * x25 - identity map in place - * x26 - skip_zero_bss + * x26 - skip_zero_bss (boot cpu only) * x27 - * x28 - * x29 - @@ -313,8 +313,6 @@ GLOBAL(init_secondary) sub x20, x19, x0 /* x20 := phys-offset */ mov x22, #1 /* x22 := is_secondary_cpu */ - /* Boot CPU already zero BSS so skip it on secondary CPUs. */ - mov x26, #1 /* X26 := skip_zero_bss */ mrs x0, mpidr_el1 ldr x13, =(~MPIDR_HWID_MASK) @@ -337,7 +335,6 @@ GLOBAL(init_secondary) PRINT(" booting -\r\n") #endif bl check_cpu_mode - bl zero_bss bl cpu_init bl create_page_tables bl enable_mmu @@ -375,6 +372,14 @@ check_cpu_mode: b fail ENDPROC(check_cpu_mode) +/* + * Zero BSS + * + * Inputs: + * x26: Do we need to zero BSS? + * + * Clobbers x0 - x3 + */ zero_bss: /* Zero BSS only when requested */ cbnz x26, skip_bss From patchwork Mon Jun 10 19:32:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166370 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410391ilk; Mon, 10 Jun 2019 12:33:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqxOR4+C9zFgk3w3IXyY6OGHPOv4KhrZIKG0qtSi8E0ide67jy6rI9h1EN5RGTCwTT4WJqw1 X-Received: by 2002:a02:5801:: with SMTP id f1mr47241005jab.40.1560195237163; Mon, 10 Jun 2019 12:33:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195237; cv=none; d=google.com; s=arc-20160816; b=IOWQcOtqmnbFNo4xgoMu8LDYjP7uqUTn3iTLe0upoNXaaytvRlV4VQxNJKBsL7oBqK bRKcG9rjDohL9kMSbMs/j4z9uW9RbV+mCtvPVXa+ZItgwJeu01a9fof/rcS98yUwhQlg LmoyVEMNQD/Sy9+VMJNFPaHLaurnhdmRxozvExsBoJL7hfp3aDVCE7tMVz+wSjJ/kfnY IlrRF2QSrq97V5nxQUyHeyHh5RhSHr2ag/etIpjMeV5zPKzrSNj8t17xMa6+alF4hOsn VIIRVHxhyZYhFoCYeGg9gqrl9kSvZiTh0R4G4i5JFKcq6YH7HdwbOSmvk+5mSFJkj0YV 1f0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=5MxHbm99ugLBZbK08cA+blZ8kYFB1QQxE/bTY2ge4TY=; b=waZOGYB4yEHDgEyqjKFXivSMvucZTGdmV0OPwhptT9xJVOx6sx9Xo2SemS8lPKw4d/ R3M0dexPx8Zj1o0EICYDhw5LZc0obcbTo9ORt/CleIdedX9xD3WPELk1zgCXv2Ra/ri8 npQFeJ4AjvZwKYgGblWPXUn+kF+JXjRh7gyOhF6YziM4SCpnfjhXnGeK+grIT+qYBHxp cwdkBltLFAXUsNTAtTf2Y2/z6xI8RtCDJckOhaZd4K/Kh9cZ5q2J1jkgkoFwzRHOa8vx 7ISefYpl5BGqkOWZ+I0z8rJgF/haAv6ROotWZWOR/Lzdz652P9w/wyyHoAlst2c3J4Wo /C4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id l187si170792itg.139.2019.06.10.12.33.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1w-0007h4-Hc; Mon, 10 Jun 2019 19:32:32 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1u-0007ez-SM for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:30 +0000 X-Inumbo-ID: 7ca62288-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 7ca62288-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:30 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2A096C0A; Mon, 10 Jun 2019 12:32:30 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 420733F73C; Mon, 10 Jun 2019 12:32:29 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:07 +0100 Message-Id: <20190610193215.23704-10-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 09/17] xen/arm64: head: Improve coding style and document cpu_init() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Adjust the coding style used in the comments within cpu_init(). Take the opportunity to alter the early print to match the function name. Lastly, document the behavior and the main registers usage within the function. Signed-off-by: Julien Grall --- xen/arch/arm/arm64/head.S | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 6aa3148192..ee0024173e 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -396,19 +396,26 @@ skip_bss: ret ENDPROC(zero_bss) +/* + * Initialize the processor for turning the MMU on. + * + * Clobbers x0 - x4 + */ cpu_init: - PRINT("- Setting up control registers -\r\n") + PRINT("- Initialize CPU -\r\n") /* Set up memory attribute type tables */ ldr x0, =MAIRVAL msr mair_el2, x0 - /* Set up TCR_EL2: + /* + * Set up TCR_EL2: * PS -- Based on ID_AA64MMFR0_EL1.PARange * Top byte is used * PT walks use Inner-Shareable accesses, * PT walks are write-back, write-allocate in both cache levels, - * 48-bit virtual address space goes through this table. */ + * 48-bit virtual address space goes through this table. + */ ldr x0, =(TCR_RES1|TCR_SH0_IS|TCR_ORGN0_WBWA|TCR_IRGN0_WBWA|TCR_T0SZ(64-48)) /* ID_AA64MMFR0_EL1[3:0] (PARange) corresponds to TCR_EL2[18:16] (PS) */ mrs x1, ID_AA64MMFR0_EL1 @@ -427,9 +434,11 @@ cpu_init: ldr x0, =(HSCTLR_BASE) msr SCTLR_EL2, x0 - /* Ensure that any exceptions encountered at EL2 + /* + * Ensure that any exceptions encountered at EL2 * are handled using the EL2 stack pointer, rather - * than SP_EL0. */ + * than SP_EL0. + */ msr spsel, #1 ret ENDPROC(cpu_init) From patchwork Mon Jun 10 19:32:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166364 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410255ilk; Mon, 10 Jun 2019 12:33:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqySOPAlqnh1iHdVJsD/GP3+ogFEGszMCfPUdsLtWARbydPkwMfisdl82FX7JcqBfzurAxcn X-Received: by 2002:a24:2188:: with SMTP id e130mr12678648ita.164.1560195229527; Mon, 10 Jun 2019 12:33:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195229; cv=none; d=google.com; s=arc-20160816; b=soFsLfcfjag5tQ4XK9M1FjcdnYd2bB+qlZMpPzC9xEHt4Hu/aeqa6VttSWtBboXWww mo3tmZ87iTGbpTWzdtqusJ4zYWEFldAWkWyma8tpbKo2qMGPd4Wtqi4gpfPQPNmTtfFx D2HOuwDPD2VKGmyBAmHyg6LgQ5gIaHFk6tqum4idPivOMdyaniyT7YTyUV9xtDHqwcbj hYlgeGCQXEfL61Zz/Rvb19Aewj628NcSoTFjowSs/Lc+0AJGLM/iZEvlYUsnmaUUCtVi GZKHClOfldMdqhHtK8aYz39q+gdxqUw1djVVDxtN7mifQUHb+2t5fWx3s6iNoQiTXCNM Yrqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=RiqPuHz9/Yp7iuQooQJztIz9b9BdELP6mCLZCA1UYOI=; b=L2mHetUv3ynGdJ4mhVOD7h89NyxNa5UuQmXhu824kkYpse4im/0hAO8+WqgBuCJMUu Q+60mUDBef+8TBD+ehO5dMqjHUrBASv8xV58zFRB+2hA64eZisTXynEdkK+wRW+BdXmQ ko/+Gi8NLEMpyOnramuLKg1+FhuWo/Yr7BHAmrvrtgwPQo8LxeWDvs2DmiFRhlDSD2sC Smo2leUNabH9R6WX7IVAWSS/MDHJmWtg2CRf4H1EAmlCDY9VKecsFLBJrZhB9qBvbzhw pUpyTAUVOg0n51Fgi7kwyBfkQNBUzY2GPoAXeTlScBVllm7dMn82pOnCfGdlphLRKQ2v eooQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id i20si7578200jaf.72.2019.06.10.12.33.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1x-0007i8-Eg; Mon, 10 Jun 2019 19:32:33 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1w-0007gZ-44 for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:32 +0000 X-Inumbo-ID: 7d59b95d-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 7d59b95d-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:31 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 46523344; Mon, 10 Jun 2019 12:32:31 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5E2CC3F73C; Mon, 10 Jun 2019 12:32:30 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:08 +0100 Message-Id: <20190610193215.23704-11-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 10/17] xen/arm64: head: Improve coding style and document create_pages_tables() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Adjust the coding style used in the comments within create_pages_tables() Lastly, document the behavior and the main registers usage within the function. Note that x25 is now only used within the function, so it does not need to be part of the common register. Signed-off-by: Julien Grall --- xen/arch/arm/arm64/head.S | 34 +++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index ee0024173e..7b92c1c8eb 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -70,7 +70,7 @@ * x22 - is_secondary_cpu * x23 - UART address * x24 - - * x25 - identity map in place + * x25 - * x26 - skip_zero_bss (boot cpu only) * x27 - * x28 - @@ -443,16 +443,27 @@ cpu_init: ret ENDPROC(cpu_init) +/* + * Rebuild the boot pagetable's first-level entries. The structure + * is described in mm.c. + * + * After the CPU enables paging it will add the fixmap mapping + * to these page tables, however this may clash with the 1:1 + * mapping. So each CPU must rebuild the page tables here with + * the 1:1 in place. + * + * Inputs: + * x19: paddr(start) + * x20: phys offset + * + * Clobbers x0 - x4, x25 + * + * Register usage within this function: + * x25: Identity map in place + */ create_page_tables: - /* Rebuild the boot pagetable's first-level entries. The structure - * is described in mm.c. - * - * After the CPU enables paging it will add the fixmap mapping - * to these page tables, however this may clash with the 1:1 - * mapping. So each CPU must rebuild the page tables here with - * the 1:1 in place. */ - - /* If Xen is loaded at exactly XEN_VIRT_START then we don't + /* + * If Xen is loaded at exactly XEN_VIRT_START then we don't * need an additional 1:1 mapping, the virtual mapping will * suffice. */ @@ -476,7 +487,8 @@ create_page_tables: cbz x1, 1f /* It's in slot 0, map in boot_first * or boot_second later on */ - /* Level zero does not support superpage mappings, so we have + /* + * Level zero does not support superpage mappings, so we have * to use an extra first level page in which we create a 1GB mapping. */ load_paddr x2, boot_first_id From patchwork Mon Jun 10 19:32:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166369 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410385ilk; Mon, 10 Jun 2019 12:33:56 -0700 (PDT) X-Google-Smtp-Source: APXvYqyDVR/8DQNkiHiHpgTH5dugIFW+1E2gKohRMOVNwx6+yCKkQda4Ns3Mod8kK8zfFY0/+WC9 X-Received: by 2002:a6b:b7d5:: with SMTP id h204mr10020272iof.188.1560195236764; Mon, 10 Jun 2019 12:33:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195236; cv=none; d=google.com; s=arc-20160816; b=rrSIAOLY9+W6vaTCAl8vIX1DqHxEzwhVtIqdkz7P9aGsYDOtD77b3eVa1qh7jfdTmj j1y6/oMgzlcB6uy4+VkYJ7dhmWy6EkW46XzMUdDLEEFaxOH1lr10LwkQupH4EEzduaTY C5zyQbIDk75wwwwI39v4DiGRDjRSSFZuvB/KNtHWr0H2NXC0+Jh4mb0+FFhnDlk8zvY5 DYdRJJb0oCGPW1D868E1IXy0vsV9hFaqNlKepONFga12nKixahN6L2sUDNiJpFVTanME XbMMw8r3kz/DLmxKW5cIvnOXEHReGmsJ0WAToVf8/6y3TgKUxOu6MyZx5WIC4DpfzaS9 iIyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=gPZaE2P7XLaWHYaYxb+lbT4GWbyyaJ6XmLNaH0tlIIg=; b=gyZa4lWSv+bDCq+epOWY03YDi/2KwpJ/bvJZekKxkJSjoQ8RgnYKgs448wPiOcK5Il N7rOSH47w+t5gxoi8Xa6FnGj6BBUt/VixSRl0WRMHQ9JR4hCXPey5oz/AUbk7SCM3+KE FA3VD7EQg/RtvaJsvOvlOM3VaniK1K8ly7dCtZyXIcWWAWqQQL1uh0e0sZrPYV6V3P/K NjzL63i9qMM7oOmLrvdiB818EU3BauxZSFql/suNT+7I6+p9v3zRtylTNB8izY9VwYXA 9/bPzNPZm0MVEzUc1E8I2XSkac3yvfkVcPuExZOTO+nzcEcw9Ew8vunl7YX567tZ+0Es IdGQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id d8si8487681jah.69.2019.06.10.12.33.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1y-0007jV-SC; Mon, 10 Jun 2019 19:32:34 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1x-0007hz-Cx for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:33 +0000 X-Inumbo-ID: 7df36253-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 7df36253-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:32 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6381C346; Mon, 10 Jun 2019 12:32:32 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7A5833F73C; Mon, 10 Jun 2019 12:32:31 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:09 +0100 Message-Id: <20190610193215.23704-12-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 11/17] xen/arm64: head: Document enable_mmu() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Document the behavior and the main registers usage within enable_mmu(). Signed-off-by: Julien Grall --- xen/arch/arm/arm64/head.S | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 7b92c1c8eb..d673f7c0d8 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -583,6 +583,13 @@ virtphys_clash: ret ENDPROC(create_page_tables) +/* + * Turn on the Data Cache and the MMU. The function will return on the ID + * mapping. In other word, the caller is responsible to switch to the runtime + * mapping. + * + * Clobbers x0 - x1 + */ enable_mmu: PRINT("- Turning on paging -\r\n") From patchwork Mon Jun 10 19:32:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166375 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410408ilk; Mon, 10 Jun 2019 12:33:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqx/kO2gLeCtc4a4Rmp3HgAJqPEoduOgNbCCzF20ke4RaqllFFc7d9AylWHlxNByfIpk45Nq X-Received: by 2002:a24:d34a:: with SMTP id n71mr14800819itg.42.1560195237647; Mon, 10 Jun 2019 12:33:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195237; cv=none; d=google.com; s=arc-20160816; b=Wf5GA7ILyx0t+4b7HEs34zzmCQL0ZdYZ1dvwcLsjfDWZUCED4WT3g40rLiBScAy0HO vGeF+URuT3rLAIz5B/VK77uhijnmapNwbtCAOQM4e4IE62LbVM8YZXzQ5aZA39DAs5Co UV+eNeL6Nv2th4lAbQJQZ7rPKsZ01/D648iCF1ItnKtEdd0w6TN+eeT8M7PQEZdY95kb ctbt9fSepWpjFaby1YihEABaC1Wk8/DN5NO4JbGqTY3jD13lXDtfR0YxzADIr20CSbSq kWtrO5eSSxv5KogpvK3e7ER2cXrTxVHCws/mHKBAYTVoHhUSpMcAPJXgvzEFBpu+TPC3 33XA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=BaS6XLcyEagxyjWEGBHxkSxRIrJcINIU0pkHSWPDm8o=; b=n6Uk8ZxP5ZCWo/Kh69Q/em/AFM4L7S7PlgyYfqo9RBveNUogP/pY/bL/ium+9Oslp9 6lDzlMk1WXWNu7RE0fiBWtrAVbBvEEaBEyECwnbf2/cE4eNELdAk3+VuufrY9CoEEt9I xE0BHKGz7eu5bwHjAzfMyxYwGEmY8KVL0DoRiM+0JrknBhLol5RoBChB3MFRLv4bYVyd SK3yUfcrUO29vokPuUJ8dg0XP+e8XWF/mRRBVPSSJoeO1PgiOEjdgmRHMcVdKIaX0eCP 1nh0cCrjkgZguhfe8gbZRx+OzNa0m4l36Gvj6krc6ztmJC7rF/1I75uGZWAr5k9NTX2a xMMA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id b81si185867itb.103.2019.06.10.12.33.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ20-0007kt-BS; Mon, 10 Jun 2019 19:32:36 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1z-0007kH-Gp for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:35 +0000 X-Inumbo-ID: 7ea70a16-8bb6-11e9-a861-33f576285945 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 7ea70a16-8bb6-11e9-a861-33f576285945; Mon, 10 Jun 2019 19:32:33 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7E7C2C0A; Mon, 10 Jun 2019 12:32:33 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 965C33F73C; Mon, 10 Jun 2019 12:32:32 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:10 +0100 Message-Id: <20190610193215.23704-13-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 12/17] xen/arm64: head: Move assembly switch to the runtime PT in secondary CPUs path X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The assembly switch to the runtime PT is only necessary for the secondary CPUs. So move the code in the secondary CPUs path. While this is definitely not compliant with the Arm Arm as we are switching between two differents set of page-tables without turning off the MMU. Turning off the MMU is impossible here as the ID map may clash with other mappings in the runtime page-tables. This will require more rework to avoid the problem. So for now add a TODO in the code. Signed-off-by: Julien Grall Acked-by: Stefano Stabellini --- xen/arch/arm/arm64/head.S | 33 +++++++++++++++++---------------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index d673f7c0d8..6be4af7579 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -344,6 +344,23 @@ GLOBAL(init_secondary) br x0 secondary_switched: bl setup_fixmap + + /* + * Non-boot CPUs need to move on to the proper pagetables, which were + * setup in init_secondary_pagetables. + * + * XXX: This is not compliant with the Arm Arm. + */ + ldr x4, =init_ttbr /* VA of TTBR0_EL2 stashed by CPU 0 */ + ldr x4, [x4] /* Actual value */ + dsb sy + msr TTBR0_EL2, x4 + dsb sy + isb + tlbi alle2 + dsb sy /* Ensure completion of TLB flush */ + isb + b launch ENDPROC(init_secondary) @@ -657,22 +674,6 @@ ENDPROC(setup_fixmap) launch: PRINT("- Ready -\r\n") - /* The boot CPU should go straight into C now */ - cbz x22, launch - - /* Non-boot CPUs need to move on to the proper pagetables, which were - * setup in init_secondary_pagetables. */ - - ldr x4, =init_ttbr /* VA of TTBR0_EL2 stashed by CPU 0 */ - ldr x4, [x4] /* Actual value */ - dsb sy - msr TTBR0_EL2, x4 - dsb sy - isb - tlbi alle2 - dsb sy /* Ensure completion of TLB flush */ - isb - ldr x0, =init_data add x0, x0, #INITINFO_stack /* Find the boot-time stack */ ldr x0, [x0] From patchwork Mon Jun 10 19:32:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166359 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1409940ilk; Mon, 10 Jun 2019 12:33:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqw9D8Q3T6TivCloGfEUbvU1iSJO/VBTryzBzf4MycMz/0bCs4O/9BU20IUhaax0u53ynGCZ X-Received: by 2002:a24:5a45:: with SMTP id v66mr15415380ita.140.1560195211431; Mon, 10 Jun 2019 12:33:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195211; cv=none; d=google.com; s=arc-20160816; b=lCITOWSW8omDaCR3DTLE+8+KsNt4kkMxlf6RxiG7BxLnFZSA3ziBjU4aquKC7uuOOa R2UD4g/l0QAj0O+tGTeYbvNaZfdmljGr/XM6W0RLUR/t9TUMHHzQch3GarkJmIrw7jbP FEhVky2mYyt3TxeBAv3GINeHgWjlRcPoWMJp1H7E7685+3PCCu52lk84b9mI66dfHrtp CgMBfHgmOf1iGvPSbWk2+mtLBrl23gehppQTI0ppsCDR1bzYmdu/DAD10ppuh8TgazGm VXfrFlV3wMMXAlCEluZY2HCkQ/k9/TIBq82uNXhZ4tPP/myhx/zE+d7K+guLPQBG3LWM 2mMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=/TBBTbv2enzASeFljd2cv9hvy15vTVhfljlopMp0Jh0=; b=tatCPbqJFhlJUCgNN8yEnE4reQOHWghOLMwU1NsmN6EsCf7r59cuqKUAbWxwICRszz e+gMMW8HPBjoFORvaPpZLHBGbXqcHaYU4Fp9gHTVt6sWrqe0OdNitI8DhERRMHyDYdW3 i+GuPI7fHTCEliMs07tYzQRV1ksjxmepVhjRxIHDFA+9jVx1z1qL4b5ApFCf3h35bgkr Xklv2t1O+Dke7XMwP/g9EJydiKLClWNP9ATCO9uVeeIuM+I4gBwI7mcZFwztAv03P/1Z pbUh3MmZ9iJZ/WyIwNoraJX+33xugSpfmBQ4IZdE6lnxBCVryHRVPHoHTQ3sm/3ag5K6 aQvA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id s21si169444itc.123.2019.06.10.12.33.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ23-0007pG-MO; Mon, 10 Jun 2019 19:32:39 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ21-0007mv-Op for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:37 +0000 X-Inumbo-ID: 7f51d9fa-8bb6-11e9-99cd-e7629283a8cb Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 7f51d9fa-8bb6-11e9-99cd-e7629283a8cb; Mon, 10 Jun 2019 19:32:34 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9AF41344; Mon, 10 Jun 2019 12:32:34 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B2AED3F73C; Mon, 10 Jun 2019 12:32:33 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:11 +0100 Message-Id: <20190610193215.23704-14-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 13/17] xen/arm64: head: Don't setup the fixmap on secondary CPUs X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" setup_fixmap() will setup the fixmap in the boot page tables in order to use earlyprintk and also update the register x23 holding the address to the UART. However, secondary CPUs are switching to the runtime page tables before using the earlyprintk again. So settting up the fixmap in the boot pages tables is pointless. This means most of setup_fixmap() is not necessary for the secondary CPUs. The update of UART address is now moved out of setup_fixmap() and duplicated in the CPU boot and secondary CPUs boot. Additionally, the call to setup_fixmap() is removed from secondary CPUs boot. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/arm64/head.S | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 6be4af7579..192af3e8a2 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -301,6 +301,10 @@ real_start_efi: br x0 primary_switched: bl setup_fixmap +#ifdef CONFIG_EARLY_PRINTK + /* Use a virtual address to access the UART. */ + ldr x23, =EARLY_UART_VIRTUAL_ADDRESS +#endif b launch ENDPROC(real_start) @@ -343,8 +347,6 @@ GLOBAL(init_secondary) ldr x0, =secondary_switched br x0 secondary_switched: - bl setup_fixmap - /* * Non-boot CPUs need to move on to the proper pagetables, which were * setup in init_secondary_pagetables. @@ -361,6 +363,10 @@ secondary_switched: dsb sy /* Ensure completion of TLB flush */ isb +#ifdef CONFIG_EARLY_PRINTK + /* Use a virtual address to access the UART. */ + ldr x23, =EARLY_UART_VIRTUAL_ADDRESS +#endif b launch ENDPROC(init_secondary) @@ -631,10 +637,6 @@ setup_fixmap: * don't need the 1:1 map any more */ dsb sy #if defined(CONFIG_EARLY_PRINTK) /* Fixmap is only used by early printk */ - /* Non-boot CPUs don't need to rebuild the fixmap itself, just - * the mapping from boot_second to xen_fixmap */ - cbnz x22, 1f - /* Add UART to the fixmap table */ ldr x1, =xen_fixmap /* x1 := vaddr (xen_fixmap) */ lsr x2, x23, #THIRD_SHIFT @@ -642,7 +644,6 @@ setup_fixmap: mov x3, #PT_DEV_L3 orr x2, x2, x3 /* x2 := 4K dev map including UART */ str x2, [x1, #(FIXMAP_CONSOLE*8)] /* Map it in the first fixmap's slot */ -1: /* Map fixmap into boot_second */ ldr x4, =boot_second /* x4 := vaddr (boot_second) */ @@ -652,9 +653,6 @@ setup_fixmap: ldr x1, =FIXMAP_ADDR(0) lsr x1, x1, #(SECOND_SHIFT - 3) /* x1 := Slot for FIXMAP(0) */ str x2, [x4, x1] /* Map it in the fixmap's slot */ - - /* Use a virtual address to access the UART. */ - ldr x23, =EARLY_UART_VIRTUAL_ADDRESS #endif /* From patchwork Mon Jun 10 19:32:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166372 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410423ilk; Mon, 10 Jun 2019 12:33:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqyzNGOJIkwcASq9oyYYhxJ8HUuBhgYaVpF7FGB8WrZN4r8NqIOpsjqbbNE44qQTsXESbRkv X-Received: by 2002:a05:6602:2001:: with SMTP id y1mr10017955iod.166.1560195238584; Mon, 10 Jun 2019 12:33:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195238; cv=none; d=google.com; s=arc-20160816; b=A+gEMOziJsmn3H25IsifiFM7CTLG3UZjd18Fs9br/bepjKy3CK4YfmPOImopb9DZOv npoASPvRe0cMP4jWEiDVhuUCHNzrupdufJhE3zZ6nx4rpzGhrHnoTWIy/HSKrVsH0mC4 hSnBQDOz3v28hnfK1sR4TkKVfjbfAm4wT7LFYQRrgDKQT9RcBUWHif04bO0PP6HLOY7K ahQzbVJwSGTFP7/iUiThbOE6hdWSIivJXhuopPez8lcZUoOeA+DOrtQLsuBSPXfb2eFk nc0lkCo3ONB4UoUX8mFEz0Bi33Rk1TnkbjQYCtrZjlzysyQSsP5mizSe6tgMo2f2GD2R 8Egw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=3vu+CqL4SmecEVjbJAZagk9I7gFKwOhmNrdptafPl0I=; b=OiEqWTKiDoHl04d4bdI5GYcLSy23Xjvu1sB7Oi2qIJ2IT5+Ztrb8zd5D4oHtwzMnAy 9qj+il1Ddebkl8buyC1effMYl0zzfuAS1iF3h2BAWUscKXOPveOt1VdqNn7OXx+xAj15 We4zEvYJOiHDvwvK+YtqLvc8lY6WTjOTygA/tQhrnRL7Bi1PXHIU+ZbAp3ZjR4cMJ+ao BgH3CtWSElwKH9GYsZIWHVuRd0YpfYEF1oYTh8BxJH77mp7A8seX7rXA+kwFFwZMC3zp a1uzGEH/lsMGA8sd3npS9heY+iyITrRGHrVNjoEnN+knJm7SPPPvMPmN+FwwKCwbFooV Ab6g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id 133si183420ity.66.2019.06.10.12.33.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ22-0007nm-Mn; Mon, 10 Jun 2019 19:32:38 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ21-0007m8-8C for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:37 +0000 X-Inumbo-ID: 7feffa3f-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 7feffa3f-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:35 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B6D97346; Mon, 10 Jun 2019 12:32:35 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CED6C3F73C; Mon, 10 Jun 2019 12:32:34 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:12 +0100 Message-Id: <20190610193215.23704-15-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 14/17] xen/arm64: head: Remove ID map as soon as it is not used X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The ID map may clash with other parts of the Xen virtual memory layout. At the moment, Xen is handling the clash by only creating a mapping to the runtime virtual address before enabling the MMU. The rest of the mappings (such as the fixmap) will be mapped after the MMU is enabled. However, the code doing the mapping is not safe as it replace mapping without using the Break-Before-Make sequence. As the ID map can be anywhere in the memory, it is easier to remove all the entries added as soon as the ID map is not used rather than adding the Break-Before-Make sequence everywhere. It is difficult to track where exactly the ID map was created without a full rework of create_page_tables(). Instead, introduce a new function remove_id_map() will look where is the top-level entry for the ID map and remove it. The new function is only called for the boot CPU. Secondary CPUs will switch directly to the runtime page-tables so there are no need to remove the ID mapping. Note that this still doesn't make the Secondary CPUs path safe but it is not making it worst. --- Note that the comment refers to the patch "xen/arm: tlbflush: Rework TLB helpers" under review (see [1]). Furthermore, it is very likely we will need to re-introduce the ID map to cater secondary CPUs boot and suspend/resume. For now, the attempt is to make boot CPU path fully Arm Arm compliant. [1] https://lists.xenproject.org/archives/html/xen-devel/2019-05/msg01134.html --- xen/arch/arm/arm64/head.S | 86 ++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 71 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 192af3e8a2..96e85f8834 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -300,6 +300,13 @@ real_start_efi: ldr x0, =primary_switched br x0 primary_switched: + /* + * The ID map may clash with other parts of the Xen virtual memory + * layout. As it is not used anymore, remove it completely to + * avoid having to worry about replacing existing mapping + * afterwards. + */ + bl remove_id_map bl setup_fixmap #ifdef CONFIG_EARLY_PRINTK /* Use a virtual address to access the UART. */ @@ -632,10 +639,68 @@ enable_mmu: ret ENDPROC(enable_mmu) +/* + * Remove the ID map for the page-tables. It is not easy to keep track + * where the ID map was mapped, so we will look for the top-level entry + * exclusive to the ID Map and remove it. + * + * Inputs: + * x19: paddr(start) + * + * Clobbers x0 - x1 + */ +remove_id_map: + /* + * Find the zeroeth slot used. Remove the entry from zeroeth + * table if the slot is not 0. For slot 0, the ID map was either + * done in first or second table. + */ + lsr x1, x19, #ZEROETH_SHIFT /* x1 := zeroeth slot */ + cbz x1, 1f + /* It is not in slot 0, remove the entry */ + ldr x0, =boot_pgtable /* x0 := root table */ + str xzr, [x0, x1, lsl #3] + b id_map_removed + +1: + /* + * Find the first slot used. Remove the entry for the first + * table if the slot is not 0. For slot 0, the ID map was done + * in the second table. + */ + lsr x1, x19, #FIRST_SHIFT + and x1, x1, #LPAE_ENTRY_MASK /* x1 := first slot */ + cbz x1, 1f + /* It is not in slot 0, remove the entry */ + ldr x0, =boot_first /* x0 := first table */ + str xzr, [x0, x1, lsl #3] + b id_map_removed + +1: + /* + * Find the second slot used. Remove the entry for the first + * table if the slot is not 1 (runtime Xen mapping is 2M - 4M). + * For slot 1, it means the ID map was not created. + */ + lsr x1, x19, #SECOND_SHIFT + and x1, x1, #LPAE_ENTRY_MASK /* x1 := first slot */ + cmp x1, #1 + beq id_map_removed + /* It is not in slot 1, remove the entry */ + ldr x0, =boot_second /* x0 := second table */ + str xzr, [x0, x1, lsl #3] + +id_map_removed: + /* See asm-arm/arm64/flushtlb.h for the explanation of the sequence. */ + dsb nshst + tlbi alle2 + dsb nsh + isb + + ret +ENDPROC(remove_id_map) + setup_fixmap: - /* Now we can install the fixmap and dtb mappings, since we - * don't need the 1:1 map any more */ - dsb sy #if defined(CONFIG_EARLY_PRINTK) /* Fixmap is only used by early printk */ /* Add UART to the fixmap table */ ldr x1, =xen_fixmap /* x1 := vaddr (xen_fixmap) */ @@ -653,19 +718,10 @@ setup_fixmap: ldr x1, =FIXMAP_ADDR(0) lsr x1, x1, #(SECOND_SHIFT - 3) /* x1 := Slot for FIXMAP(0) */ str x2, [x4, x1] /* Map it in the fixmap's slot */ -#endif - /* - * Flush the TLB in case the 1:1 mapping happens to clash with - * the virtual addresses used by the fixmap or DTB. - */ - dsb sy /* Ensure any page table updates made above - * have occurred. */ - - isb - tlbi alle2 - dsb sy /* Ensure completion of TLB flush */ - isb + /* Ensure any page table updates made above have occurred */ + dsb nshst +#endif ret ENDPROC(setup_fixmap) From patchwork Mon Jun 10 19:32:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166374 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1410358ilk; Mon, 10 Jun 2019 12:33:54 -0700 (PDT) X-Google-Smtp-Source: APXvYqy/feL1C/V/UYSbQCy2BZSjp4q1ILoZz/daVGocmEEpiXekAY1yBIHuqPUaB3zUvTd3AETZ X-Received: by 2002:a24:b543:: with SMTP id j3mr14760238iti.23.1560195234465; Mon, 10 Jun 2019 12:33:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195234; cv=none; d=google.com; s=arc-20160816; b=kURq+ohseiDqWR/Y8WjWXQjIhoKWIU5eCaWHabc1frKZMg7YdhhvCzI7jbwxYVTHAa KfYKQIQsSUyGJzxjgxJPeekR+9TDq4r5cCxLxtlFO8fr9DDhSgp8DBzrBX4RuhGrJOWp VShmI+Ud8D27MxP3k2qeoq2YSWmAhM0GGFphP5sF5CAWknd+Vs+hyI6VuWZlG0BMutjw 2yQ0gfEpYIskddkl2BVSD/VVFaK99f20gXiqqEIoDyVzCpWhlrad0HLtAs49zMG6JjP/ JMg6gTF+o/NS6RUyy69PILAAUDYaZHqtq/Qe612DbIpnBMy12nbMfixoy08BHuyqtc37 6wYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=7ECuch8Odd3W4FaWwUogDq7dtZ0Ec/IG1hrBaMOZg/Y=; b=vakFYL5LPfW6CiEif3ZToGOkkLpvXIJvBvv6Wu8IImiWSzfz7I05EGNzJiwA8kw08f 6G21MeIPYcXazipfpkkJS7oGk/VCQeGQsqo/i2FZgX4qDr5q5oMHbtMphjPLuWHqZHa7 WOqMXx57EXzrcauHUhViJzFhRPkDcENzBtC2w7dW0rdVVHnkj4xnUfzWPNN+LHSfrBhN MFOWKVp4fOjV1B/28XGBQACGTP6WkSNLZbOZnu5Q94QzrvbaRy5Uyln5T/1HIWLo96UX DARekGyatT7gyYU2Un87cKju+GR7uPp4zS7AfzGui9egygNB2/fvLtanAPeroYDfwk3U dZog== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id k2si7471999jac.121.2019.06.10.12.33.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ23-0007oP-50; Mon, 10 Jun 2019 19:32:39 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ21-0007mR-FR for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:37 +0000 X-Inumbo-ID: 8096a8d5-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 8096a8d5-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:36 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D316AC0A; Mon, 10 Jun 2019 12:32:36 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EB3913F73C; Mon, 10 Jun 2019 12:32:35 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:13 +0100 Message-Id: <20190610193215.23704-16-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 15/17] xen/arm64: head: Rework and document setup_fixmap() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" At the moment, the fixmap table is only hooked when earlyprintk is used. This is fine today because in C land, the fixmap is not used by anyone until the the boot CPU is switching to the runtime page-tables. In the future, the boot CPU will not switch between page-tables to avoid TLB conflict. This means the fixmap table will need to be hooked before any use. For simplicity, setup_fixmap() will now do that job. Lastly, document the behavior and the main registers usage within the function. Signed-off-by: Julien Grall Acked-by: Stefano Stabellini --- xen/arch/arm/arm64/head.S | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 96e85f8834..4f7fa6769f 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -700,8 +700,17 @@ id_map_removed: ret ENDPROC(remove_id_map) +/* + * Map the UART in the fixmap (when earlyprintk is used) and hook the + * fixmap table in the page tables. + * + * The fixmap cannot be mapped in create_page_tables because it may + * clash with the ID map. + * + * Clobbers x0 - x1 + */ setup_fixmap: -#if defined(CONFIG_EARLY_PRINTK) /* Fixmap is only used by early printk */ +#ifdef CONFIG_EARLY_PRINTK /* Add UART to the fixmap table */ ldr x1, =xen_fixmap /* x1 := vaddr (xen_fixmap) */ lsr x2, x23, #THIRD_SHIFT @@ -709,6 +718,7 @@ setup_fixmap: mov x3, #PT_DEV_L3 orr x2, x2, x3 /* x2 := 4K dev map including UART */ str x2, [x1, #(FIXMAP_CONSOLE*8)] /* Map it in the first fixmap's slot */ +#endif /* Map fixmap into boot_second */ ldr x4, =boot_second /* x4 := vaddr (boot_second) */ @@ -721,7 +731,6 @@ setup_fixmap: /* Ensure any page table updates made above have occurred */ dsb nshst -#endif ret ENDPROC(setup_fixmap) From patchwork Mon Jun 10 19:32:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166358 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1409939ilk; Mon, 10 Jun 2019 12:33:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqzwNapioV17uCDC10vami/twHqz4QKGDzHxluePpWAvXbrwDcyeNyE/eSYXaL/c0vweFzGG X-Received: by 2002:a6b:8b51:: with SMTP id n78mr47262605iod.192.1560195211379; Mon, 10 Jun 2019 12:33:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195211; cv=none; d=google.com; s=arc-20160816; b=vtk6Gmrd4sdUCdgTzEb050M0QS3cxMtcQPqgfUSq+NfQWOFWVI1bvbHkjV+lKNXcbd Pp1PSUxILurZ2glMCTOZsNZeEnwELpMKL3s8LlfI1glpFlI0oNsEO4ywl8Mleunb8UKx QEpd5dy9c8ffMmt5UswtidkwHGQ1m/H6mk57K8XyOgQd94NakSQBZJygYZF6Dp0mcElw 3HEt3b7jTCt50gUbVgrWF7qxcQ06aR7BNmAx0sFVIXhA1SO4iwJnUdSaxQYO7cUUz/fS lNFZTof30MXuFO5Js+uytyI0sG3K35Ako5QjGOxcjev+vj57K2ogqIAbBhimn1bjxVm9 Q8PA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=dVg36GpuHS3j6xpC6nndZXPHBXCyiCJjMVzEC316tog=; b=CSewaSvk1A+DNm26ZVy/WGSb1Gj6Tpdr/1LiRzpKluxPXbyZoju4WZ4tBDyjrY/j7F MgIxcEJ7B0jub15mKgf6VIIfdyIOnKwaHYw56El8pAJxT3va8oIsuR19G8mmk85oWWnL 9iJwdQOM4AGwTFqZ89L5IPf+2Rzcm7nLjlxRQ5/7jEULs+4nb4EBNuVjq3McvWPaoCwZ uTpdSNVGMrwJGgezLUIlqm76I6oO6Wb4cQhP4tLjAqiOma0jqGvqIgO/q6YktDtkfwsF jr2CIIqrUV6xwyqsao5St+7kVt9JBPTDsNGxNlmLUGGiS03UY5YVVyRpHfwo/LXM6faY K9Kw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id m47si207846iti.111.2019.06.10.12.33.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ24-0007rM-Pu; Mon, 10 Jun 2019 19:32:40 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ22-0007nw-Sw for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:38 +0000 X-Inumbo-ID: 815a49c3-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 815a49c3-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:38 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EF725344; Mon, 10 Jun 2019 12:32:37 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 131E73F73C; Mon, 10 Jun 2019 12:32:36 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:14 +0100 Message-Id: <20190610193215.23704-17-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 16/17] xen/arm64: head: Rework and document launch() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Boot CPU and secondary CPUs will use different entry point to C code. At the moment, the decision on which entry to use is taken within launch(). In order to avoid a branch for the decision and make the code clearer, launch() is reworked to take in parameters the entry point and its arguments. Lastly, document the behavior and the main registers usage within the function. Signed-off-by: Julien Grall --- xen/arch/arm/arm64/head.S | 41 +++++++++++++++++++++++++---------------- 1 file changed, 25 insertions(+), 16 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 4f7fa6769f..130ab66d8e 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -312,6 +312,11 @@ primary_switched: /* Use a virtual address to access the UART. */ ldr x23, =EARLY_UART_VIRTUAL_ADDRESS #endif + PRINT("- Ready -\r\n") + /* Setup the arguments for start_xen and jump to C world */ + mov x0, x20 /* x0 := phys_offset */ + mov x1, x21 /* x1 := paddr(FDT) */ + ldr x2, =start_xen b launch ENDPROC(real_start) @@ -374,6 +379,9 @@ secondary_switched: /* Use a virtual address to access the UART. */ ldr x23, =EARLY_UART_VIRTUAL_ADDRESS #endif + PRINT("- Ready -\r\n") + /* Jump to C world */ + ldr x2, =start_secondary b launch ENDPROC(init_secondary) @@ -734,23 +742,24 @@ setup_fixmap: ret ENDPROC(setup_fixmap) +/* + * Setup the initial stack and jump to the C world + * + * Inputs: + * x0 : Argument 0 of the C function to call + * x1 : Argument 1 of the C function to call + * x2 : C entry point + */ launch: - PRINT("- Ready -\r\n") - - ldr x0, =init_data - add x0, x0, #INITINFO_stack /* Find the boot-time stack */ - ldr x0, [x0] - add x0, x0, #STACK_SIZE /* (which grows down from the top). */ - sub x0, x0, #CPUINFO_sizeof /* Make room for CPU save record */ - mov sp, x0 - - cbnz x22, 1f - - mov x0, x20 /* Marshal args: - phys_offset */ - mov x1, x21 /* - FDT */ - b start_xen /* and disappear into the land of C */ -1: - b start_secondary /* (to the appropriate entry point) */ + ldr x4, =init_data + add x4, x4, #INITINFO_stack /* Find the boot-time stack */ + ldr x4, [x4] + add x4, x4, #STACK_SIZE /* (which grows down from the top). */ + sub x4, x4, #CPUINFO_sizeof /* Make room for CPU save record */ + mov sp, x4 + + /* Jump to C world */ + br x2 ENDPROC(launch) /* Fail-stop */ From patchwork Mon Jun 10 19:32:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 166360 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1409980ilk; Mon, 10 Jun 2019 12:33:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqxG3cAtaGv7jCxgliYHj24vUEKShnVBQ060nG55Oi2SSBO0EnumCbXjVIeVEMIDtvP12xj0 X-Received: by 2002:a02:1948:: with SMTP id b69mr24735367jab.55.1560195213981; Mon, 10 Jun 2019 12:33:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560195213; cv=none; d=google.com; s=arc-20160816; b=rOcIg21x3ue4cI7mNrCiYt9QpblrB1zl28bbHWY+lpVDb8iLjUhaBkduZ034xHWoY0 gKwhxxZqO9spJjs5BoyI2N4VN2VwB3HhZ5WLRBo+UQ6Eh8FHNRHMlGmlPqMq5jQsEXlP qBaWiTS/p2BVQTlDBTv8ViV6DdqRfiO3uhVO9EPgk9vC2vHLBHQwGWpie54xG7/9lerK oIH1nY6C0LYL1uJNN9UyjDYbIgo5AUc495MI+SCODXqg82WkjdXohZMrgLcs3rJsPMs6 AZX8WxA5WjJTPDdja48veW9S8lDibGOvh0t/CSryT7D4dYG3phNZOLRCRpt1AOO8qVve S5DQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=+W48fn6iy/shOAF5ygCUvnTMxk8SS7FByIl6XjhWOmE=; b=Dodmw20KT7xdDoCRBU9aJrcq5CO8lcNeqV+zjOJcf/375dPy0RV3SPRKfOjsJ3F7jA BVHN3NiNJ27+x6yL4g7Wsk3nayX/UPiR5WhDIhfj6F2wp32MfEc0PLpTeTMKBDOi4mN4 2bJSjWQp1mEbYdlCs25uWQNlI0GRUv73ZL6Fwv/OZi6F5xxofZfw6fYz54d76kInz8ki 5SNiIOixXZaI70fr3e6hJ9glPF7V57L9nEftp1VpR8YHQrDMjROs9llSzIbXPoFXBl6/ X7s316EeP6ijuH/WCv4CeckDcjfF1Pa6tXgNbEeT7jX9MR89dxPgooggE3LKsi2+Ttur KYQQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id n17si7168973jam.99.2019.06.10.12.33.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 10 Jun 2019 12:33:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ26-0007tl-9L; Mon, 10 Jun 2019 19:32:42 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ24-0007q8-5Z for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:40 +0000 X-Inumbo-ID: 81f53be7-8bb6-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 81f53be7-8bb6-11e9-8980-bc764e045a96; Mon, 10 Jun 2019 19:32:39 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1740C346; Mon, 10 Jun 2019 12:32:39 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2F32B3F73C; Mon, 10 Jun 2019 12:32:38 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:32:15 +0100 Message-Id: <20190610193215.23704-18-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190610193215.23704-1-julien.grall@arm.com> References: <20190610193215.23704-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 17/17] xen/arm64: Zero BSS after the MMU and D-cache is turned on X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" At the moment BSS is zeroed before the MMU and D-Cache is turned on. In other words, the cache will be bypassed when zeroing the BSS section. Per the Image protocol [1], the state of the cache for BSS region is not known because it is not part of the "loaded kernel image". This means that the cache will need to be invalidated twice for the BSS region: 1) Before zeroing to remove any dirty cache line. Otherwise they may get evicted while zeroing and therefore overriding the value. 2) After zeroing to remove any cache line that may have been speculated. Otherwise when turning on MMU and D-Cache, the CPU may see old values. However, the only reason to have the BSS zeroed early is because the boot page tables are part of BSS. To avoid the two cache invalidations, it is possible to move the page tables in the section .data.page_aligned. A new macro DEFINE_BOOT_PAGE_TABLE is introduced to create and mark page-tables used before BSS is zeroed. This includes all boot_* but also xen_fixmap as zero_bss() will print a message when earlyprintk is enabled. [1] linux/Documentation/arm64/booting.txt Acked-by: Stefano Stabellini --- Note that the arm32 support is not there yet. This will need to be addressed here or separately depending on when the Arm32 boot rework is sent. --- xen/arch/arm/arm64/head.S | 6 +++--- xen/arch/arm/mm.c | 23 +++++++++++++++++------ 2 files changed, 20 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 130ab66d8e..6c3edbbc81 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -291,7 +291,6 @@ real_start_efi: mov x22, #0 /* x22 := is_secondary_cpu */ bl check_cpu_mode - bl zero_bss bl cpu_init bl create_page_tables bl enable_mmu @@ -312,6 +311,7 @@ primary_switched: /* Use a virtual address to access the UART. */ ldr x23, =EARLY_UART_VIRTUAL_ADDRESS #endif + bl zero_bss PRINT("- Ready -\r\n") /* Setup the arguments for start_xen and jump to C world */ mov x0, x20 /* x0 := phys_offset */ @@ -423,8 +423,8 @@ zero_bss: cbnz x26, skip_bss PRINT("- Zero BSS -\r\n") - load_paddr x0, __bss_start /* Load paddr of start & end of bss */ - load_paddr x1, __bss_end + ldr x0, =__bss_start /* x0 := vaddr(__bss_start) */ + ldr x1, =__bss_end /* x1 := vaddr(__bss_start) */ 1: str xzr, [x0], #8 cmp x0, x1 diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 6a549e9283..0b2d07a258 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -48,6 +48,17 @@ #undef mfn_to_virt #define mfn_to_virt(mfn) __mfn_to_virt(mfn_x(mfn)) +/* + * Macros to define page-tables: + * - DEFINE_BOOT_PAGE_TABLE is used to define page-table that are used + * in assembly code before BSS is zeroed. + * - DEFINE_PAGE_TABLE{,S} are used to define one or multiple + * page-tables to be used after BSS is zeroed (typically they are only used + * in C). + */ +#define DEFINE_BOOT_PAGE_TABLE(name) \ +lpae_t __aligned(PAGE_SIZE) __section(".data.page_aligned") name[LPAE_ENTRIES] + #define DEFINE_PAGE_TABLES(name, nr) \ lpae_t __aligned(PAGE_SIZE) name[LPAE_ENTRIES * (nr)] @@ -76,13 +87,13 @@ lpae_t __aligned(PAGE_SIZE) name[LPAE_ENTRIES * (nr)] * Finally, if EARLY_PRINTK is enabled then xen_fixmap will be mapped * by the CPU once it has moved off the 1:1 mapping. */ -DEFINE_PAGE_TABLE(boot_pgtable); +DEFINE_BOOT_PAGE_TABLE(boot_pgtable); #ifdef CONFIG_ARM_64 -DEFINE_PAGE_TABLE(boot_first); -DEFINE_PAGE_TABLE(boot_first_id); +DEFINE_BOOT_PAGE_TABLE(boot_first); +DEFINE_BOOT_PAGE_TABLE(boot_first_id); #endif -DEFINE_PAGE_TABLE(boot_second); -DEFINE_PAGE_TABLE(boot_third); +DEFINE_BOOT_PAGE_TABLE(boot_second); +DEFINE_BOOT_PAGE_TABLE(boot_third); /* Main runtime page tables */ @@ -135,7 +146,7 @@ static __initdata int xenheap_first_first_slot = -1; */ static DEFINE_PAGE_TABLES(xen_second, 2); /* First level page table used for fixmap */ -DEFINE_PAGE_TABLE(xen_fixmap); +DEFINE_BOOT_PAGE_TABLE(xen_fixmap); /* First level page table used to map Xen itself with the XN bit set * as appropriate. */ static DEFINE_PAGE_TABLE(xen_xenmap);