From patchwork Mon Jun 10 09:59:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 166301 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp826458ilk; Mon, 10 Jun 2019 03:01:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqxUOj1K0wqAzWDk5TiXadK7PgpWWQ/rPrAvT30BzESSZwuSks5aCVf3kCvaN/azJm1D7PTd X-Received: by 2002:a63:d416:: with SMTP id a22mr15065637pgh.218.1560160894290; Mon, 10 Jun 2019 03:01:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560160894; cv=none; d=google.com; s=arc-20160816; b=ytQW54nSklTX93FT750wbX7ZjqKwExxafJ+S+qBpqc9EMURbG3HwMHoWeTheqH1Aj5 VenJIawV2EPGeHk87Ei4YiUljX/T7BYbBDjr7VkFiUQdmZARozS2uhhL8Chx3/2gxE3a Eoqq24bb7VysJVhvemEpWpGWHbm7uJuJNvpR4UbJDrc4PEE8DsGDdb6cEFQ6ODgvBvyk IXwXh5Au6TsyHI+b+0fHZ7vmwgNbJEWMqMlkWoxTzZUyE7PMeQNBNMazAlurzegBNH1s TKaDPVbUHRpRd2BSw53cEgzomJDAWoM6r1+jsfc17hOdHCVC7cUhnlOeAZXByZbxt3lg QwUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=2JHw4q+rNN6ycpJ57FYqMmadlzcVET4O5Nxr0ofOUZI=; b=DWpmwfAWbOJz6VEYPSNamDv+skXATaxjXkON/Wo2M+DxSBrRnAhgXCDUTETYagmHxo DyMSHJ7pRdKlzszdGqJhXs55C0BDMRl4nRE+u3eB7Ydfob519evHLtGsCsNV7gl64KAW UCaQb4G0uYQiZhzRH586cUeYighW9so52IEWf6t6DPWx5Tk8NVlM3MW5EUr2edt7IHAj rz1Z1RMr32spLPALBlOgdyqQepyIIsKhXs0dBYBNQuwKIDEKkWmeR5z8L2YieteVz+n8 zOJycFyUi5aRniB+4Zh/1uhvTmkLvp6hTcJD3APtLIMMl13FGK01QEFI16sxV1sGPta2 D8Yg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k13si8830729pll.64.2019.06.10.03.01.33; Mon, 10 Jun 2019 03:01:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389079AbfFJKBN (ORCPT + 30 others); Mon, 10 Jun 2019 06:01:13 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:56520 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2387977AbfFJKBN (ORCPT ); Mon, 10 Jun 2019 06:01:13 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 14F7449E51D9192BF918; Mon, 10 Jun 2019 18:01:11 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 10 Jun 2019 18:00:51 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , , John Garry Subject: [PATCH 1/5] perf pmu: Fix uncore PMU alias list for ARM64 Date: Mon, 10 Jun 2019 17:59:28 +0800 Message-ID: <1560160772-210844-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560160772-210844-1-git-send-email-john.garry@huawei.com> References: <1560160772-210844-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In 292c34c10249 ("perf pmu: Fix core PMU alias list for X86 platform"), we fixed the issue of CPU events being aliased to uncore events. Fix this same issue for ARM64, since the said commit left the (broken) behaviour untouched for ARM64. Signed-off-by: John Garry --- tools/perf/util/pmu.c | 28 ++++++++++++---------------- 1 file changed, 12 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index e0429f4ef335..036047f56efa 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -709,9 +709,7 @@ static void pmu_add_cpu_aliases(struct list_head *head, struct perf_pmu *pmu) { int i; struct pmu_events_map *map; - struct pmu_event *pe; const char *name = pmu->name; - const char *pname; map = perf_pmu__find_map(pmu); if (!map) @@ -722,28 +720,26 @@ static void pmu_add_cpu_aliases(struct list_head *head, struct perf_pmu *pmu) */ i = 0; while (1) { + const char *cpu_name = is_arm_pmu_core(name) ? name : "cpu"; + struct pmu_event *pe =&map->table[i++]; + const char *pname = pe->pmu ? pe->pmu : cpu_name; - pe = &map->table[i++]; if (!pe->name) { if (pe->metric_group || pe->metric_name) continue; break; } - if (!is_arm_pmu_core(name)) { - pname = pe->pmu ? pe->pmu : "cpu"; - - /* - * uncore alias may be from different PMU - * with common prefix - */ - if (pmu_is_uncore(name) && - !strncmp(pname, name, strlen(pname))) - goto new_alias; + /* + * uncore alias may be from different PMU + * with common prefix + */ + if (pmu_is_uncore(name) && + !strncmp(pname, name, strlen(pname))) + goto new_alias; - if (strcmp(pname, name)) - continue; - } + if (strcmp(pname, name)) + continue; new_alias: /* need type casts to override 'const' */ From patchwork Mon Jun 10 09:59:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 166297 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp826166ilk; Mon, 10 Jun 2019 03:01:20 -0700 (PDT) X-Google-Smtp-Source: APXvYqx3fZR8tMNkttAz+Vw51Sodp9SdrRozV5+PTq+kevlNq+dthjiefYNijwGLMplLJmK/q5Kn X-Received: by 2002:a17:90a:1b0c:: with SMTP id q12mr20610261pjq.76.1560160880164; Mon, 10 Jun 2019 03:01:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560160880; cv=none; d=google.com; s=arc-20160816; b=esetBDDnNmciCyRnupwlj/6zfAgOkvIpMpBHVdKYpXE3yj4IPS/14b5F5wQqlzJD2i eskm81mwiqkeqX5rH7YpCJ9AB7a92bWc6Nqg+Clf8/SECw4DanyFOOZAvQb167EOaVa6 vbd33YelXDF5xrJbreh1GdMb4r//Uug105hvTkX4gYVvJ2SxlhFP9PBMRIPw5axfFyRg waZCcv3R3Jm1DCXzSz2xKf1GPDWDjDRUDhDOi+cWfRCEFU1Y5loUgm+TCDI6oUUX5wsi eHLximNrIXiFCLk1AZ8Rgn8BN/PqoChq7y7q04NXQcaAsK5nB0/v1Z8xYAlboDpvtmwF 9O6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=7JL/hliHBGqkd+2G4xrJ7P3Fa0x2itknXlmJkm78I7A=; b=CJUOuqXe0Y310uFmXxxqBbBRCtCnMSKS1Pigqv0e2/PtJxqmrFjsDlfnEhrYMKTLbH rQrdZns/4sFdrdalYd9HHm4gryBDTZiAUwh4yHkPybn0bvavnjzitXAQoPOjS+v7xcOK 2eqfTGdJiAr/XJiZZKwAR1K12rOCVmzOSVbZdOizo1Z0+yY7MC96HAzudfjGT0rPpBs8 +Jl4GDrIBwx9PEdEbza4T+lfO243aqAo8LTCUW1a9l+XZuJAM1PWvg9NpAwv0N8mQMD0 j0oy5sHpsPrVo8DabodrSUH2pV/wBTEeWv8HQeDaQ92zBjeow9D8FgTJJ44FJ3c/yT5b OjEw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n11si8762798pgq.498.2019.06.10.03.01.19; Mon, 10 Jun 2019 03:01:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389180AbfFJKBS (ORCPT + 30 others); Mon, 10 Jun 2019 06:01:18 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:56598 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388056AbfFJKBN (ORCPT ); Mon, 10 Jun 2019 06:01:13 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 1ECBB6C34D3F6266CAEF; Mon, 10 Jun 2019 18:01:11 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 10 Jun 2019 18:00:52 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , , John Garry Subject: [PATCH 2/5] perf pmu: Support more complex PMU event aliasing Date: Mon, 10 Jun 2019 17:59:29 +0800 Message-ID: <1560160772-210844-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560160772-210844-1-git-send-email-john.garry@huawei.com> References: <1560160772-210844-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The jevent "Unit" field is used for uncore PMU alias definition. The form uncore_pmu_example_X is supported, where "X" is a wildcard, to support multiple instances of the same PMU in a system. Unfortunately this format not suitable for all uncore PMUs; take the Hisi DDRC uncore PMU for example, where the name is in the form hisi_scclX_ddrcY. For the current jevent parsing, we would be required to hardcode an uncore alias translation for each possible value of X. This is not scalable. Instead, add support for "Unit" field in the form "hisi_sccl,ddrc", where we can match by hisi_scclX and ddrcY. Tokens in Unit field are delimited by ','. Signed-off-by: John Garry --- tools/perf/util/pmu.c | 45 ++++++++++++++++++++++++++++++++++++++----- 1 file changed, 40 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 036047f56efa..f00cae750086 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -700,6 +700,44 @@ struct pmu_events_map *perf_pmu__find_map(struct perf_pmu *pmu) return map; } +static bool pmu_uncore_alias_match(const char *pmu_name, const char *name) +{ + /* + * uncore alias may be from different PMU + * with common prefix + */ + if (!strncmp(pmu_name, name, strlen(pmu_name))) + return true; + + /* match strings with delimiter, ',' */ + while (1) { + const char *delimiter; + char token[256] = {}; + const char *found_token; + int token_len; + + delimiter = strchr(pmu_name, ','); + if (delimiter) { + token_len = delimiter - pmu_name; + } else { + token_len = strlen(pmu_name); + } + + memcpy(token, pmu_name, token_len); + + found_token = strstr(name, token); + if (!found_token) + return false; + + /* No more delimiters, so we must be a match */ + if (!delimiter) + return true; + + pmu_name += token_len + 1; + name = found_token + token_len; + } +} + /* * From the pmu_events_map, find the table of PMU events that corresponds * to the current running CPU. Then, add all PMU events from that table @@ -730,12 +768,9 @@ static void pmu_add_cpu_aliases(struct list_head *head, struct perf_pmu *pmu) break; } - /* - * uncore alias may be from different PMU - * with common prefix - */ + if (pmu_is_uncore(name) && - !strncmp(pname, name, strlen(pname))) + pmu_uncore_alias_match(pname, name)) goto new_alias; if (strcmp(pname, name)) From patchwork Mon Jun 10 09:59:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 166299 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp826293ilk; Mon, 10 Jun 2019 03:01:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqxHxcKUo6DAR50jM1uB1l5Xx+0ipzXZivJ75S0Kno7Fmgi0NsFZhqnq01l5YNlAHfkIrLp/ X-Received: by 2002:a17:902:6ac6:: with SMTP id i6mr55736947plt.233.1560160885772; Mon, 10 Jun 2019 03:01:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560160885; cv=none; d=google.com; s=arc-20160816; b=PHiM9GBjwobFXuhh/BSDeULJTM/JE78kyHnjbMGMpnUvK9uW46BxY6FTAwIt2nEyZk UJHZK1EnxWi/jR54DipIX5y/odb8b1teOFD1XQ3eai2U4QLGIDmudp13M+9owG2ylk5E p0vz+EXV4a2+81StxNYuGjDq7WKdvEq7tEN0tWXfg59Ft79n5U3QtKAcJhjiBCcJxMWT JYlGG0pKx+1jPEW5KSQtFY+dJlu4C0rj6RQdzr4lUbfX33C3TYrJ1O+j8KC6LhcJaBic DInWNT58mJeBOh/w0j4l0TAq86oaueQXN6sBp81jSq1Q6r3iYq4eeojczP7RVDt7fIwb 7Kdw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=8Nv2ooLIafCn/yHqCQ+gvUgPLmlspUETdYlqbLfY0ok=; b=n/fqixS2rEZNYGDPTG+Ddyynr1YQKLxsdiuQEs7t14Z3J/oyPLhTv9W98WlRHJbu+9 euoVRVoARRVVebOB+k8fKxMI85dGYOnXTNz6Tjbl3u/QItjZ58q8ra9T2mm2/6Rc6GmD /e97YMOrd9fmCfAYTTCoPSiZr72YeZQ2hKNWYOg+iqe7JIRxCPCUgj+kITYFLA7b5Oc4 ltsGxyf7AEFIwi9cfMMdVhJXRjlvKt72oEXagAHnD/wGU9twS5Rxpdt0OgW6RoVg/eEU 1+dSOGSxSRgecUhkfE+U8LsZWROifjAAr+ZUXLjTmra/ySF4Lv9RNS6BWlp3P/mU/tek D0oQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y12si9754000pgr.329.2019.06.10.03.01.25; Mon, 10 Jun 2019 03:01:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389219AbfFJKBZ (ORCPT + 30 others); Mon, 10 Jun 2019 06:01:25 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:56642 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2389034AbfFJKBO (ORCPT ); Mon, 10 Jun 2019 06:01:14 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 2E5DBBBC5DAFD6257719; Mon, 10 Jun 2019 18:01:11 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 10 Jun 2019 18:00:52 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , , John Garry Subject: [PATCH 3/5] perf jevents: Add support for Hisi hip08 DDRC PMU aliasing Date: Mon, 10 Jun 2019 17:59:30 +0800 Message-ID: <1560160772-210844-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560160772-210844-1-git-send-email-john.garry@huawei.com> References: <1560160772-210844-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for Hisi hip08 DDRC PMU event aliasing. We can now do something like this: $perf list [snip] uncore ddrc: uncore_hisi_sccl_ddrc.act_cmd [DDRC active commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.flux_rcmd [DDRC read commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.flux_wcmd [DDRC write commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.flux_wr [DDRC precharge commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.rnk_chg [DDRC rank commands. Unit: hisi_sccl,ddrc] uncore_hisi_sccl_ddrc.rw_chg [DDRC read and write changes. Unit: hisi_sccl,ddrc] $sudo ./perf stat -e uncore_hisi_sccl_ddrc.flux_rcmd --no-merge sleep 1 Performance counter stats for 'system wide': 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc0] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc1] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc3] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc1] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc2] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc0] 25,722 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl1_ddrc2] 0 uncore_hisi_sccl_ddrc.flux_rcmd [hisi_sccl3_ddrc3] 1.001344685 seconds time elapsed The kernel driver is in drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c Signed-off-by: John Garry --- .../arm64/hisilicon/hip08/uncore-ddrc.json | 44 +++++++++++++++++++ tools/perf/pmu-events/jevents.c | 1 + 2 files changed, 45 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json -- 2.17.1 diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json new file mode 100644 index 000000000000..901b1fe65629 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json @@ -0,0 +1,44 @@ +[ + { + "EventCode": "0x02", + "EventName": "uncore_hisi_sccl_ddrc.flux_wcmd", + "BriefDescription": "DDRC write commands", + "PublicDescription": "DDRC write commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x03", + "EventName": "uncore_hisi_sccl_ddrc.flux_rcmd", + "BriefDescription": "DDRC read commands", + "PublicDescription": "DDRC read commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x04", + "EventName": "uncore_hisi_sccl_ddrc.flux_wr", + "BriefDescription": "DDRC precharge commands", + "PublicDescription": "DDRC precharge commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x05", + "EventName": "uncore_hisi_sccl_ddrc.act_cmd", + "BriefDescription": "DDRC active commands", + "PublicDescription": "DDRC active commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x06", + "EventName": "uncore_hisi_sccl_ddrc.rnk_chg", + "BriefDescription": "DDRC rank commands", + "PublicDescription": "DDRC rank commands", + "Unit": "hisi_sccl,ddrc", + }, + { + "EventCode": "0x07", + "EventName": "uncore_hisi_sccl_ddrc.rw_chg", + "BriefDescription": "DDRC read and write changes", + "PublicDescription": "DDRC read and write changes", + "Unit": "hisi_sccl,ddrc", + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 58f77fd0f59f..cf9a60333554 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -236,6 +236,7 @@ static struct map { { "CPU-M-CF", "cpum_cf" }, { "CPU-M-SF", "cpum_sf" }, { "UPI LL", "uncore_upi" }, + { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, {} }; From patchwork Mon Jun 10 09:59:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 166298 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp826236ilk; Mon, 10 Jun 2019 03:01:23 -0700 (PDT) X-Google-Smtp-Source: APXvYqwTpR8XR/rAmckJ/KPwEnfOGkP5wrY485Fr4c9Fk8ZoibGvOOc+yzkKkBc8KJI38LOACjsE X-Received: by 2002:aa7:940c:: with SMTP id x12mr44579188pfo.80.1560160883041; Mon, 10 Jun 2019 03:01:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560160883; cv=none; d=google.com; s=arc-20160816; b=0PTE2SVtHbVYh0slvQPdVpDEGjNEJBXWbY6W/xru4t3wpufv0MdYUPrG6hpnRPTWrS TR252jxFXZvsWpfSALjV3Zm5yjENG+wS/mqprre6ybRmHxOcMoXXjmMx62bBlSzvieKG Vx1AHVXfmF18v0Gqqc+0uBLdVgutOq2uSpQzu3E4GWm9wVxZEpN1DZMcBy6QZzAY5Tf2 cpq086yn7s9DJhSakdQRL1xPyXzrishoRE4+1ySe9Pe6DRRmDbRyH9Xz97E9Ep5uQUMx 6HHq6vAjjWTBLuD9/RJ8PBRZx1fGA6oTen9bpC02WoUq+7dpNsj06G0DE9vhurHNzr/0 x58Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=wTCQxUQwQ1cXMlc3LgA65BE1DCr6LO//vd0o86jdlkg=; b=ZXcnY5667q7RpxWRHGeXSMwiHT5aVKxzPrn8yRAGmIbjdKXJKUap+hBvhAr84dN+EG gjW4xBdnw8ORGuUIxeVooX7ZflUUaXYShTH2tQ/kRSJ/f7/Wvzsxc7dTfFDe66DP1213 bMTzgn5nbFUnoemRRrga+XlETeUCsSo3Zci+WpZEqSd1ZqR5jqFVOfckxw7RcEdC+xnA GnXunH+6zRx71fTsEr5pk2xG9UgbNUdGPzkvWSKArhGE9yZ2b/SIdAPgux+ydOTcoPCI EQGNx8iKieIhSL4xLH/NRGPOAj5nDAJ6BEINCP1M75z2Cxs4fdLbiaLluNgonbASi7DE aCEQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y12si9754000pgr.329.2019.06.10.03.01.22; Mon, 10 Jun 2019 03:01:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389150AbfFJKBR (ORCPT + 30 others); Mon, 10 Jun 2019 06:01:17 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:56522 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2389030AbfFJKBN (ORCPT ); Mon, 10 Jun 2019 06:01:13 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 0AE522FA1468851684E8; Mon, 10 Jun 2019 18:01:11 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 10 Jun 2019 18:00:52 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , , John Garry Subject: [PATCH 4/5] perf jevents: Add support for Hisi hip08 HHA PMU aliasing Date: Mon, 10 Jun 2019 17:59:31 +0800 Message-ID: <1560160772-210844-5-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560160772-210844-1-git-send-email-john.garry@huawei.com> References: <1560160772-210844-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for Hisi hip08 HHA PMU aliasing. The kernel driver is in drivers/perf/hisilicon/hisi_uncore_hha_pmu.c Signed-off-by: John Garry --- .../arm64/hisilicon/hip08/uncore-hha.json | 51 +++++++++++++++++++ tools/perf/pmu-events/jevents.c | 1 + 2 files changed, 52 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json -- 2.17.1 diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json new file mode 100644 index 000000000000..f94b8513166e --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json @@ -0,0 +1,51 @@ +[ + { + "EventCode": "0x00", + "EventName": "uncore_hisi_sccl_hha.rx_ops_num", + "BriefDescription": "The number of all operations received by the HHA", + "PublicDescription": "The number of all operations received by the HHA", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x01", + "EventName": "uncore_hisi_sccl_hha.rx_outer", + "BriefDescription": "The number of all operations received by the HHA from another socket", + "PublicDescription": "The number of all operations received by the HHA from another socket", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x02", + "EventName": "uncore_hisi_sccl_hha.rx_sccl", + "BriefDescription": "The number of all operations received by the HHA from another SCCL in this socket", + "PublicDescription": "The number of all operations received by the HHA from another SCCL in this socket", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x1c", + "EventName": "uncore_hisi_sccl_hha.rd_ddr_64b", + "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes", + "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 64bytes", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x1d", + "EventName": "uncore_hisi_sccl_hha.wr_dr_64b", + "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes", + "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x1e", + "EventName": "uncore_hisi_sccl_hha.rd_ddr_128b", + "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes", + "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes", + "Unit": "hisi_sccl,hha", + }, + { + "EventCode": "0x1f", + "EventName": "uncore_hisi_sccl_hha.wr_ddr_128b", + "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes", + "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes", + "Unit": "hisi_sccl,hha", + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index cf9a60333554..909e53e3b5bd 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -237,6 +237,7 @@ static struct map { { "CPU-M-SF", "cpum_sf" }, { "UPI LL", "uncore_upi" }, { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, + { "hisi_sccl,hha", "hisi_sccl,hha" }, {} }; From patchwork Mon Jun 10 09:59:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 166300 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp826355ilk; Mon, 10 Jun 2019 03:01:29 -0700 (PDT) X-Google-Smtp-Source: APXvYqyNDnNgVPjUGO2uzbAAWk/6nDoS92g4ydMP1tjKDX8G3BklP+91r483V08zKKBjzZhBk2yi X-Received: by 2002:a62:63c6:: with SMTP id x189mr61779974pfb.31.1560160889411; Mon, 10 Jun 2019 03:01:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560160889; cv=none; d=google.com; s=arc-20160816; b=F/jnt7fqzUrCN5NztP6pMP6CCTcMuQOJpKHn7GYbuGGAqLHFofpmJ9RqFItqS//Mim rLKZRiZa2pcJrTIH69mmfASIIty+ayfXdzuHH348lDTs8Hl7g+vwbfLBfER1cZnhWRum OgSIz+v/wt2Eu/Ky411mI4ZInhHmv2Yv1co3+i5y+sgcZrHVQW46FYYIYZvo2GEMMVxz +00pJHx5v7OLeBpghCudRRhz/jx4zhVSVwhnEVVfjI+aiJFopHDnX8/ODAYbkAH8ykO/ pxQQSSDATqkhkuGxYeBWJAJ+GynYK+3GhFr/CqyuwBnM3zPpXFjsMcDU2z69lyB5M/eP rw3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=xGdNcNi1uBYyCywN1HGoLzcZ9c/Wd7lJ8JoRJySnJCE=; b=AWKFgJQOUXBSQnzQD6yUSdcArb5dsJ7ajWACpqFszfjbDPrnNXDA4wF9P66gcropry 3tcQeqEK23l4p0Z1J4WL/x2aTpvASTwokb/9IWOQuFcBjqMuEKBJT6mMb5UGsxM4qFT3 +FEV6CRPj3bpJdO7Uzb/nAy51jkoxaVdY3esL5+p6K6u7pY0OFmWl71UoPeYb27Ok1ds We2SIPsFfq8AHkzKlI8aUE6ZEcMPloetEM1wZFmuWp6WFr1HB8WsITDv4+A5sQdtG6OR fiwcY1vyXZuX0e7+ZRk2FvorCqxzkHr+Mdm7U2VfHM1414/6KOhKuPzAO1SY+KfI0fZ3 VOgQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k13si8830729pll.64.2019.06.10.03.01.28; Mon, 10 Jun 2019 03:01:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389209AbfFJKBY (ORCPT + 30 others); Mon, 10 Jun 2019 06:01:24 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:56684 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2389020AbfFJKBQ (ORCPT ); Mon, 10 Jun 2019 06:01:16 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 7A1D1DF86D7B64D91357; Mon, 10 Jun 2019 18:01:11 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 10 Jun 2019 18:00:52 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , , John Garry Subject: [PATCH 5/5] perf jevents: Add support for Hisi hip08 L3C PMU aliasing Date: Mon, 10 Jun 2019 17:59:32 +0800 Message-ID: <1560160772-210844-6-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1560160772-210844-1-git-send-email-john.garry@huawei.com> References: <1560160772-210844-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for Hisi hip08 L3C PMU event aliasing. The kernel driver is in drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c Signed-off-by: John Garry --- .../arm64/hisilicon/hip08/uncore-l3c.json | 37 +++++++++++++++++++ tools/perf/pmu-events/jevents.c | 1 + 2 files changed, 38 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json -- 2.17.1 diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json new file mode 100644 index 000000000000..5bdc1a533d5e --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json @@ -0,0 +1,37 @@ +[ + { + "EventCode": "0x00", + "EventName": "uncore_hisi_sccl_l3c.rd_cpipe", + "BriefDescription": "Total read accesses", + "PublicDescription": "Total read accesses", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x01", + "EventName": "uncore_hisi_sccl_l3c.wr_cpipe", + "BriefDescription": "Total write accesses", + "PublicDescription": "Total write accesses", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x02", + "EventName": "uncore_hisi_sccl_l3c.rd_hit_cpipe", + "BriefDescription": "Total read hits", + "PublicDescription": "Total read hits", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x03", + "EventName": "uncore_hisi_sccl_l3c.wr_hit_cpipe", + "BriefDescription": "Total write hits", + "PublicDescription": "Total write hits", + "Unit": "hisi_sccl,l3c", + }, + { + "EventCode": "0x04", + "EventName": "uncore_hisi_sccl_l3c.victim_num", + "BriefDescription": "l3c precharge commands", + "PublicDescription": "l3c precharge commands", + "Unit": "hisi_sccl,l3c", + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 909e53e3b5bd..7d241efd03de 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -238,6 +238,7 @@ static struct map { { "UPI LL", "uncore_upi" }, { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, { "hisi_sccl,hha", "hisi_sccl,hha" }, + { "hisi_sccl,l3c", "hisi_sccl,l3c" }, {} };