From patchwork Wed May 10 13:28:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minda Chen X-Patchwork-Id: 680666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB677C7EE22 for ; Wed, 10 May 2023 13:28:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237092AbjEJN2d (ORCPT ); Wed, 10 May 2023 09:28:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237082AbjEJN2c (ORCPT ); Wed, 10 May 2023 09:28:32 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0CB861B2; Wed, 10 May 2023 06:28:22 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id D411D24E143; Wed, 10 May 2023 21:28:18 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 21:28:18 +0800 Received: from ubuntu.localdomain (183.27.98.219) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 21:28:17 +0800 From: Minda Chen To: Rob Herring , Krzysztof Kozlowski , Pawel Laszczak , Greg Kroah-Hartman , Peter Chen , Roger Quadros , Philipp Zabel CC: , , , Minda Chen Subject: [PATCH v2 1/2] dt-bindings: cdns,usb3: Add clock and reset Date: Wed, 10 May 2023 21:28:15 +0800 Message-ID: <20230510132816.108820-2-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230510132816.108820-1-minda.chen@starfivetech.com> References: <20230510132816.108820-1-minda.chen@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.98.219] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org To support generic clock and reset init in Cadence USBSS controller, add clock and reset dts configuration. Signed-off-by: Minda Chen --- .../devicetree/bindings/usb/cdns,usb3.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml index cae46c4982ad..623c6b34dee3 100644 --- a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml +++ b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml @@ -42,6 +42,18 @@ properties: - const: otg - const: wakeup + clocks: + minItems: 1 + maxItems: 8 + description: + USB controller clocks. + + resets: + minItems: 1 + maxItems: 8 + description: + USB controller generic resets. + dr_mode: enum: [host, otg, peripheral] @@ -98,5 +110,7 @@ examples: interrupt-names = "host", "peripheral", "otg"; maximum-speed = "super-speed"; dr_mode = "otg"; + clocks = <&clk 1>, <&clk 2>, <&clk 3>; + resets = <&rst 1>, <&rst 2>, <&rst 3>; }; }; From patchwork Wed May 10 13:28:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minda Chen X-Patchwork-Id: 680665 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBCE7C77B7C for ; Wed, 10 May 2023 13:28:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232226AbjEJN2e (ORCPT ); Wed, 10 May 2023 09:28:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237083AbjEJN2c (ORCPT ); Wed, 10 May 2023 09:28:32 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2D5E44A8; Wed, 10 May 2023 06:28:25 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 74C4124E1B7; Wed, 10 May 2023 21:28:19 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 21:28:19 +0800 Received: from ubuntu.localdomain (183.27.98.219) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 10 May 2023 21:28:18 +0800 From: Minda Chen To: Rob Herring , Krzysztof Kozlowski , Pawel Laszczak , Greg Kroah-Hartman , Peter Chen , Roger Quadros , Philipp Zabel CC: , , , Minda Chen Subject: [PATCH v2 2/2] usb: cdns3: cdns3-plat: Add clk and reset init Date: Wed, 10 May 2023 21:28:16 +0800 Message-ID: <20230510132816.108820-3-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230510132816.108820-1-minda.chen@starfivetech.com> References: <20230510132816.108820-1-minda.chen@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.98.219] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add gereric clk and reset init codes to Cadence USBSS controller. The codes has been tested by starfive vf2 board. Signed-off-by: Minda Chen --- drivers/usb/cdns3/cdns3-plat.c | 58 ++++++++++++++++++++++++++++++++++ drivers/usb/cdns3/core.h | 3 ++ 2 files changed, 61 insertions(+) diff --git a/drivers/usb/cdns3/cdns3-plat.c b/drivers/usb/cdns3/cdns3-plat.c index 2bc5d094548b..30da808e0a2f 100644 --- a/drivers/usb/cdns3/cdns3-plat.c +++ b/drivers/usb/cdns3/cdns3-plat.c @@ -12,11 +12,13 @@ * Roger Quadros */ +#include #include #include #include #include #include +#include #include "core.h" #include "gadget-export.h" @@ -43,6 +45,40 @@ static void set_phy_power_off(struct cdns *cdns) phy_power_off(cdns->usb2_phy); } +static int cdns3_clk_rst_init(struct cdns *cdns, bool clk_only) +{ + int ret = 0; + + if (cdns->num_clks) { + ret = clk_bulk_prepare_enable(cdns->num_clks, cdns->clks); + if (ret) + return ret; + } + + if (clk_only) + return ret; + + ret = reset_control_deassert(cdns->resets); + if (ret) + goto err_clk_init; + + return ret; + +err_clk_init: + if (cdns->num_clks) + clk_bulk_disable_unprepare(cdns->num_clks, cdns->clks); + return ret; +} + +static void cdns3_clk_rst_deinit(struct cdns *cdns, bool clk_only) +{ + if (!clk_only) + reset_control_assert(cdns->resets); + + if (cdns->num_clks) + clk_bulk_disable_unprepare(cdns->num_clks, cdns->clks); +} + /** * cdns3_plat_probe - probe for cdns3 core device * @pdev: Pointer to cdns3 core platform device @@ -116,6 +152,16 @@ static int cdns3_plat_probe(struct platform_device *pdev) cdns->wakeup_irq = 0x0; } + ret = devm_clk_bulk_get_all(dev, &cdns->clks); + if (ret < 0) + return ret; + + cdns->num_clks = ret; + + cdns->resets = devm_reset_control_array_get_optional_exclusive(dev); + if (IS_ERR(cdns->resets)) + return PTR_ERR(cdns->resets); + cdns->usb2_phy = devm_phy_optional_get(dev, "cdns3,usb2-phy"); if (IS_ERR(cdns->usb2_phy)) return PTR_ERR(cdns->usb2_phy); @@ -128,6 +174,10 @@ static int cdns3_plat_probe(struct platform_device *pdev) if (IS_ERR(cdns->usb3_phy)) return PTR_ERR(cdns->usb3_phy); + ret = cdns3_clk_rst_init(cdns, false); + if (ret) + return ret; + ret = phy_init(cdns->usb3_phy); if (ret) goto err_phy3_init; @@ -165,6 +215,7 @@ static int cdns3_plat_probe(struct platform_device *pdev) phy_exit(cdns->usb3_phy); err_phy3_init: phy_exit(cdns->usb2_phy); + cdns3_clk_rst_deinit(cdns, false); return ret; } @@ -187,6 +238,8 @@ static int cdns3_plat_remove(struct platform_device *pdev) set_phy_power_off(cdns); phy_exit(cdns->usb2_phy); phy_exit(cdns->usb3_phy); + cdns3_clk_rst_deinit(cdns, false); + return 0; } @@ -220,6 +273,8 @@ static int cdns3_controller_suspend(struct device *dev, pm_message_t msg) cdns3_set_platform_suspend(cdns->dev, true, wakeup); set_phy_power_off(cdns); + if (!PMSG_IS_AUTO(msg)) + cdns3_clk_rst_deinit(cdns, true); spin_lock_irqsave(&cdns->lock, flags); cdns->in_lpm = true; spin_unlock_irqrestore(&cdns->lock, flags); @@ -237,6 +292,9 @@ static int cdns3_controller_resume(struct device *dev, pm_message_t msg) if (!cdns->in_lpm) return 0; + if (!PMSG_IS_AUTO(msg)) + cdns3_clk_rst_init(cdns, true); + if (cdns_power_is_lost(cdns)) { phy_exit(cdns->usb2_phy); ret = phy_init(cdns->usb2_phy); diff --git a/drivers/usb/cdns3/core.h b/drivers/usb/cdns3/core.h index 2d332a788871..b894768ee485 100644 --- a/drivers/usb/cdns3/core.h +++ b/drivers/usb/cdns3/core.h @@ -111,6 +111,9 @@ struct cdns { struct mutex mutex; enum usb_dr_mode dr_mode; struct usb_role_switch *role_sw; + struct reset_control *resets; + struct clk_bulk_data *clks; + int num_clks; bool in_lpm; bool wakeup_pending; struct cdns3_platform_data *pdata;