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[209.51.188.17]) by mx.google.com with ESMTPS id t19-20020ac85893000000b003def707dfc7si18031221qta.525.2023.05.02.04.22.20 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 May 2023 04:22:20 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IRVd2Vwb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pto3d-0000cz-Lz; Tue, 02 May 2023 07:20:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pto3c-0000cK-Om for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:32 -0400 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pto3Z-0003D0-Gn for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:32 -0400 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-3f315712406so164142545e9.0 for ; Tue, 02 May 2023 04:20:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683026425; x=1685618425; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=czFfn3mdhb3cc0K7eXA/dlkeA2fEfLq9sRo8IDRWWf8=; b=IRVd2Vwb0TdoBgUwmVtAFHzAS+H/1hph9EcoWK6yXDvJYJ3XoW+q2U80NJksO9bhJd DZ6Q4EIQ9HshCyn+5c7S+rbzHu42DWPn3sKzs3PBjpAoPm6k7zOCckN/Ji1MO9ZTiwp+ nDVRjWnJVoj6sFI3BD+qGmeTIqaZRs9dYaY2EdDGhsu5bw+/iX7MLo5TDmhSmtPgXn/Z 0f4Hw1RfpO2gxrXGNWfRLlknJFzIawEsP/8L7Yjlut9sK3hcd2CzCzEtz0mZ6znedNpk jtgtBCUmluIqt9fd50XMguUH8e6z9GHY1m95SEarfAkXBCqp8xaGw6sUKPzYn3XX6a92 Dvsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683026425; x=1685618425; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=czFfn3mdhb3cc0K7eXA/dlkeA2fEfLq9sRo8IDRWWf8=; b=KNfDsEPkgL+JRETsEb2I0toKVVW/hNgvr1YOs8YUuiCP4MmOC9npo1oo3Cnlz/DMLD 0Drc6G87x1dCoBdHBO4ym2m8em9wCloa3vrSGJp+mV6Lie/wz0crCNtlLuje/NZ6ykmU 1aNOt7z08iJyDQRp5b7vO6C5DB488E1jupuX/IMjXRQ6mH0Xv+Wt825M5HRWmoufQZ54 VgDoAn5V9Ew17zQtrzJEvJ1oOMtmPhTEur6k54xJXc82pTWkMsSrw+j21dMX641Rgl/g GUOFPTXfY7s6kIZAMTsK7cST9uh58bY4pN4dqFlJ5AhI7a7fu2r3arUwv57unfr6LkwJ Qf7Q== X-Gm-Message-State: AC+VfDwgvs1IW0gQxPuR0nV1jdTbQN/ZcVKyItYH+8m8jgT2eGpzPPfY dvknkbkws+AceQ3fw9egZCpXWylJzRpSNRTplT+ltg== X-Received: by 2002:adf:db4c:0:b0:306:31cb:25fb with SMTP id f12-20020adfdb4c000000b0030631cb25fbmr3214433wrj.17.1683026425307; Tue, 02 May 2023 04:20:25 -0700 (PDT) Received: from stoup.Home ([2a02:c7c:74db:8d00:ad29:f02c:48a2:269c]) by smtp.gmail.com with ESMTPSA id z16-20020a05600c221000b003ee1b2ab9a0sm35182623wml.11.2023.05.02.04.20.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 May 2023 04:20:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Juan Quintela Subject: [PULL 01/12] softmmu: Tidy dirtylimit_dirty_ring_full_time Date: Tue, 2 May 2023 12:20:12 +0100 Message-Id: <20230502112023.776823-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230502112023.776823-1-richard.henderson@linaro.org> References: <20230502112023.776823-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Drop inline marker: let compiler decide. Change return type to uint64_t: this matches the computation in the return statement and the local variable assignment in the caller. Rename local to dirty_ring_size_MB to fix typo. Simplify conversion to MiB via qemu_target_page_bits and right shift. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Juan Quintela Signed-off-by: Richard Henderson --- softmmu/dirtylimit.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/softmmu/dirtylimit.c b/softmmu/dirtylimit.c index 82986c1499..71bf6dc7a4 100644 --- a/softmmu/dirtylimit.c +++ b/softmmu/dirtylimit.c @@ -232,18 +232,23 @@ bool dirtylimit_vcpu_index_valid(int cpu_index) cpu_index >= ms->smp.max_cpus); } -static inline int64_t dirtylimit_dirty_ring_full_time(uint64_t dirtyrate) +static uint64_t dirtylimit_dirty_ring_full_time(uint64_t dirtyrate) { static uint64_t max_dirtyrate; - uint32_t dirty_ring_size = kvm_dirty_ring_size(); - uint64_t dirty_ring_size_meory_MB = - dirty_ring_size * qemu_target_page_size() >> 20; + unsigned target_page_bits = qemu_target_page_bits(); + uint64_t dirty_ring_size_MB; + + /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ + assert(target_page_bits < 20); + + /* Convert ring size (pages) to MiB (2**20). */ + dirty_ring_size_MB = kvm_dirty_ring_size() >> (20 - target_page_bits); if (max_dirtyrate < dirtyrate) { max_dirtyrate = dirtyrate; } - return dirty_ring_size_meory_MB * 1000000 / max_dirtyrate; + return dirty_ring_size_MB * 1000000 / max_dirtyrate; } static inline bool dirtylimit_done(uint64_t quota, From patchwork Tue May 2 11:20:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678352 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446612wrs; Tue, 2 May 2023 04:22:16 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6tTiT+bSyCeECWKRHS+aFgBw5/SJ3m0eVPDYkyn6bHu61dvIzSf78mP1gZraYVLClE3Xc2 X-Received: by 2002:a05:6214:2aa3:b0:5e5:c00c:8189 with SMTP id js3-20020a0562142aa300b005e5c00c8189mr3323042qvb.10.1683026536335; Tue, 02 May 2023 04:22:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026536; cv=none; d=google.com; s=arc-20160816; b=JPobb3BMrPtwn7LDIcWKA5FOL6Dw+fjS1UmTiDUTn+RHnhTEd56HgOYwpp29bowk/Z XEjZoNpHQjgYrV7ZB3J3Q5ekKykZNMYePmbsZFOYmkHIiVuL9K+03T1qtEx3zFAx086N 2FeWoCLaeFtJazWo80r3seOESHSCky4ZdC1/i51Wx69nZnlsNi487sovgX8HA4DdAY5i Sm0uTT7WdgXeb6MrE76wHyICzpGWsszGmteiJroHR7VrJ94zpTg+usROOq8Zm+zotxB7 2Me+BU/A0cMUUlSLX6NSZjArhNw1G8bMRjzrT0d7/UU+AUFIOEQ+dXoGhBqAQg2rQ2mO mqOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lK51qYTnNnXJZN0e/9Jj4Bv1cCHWx7/0IfdphjJpI60=; b=ThZ9SfSvhq9yiuIWDVYIk+FKetfTDiil8cyaZUYxxI2IeenvTGJsdfQTa+xnJDFL3m V0SU9iTnrIBl87P0sVIrbloctMhpU41+kQKwr5lI0AULm80rPeZ4/XI2SxpXhNFuw1FB lKGwxygzOOq3Hf/C02Bv0HNKzqLVrNGHBrZ6hY2ANe2DI/6swz0BGT7fszvzZ3+PhAc5 0HgAeIgr68m66ZZ4Ng36WUkk80m+oTXO0C7dApVaadSMT1J2PLReNPwFt6ynE5c0HHzc BU8gG3G37zsQ2bMJeDlYOgrkc3LRIKPB9xKGJLkubEcWyIEaUpsDJZPYVG50jR8vWiKH b4+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L95KvQ6r; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tue, 02 May 2023 04:20:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Weiwei Li , Junqiang Wang , LIU Zhiwei Subject: [PULL 02/12] accel/tcg: Uncache the host address for instruction fetch when tlb size < 1 Date: Tue, 2 May 2023 12:20:13 +0100 Message-Id: <20230502112023.776823-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230502112023.776823-1-richard.henderson@linaro.org> References: <20230502112023.776823-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Weiwei Li When PMP entry overlap part of the page, we'll set the tlb_size to 1, which will make the address in tlb entry set with TLB_INVALID_MASK, and the next access will again go through tlb_fill.However, this way will not work in tb_gen_code() => get_page_addr_code_hostp(): the TLB host address will be cached, and the following instructions can use this host address directly which may lead to the bypass of PMP related check. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1542. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: LIU Zhiwei Reviewed-by: Richard Henderson Message-Id: <20230422130329.23555-6-liweiwei@iscas.ac.cn> --- accel/tcg/cputlb.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index e984a98dc4..efa0cb67c9 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1696,6 +1696,11 @@ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, if (p == NULL) { return -1; } + + if (full->lg_page_size < TARGET_PAGE_BITS) { + return -1; + } + if (hostp) { *hostp = p; } From patchwork Tue May 2 11:20:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678349 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446454wrs; Tue, 2 May 2023 04:21:51 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6/wWZIRZIZjcJKkKqlXm2rTBp1cbTkJEddBZgL0lvVqHOLvKsLbHa5aAXYyEQPrKddM9UF X-Received: by 2002:a05:6214:76c:b0:60e:52e:33df with SMTP id f12-20020a056214076c00b0060e052e33dfmr3167944qvz.36.1683026511364; Tue, 02 May 2023 04:21:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026511; cv=none; d=google.com; s=arc-20160816; b=Z4hXMqzkq4DvNfNnx34dlpSuN0aulS06NT5IGRkWp+IwFSd6VKlz1jLpLuKUD1uG/9 f0XLMmCO0cudHIgxWAOo0pXdRGU2h2UdI3M5Fv2B0njK6QFmie5umW1zLgvef8AATFHJ ugPL4o2Q5iYKtLFWCzKHBPpkKzGiiYNgSbA0GLnWQ7Ea7Pys93i1STxFQzmv6nJMZ8aD iJb7HFtbua8oFpvGPtPQFvUdghmopOvVf7b2+C+yBhOR3PfN2CRAKJiBjjSmVtzobMOK xwW/vUdaoGGCP/IV8lRm4m2AcKS0afPsGU4dULE+16+6kGU6cKKweayxJwW2X3hliar8 /Vbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LwU44caHLzwnuUU4efWp0isf3CaogQy6f09UO9nNvLc=; b=xWBvaG4GbANhjxz4Un4kTjjvtVgm3QMjISoDBfRmZja6zj2MYugrVjdIpRi5bHGkaq EFbLni7JjbAvMegwEwEKVgFVV3+hNcJSzA5w/GSoUKKZkRLish+CeaSwI15AxbHB3qDl oxLgbxCgd853gMbDsduNmj7HzAE8NETedIfkG9rpmJQZwuoBMFQLkJv1YVHv6LjZ4W/x lNgxVMhYwiCUKKdF2lGYnOKeC8R7PjIDQ6F09TvRlxaOfOQVGYBaFY8pOQE7TQTqL+/f zuKYzVYYQr3ry/m3RkAYOmo8MdXRddFO4MB9YMkJQuTL/l0GM9PUO9ZW78/CFYxGUEMu 9VFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=g2vsofwH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id iv13-20020ad45ced000000b005ef6a6a174esi17836649qvb.161.2023.05.02.04.21.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 May 2023 04:21:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=g2vsofwH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pto3e-0000dT-AT; Tue, 02 May 2023 07:20:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pto3c-0000cQ-Uy for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:32 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pto3a-0003Db-94 for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:32 -0400 Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-3f1958d3a53so35981365e9.0 for ; Tue, 02 May 2023 04:20:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683026426; x=1685618426; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LwU44caHLzwnuUU4efWp0isf3CaogQy6f09UO9nNvLc=; b=g2vsofwH8NtgVeI3htnKYu44AJsoo6vEdonGNkS386QGcFuSVIBbC0ENos6QPXwC3n pdgETZiU77uoLnSvatm/jUqNe0XZI9dGC7oowi6wOgNZsrcPgfMUGnQAAFc3jctQZ2pd DISXjY34wA3wpAMTXcBiV+l3ITFnsRdVOialB+Ccpu0TcgqCV2jHkOpSQG8GixJDik6t wSl6k0LSFFdxFitutpWyvxoOjP2uRuiu01kZ+MG+jUx+QraArKogs8GlUgwcRev/laAm 9e1osmqvCgFE4YVRPOJ624OUD2yUtGWq2g4I9qCSXdgEjnWVv1cSx5N5Yw4VvuOGZTMB ioBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683026426; x=1685618426; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LwU44caHLzwnuUU4efWp0isf3CaogQy6f09UO9nNvLc=; b=P1sYNuXxxYNrK8ymGo6uw7jtnLGoq407fDkYy6+dSXfo9OaUWD++QOd7ZA51Tuwg7b JvLiY6bJTayuYgsrenV0klglqZlhGN/hwJWMH/65fIMpRRw+bugzb6fFM4Yu/Y8d6ABM HsNH4a//oUvsoAM8+2BygOEPBIS/kLsJBOYGvgZeCuYicO0b75Sssse8V/1FYLzN1L/p Xyf81O0MJ1CHvTEi93HepLhyWnLifRnNlEdvyUh2sJErZ83Spkw0jVAcKP+mPeNjqgPE x7Qt2euUSCK/jQVNADfPe/uGkFceBPEScthOEnEbdOgiDYSyfkBgogbltd8VnSFNl2Td z0Iw== X-Gm-Message-State: AC+VfDzlvgXDhjRans2r9mPr8neGJxpjTjr1dGcNzF+/vPfdRiY+NKPk NW56Ym3hzKwLYIYD/dC+yP3MLba0OSo7A9uyOJ4WvA== X-Received: by 2002:a05:600c:378e:b0:3f2:549b:3ef2 with SMTP id o14-20020a05600c378e00b003f2549b3ef2mr11501957wmr.17.1683026426622; Tue, 02 May 2023 04:20:26 -0700 (PDT) Received: from stoup.Home ([2a02:c7c:74db:8d00:ad29:f02c:48a2:269c]) by smtp.gmail.com with ESMTPSA id z16-20020a05600c221000b003ee1b2ab9a0sm35182623wml.11.2023.05.02.04.20.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 May 2023 04:20:26 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Dickon Hood Subject: [PULL 03/12] qemu/bitops.h: Limit rotate amounts Date: Tue, 2 May 2023 12:20:14 +0100 Message-Id: <20230502112023.776823-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230502112023.776823-1-richard.henderson@linaro.org> References: <20230502112023.776823-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Dickon Hood Rotates have been fixed up to only allow for reasonable rotate amounts (ie, no rotates >7 on an 8b value etc.) This fixes a problem with riscv vector rotate instructions. Signed-off-by: Dickon Hood Reviewed-by: Richard Henderson Message-Id: <20230428144757.57530-9-lawrence.hunter@codethink.co.uk> Signed-off-by: Richard Henderson --- include/qemu/bitops.h | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h index 03213ce952..c443995b3b 100644 --- a/include/qemu/bitops.h +++ b/include/qemu/bitops.h @@ -218,7 +218,8 @@ static inline unsigned long find_first_zero_bit(const unsigned long *addr, */ static inline uint8_t rol8(uint8_t word, unsigned int shift) { - return (word << shift) | (word >> ((8 - shift) & 7)); + shift &= 7; + return (word << shift) | (word >> (8 - shift)); } /** @@ -228,7 +229,8 @@ static inline uint8_t rol8(uint8_t word, unsigned int shift) */ static inline uint8_t ror8(uint8_t word, unsigned int shift) { - return (word >> shift) | (word << ((8 - shift) & 7)); + shift &= 7; + return (word >> shift) | (word << (8 - shift)); } /** @@ -238,7 +240,8 @@ static inline uint8_t ror8(uint8_t word, unsigned int shift) */ static inline uint16_t rol16(uint16_t word, unsigned int shift) { - return (word << shift) | (word >> ((16 - shift) & 15)); + shift &= 15; + return (word << shift) | (word >> (16 - shift)); } /** @@ -248,7 +251,8 @@ static inline uint16_t rol16(uint16_t word, unsigned int shift) */ static inline uint16_t ror16(uint16_t word, unsigned int shift) { - return (word >> shift) | (word << ((16 - shift) & 15)); + shift &= 15; + return (word >> shift) | (word << (16 - shift)); } /** @@ -258,7 +262,8 @@ static inline uint16_t ror16(uint16_t word, unsigned int shift) */ static inline uint32_t rol32(uint32_t word, unsigned int shift) { - return (word << shift) | (word >> ((32 - shift) & 31)); + shift &= 31; + return (word << shift) | (word >> (32 - shift)); } /** @@ -268,7 +273,8 @@ static inline uint32_t rol32(uint32_t word, unsigned int shift) */ static inline uint32_t ror32(uint32_t word, unsigned int shift) { - return (word >> shift) | (word << ((32 - shift) & 31)); + shift &= 31; + return (word >> shift) | (word << (32 - shift)); } /** @@ -278,7 +284,8 @@ static inline uint32_t ror32(uint32_t word, unsigned int shift) */ static inline uint64_t rol64(uint64_t word, unsigned int shift) { - return (word << shift) | (word >> ((64 - shift) & 63)); + shift &= 63; + return (word << shift) | (word >> (64 - shift)); } /** @@ -288,7 +295,8 @@ static inline uint64_t rol64(uint64_t word, unsigned int shift) */ static inline uint64_t ror64(uint64_t word, unsigned int shift) { - return (word >> shift) | (word << ((64 - shift) & 63)); + shift &= 63; + return (word >> shift) | (word << (64 - shift)); } /** From patchwork Tue May 2 11:20:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678346 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446272wrs; Tue, 2 May 2023 04:21:22 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7g1Xei0CieE5u0ZoFPTAGR08ItDk3kZp1INDMxGRkVUdFMMF+vwBoDKoK3RikG+9+zsdnX X-Received: by 2002:ac8:5bc6:0:b0:3ef:5733:29e4 with SMTP id b6-20020ac85bc6000000b003ef573329e4mr26658636qtb.64.1683026482522; Tue, 02 May 2023 04:21:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026482; cv=none; d=google.com; s=arc-20160816; b=tfVFlozLj1Rw/nLibyO4OXcu2ZvJDfL8TtfJ8R71u+tFIC8daP+3cccV42sxixOQf9 OiSAXIf+r6Yj/tDoZc3checIGqgQlk4urgH5lE4phWBsBpY1Qx1X+FXRld08QNA1EmTx gRY0SC70pdsRXRAp5QUi/m6dPXouazA++NIkFBBAOHJcUZWZkyYerXoi65aV6F/Q3gqy iIc6TE8+B1gP576DI0KmICmqkymb+d86lcU8KnKPRWqG1tXmRtoIexh2dfxRHdBf0Fi/ RZmqJUFoHZgQKILGtzJjWnGt1Z1HRYjxKThkYcvp9EvjP+TYYRpGdSQ+mQ4RBjRH6KUV zz9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=m4s47C7gmYdUlM0SIov8ZnFiPUvDgmGeRG+O+etXAiw=; b=c08cHabqqFFVRYOSMbmK2mvOPVGHGxEYBHhWtT2yazOnF+EzhTdJHfOaX8QVbbGj8A V6zMYtOim1KNJ9t373X1TsBfRCQ/ttkJ4uiD0E1ofDIhkl6JjZHrqWDY0eYY5QUkZYmv nmeXAbarn6WYEyOwSrRTA2lclCli8cAdMNcY9iHqBoaCuql5yhTLWrg1s90YWvk1THq8 4uZ14B0HFILO66KWc1k0jIUKILKikH3FJqSBBbWjUjX5ojQIP8BT+uiEpmVLb047jtxg Z2GCD6UDsybCKenAK17oAMxTaHgXGlOBHbig+RFj5nZlXMw6LWYfd6eV0oPjpVpGyY4I psDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Rik5Jyi8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Kiran Ostrolenk Reviewed-by: Richard Henderson Message-Id: <20230428144757.57530-11-lawrence.hunter@codethink.co.uk> Signed-off-by: Richard Henderson --- include/qemu/host-utils.h | 54 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/include/qemu/host-utils.h b/include/qemu/host-utils.h index 3ce62bf4a5..d3b4dce6a9 100644 --- a/include/qemu/host-utils.h +++ b/include/qemu/host-utils.h @@ -107,6 +107,36 @@ static inline uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c) } #endif +/** + * clz8 - count leading zeros in a 8-bit value. + * @val: The value to search + * + * Returns 8 if the value is zero. Note that the GCC builtin is + * undefined if the value is zero. + * + * Note that the GCC builtin will upcast its argument to an `unsigned int` + * so this function subtracts off the number of prepended zeroes. + */ +static inline int clz8(uint8_t val) +{ + return val ? __builtin_clz(val) - 24 : 8; +} + +/** + * clz16 - count leading zeros in a 16-bit value. + * @val: The value to search + * + * Returns 16 if the value is zero. Note that the GCC builtin is + * undefined if the value is zero. + * + * Note that the GCC builtin will upcast its argument to an `unsigned int` + * so this function subtracts off the number of prepended zeroes. + */ +static inline int clz16(uint16_t val) +{ + return val ? __builtin_clz(val) - 16 : 16; +} + /** * clz32 - count leading zeros in a 32-bit value. * @val: The value to search @@ -153,6 +183,30 @@ static inline int clo64(uint64_t val) return clz64(~val); } +/** + * ctz8 - count trailing zeros in a 8-bit value. + * @val: The value to search + * + * Returns 8 if the value is zero. Note that the GCC builtin is + * undefined if the value is zero. + */ +static inline int ctz8(uint8_t val) +{ + return val ? __builtin_ctz(val) : 8; +} + +/** + * ctz16 - count trailing zeros in a 16-bit value. + * @val: The value to search + * + * Returns 16 if the value is zero. Note that the GCC builtin is + * undefined if the value is zero. + */ +static inline int ctz16(uint16_t val) +{ + return val ? __builtin_ctz(val) : 16; +} + /** * ctz32 - count trailing zeros in a 32-bit value. * @val: The value to search From patchwork Tue May 2 11:20:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678350 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446605wrs; Tue, 2 May 2023 04:22:16 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7V+2hFD7Prd8NcJZ183FnpaIvTOUqL5RAeQ+IxNmen9O/sIzekre1e3D+IETkH5hSYncrb X-Received: by 2002:ac8:5f8c:0:b0:3e6:9766:c7e5 with SMTP id j12-20020ac85f8c000000b003e69766c7e5mr34316824qta.31.1683026535807; Tue, 02 May 2023 04:22:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026535; cv=none; d=google.com; s=arc-20160816; b=tSZla1101vWuZ2ZUS1IzLXd5yoBZPHQpOAMmbc3DZRgDqVkyHhm9MR6qlMm9G3vWoF wCLbT8QVTnX0zvoP1smexHZ2TRpbhfkOqSypV0trdF7WCqBtY0mgekJbmTnSUZkYOTEB 4aCc2a5PTfL4FqmUFZtrHA3fekeowpyFP+X0nWy9m7Hk7TYUwMDtgIHbBVUnSJUhAGOy s94+dMhnkNSG4OrkzPeIRpb/E+sXZfR1hwOCYRzIYO6KVrsGjke3Xu07EG974T4qp8M7 wmT+pC/VrJwKSSvbLPgcZ6NtnKlOnbZpcbOHosyqRh0HPNK1qzP7vmaFvgKUpaTOJcig 6Quw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Ee+/tZtVXx1HapVlpwz6x03LyQaqO+PtTzdE1w9ii1A=; b=yJP+FJ9vne44I4s+qsZvg7nu/stNFF52tVVrU+FNo91PWSV5jcIxfVQJmuxXwidJMx VRHOT0Z5xt/Mt1fXUAU5imIkbiSeNwDlxf2VnvIyaTRwwxOAPfJpvYoIdMkxoPDxBLA2 OlIXSJN9nCAsHOmjnRotukgPABWdstdxh+7p/0px6ZOZCePdkrKM9W22SB4mp8BPwJta bfROGXC09gQ27DuOgCDyOw0UEXjbPt/2pDwIjuFPtjJpjrT6ZVmvPRpCUmKj1/QRHHW4 6rr5rIMDF8Adf2208JCRLTVwkF1AAdLZONiyeom9bGSljWlnX5891P4fyRRnU15i0yG+ 5w8A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=le8Xs9Pl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Nazar Kazakov Message-Id: <20230428144757.57530-10-lawrence.hunter@codethink.co.uk> [rth: Split out of larger patch.] Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.h | 1 + include/tcg/tcg-op-gvec.h | 2 ++ accel/tcg/tcg-runtime-gvec.c | 11 +++++++++++ tcg/tcg-op-gvec.c | 17 +++++++++++++++++ 4 files changed, 31 insertions(+) diff --git a/accel/tcg/tcg-runtime.h b/accel/tcg/tcg-runtime.h index e141a6ab24..b8e6421c8a 100644 --- a/accel/tcg/tcg-runtime.h +++ b/accel/tcg/tcg-runtime.h @@ -217,6 +217,7 @@ DEF_HELPER_FLAGS_4(gvec_nor, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_eqv, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(gvec_ands, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_andcs, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_xors, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_ors, TCG_CALL_NO_RWG, void, ptr, ptr, i64, i32) diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h index 28cafbcc5c..6d58683171 100644 --- a/include/tcg/tcg-op-gvec.h +++ b/include/tcg/tcg-op-gvec.h @@ -330,6 +330,8 @@ void tcg_gen_gvec_ori(unsigned vece, uint32_t dofs, uint32_t aofs, void tcg_gen_gvec_ands(unsigned vece, uint32_t dofs, uint32_t aofs, TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_andcs(unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); void tcg_gen_gvec_xors(unsigned vece, uint32_t dofs, uint32_t aofs, TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs, diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c index ac7d28c251..97399493d5 100644 --- a/accel/tcg/tcg-runtime-gvec.c +++ b/accel/tcg/tcg-runtime-gvec.c @@ -550,6 +550,17 @@ void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc) clear_high(d, oprsz, desc); } +void HELPER(gvec_andcs)(void *d, void *a, uint64_t b, uint32_t desc) +{ + intptr_t oprsz = simd_oprsz(desc); + intptr_t i; + + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & ~b; + } + clear_high(d, oprsz, desc); +} + void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c index 047a832f44..9c14908a46 100644 --- a/tcg/tcg-op-gvec.c +++ b/tcg/tcg-op-gvec.c @@ -2761,6 +2761,23 @@ void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs, tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, tmp, &gop_ands); } +void tcg_gen_gvec_andcs(unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i64 c, uint32_t oprsz, uint32_t maxsz) +{ + static GVecGen2s g = { + .fni8 = tcg_gen_andc_i64, + .fniv = tcg_gen_andc_vec, + .fno = gen_helper_gvec_andcs, + .prefer_i64 = TCG_TARGET_REG_BITS == 64, + .vece = MO_64 + }; + + TCGv_i64 tmp = tcg_temp_ebb_new_i64(); + tcg_gen_dup_i64(vece, tmp, c); + tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, c, &g); + tcg_temp_free_i64(tmp); +} + static const GVecGen2s gop_xors = { .fni8 = tcg_gen_xor_i64, .fniv = tcg_gen_xor_vec, From patchwork Tue May 2 11:20:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678351 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446625wrs; Tue, 2 May 2023 04:22:17 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7SbFQ2v+l/N4Xs9SpW+D+sFQxaeh2GpffEUeE/Xb7bJYAwtPwUjrOiMRDigRTkCqXbyA01 X-Received: by 2002:a05:6214:3009:b0:5f1:62d9:3378 with SMTP id ke9-20020a056214300900b005f162d93378mr3702959qvb.52.1683026537335; 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[209.51.188.17]) by mx.google.com with ESMTPS id 9-20020a056214202900b005e321046289si17849481qvf.6.2023.05.02.04.22.17 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 May 2023 04:22:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MMvkvteQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pto3h-0000fk-LL; Tue, 02 May 2023 07:20:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pto3e-0000dW-LX for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:35 -0400 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pto3c-0003FZ-QE for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:34 -0400 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-3f19afc4f60so21756245e9.1 for ; Tue, 02 May 2023 04:20:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683026428; x=1685618428; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aGVAM5f/fVkyzn3zO3fNGB1yt+oMwQWHTxZuqdKZ/tI=; b=MMvkvteQQtaDubChUo5EHNTqGPea+2/tARF/OyghVSyZcor4/jTVxpzAarvntgRO0C Cb80cAcRUrXer4fXRYOu3UIlA38MEQHa/KiscEP5Boy2O0lF37LOZZw41O565DdxRwhw tm29W0TC+WmUliLlcnXLgzfWMCFPkfC9CYDsJ6PtHwtV2c5NhoJ4ULqZUQzEe+Xzok5w VpiklY9tgNeGKlbVo8KjTcBO6ShCOR7+hNI4U9V/cP8+fussGJZLusI3EU5KlD6vWdaQ 72FYYvwJspEiUTCLyuTjyvLgRtbmVNVtEsl23Tl3yiK1OMm6I5Kk3qbAZrMpAa4mvyLb ViMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683026428; x=1685618428; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aGVAM5f/fVkyzn3zO3fNGB1yt+oMwQWHTxZuqdKZ/tI=; b=BLuQWl1LYsw+GHRHtpVetuWnfJz0uLJY9EEPeSCEJ/LPAbBKs1rL3yB4PYe+ifBOZt yGYY5XGsZkQP3RojF8TkqJ6lavPLZ1+sAzP6ehW2plTLA83pphRr9iWZ9TP56JoVwt9x Yn5luitmEeOYv15abeVq72f95BdHFuizeAid14RFVvI8buVKoJJCDXRhf9WDZ5Txqxgx ae69eAAsiEjvwUoGpN9QT/Tyw1bwiZAfZ8vdw3UNRx+gNSRW+vbtF3/xiIMF1Iky3a0L cB26FzzPlZetkWaihN6fJHfl1M8ItGx9JEk0sfxkVsTMdj+3+0pUqdAqANLiW6Vn0u0K OV6A== X-Gm-Message-State: AC+VfDyaNH/S+4/YewY/tclmW2u3PbcYbz1Xz9jWz9Av3QKKpiRoRLjB Dp0TgZlBEqh9/YEmB7/t5qaO5C33t7qp0K5roaeHzw== X-Received: by 2002:a7b:c5c6:0:b0:3f1:9acf:8682 with SMTP id n6-20020a7bc5c6000000b003f19acf8682mr11421281wmk.17.1683026428208; Tue, 02 May 2023 04:20:28 -0700 (PDT) Received: from stoup.Home ([2a02:c7c:74db:8d00:ad29:f02c:48a2:269c]) by smtp.gmail.com with ESMTPSA id z16-20020a05600c221000b003ee1b2ab9a0sm35182623wml.11.2023.05.02.04.20.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 May 2023 04:20:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Nazar Kazakov Subject: [PULL 06/12] tcg: Add tcg_gen_gvec_rotrs Date: Tue, 2 May 2023 12:20:17 +0100 Message-Id: <20230502112023.776823-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230502112023.776823-1-richard.henderson@linaro.org> References: <20230502112023.776823-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Nazar Kazakov Add tcg expander and helper functions for rotate right vector with scalar operand. Signed-off-by: Nazar Kazakov Message-Id: <20230428144757.57530-10-lawrence.hunter@codethink.co.uk> [rth: Split out of larger patch; mask rotation count.] Signed-off-by: Richard Henderson --- include/tcg/tcg-op-gvec.h | 2 ++ tcg/tcg-op-gvec.c | 11 +++++++++++ 2 files changed, 13 insertions(+) diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h index 6d58683171..a8183bfeab 100644 --- a/include/tcg/tcg-op-gvec.h +++ b/include/tcg/tcg-op-gvec.h @@ -371,6 +371,8 @@ void tcg_gen_gvec_sars(unsigned vece, uint32_t dofs, uint32_t aofs, TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); void tcg_gen_gvec_rotls(unsigned vece, uint32_t dofs, uint32_t aofs, TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); +void tcg_gen_gvec_rotrs(unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); /* * Perform vector shift by vector element, modulo the element size. diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c index 9c14908a46..f51bcaa87b 100644 --- a/tcg/tcg-op-gvec.c +++ b/tcg/tcg-op-gvec.c @@ -3353,6 +3353,17 @@ void tcg_gen_gvec_rotls(unsigned vece, uint32_t dofs, uint32_t aofs, do_gvec_shifts(vece, dofs, aofs, shift, oprsz, maxsz, &g); } +void tcg_gen_gvec_rotrs(unsigned vece, uint32_t dofs, uint32_t aofs, + TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz) +{ + TCGv_i32 tmp = tcg_temp_ebb_new_i32(); + + tcg_gen_neg_i32(tmp, shift); + tcg_gen_andi_i32(tmp, tmp, (8 << vece) - 1); + tcg_gen_gvec_rotls(vece, dofs, aofs, tmp, oprsz, maxsz); + tcg_temp_free_i32(tmp); +} + /* * Expand D = A << (B % element bits) * From patchwork Tue May 2 11:20:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678348 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446421wrs; Tue, 2 May 2023 04:21:47 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7jDpsZI4oci9jNSBLWpoL4BJW/FzpE8W/RMbq9B0uhdWRLA7I50BDB721dZSNsCkCB6bw8 X-Received: by 2002:ad4:4eab:0:b0:5ed:d3d:405 with SMTP id ed11-20020ad44eab000000b005ed0d3d0405mr3918528qvb.34.1683026506914; Tue, 02 May 2023 04:21:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026506; cv=none; d=google.com; s=arc-20160816; b=FtkZdV9u423qiZWdznxqNCV869fDC7tZBGaGhipc4KYQABw/GkTQ0CnjUfHhA2WdzO 9VsDrgR3x7DemnyxkWv13+eJJwpJAESsgb9Klm7yEX0x1pvhmVAhhBa+2cvc80Se6Hnp ulCazv8n5VpQqiTPKWP1Maq05DEyrvEyY637PS1QyaQ2an2/eQnjW69BhfiUsm9BJ6jV F+YAdTcqs5jlN330WX+6WU/7M+E7WEFQ4vRVZ3biWH5bTnYDjmpABCjO3e4VihGkY0qT 3k9bNPa6vZFy+zlzmwZo5iqh+OXq18O5yxZasntzg77xBZRIIMHcnoaXlsnpaK5gOJvC TxnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wY72rBTCusrC/WPaiwfzmoq60/uULSGfuUcD5/U5TwY=; b=xLyp69Y0uaM+aBW/UHpl1gAsdSpyVS0P1I9fq1qyKvCTIEYJKMdULSIYsHoO199VNu JaPWkNbIOvtC0XYt7/8k3MVhEG0kIBp5b1dr+XVqDdUY9C7tki6p8VeKudqDZ3HAnsGV V970v4AIQSmThRTB57vJPz7RLnfwjw6AKj87hDTqWAarh42aXPg+mnlqUd7xbXvi2q4r ckGW2C8MX5HI22w3X7u8CjAaWPBWz0p8KveyI7cSKJimhZ2F0qTZgXuzEGhIktFJoV67 BNp6RxCKfcyVbw8U5jXLRpmD+3B4ra38NM1yowt3jYsJwd8mX191gJ3v4C3RxnzT0L1d dvOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GNsOKbJw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id w19-20020a05620a445300b0074a4989dbe1si18390457qkp.247.2023.05.02.04.21.46 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 May 2023 04:21:46 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GNsOKbJw; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pto3g-0000f9-W1; Tue, 02 May 2023 07:20:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pto3f-0000dc-1y for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:35 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pto3c-0003Fh-Ta for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:34 -0400 Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-2f40b891420so3497727f8f.0 for ; Tue, 02 May 2023 04:20:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683026429; x=1685618429; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wY72rBTCusrC/WPaiwfzmoq60/uULSGfuUcD5/U5TwY=; b=GNsOKbJwpHz7i1wn7ETbd7GGFUV/S7mblkMoHCcZqn9bXV2m4QUav+4mm9AgqmWpq9 WQ4byszQtqq1A0eJsVupempRajYkQzj4cnWZcxHgOURR3JGJ5sEpFimoia8UdYTYc6Id N5xz9EzY22Ap2cD98Zod+asI5UM9WhOIbiahxBkgSz0SKAdplfp3gdN1X+kbpNLyehhP g8LBWDatuVEGq3a0kFsaHv3b+L5rPZwFS7/pxGeWJ+z4zUBJJzFW1BGPGi8ZiIN33uVI EQDn5bAyzx2TwQx/hh+Rq5f45zkSq9dxQ1x1Aofy/fo9XUKGaozLG64D8Kr91r1HbGzM aCjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683026429; x=1685618429; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wY72rBTCusrC/WPaiwfzmoq60/uULSGfuUcD5/U5TwY=; b=W4iVX5KDRgh6YMn6AyTuF6QKhAbwih5ZTbOfUVY8BW7Xv5wA66amzP92MpBbzs6Poq 95ozG1ynMkVJaAWUi1yTohmB1ajYYgbkc5LRf6lFEnNY75Hlr6Onts7EV77hJoojyXyh TBh7gZq0cuPtT2NP/bSMerzVHwYVqgR6F+iMoQMVnX5m8Uc2kBqDq9VZXjZOdIMUv+v5 9wOhZk+CGyX7Yf0pk5iUicYvRerx8SV559vO7FMBj0897r9i3JV+GXMC+NIdy2pQX68D q3EUvo1mFfAOe5k28MpqHANZ0LMuspkCfTdvNHwBOX+gx+KjE2XIiZj5eMgvKLn3vbem BCIQ== X-Gm-Message-State: AC+VfDysDmZX9Gxj+cfDzch4cp8sg+lyo3HaPQpplGhxrweBp9rRfgWy 78/io8cQogFqdg2BjyUAz4M/PLgEsY+pIeySy/huHQ== X-Received: by 2002:adf:f212:0:b0:2ef:b4e1:cf59 with SMTP id p18-20020adff212000000b002efb4e1cf59mr10869975wro.58.1683026428907; Tue, 02 May 2023 04:20:28 -0700 (PDT) Received: from stoup.Home ([2a02:c7c:74db:8d00:ad29:f02c:48a2:269c]) by smtp.gmail.com with ESMTPSA id z16-20020a05600c221000b003ee1b2ab9a0sm35182623wml.11.2023.05.02.04.20.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 May 2023 04:20:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PULL 07/12] qemu/int128: Re-shuffle Int128Alias members Date: Tue, 2 May 2023 12:20:18 +0100 Message-Id: <20230502112023.776823-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230502112023.776823-1-richard.henderson@linaro.org> References: <20230502112023.776823-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Clang 14, with --enable-tcg-interpreter errors with include/qemu/int128.h:487:16: error: alignment of field 'i' (128 bits) does not match the alignment of the first field in transparent union; transparent_union attribute ignored [-Werror,-Wignored-attributes] __int128_t i; ^ include/qemu/int128.h:486:12: note: alignment of first field is 64 bits Int128 s; ^ 1 error generated. By placing the __uint128_t member first, this is avoided. Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée Message-Id: <20230501204625.277361-1-richard.henderson@linaro.org> --- include/qemu/int128.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/qemu/int128.h b/include/qemu/int128.h index f62a46b48c..9e46cfaefc 100644 --- a/include/qemu/int128.h +++ b/include/qemu/int128.h @@ -483,9 +483,9 @@ static inline void bswap128s(Int128 *s) */ #ifdef CONFIG_INT128 typedef union { - Int128 s; - __int128_t i; __uint128_t u; + __int128_t i; + Int128 s; } Int128Alias __attribute__((transparent_union)); #else typedef Int128 Int128Alias; From patchwork Tue May 2 11:20:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678347 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446308wrs; Tue, 2 May 2023 04:21:29 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5ie39FHdrBXmkinNgBLjaw4Lqc6XMv0bFC4HslIabbcAYa1TOvKFnIOt5p9sLl10W440k1 X-Received: by 2002:a05:622a:5cc:b0:3ef:336f:56c6 with SMTP id d12-20020a05622a05cc00b003ef336f56c6mr26082975qtb.17.1683026489293; Tue, 02 May 2023 04:21:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026489; cv=none; d=google.com; s=arc-20160816; b=k2bRNw8HVZGJ6nzBNTrVlH6NNFTcKHnZDLTLOsglMy6gTZF1XH6xHOFf2e/bX45+4r Xlxytwm6QXuEy5pGE0rjznr4J1/WQeFsudGpUQBfejqupr8PxI/TwX0/8IyGwxF9phB8 RZopQEZpznCIPBj8h8nj/KXY83TAiRzzK/i44AUokWupGGC9dAZL1OvqzrVXozM8x/6m fxu9A+D+N7nvI0OrKmVxLXVuLYJZevAEeDMoTVfEtUOvgydVLUPPhbjy81iRmxuVB9cF DoidkFHqCqbAnkB0j58qpIFl3jIfeMGRHC6+B53k91dBwWFU8NNGUNmHaIBxItFkqHlb Wf9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lj2D2cXdtATJYKpTPKE6VX0lPTFHJNgX6DGhwMqHkxw=; b=X6mcGGhulXN4f5537RYjFEAWHdh+CS6UllrYU7FdmDY6KCAGu5X/Qn/m/q371t6fs1 F6qTTHkMTRAgTTEUXSXjIPE1+HpZgZg906ca2EnqmLCw0XZGlG6CQ3jqqqrF7EtV7NaN 3oL4Sk0uMRaQO/6ezf21QeM5xSfevCLAMBg9DiXGLU6g9TA+SDUXhtVxUmgTzzx0LZdn ixDxAOdrXZPvHQzGSn61Y7mWc0+Dbvxxbq+VGsesu368Zd9xcKA9uPll22apJKD7OXLB XgBPVAB6pB2zvwDod5nxdg3Lsm8YLNefvJ10oUP2zQQ9mVeyHDIaLJxiZHW+RjCYKxrQ LitA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WPkKvB2C; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson Reviewed-by: Juan Quintela Message-Id: <20230501210555.289806-1-richard.henderson@linaro.org> --- meson.build | 5 +---- migration/xbzrle.c | 9 ++++----- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/meson.build b/meson.build index c44d05a13f..77d42898c8 100644 --- a/meson.build +++ b/meson.build @@ -2370,12 +2370,9 @@ config_host_data.set('CONFIG_AVX512F_OPT', get_option('avx512f') \ config_host_data.set('CONFIG_AVX512BW_OPT', get_option('avx512bw') \ .require(have_cpuid_h, error_message: 'cpuid.h not available, cannot enable AVX512BW') \ .require(cc.links(''' - #pragma GCC push_options - #pragma GCC target("avx512bw") #include #include - static int bar(void *a) { - + static int __attribute__((target("avx512bw"))) bar(void *a) { __m512i *x = a; __m512i res= _mm512_abs_epi8(*x); return res[1]; diff --git a/migration/xbzrle.c b/migration/xbzrle.c index c6f8b20917..258e4959c9 100644 --- a/migration/xbzrle.c +++ b/migration/xbzrle.c @@ -177,11 +177,11 @@ int xbzrle_decode_buffer(uint8_t *src, int slen, uint8_t *dst, int dlen) } #if defined(CONFIG_AVX512BW_OPT) -#pragma GCC push_options -#pragma GCC target("avx512bw") #include -int xbzrle_encode_buffer_avx512(uint8_t *old_buf, uint8_t *new_buf, int slen, - uint8_t *dst, int dlen) + +int __attribute__((target("avx512bw"))) +xbzrle_encode_buffer_avx512(uint8_t *old_buf, uint8_t *new_buf, int slen, + uint8_t *dst, int dlen) { uint32_t zrun_len = 0, nzrun_len = 0; int d = 0, i = 0, num = 0; @@ -296,5 +296,4 @@ int xbzrle_encode_buffer_avx512(uint8_t *old_buf, uint8_t *new_buf, int slen, } return d; } -#pragma GCC pop_options #endif From patchwork Tue May 2 11:20:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678355 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446707wrs; Tue, 2 May 2023 04:22:27 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4zPcOChnQzwrW27QI7x9KQSnnNgRXCUQRm2ypXwQ8Y1+MLERyG+eyWFiDGglqDD6siI1GF X-Received: by 2002:a05:6214:2409:b0:605:648b:2adc with SMTP id fv9-20020a056214240900b00605648b2adcmr4777472qvb.19.1683026547132; Tue, 02 May 2023 04:22:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026547; cv=none; d=google.com; s=arc-20160816; b=xrwxWUYVW0uo45WExjoJ9D/FB1T+Ubsd89IMEbp7Pa0qU3QjTdEDrO0CyhqfrcmpKM x4yLVJxE6XWH41AXyalT35cf51/dRwi32NpmGft4eQxrSfcQ7UoUpB9o/CeFXG52uylf aYUkjus6O965gGVSClljTpd1nWTZ+Q1zMe/nusXN0maVyqFb4obkzomyMN9UN1gyQv5H 65zZZqHx2QBBTvIrFnc8ik8IhmATqcPpKNvi109e7xbNvm4IkcTDVDFnIAGed7TaUjcr Sljf52IyS0LleDA83EdXJPNeqWG5/UpRhZOgpayxEhaCqZM9TSGtFAUA+ONffDwOZN+2 09aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Hv/l59D9/l35x4T8g8G++KyGPDKdt+S8r4eHYGHsDds=; b=MZR4RQtyg++Xh+oydF/vNlkOzYpbk5SCt22OSD4yo4R7+OJ1nVnbI8/sVeY3l5/Evj mIIdSJFtOedo2mhTXlsmRjYEmOSCTuHCe5RfKJntahFVLJXBjBTL3HalByhgq5K5qLlH 73eEJG+yIKvUFgYKPHPVZPn0XGu+3+uiDEyBgI1K3pcjM+oKfbuBOnmr77RSlubX/HeT 84/jAGgxlaGP0HomcCaJp/RHJ8E/arBd1Ums28yKVH987BTovRsg5mts/NEoaXwO6w9P 4AiI/MAGqCLACWcQaaA4OkSKaNn+fgoGf1C6tgoFUIuEoOMdX4vWaa5okpXUdygDglcx 3jlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B9JJfr0z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id fo15-20020ad45f0f000000b005ef8c578589si17280489qvb.297.2023.05.02.04.22.26 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 May 2023 04:22:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B9JJfr0z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pto3h-0000fH-Ag; Tue, 02 May 2023 07:20:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pto3f-0000e5-QU for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:35 -0400 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pto3d-0003GP-J4 for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:35 -0400 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-3f1950f5628so35027265e9.3 for ; Tue, 02 May 2023 04:20:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683026430; x=1685618430; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Hv/l59D9/l35x4T8g8G++KyGPDKdt+S8r4eHYGHsDds=; b=B9JJfr0zwaDlp/Rkaeme0R+miRcSuPi74Hdd6nUPJX81DHZjJ8Fdgg26Do6DIcO8zT WjngYuWWVd4qeTsR00+wnXhH+9zLcO+4OHTe56ruAVItPByS7nncP2AvgygqW/7t/LEu /au5ZV//59uK+Gjs670ZEErSIS9EK+bsV+j1QBj3lKtyxt4El2Selj8Lh099THrO2aK7 tcB8LBnHcb8FqJgKWH0SBIoegwHESvihpC1v0VX+g5+BP3akIwq/yU77EgzCXsubec2Y vrQG5LXurQ//hw6+VwYVmw2/0XlK7DtN4xmhlJgxnfPW9qBbcskYyKPEu/JZekgLp6vj ZDsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683026430; x=1685618430; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Hv/l59D9/l35x4T8g8G++KyGPDKdt+S8r4eHYGHsDds=; b=OkhQj35z5lAjesFsvnmNjbE5Tm91pejG0a4h79Tgm39IpAfxlq/levhVoDbC9+xPKI oT1QgzaaPACk534CFcZFhymAa8cTCalsd+Z619P+0Cx9Sn+U5pnpL/Q6mjVR+35XRAC1 PyIBvgePi5zd5SrkRPn67bo7hE7lr/QO/WT0HBY0LF+PwY1GnLZphg3tMz+cajcTklcB Q6URuu5a45MnZgP9MDj0AMEa/fUFJQtwyRuT0RQVPgR/XvGNDe+5DjjOQfMSjVUVRiVy OK5Edr79mp/8eQBK9ZdG3BQ/j8ciLQL3LnY9HZGlyVrV7DmnPlM+VdvsKK+czQOg1dej LLiw== X-Gm-Message-State: AC+VfDwm2wJITFnNI2zkbfobB/DP1k3+b9ORXW/HEWjGyVbSpk8XZEUa aecAfn7+PfXkX196Thq8I/O8kXfljGvUNRfvqmIehg== X-Received: by 2002:a05:600c:24a:b0:3f2:51e7:f1f4 with SMTP id 10-20020a05600c024a00b003f251e7f1f4mr12611214wmj.10.1683026430005; Tue, 02 May 2023 04:20:30 -0700 (PDT) Received: from stoup.Home ([2a02:c7c:74db:8d00:ad29:f02c:48a2:269c]) by smtp.gmail.com with ESMTPSA id z16-20020a05600c221000b003ee1b2ab9a0sm35182623wml.11.2023.05.02.04.20.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 May 2023 04:20:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Alistair Francis , Weiwei Li , Daniel Henrique Barboza Subject: [PULL 09/12] accel/tcg: Add cpu_ld*_code_mmu Date: Tue, 2 May 2023 12:20:20 +0100 Message-Id: <20230502112023.776823-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230502112023.776823-1-richard.henderson@linaro.org> References: <20230502112023.776823-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org At least RISC-V has the need to be able to perform a read using execute permissions, outside of translation. Add helpers to facilitate this. Signed-off-by: Richard Henderson Acked-by: Alistair Francis Reviewed-by: Weiwei Li Tested-by: Daniel Henrique Barboza Message-Id: <20230325105429.1142530-9-richard.henderson@linaro.org> Message-Id: <20230412114333.118895-9-richard.henderson@linaro.org> --- include/exec/cpu_ldst.h | 9 +++++++ accel/tcg/cputlb.c | 48 ++++++++++++++++++++++++++++++++++ accel/tcg/user-exec.c | 58 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 115 insertions(+) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 09b55cc0ee..c141f0394f 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -445,6 +445,15 @@ static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx, # define cpu_stq_mmu cpu_stq_le_mmu #endif +uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t ra); +uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t ra); +uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t ra); +uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t ra); + uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index efa0cb67c9..c8bd642d0e 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2773,3 +2773,51 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) MemOpIdx oi = make_memop_idx(MO_TEUQ, cpu_mmu_index(env, true)); return full_ldq_code(env, addr, oi, 0); } + +uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t retaddr) +{ + return full_ldub_code(env, addr, oi, retaddr); +} + +uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t retaddr) +{ + MemOp mop = get_memop(oi); + int idx = get_mmuidx(oi); + uint16_t ret; + + ret = full_lduw_code(env, addr, make_memop_idx(MO_TEUW, idx), retaddr); + if ((mop & MO_BSWAP) != MO_TE) { + ret = bswap16(ret); + } + return ret; +} + +uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t retaddr) +{ + MemOp mop = get_memop(oi); + int idx = get_mmuidx(oi); + uint32_t ret; + + ret = full_ldl_code(env, addr, make_memop_idx(MO_TEUL, idx), retaddr); + if ((mop & MO_BSWAP) != MO_TE) { + ret = bswap32(ret); + } + return ret; +} + +uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t retaddr) +{ + MemOp mop = get_memop(oi); + int idx = get_mmuidx(oi); + uint64_t ret; + + ret = full_ldq_code(env, addr, make_memop_idx(MO_TEUQ, idx), retaddr); + if ((mop & MO_BSWAP) != MO_TE) { + ret = bswap64(ret); + } + return ret; +} diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index a7e0c3e2f4..fc597a010d 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -1219,6 +1219,64 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr) return ret; } +uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t ra) +{ + void *haddr; + uint8_t ret; + + haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_INST_FETCH); + ret = ldub_p(haddr); + clear_helper_retaddr(); + return ret; +} + +uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t ra) +{ + void *haddr; + uint16_t ret; + + haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_INST_FETCH); + ret = lduw_p(haddr); + clear_helper_retaddr(); + if (get_memop(oi) & MO_BSWAP) { + ret = bswap16(ret); + } + return ret; +} + +uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t ra) +{ + void *haddr; + uint32_t ret; + + haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_INST_FETCH); + ret = ldl_p(haddr); + clear_helper_retaddr(); + if (get_memop(oi) & MO_BSWAP) { + ret = bswap32(ret); + } + return ret; +} + +uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, + MemOpIdx oi, uintptr_t ra) +{ + void *haddr; + uint64_t ret; + + validate_memop(oi, MO_BEUQ); + haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_LOAD); + ret = ldq_p(haddr); + clear_helper_retaddr(); + if (get_memop(oi) & MO_BSWAP) { + ret = bswap64(ret); + } + return ret; +} + #include "ldst_common.c.inc" /* From patchwork Tue May 2 11:20:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678356 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446764wrs; Tue, 2 May 2023 04:22:36 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5t0ANR9tgqzbLoFvDoAzoJVSIttaUORtel5kTPaVdR3juVmR7o6qf8QlFEf2AYhKN4pQur X-Received: by 2002:a05:622a:15c3:b0:3f1:916a:d19c with SMTP id d3-20020a05622a15c300b003f1916ad19cmr26251124qty.26.1683026556325; Tue, 02 May 2023 04:22:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026556; cv=none; d=google.com; s=arc-20160816; b=fEOYxC5heV0VLYKlqwF3jPFBtGFm7RT9H1ZJotkj6dxM++egHrquSen8CmMM6UaVvw OuVDBBbKz9XT0RxDpxwHcH/HQMKrST6RcD4FMCr483vcHB3PBLO8X2ZyGla8cfgYZJjh qNXbOo0nTjyOzK0PYLwhAS+6DNbNVs1Kesg1gSBA7e9yt4CGfjHrp5wk+oP1eKsfamLd 6omIWOMiRa0fLXDe3lHeO6ijUmISaFCjCNTHfBovVQjsdMmdqq22lCd3CjF/dhCxDu9W UlAtUjSgZpVCuHDniRsoczt/3T8Hipvisg26NImIn/UJows93Jc3YziPUxVMdVHGY7Jw rcLA== ARC-Message-Signature: i=1; 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[209.51.188.17]) by mx.google.com with ESMTPS id z15-20020a05622a060f00b003a8002eea20si17900218qta.212.2023.05.02.04.22.36 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 May 2023 04:22:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fcvibkHt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pto3n-0000hf-8F; Tue, 02 May 2023 07:20:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pto3j-0000gT-Kk for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:39 -0400 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pto3d-0003Gb-L8 for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:39 -0400 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-3f19afc4fd8so21546685e9.2 for ; Tue, 02 May 2023 04:20:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683026430; x=1685618430; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EoXYOQHQNeBbfwjUDNzuW/Is90ENoYHXRPtx24KBX6U=; b=fcvibkHtVI4CAQdVLjvckJfkVEEA/7Ly7E01KhoAOiFamjNkZFW5nFysORDqWUNJ/K XKOt1rLLL2kIelyWG+Vq1Jzx2oEdaubcDaZj36qnF1WK2MpGiihvuNCnWbC+3/REk5oT 2R/uOx6POCZfRtroSyVhcmJTUZWgqtYo3ka3e2BoBZOy2ZtHMxrdjCouLEgR41eh5Zca rid9DCa98SjhvyFTjF75m4LdcVEJc/2xi9PiaebHNmwIzRTZAh7U0CSGVoYTZkVSi8Cu rJpsXk3ZEN3f3h+8Fu7qa1BnorXtatU/l5P1V4OvMkqbRcmbSE41MbqKPGC8lVHuzLiP 4jXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683026430; x=1685618430; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EoXYOQHQNeBbfwjUDNzuW/Is90ENoYHXRPtx24KBX6U=; b=Kvymx6bDLF4HQEHMhgLCfV4SAsmbtLOEe9vsDy5+9i+HpMVOXZkmMEz/58fctN+Iai F/u2xl2mdcmVnuESvIV3yZ6mIdjMRuMlg5O4voMm8tj5QQ+Re0VJZmvfyI2VLAys5Bbr KvMRJsGI15o/9PojflEkDlgNnvaouEkF2k88VjhZ3aB2SsNjA8WVdU4euQqt2WL9Vkwb ZBss8XswEArTA68sMzXHnx6o9tkSenZ3y62O9zrNowyipFOzW19r0/Z0jDfrDbOpMWk6 ffGZy6CIZNrz9N9viBtCs7+GdPtHuxpDwL849EvivD+FHmbZJQAwZQ9qpBTZWBBisomn yA0Q== X-Gm-Message-State: AC+VfDy8+oyIvM8HMK3/uQR4w+4won8SwnPJI+BCV0k4CXSWR9WqPMPm 27R7bchG9FXfdojU/QsLOlYlQC0PbDGb9aDNFaVCYQ== X-Received: by 2002:a7b:c407:0:b0:3f3:481a:902e with SMTP id k7-20020a7bc407000000b003f3481a902emr827794wmi.15.1683026430530; Tue, 02 May 2023 04:20:30 -0700 (PDT) Received: from stoup.Home ([2a02:c7c:74db:8d00:ad29:f02c:48a2:269c]) by smtp.gmail.com with ESMTPSA id z16-20020a05600c221000b003ee1b2ab9a0sm35182623wml.11.2023.05.02.04.20.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 May 2023 04:20:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 10/12] tcg/loongarch64: Conditionalize tcg_out_exts_i32_i64 Date: Tue, 2 May 2023 12:20:21 +0100 Message-Id: <20230502112023.776823-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230502112023.776823-1-richard.henderson@linaro.org> References: <20230502112023.776823-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since TCG_TYPE_I32 values are kept sign-extended in registers, via ".w" instructions, we need not extend if the register matches. This is already relied upon by comparisons. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 21c2fc9e98..0940788c6f 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -463,7 +463,9 @@ static void tcg_out_ext32s(TCGContext *s, TCGReg ret, TCGReg arg) static void tcg_out_exts_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg) { - tcg_out_ext32s(s, ret, arg); + if (ret != arg) { + tcg_out_ext32s(s, ret, arg); + } } static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg) From patchwork Tue May 2 11:20:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678345 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446260wrs; Tue, 2 May 2023 04:21:20 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6+GhDuydNcR+cWjPl5pPrk4dLqUFgFkIX5bFyXDed4xiksZPsHw473SllGstf1B7ft2VZC X-Received: by 2002:a05:6214:2623:b0:61b:17bd:c5fc with SMTP id gv3-20020a056214262300b0061b17bdc5fcmr4976101qvb.12.1683026480612; Tue, 02 May 2023 04:21:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026480; cv=none; d=google.com; s=arc-20160816; b=wNzKI6xPFbt9U9C2y7f7yAk/ChpiVMm3LoOZY1tw3MPI9fHR934RY9zjshi+w8FBbc XPa7/drIwjfb85mLINHLgonIiJFlpc01hx+FHfrRdvGLtvqPQHkzJanPRCA+ULhL3X21 zILpvJJXWAH4vuufzBlQvBDLuZjXLQrb2CKBJ9moIVX8vVIKxey+Tg7XEga0Ce7Gdrb9 dr7FcJaPZiTgrEyjgE7NOA7i7z4YZXDb1QOnFCEal00HPlBXRZ8OLFH0JfkT9TaWDFE5 u1KjRbC/xnhoS4W/U8qshKUeaXgVMRdwu+N1eKt5v3ubpc1cbYgO3nX3fKNXzmW6nhry uDxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qjnRB+rrhPhBqqBICpJ5x+fzhQt0vgTrWO9uJRMoXeU=; b=n3L1d/uzWeg2i73swSH3yPpBjNK1SiuVdeEFYr68RdPtCIFkH4SP42oiLF5YF6d24B gQcgBPHgTdBHxbz6i8q+cZSNDNKs3DNEEj1IOkNVk8Wqt6qwTH+mD08dskRI9U8wf6Us M/o72h/YAJYNNpRn9T4K1RjoUaBAabeQCBS5WW3qIzbMOgV0K9tIglEfQBbRhI7jpVv9 SCubyAwvuDxpMCLi9ddDOp9WaXZkqccFUbXe5AvRSUI4oN12KtuUoaiRYyrcHMDdonJm /tDtN+T1qewB76+k/MMBqNR2ctqON1MRcHKFszwhlKskj1mWhbkrBQt+zNk6AZ2P+C1F kAuQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vHwelGMa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 127-20020a370785000000b0074d6b46297fsi16550214qkh.401.2023.05.02.04.21.20 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 02 May 2023 04:21:20 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vHwelGMa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pto3l-0000go-5C; Tue, 02 May 2023 07:20:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pto3g-0000ez-O6 for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:36 -0400 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pto3e-0003Gt-Tt for qemu-devel@nongnu.org; Tue, 02 May 2023 07:20:36 -0400 Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-2f9b9aa9d75so2175659f8f.0 for ; Tue, 02 May 2023 04:20:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683026431; x=1685618431; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qjnRB+rrhPhBqqBICpJ5x+fzhQt0vgTrWO9uJRMoXeU=; b=vHwelGMaq9zszloEpIfn7eT5RC9hnTmVdG/x2F/ymd6kQvM/x0uXAwF+iTkuBKh76s BmDXXyhS2QLp0/gsnLbNPaozsIudYn4VYO//vZNugoJFJ6OKU6kjzWs0Q4rPkA/0BJfm POAFlQWxMkYxxbQYdfBvBhLOzCkCNUA4Q75u+PTkGwvVkc3eB8Jxy0mggm9FMFBz9qY7 kyIczdpAMM/HlB5DF6lnd/6p2SSE5/Hfe6zUkURzNwkPxcJSAlJZAFTsXf7cMjqbUooc fTvHFp19Gzkt/BhGHx8DJMFrTszC0NeNoPbjs6oUFIu0Xa+rS0jFiT/Fjz4+GdwcSEYm xKbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683026431; x=1685618431; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qjnRB+rrhPhBqqBICpJ5x+fzhQt0vgTrWO9uJRMoXeU=; b=N2D5vQm3dXkVspv86w/oL82xyWEv+MIBjQvF6Pkr3D+1jkmcoTPxFqUJloHLnAk4qW qOLSbU+ACyMDS1j4AR40oPkfYGCytmHjx6soUJwSFhyEFM/IcCtgrHjPmNfmSRsbtJp2 9A9mWCx43eLd6o5H/bQxVg6NA/AOHXpgVIc+kS5iHsiQM5CiTTR9yn69NRkzqkh+997/ q5lOt1INBrhfVeCts91mn1vKWQg3W1l5yR4kz9mfPCg/QkZNRJuJNLRJtZfNUze2ad55 TlCA8khSLh6eeB6TNXiAtRW9S9NItcqinkR/F3kJDQ3XmS8MCdOY2W9ieSRCQYOMoARc X+Qw== X-Gm-Message-State: AC+VfDwRkymb1jEVU/LvID/Mnx15tUBDiIKAZCBRXJEzM4RqJ3c3rFvW qHhHpsx9fwM8M6XXhbs4otc2GSw1GUpWQEenKpDGdw== X-Received: by 2002:a05:6000:136f:b0:2f0:e287:1fbc with SMTP id q15-20020a056000136f00b002f0e2871fbcmr12278203wrz.11.1683026431148; Tue, 02 May 2023 04:20:31 -0700 (PDT) Received: from stoup.Home ([2a02:c7c:74db:8d00:ad29:f02c:48a2:269c]) by smtp.gmail.com with ESMTPSA id z16-20020a05600c221000b003ee1b2ab9a0sm35182623wml.11.2023.05.02.04.20.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 May 2023 04:20:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 11/12] tcg/mips: Conditionalize tcg_out_exts_i32_i64 Date: Tue, 2 May 2023 12:20:22 +0100 Message-Id: <20230502112023.776823-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230502112023.776823-1-richard.henderson@linaro.org> References: <20230502112023.776823-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since TCG_TYPE_I32 values are kept sign-extended in registers, we need not extend if the register matches. This is already relied upon by comparisons. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.c.inc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index 346c614354..a83ebe8729 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -582,7 +582,9 @@ static void tcg_out_ext32s(TCGContext *s, TCGReg rd, TCGReg rs) static void tcg_out_exts_i32_i64(TCGContext *s, TCGReg rd, TCGReg rs) { - tcg_out_ext32s(s, rd, rs); + if (rd != rs) { + tcg_out_ext32s(s, rd, rs); + } } static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg rd, TCGReg rs) From patchwork Tue May 2 11:20:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 678354 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp446687wrs; Tue, 2 May 2023 04:22:24 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5699PD4io2cFt8rAh0utJ25QHq/1tqgiOtE40EUDWxmMYf/WRNumt6Wyal6jyPO+kXvsnT X-Received: by 2002:a05:6214:3009:b0:61b:65f9:c1e6 with SMTP id ke9-20020a056214300900b0061b65f9c1e6mr2200578qvb.17.1683026544464; Tue, 02 May 2023 04:22:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683026544; cv=none; d=google.com; s=arc-20160816; b=rZAhSacnw4BazCJB44LBEM3g9PO9qiVhVCoqXGiH9eWYzaHHnWBAMKGN1Z7+6K3MnK s2AAG/gdEqvr4TRjsuHhf2Y7d2+slGbzrxOMVZ0ZKbbV9QqPrb4Cmo4NpjIUrpm/c3IR GnXWLxspQq1ZXwFztIWuGbxMKJdPM+s/qN2XAYe73d19TW5s0qyQKdjKuPDhpDA46QQP 7QIeTU4IXpkaO9tsB/b8yY1vQGOCkHybGfM0nZceRapqYDF6+XOEA9/0uFGzi7kvn57w lCDh/QiGqw+DZ2sYPxuXP6QCmvVUsiTCv/raFe2ZL/wHis8q4ZyYUPgA8JMqPtu8xa3U z2FQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=gu7vxvZ5ut7SntMoC4haOf2WVE2SH+RaE9TYSeOj0k4=; b=B3k9/4ej65AGZVVGU4n2LaTRLNJr4MIi3LQnlvtbBhpBtW/j5TaLDdLgsjWdEMakvn uwmbtPJnvB1JcQo9jYd15If9DTTi5S2zm6m936ZV6gHHq8eAWU0CIaMGpTk9KKnFq7xa Un6W9SQN2s18JIfryTsPQGks8vWa3SS560dMVG/dk2bkFKUWpq4kdoTrJPSMNf3W0KF4 TplX5oFUnYffAx6LvbnkhklHat6+KwZbgGTKBCKBvQPZRhFZHsp1Cs106wT0+fJEViM1 uZtoQoxOrbX9SL1NQbO0I10Xo/E/LRDLV/zOGMyqSduEHDyJR9c0yUt2fdc9tPetSDsT B9+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Edcss+wK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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At present, this is only used by 32-bit hosts for 64-bit data, but will shortly be used for more than that. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/tcg.c | 69 ++++++++++++++++++++++++++++++++++++--- tcg/arm/tcg-target.c.inc | 44 ++++++++++--------------- tcg/i386/tcg-target.c.inc | 19 +++++------ 3 files changed, 90 insertions(+), 42 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index fde5ccc57c..cfd3262a4a 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -115,8 +115,7 @@ static void tcg_out_exts_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg); static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg); static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg ret, TCGReg arg); static void tcg_out_addi_ptr(TCGContext *s, TCGReg, TCGReg, tcg_target_long); -static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) - __attribute__((unused)); +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2); static void tcg_out_exit_tb(TCGContext *s, uintptr_t arg); static void tcg_out_goto_tb(TCGContext *s, int which); static void tcg_out_op(TCGContext *s, TCGOpcode opc, @@ -354,6 +353,14 @@ void tcg_raise_tb_overflow(TCGContext *s) siglongjmp(s->jmp_trans, -2); } +typedef struct TCGMovExtend { + TCGReg dst; + TCGReg src; + TCGType dst_type; + TCGType src_type; + MemOp src_ext; +} TCGMovExtend; + /** * tcg_out_movext -- move and extend * @s: tcg context @@ -365,9 +372,8 @@ void tcg_raise_tb_overflow(TCGContext *s) * * Move or extend @src into @dst, depending on @src_ext and the types. */ -static void __attribute__((unused)) -tcg_out_movext(TCGContext *s, TCGType dst_type, TCGReg dst, - TCGType src_type, MemOp src_ext, TCGReg src) +static void tcg_out_movext(TCGContext *s, TCGType dst_type, TCGReg dst, + TCGType src_type, MemOp src_ext, TCGReg src) { switch (src_ext) { case MO_UB: @@ -417,6 +423,59 @@ tcg_out_movext(TCGContext *s, TCGType dst_type, TCGReg dst, } } +/* Minor variations on a theme, using a structure. */ +static void tcg_out_movext1_new_src(TCGContext *s, const TCGMovExtend *i, + TCGReg src) +{ + tcg_out_movext(s, i->dst_type, i->dst, i->src_type, i->src_ext, src); +} + +static void tcg_out_movext1(TCGContext *s, const TCGMovExtend *i) +{ + tcg_out_movext1_new_src(s, i, i->src); +} + +/** + * tcg_out_movext2 -- move and extend two pair + * @s: tcg context + * @i1: first move description + * @i2: second move description + * @scratch: temporary register, or -1 for none + * + * As tcg_out_movext, for both @i1 and @i2, caring for overlap + * between the sources and destinations. + */ + +static void __attribute__((unused)) +tcg_out_movext2(TCGContext *s, const TCGMovExtend *i1, + const TCGMovExtend *i2, int scratch) +{ + TCGReg src1 = i1->src; + TCGReg src2 = i2->src; + + if (i1->dst != src2) { + tcg_out_movext1(s, i1); + tcg_out_movext1(s, i2); + return; + } + if (i2->dst == src1) { + TCGType src1_type = i1->src_type; + TCGType src2_type = i2->src_type; + + if (tcg_out_xchg(s, MAX(src1_type, src2_type), src1, src2)) { + /* The data is now in the correct registers, now extend. */ + src1 = i2->src; + src2 = i1->src; + } else { + tcg_debug_assert(scratch >= 0); + tcg_out_mov(s, src1_type, scratch, src1); + src1 = scratch; + } + } + tcg_out_movext1_new_src(s, i2, src2); + tcg_out_movext1_new_src(s, i1, src1); +} + #define C_PFX1(P, A) P##A #define C_PFX2(P, A, B) P##A##_##B #define C_PFX3(P, A, B, C) P##A##_##B##_##C diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 8d769ca0a2..83c818a58b 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -1545,7 +1545,7 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, MemOpIdx oi, static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) { - TCGReg argreg, datalo, datahi; + TCGReg argreg; MemOpIdx oi = lb->oi; MemOp opc = get_memop(oi); @@ -1565,22 +1565,16 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) /* Use the canonical unsigned helpers and minimize icache usage. */ tcg_out_call_int(s, qemu_ld_helpers[opc & MO_SIZE]); - datalo = lb->datalo_reg; - datahi = lb->datahi_reg; if ((opc & MO_SIZE) == MO_64) { - if (datalo != TCG_REG_R1) { - tcg_out_mov_reg(s, COND_AL, datalo, TCG_REG_R0); - tcg_out_mov_reg(s, COND_AL, datahi, TCG_REG_R1); - } else if (datahi != TCG_REG_R0) { - tcg_out_mov_reg(s, COND_AL, datahi, TCG_REG_R1); - tcg_out_mov_reg(s, COND_AL, datalo, TCG_REG_R0); - } else { - tcg_out_mov_reg(s, COND_AL, TCG_REG_TMP, TCG_REG_R0); - tcg_out_mov_reg(s, COND_AL, datahi, TCG_REG_R1); - tcg_out_mov_reg(s, COND_AL, datalo, TCG_REG_TMP); - } + TCGMovExtend ext[2] = { + { .dst = lb->datalo_reg, .dst_type = TCG_TYPE_I32, + .src = TCG_REG_R0, .src_type = TCG_TYPE_I32, .src_ext = MO_UL }, + { .dst = lb->datahi_reg, .dst_type = TCG_TYPE_I32, + .src = TCG_REG_R1, .src_type = TCG_TYPE_I32, .src_ext = MO_UL }, + }; + tcg_out_movext2(s, &ext[0], &ext[1], TCG_REG_TMP); } else { - tcg_out_movext(s, TCG_TYPE_I32, datalo, + tcg_out_movext(s, TCG_TYPE_I32, lb->datalo_reg, TCG_TYPE_I32, opc & MO_SSIZE, TCG_REG_R0); } @@ -1663,17 +1657,15 @@ static bool tcg_out_fail_alignment(TCGContext *s, TCGLabelQemuLdst *l) if (TARGET_LONG_BITS == 64) { /* 64-bit target address is aligned into R2:R3. */ - if (l->addrhi_reg != TCG_REG_R2) { - tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R2, l->addrlo_reg); - tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R3, l->addrhi_reg); - } else if (l->addrlo_reg != TCG_REG_R3) { - tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R3, l->addrhi_reg); - tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R2, l->addrlo_reg); - } else { - tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R1, TCG_REG_R2); - tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R2, TCG_REG_R3); - tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R3, TCG_REG_R1); - } + TCGMovExtend ext[2] = { + { .dst = TCG_REG_R2, .dst_type = TCG_TYPE_I32, + .src = l->addrlo_reg, + .src_type = TCG_TYPE_I32, .src_ext = MO_UL }, + { .dst = TCG_REG_R3, .dst_type = TCG_TYPE_I32, + .src = l->addrhi_reg, + .src_type = TCG_TYPE_I32, .src_ext = MO_UL }, + }; + tcg_out_movext2(s, &ext[0], &ext[1], TCG_REG_TMP); } else { tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R1, l->addrlo_reg); } diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index c8e2bf537f..caf91a3151 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -1914,7 +1914,6 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { MemOpIdx oi = l->oi; MemOp opc = get_memop(oi); - TCGReg data_reg; tcg_insn_unit **label_ptr = &l->label_ptr[0]; /* resolve label address */ @@ -1951,18 +1950,16 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) tcg_out_branch(s, 1, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]); - data_reg = l->datalo_reg; if (TCG_TARGET_REG_BITS == 32 && (opc & MO_SIZE) == MO_64) { - if (data_reg == TCG_REG_EDX) { - /* xchg %edx, %eax */ - tcg_out_opc(s, OPC_XCHG_ax_r32 + TCG_REG_EDX, 0, 0, 0); - tcg_out_mov(s, TCG_TYPE_I32, l->datahi_reg, TCG_REG_EAX); - } else { - tcg_out_mov(s, TCG_TYPE_I32, data_reg, TCG_REG_EAX); - tcg_out_mov(s, TCG_TYPE_I32, l->datahi_reg, TCG_REG_EDX); - } + TCGMovExtend ext[2] = { + { .dst = l->datalo_reg, .dst_type = TCG_TYPE_I32, + .src = TCG_REG_EAX, .src_type = TCG_TYPE_I32, .src_ext = MO_UL }, + { .dst = l->datahi_reg, .dst_type = TCG_TYPE_I32, + .src = TCG_REG_EDX, .src_type = TCG_TYPE_I32, .src_ext = MO_UL }, + }; + tcg_out_movext2(s, &ext[0], &ext[1], -1); } else { - tcg_out_movext(s, l->type, data_reg, + tcg_out_movext(s, l->type, l->datalo_reg, TCG_TYPE_REG, opc & MO_SSIZE, TCG_REG_EAX); }