From patchwork Fri Apr 21 22:32:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 675972 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68005C77B7E for ; Fri, 21 Apr 2023 22:33:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234023AbjDUWdU (ORCPT ); Fri, 21 Apr 2023 18:33:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233887AbjDUWco (ORCPT ); Fri, 21 Apr 2023 18:32:44 -0400 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF5C38E for ; Fri, 21 Apr 2023 15:32:16 -0700 (PDT) Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-95369921f8eso324848766b.0 for ; Fri, 21 Apr 2023 15:32:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682116328; x=1684708328; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=hr3UaX7LY90jhy2fAf/k8i9BKyCM6T9mwnocDBAE7gU=; b=odFevG8v8d+W5aEKiQzZr5FtZRgadu5OiNaUD7LpF0XD84P7iVFr9edjaU7mxmRw45 wSpAWwfEQMstHOCH0Dnrqo92IWi952IykEIVnW7CV4okdzA+HPnJHekPtA7TsBP+rQsA bX0t+CNhpQxKU3YWkXFqMd3Cy0ZW2btY6xL8/HFMLUma3OjZhFj0UPv1g+zLgsDsJSMn zOwWO4NYtar8/OZySxXTtBjG/5psMWJKJqXjTBLmh8NuWxZGGOHc3P+DbBLqlsZDx2Wc WcRTSKerGEcc91ROJN1cjE38SCd28JUPNudsi0enL9A9QoOCIvJ1kssdzK/oG1M1+Itj oyMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682116328; x=1684708328; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=hr3UaX7LY90jhy2fAf/k8i9BKyCM6T9mwnocDBAE7gU=; b=Ty9k2eLfFnHjIdcPK5sGw2Gjf7LlG7/SDHQ7rE9HM2bdTTo5EUKb+6i3oxR9PPlQh6 sQe9Sz4oGFtWVPSQ1qzR+yxy2uyNTfW8HmMu85xETXzx2eZNnH06bU3UNh5fOD91V/DA njkxg3AQvXTD0Jkd/7XHKh/DmiW6vH/0PlC0tFgDeCTVMwxcR3CRrUYTf35iwG7G4Vgq hF4bCN3IqWrWxvv1mEz6Bf8/l0xRPE70LkTMNCp1Ag27vKXmCzjQciajxgvh0Hu3mnYP aRQt9DDSmMNUQRYrinRMXQwhcEuFromzFj3h1Pe7iGtzRFUYbxPQiBU9orli2bxWo+OE zW3A== X-Gm-Message-State: AAQBX9erU7ka5W7Y5PtmsrPiU25rpn1yPXsKci96y3YO1avQBqb90MWm jZPYAsrvn+Ize+LH85zTELuM5A== X-Google-Smtp-Source: AKy350aX46RqFmqg6T10xi9P2gyEodIo/v28usuxp2r+ODFURoEn5Wr0KLkdzSeONoVShFjGFGotBQ== X-Received: by 2002:a17:907:168d:b0:953:4775:baa7 with SMTP id hc13-20020a170907168d00b009534775baa7mr4328662ejc.52.1682116328101; Fri, 21 Apr 2023 15:32:08 -0700 (PDT) Received: from krzk-bin.. ([2a02:810d:15c0:828:687d:8c5:41cb:9883]) by smtp.gmail.com with ESMTPSA id mc2-20020a170906eb4200b0094ca077c985sm2539058ejb.213.2023.04.21.15.32.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 15:32:07 -0700 (PDT) From: Krzysztof Kozlowski To: Shawn Guo , Li Yang , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH] arm64: dts: freescale: add missing cache properties Date: Sat, 22 Apr 2023 00:32:06 +0200 Message-Id: <20230421223206.115528-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org As all level 2 and level 3 caches are unified, add required cache-unified properties to fix warnings like: fsl-ls2080a-simu.dtb: l2-cache3: 'cache-unified' is a required property Signed-off-by: Krzysztof Kozlowski --- Please take the patch via sub-arch SoC tree. --- arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 1 + arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 + arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 + arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 4 ++++ arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 4 ++++ 5 files changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 678bb0358751..9cbb31191cf9 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -47,6 +47,7 @@ cpu1: cpu@1 { l2: l2-cache { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index b9fd24cdc919..f8acbefc805b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -85,6 +85,7 @@ cpu3: cpu@3 { l2: l2-cache { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index a01e3cfec77f..50f68ca5a9af 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -80,6 +80,7 @@ cpu3: cpu@3 { l2: l2-cache { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi index 1e5d76c4d83d..1aa38ed09aa4 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi @@ -96,21 +96,25 @@ cpu7: cpu@301 { cluster0_l2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; }; cluster1_l2: l2-cache1 { compatible = "cache"; cache-level = <2>; + cache-unified; }; cluster2_l2: l2-cache2 { compatible = "cache"; cache-level = <2>; + cache-unified; }; cluster3_l2: l2-cache3 { compatible = "cache"; cache-level = <2>; + cache-unified; }; CPU_PW20: cpu-pw20 { diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi index c12c86915ec8..8581ea55d254 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi @@ -96,21 +96,25 @@ cpu7: cpu@301 { cluster0_l2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; }; cluster1_l2: l2-cache1 { compatible = "cache"; cache-level = <2>; + cache-unified; }; cluster2_l2: l2-cache2 { compatible = "cache"; cache-level = <2>; + cache-unified; }; cluster3_l2: l2-cache3 { compatible = "cache"; cache-level = <2>; + cache-unified; }; CPU_PW20: cpu-pw20 {