From patchwork Fri May 31 03:53:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 165486 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp185738ili; Thu, 30 May 2019 20:53:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqygab5jQTcxOY8oGg0yaNOvOIjTkobCzxXUzjfr+h591UBkEsh1FR6WuuZb2XRMhB2yc3np X-Received: by 2002:a17:90a:17ca:: with SMTP id q68mr7018033pja.104.1559274838917; Thu, 30 May 2019 20:53:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559274838; cv=none; d=google.com; s=arc-20160816; b=SwDce55uf2kEK7umcEF2H8OAhl5PoMEAsIVydZce8+qOuaEj380nS7LnbYvfHcx+GU liXHuQ2YAz2G3yAirqUrHyY9fcdR7/gshLcJHZkdhcQJZmSIIbTPPCk/1r5ipwrUTOca Bq+jOXLw5qBgIeoSdDD8jUICiP3DXl5DS5cQdZB3uRaJguqzUsnFW6xswhl1/bx2K8A/ y7LVH8Yo3MWaWM8isWU3tte+7NNOh7pBJ6j+rTGPYIg/Wv+g2ISIaYhfZaDYlZDxyIGU VJjzpUn449yITdgJBV2Qu3tSx/yQEsDp96tyevbdt4YY3MwJvrIj4dPaRwkYOFmZhWqC 4jwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=r4mnV8n9h367f6/VUTN5uF0kUnyjJ6IcwlGv5KmdBDM=; b=ei+cpBoR0FlqRRESNH8W9dd3KStwK/0tUFtB5YulqxHiWzb0OEUlYHxKCh6ipmHhMI Okc6y/1GkGgWk0nts/Abn0BzNCZJ2HODrOFct4PBuTpjAR0PEezrZ1ptAOpiXVztY+eE JFxH2JcH6SYjMqEUG/rXisYkDxhj4l4xUxirotQDhtP9Rg3RDBMC6qGw8kZTGyZM6uG7 FuNFln1rgwkFHHC48weowzGywVq71me7rXsebTIn5dC1ti87NFvdOmS0xv22SrpTn3ik nfWzAX5oRXCC6hxi/snIQqz7iAZ/Iean92nPvcjejnLsqlbig4G3OyCirVyLsYSlEAYi nqAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uQ5CqKcd; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[71.195.29.92]) by smtp.gmail.com with ESMTPSA id q15sm1626947ioi.15.2019.05.30.20.53.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 May 2019 20:53:56 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, arnd@arndb.de, bjorn.andersson@linaro.org, ilias.apalodimas@linaro.org Cc: evgreen@chromium.org, benchan@google.com, ejcaruso@google.com, cpratapa@codeaurora.org, syadagir@codeaurora.org, subashab@codeaurora.org, abhishek.esse@gmail.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 01/17] bitfield.h: add FIELD_MAX() and field_max() Date: Thu, 30 May 2019 22:53:32 -0500 Message-Id: <20190531035348.7194-2-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190531035348.7194-1-elder@linaro.org> References: <20190531035348.7194-1-elder@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Define FIELD_MAX(), which supplies the maximum value that can be represented by a field value. Define field_max() as well, to go along with the lower-case forms of the field mask functions. Signed-off-by: Alex Elder --- include/linux/bitfield.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.20.1 diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h index 3f1ef4450a7c..cf4f06774520 100644 --- a/include/linux/bitfield.h +++ b/include/linux/bitfield.h @@ -63,6 +63,19 @@ (1ULL << __bf_shf(_mask))); \ }) +/** + * FIELD_MAX() - produce the maximum value representable by a field + * @_mask: shifted mask defining the field's length and position + * + * FIELD_MAX() returns the maximum value that can be held in the field + * specified by @_mask. + */ +#define FIELD_MAX(_mask) \ + ({ \ + __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \ + (typeof(_mask))((_mask) >> __bf_shf(_mask)); \ + }) + /** * FIELD_FIT() - check if value fits in the field * @_mask: shifted mask defining the field's length and position @@ -118,6 +131,7 @@ static __always_inline u64 field_mask(u64 field) { return field / field_multiplier(field); } +#define field_max(field) ((typeof(field))field_mask(field)) #define ____MAKE_OP(type,base,to,from) \ static __always_inline __##type type##_encode_bits(base v, base field) \ { \ From patchwork Fri May 31 03:47:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 165484 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp180301ili; Thu, 30 May 2019 20:47:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqx2s8DYngtpmdclIdHw+5i6RW5Jg70kfZPUV9gnMcGhuMQpv6zKMIiNsjF/Tz3xjQfe3bLa X-Received: by 2002:a62:a509:: with SMTP id v9mr5555616pfm.82.1559274459584; Thu, 30 May 2019 20:47:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559274459; cv=none; d=google.com; s=arc-20160816; b=IuZZnOJFIPLaNGuYjJ9jUdP7pkfVLs2nZImUe3u9o3IhLWXWFE3o2fS2MFYqE4KcDn oZQUxr8iR3P1ONjRh7wK/n6ucZst1mXs1dW8/gCJ3kqUIdeaUKUeht7M/hb8uGvVY+9x keS3m606pm7gpg08xrU3i7Ptdc3MfjcVEbrS8tWZl3f/BqZTzIL4hVUvpzJbYtqZNMVF qWtPqkJz85S5CStfrVWHgicqpKSCpn334CXvUw/7P9kQ8U5MY5ioNvDn6Bt147rOfHLt w+g8WB3r0KRbIw2iKZV0Wg3S6NoCMtd2Wvb0KwpFhe9S9e4qnxYRhIaAeXIz8PlrYvPA Nd2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JZ95IE69sVcEBRYG+tgP+o1mXucxgv2wjwcFuiPisT8=; b=SlYiawtSIm1hHfbxwemvLMr3eDQhATuw+fY7fmGq79SbZaA9tkNPHlQwzUU1ccs8FZ 7vrxKXtGVZjnqtx3c4EEYWjcPrYQ6PwBi42o8QL4UluSGK0V65V+cTl0bNpTjM82eGPj +HAR7wsj8larcenun/6Snz6T8pDr8wGLn2QTtpTAgjMJnyJPgEhpW96qPS4BRNYh+YVH kV4n944Bwf61f0qlB430p024u/OC6FH0tXgD+H4wnKItEGoIx5nbnvk01mUcDPZh47FJ GZ2y135a5hnfh8eMQNFaIlV9RGs0ogtfLLZ5MDVDc8z+EUm0vicJFnroFNc2vlAdw2D3 haqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lDX0zltl; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[71.195.29.92]) by smtp.gmail.com with ESMTPSA id v190sm2225945ita.14.2019.05.30.20.47.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 May 2019 20:47:37 -0700 (PDT) From: Alex Elder To: elder@ieee.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: elder@computer.org Subject: [PATCH v2 02/17] dt-bindings: soc: qcom: add IPA bindings Date: Thu, 30 May 2019 22:47:13 -0500 Message-Id: <20190531034728.7001-3-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190531034728.7001-1-elder@linaro.org> References: <20190531034728.7001-1-elder@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the binding definitions for the "qcom,ipa" device tree node. Signed-off-by: Alex Elder --- .../devicetree/bindings/net/qcom,ipa.yaml | 180 ++++++++++++++++++ 1 file changed, 180 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/qcom,ipa.yaml -- 2.20.1 diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml new file mode 100644 index 000000000000..0037fc278a61 --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml @@ -0,0 +1,180 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ipa.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IP Accelerator (IPA) + +maintainers: + - Alex Elder + +description: + This binding describes the Qualcomm IPA. The IPA is capable of offloading + certain network processing tasks (e.g. filtering, routing, and NAT) from + the main processor. + + The IPA sits between multiple independent "execution environments," + including the Application Processor (AP) and the modem. The IPA presents + a Generic Software Interface (GSI) to each execution environment. + The GSI is an integral part of the IPA, but it is logically isolated + and has a distinct interrupt and a separately-defined address space. + + See also soc/qcom/qcom,smp2p.txt and interconnect/interconnect.txt. + + - | + -------- --------- + | | | | + | AP +<---. .----+ Modem | + | +--. | | .->+ | + | | | | | | | | + -------- | | | | --------- + v | v | + --+-+---+-+-- + | GSI | + |-----------| + | | + | IPA | + | | + ------------- + +properties: + compatible: + const: "qcom,sdm845-ipa" + + reg: + items: + - description: IPA registers + - description: IPA shared memory + - description: GSI registers + + reg-names: + items: + - const: ipa-reg + - const: ipa-shared + - const: gsi + + clocks: + maxItems: 1 + + clock-names: + const: core + + interrupts: + items: + - description: IPA interrupt (hardware IRQ) + - description: GSI interrupt (hardware IRQ) + - description: Modem clock query interrupt (smp2p interrupt) + - description: Modem setup ready interrupt (smp2p interrupt) + + interrupt-names: + items: + - const: ipa + - const: gsi + - const: ipa-clock-query + - const: ipa-setup-ready + + interconnects: + items: + - description: Interconnect path between IPA and main memory + - description: Interconnect path between IPA and internal memory + - description: Interconnect path between IPA and the AP subsystem + + interconnect-names: + items: + - const: memory + - const: imem + - const: config + + qcom,smem-states: + description: State bits used in by the AP to signal the modem. + items: + - description: Whether the "ipa-clock-enabled" state bit is valid + - description: Whether the IPA clock is enabled (if valid) + + qcom,smem-state-names: + description: The names of the state bits used for SMP2P output + items: + - const: ipa-clock-enabled-valid + - const: ipa-clock-enabled + + modem-init: + type: boolean + description: + If present, it indicates that the modem is responsible for + performing early IPA initialization, including loading and + validating firwmare used by the GSI. + + memory-region: + maxItems: 1 + description: + If present, a phandle for a reserved memory area that holds + the firmware passed to Trust Zone for authentication. Required + when Trust Zone (not the modem) performs early initialization. + +required: + - compatible + - reg + - clocks + - interrupts + - interconnects + - qcom,smem-states + +oneOf: + - required: + - modem-init + - required: + - memory-region + +examples: + - | + smp2p-mpss { + compatible = "qcom,smp2p"; + ipa_smp2p_out: ipa-ap-to-modem { + qcom,entry-name = "ipa"; + #qcom,smem-state-cells = <1>; + }; + + ipa_smp2p_in: ipa-modem-to-ap { + qcom,entry-name = "ipa"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + ipa@1e40000 { + compatible = "qcom,sdm845-ipa"; + + modem-init; + + reg = <0 0x1e40000 0 0x7000>, + <0 0x1e47000 0 0x2000>, + <0 0x1e04000 0 0x2c000>; + reg-names = "ipa-reg", + "ipa-shared"; + "gsi"; + + interrupts-extended = <&intc 0 311 IRQ_TYPE_EDGE_RISING>, + <&intc 0 432 IRQ_TYPE_LEVEL_HIGH>, + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ipa", + "gsi", + "ipa-clock-query", + "ipa-setup-ready"; + + clocks = <&rpmhcc RPMH_IPA_CLK>; + clock-names = "core"; + + interconnects = + <&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_EBI1>, + <&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_IMEM>, + <&rsc_hlos MASTER_APPSS_PROC &rsc_hlos SLAVE_IPA_CFG>; + interconnect-names = "memory", + "imem", + "config"; + + qcom,smem-states = <&ipa_smp2p_out 0>, + <&ipa_smp2p_out 1>; + qcom,smem-state-names = "ipa-clock-enabled-valid", + "ipa-clock-enabled"; + };