From patchwork Wed Apr 12 15:18:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 672820 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82C96C7619A for ; Wed, 12 Apr 2023 15:21:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230363AbjDLPVF (ORCPT ); Wed, 12 Apr 2023 11:21:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231395AbjDLPVA (ORCPT ); Wed, 12 Apr 2023 11:21:00 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 482B29038; Wed, 12 Apr 2023 08:20:27 -0700 (PDT) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33CCNbXE002432; Wed, 12 Apr 2023 17:19:30 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=FbOTl+8MNsgRED5FCS4rKIwqJQZWuMOClivGmNkcn8g=; b=twcwMM/5vdZgZt60zPG3pi6x6GATLTS66qluOA1VBnvWt6ihd2SyX9/8ze1C47q92tQO EMGMUD4oGSbdZZZqjaa1+oLEaKAJR2ogLv8lagrQB3/IGiXzex/RBK67WBBvr8i9wA+M xOlQ9qdqJaYbFqZhzQ7d4Og9GrCSqcHMbvcXnICNISmTthJyWnA4AdC0dMd57XqK2bxW WIQVIt7Ueu0fQFxhqPFqC+DxLHDWBEJNOf2bLG9P5NgGmJrKtvHPzh0PB4FHIpB7yxnO gdfko8lbmbjhUlSTno6Go65l9Eu+loQV26tp1r5tzpoPYAMQs8KLtJiDJMRu9yI59lPW 2Q== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pws9u2nac-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Apr 2023 17:19:29 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8BC04100039; Wed, 12 Apr 2023 17:18:41 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 849BD218612; Wed, 12 Apr 2023 17:18:41 +0200 (CEST) Received: from localhost (10.48.1.102) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 12 Apr 2023 17:18:38 +0200 From: Fabrice Gasnier To: , , , , CC: , , , , , , Subject: [PATCH 1/4] usb: dwc2: improve error handling in __dwc2_lowlevel_hw_enable Date: Wed, 12 Apr 2023 17:18:28 +0200 Message-ID: <20230412151831.3069211-2-fabrice.gasnier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230412151831.3069211-1-fabrice.gasnier@foss.st.com> References: <20230412151831.3069211-1-fabrice.gasnier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.1.102] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-12_07,2023-04-12_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add error handling in __dwc2_lowlevel_hw_enable() that may leave the clocks and regulators enabled upon error. Signed-off-by: Fabrice Gasnier --- drivers/usb/dwc2/platform.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c index d1589ba7d322..c431ce6c119f 100644 --- a/drivers/usb/dwc2/platform.c +++ b/drivers/usb/dwc2/platform.c @@ -104,7 +104,7 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) if (hsotg->clk) { ret = clk_prepare_enable(hsotg->clk); if (ret) - return ret; + goto err_dis_reg; } if (hsotg->uphy) { @@ -113,10 +113,25 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type); } else { ret = phy_init(hsotg->phy); - if (ret == 0) + if (ret == 0) { ret = phy_power_on(hsotg->phy); + if (ret) + phy_exit(hsotg->phy); + } } + if (ret) + goto err_dis_clk; + + return 0; + +err_dis_clk: + if (hsotg->clk) + clk_disable_unprepare(hsotg->clk); + +err_dis_reg: + regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); + return ret; } From patchwork Wed Apr 12 15:18:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 672821 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A957C7619A for ; Wed, 12 Apr 2023 15:19:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231317AbjDLPTO (ORCPT ); Wed, 12 Apr 2023 11:19:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230400AbjDLPTK (ORCPT ); Wed, 12 Apr 2023 11:19:10 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 88CA1449A; Wed, 12 Apr 2023 08:19:05 -0700 (PDT) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33CCXURZ006584; Wed, 12 Apr 2023 17:18:41 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=VLsqmzEcW60e3Qq/TEUQNWAZdxJYDpoFVOTmc1FYyKw=; b=QIVAmpxfWRvABFYtajv+FPDqk+yGa8yzehiE5p2XpAAcXmo9tBZmo6TMpGwhEsFCV9WV qRnA3ZClPp7OQitcX36qnaj6xkYvsTr7XuI6CbM2BUVotsXk0B1coQyry14v8VFV7Oyc aVdYhi3YWlKu6JoRWbUdJ7W+3fAfTLzrcpOavmVXqJLvSYi4F5V6vjnyUXD2pcwEtS7M dOnrk7kStowt3PqG2OGJXuwvqXSsZKk/TEkn5sE4uq07yUbuJKqizflA4yVrp3p+OrWo 95gVCuQFQhFZ+S1hEUMkoXxZbfstPjWBFb1AhCeJLXxF5/HB11vrb3a15SWAIHxCuQYz XA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pwsgpak2x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Apr 2023 17:18:41 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D789C100034; Wed, 12 Apr 2023 17:18:40 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D10DF218612; Wed, 12 Apr 2023 17:18:40 +0200 (CEST) Received: from localhost (10.48.1.102) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 12 Apr 2023 17:18:39 +0200 From: Fabrice Gasnier To: , , , , CC: , , , , , , Subject: [PATCH 2/4] dt-bindings: usb: dwc2: add utmi optional clock Date: Wed, 12 Apr 2023 17:18:29 +0200 Message-ID: <20230412151831.3069211-3-fabrice.gasnier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230412151831.3069211-1-fabrice.gasnier@foss.st.com> References: <20230412151831.3069211-1-fabrice.gasnier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.1.102] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-12_07,2023-04-12_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org utmi clock is typically provided by PHY output. Add this optional clock, as the core could use other clocks depending on the SoC where it's used. This is needed on stm32mp15, when using the integrated full-speed PHY. Signed-off-by: Fabrice Gasnier --- Documentation/devicetree/bindings/usb/dwc2.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml index 371ba93f3ce5..6f3c2d319b9b 100644 --- a/Documentation/devicetree/bindings/usb/dwc2.yaml +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml @@ -75,11 +75,14 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 clock-names: items: - const: otg + - const: utmi_clk + minItems: 1 disable-over-current: type: boolean From patchwork Wed Apr 12 15:18:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 672822 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D368C77B6F for ; Wed, 12 Apr 2023 15:19:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230414AbjDLPTK (ORCPT ); Wed, 12 Apr 2023 11:19:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229714AbjDLPTD (ORCPT ); Wed, 12 Apr 2023 11:19:03 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04F837DBF; Wed, 12 Apr 2023 08:18:55 -0700 (PDT) Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33CCK5gs012362; Wed, 12 Apr 2023 17:18:42 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=RNINIw4nntSoyMexop9tmtpb4ycNWDpQqAjG61if2P4=; b=CIFzkUDSDs3dPgki0dsMzDA5oldL+kUaosOveK85Gbs1xxyGbnLrLNWFZTnLZjuCLnDO mLr1FhUbgiE0FZqmH5Gq+jsnkuatHuXTNJq2l924ksS3sSHVNmbPj3/URucpC5RAob7r Ny9PBikZUaO+VcOZAj4wfRkhCcbuUDpUqONUUGm5xOYRcc9u+iLWQ6cddbpMDWatyza7 Xm80Kw2QbQUYIowUF9BHJbweG5CGB8eqO9p+Ejj35Mjt9ZAM3wlYpVPD+hO2wNGSHYf+ gFAbEe/gEoScnMhDmSQWagsiYhcvLDGypGMWHKWeD3p2Vvw7mmOOO6GzlQuvBAkZiz3i Hg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pw7wp04ua-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Apr 2023 17:18:42 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 63E94100034; Wed, 12 Apr 2023 17:18:42 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 5BE8A218612; Wed, 12 Apr 2023 17:18:42 +0200 (CEST) Received: from localhost (10.48.1.102) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 12 Apr 2023 17:18:41 +0200 From: Fabrice Gasnier To: , , , , CC: , , , , , , Subject: [PATCH 3/4] usb: dwc2: platform: add support for utmi optional clock Date: Wed, 12 Apr 2023 17:18:30 +0200 Message-ID: <20230412151831.3069211-4-fabrice.gasnier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230412151831.3069211-1-fabrice.gasnier@foss.st.com> References: <20230412151831.3069211-1-fabrice.gasnier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.1.102] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-12_06,2023-04-12_01,2023-02-09_01 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add support for the utmi clock. It's needed on STM32MP15, when using the integrated full-speed PHY. This clock is an output of USBPHYC, but HS USBPHYC is not attached as PHY in this case: Full-Speed PHY is directly managed in dwc2 glue, through GGPIO register. Typical DT when using FS PHY &usbotg_hs { compatible = "st,stm32mp15-fsotg", "snps,dwc2"; pinctrl-names = "default"; pinctrl-0 = <&usbotg_hs_pins_a &usbotg_fs_dp_dm_pins_a>; vbus-supply = <&vbus_otg>; status = "okay"; }; In this configuration, USBPHYC clock output must be defined, so it can be properly enabled as a clock provider: clocks = <&rcc USBO_K>, <&usbphyc>; clock-names = "otg", "utmi_clk"; Signed-off-by: Fabrice Gasnier --- drivers/usb/dwc2/core.h | 2 ++ drivers/usb/dwc2/platform.c | 20 +++++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index 40cf2880d7e5..0bb4c0c845bf 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -1003,6 +1003,7 @@ struct dwc2_hregs_backup { * @ctrl_out_desc: EP0 OUT data phase desc chain pointer * @irq: Interrupt request line number * @clk: Pointer to otg clock + * @utmi_clk: Pointer to utmi_clk clock * @reset: Pointer to dwc2 reset controller * @reset_ecc: Pointer to dwc2 optional reset controller in Stratix10. * @regset: A pointer to a struct debugfs_regset32, which contains @@ -1065,6 +1066,7 @@ struct dwc2_hsotg { void *priv; int irq; struct clk *clk; + struct clk *utmi_clk; struct reset_control *reset; struct reset_control *reset_ecc; diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c index c431ce6c119f..c4d3d63ebdc3 100644 --- a/drivers/usb/dwc2/platform.c +++ b/drivers/usb/dwc2/platform.c @@ -101,10 +101,16 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) if (ret) return ret; + if (hsotg->utmi_clk) { + ret = clk_prepare_enable(hsotg->utmi_clk); + if (ret) + goto err_dis_reg; + } + if (hsotg->clk) { ret = clk_prepare_enable(hsotg->clk); if (ret) - goto err_dis_reg; + goto err_dis_utmi_clk; } if (hsotg->uphy) { @@ -129,6 +135,10 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) if (hsotg->clk) clk_disable_unprepare(hsotg->clk); +err_dis_utmi_clk: + if (hsotg->utmi_clk) + clk_disable_unprepare(hsotg->utmi_clk); + err_dis_reg: regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); @@ -171,6 +181,9 @@ static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) if (hsotg->clk) clk_disable_unprepare(hsotg->clk); + if (hsotg->utmi_clk) + clk_disable_unprepare(hsotg->utmi_clk); + return regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); } @@ -247,6 +260,11 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg) if (IS_ERR(hsotg->clk)) return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->clk), "cannot get otg clock\n"); + hsotg->utmi_clk = devm_clk_get_optional(hsotg->dev, "utmi_clk"); + if (IS_ERR(hsotg->utmi_clk)) + return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->utmi_clk), + "cannot get utmi clock\n"); + /* Regulators */ for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++) hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];