From patchwork Fri Mar 31 07:18:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 669174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B8FEC77B60 for ; Fri, 31 Mar 2023 07:18:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230260AbjCaHS6 (ORCPT ); Fri, 31 Mar 2023 03:18:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230226AbjCaHS4 (ORCPT ); Fri, 31 Mar 2023 03:18:56 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 044E9AD20; Fri, 31 Mar 2023 00:18:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1680247130; x=1711783130; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=v+iGAOoMCBTZGHjA4MlM8wSqYcR0Frqq6qIhcdJ6VMQ=; b=BOZDvfJQsxN8QBHrF1NGfWPKiLXHKJDBADxv1n1Rk0oDJtkuAuUbqxRM ses4DV9amd5YU2c1W5Ea466cDg6dfjEVsAe/jTYgONRUFJrfMQA/TWb+6 CcdLzk0RhF22LLeEZxuyUDE4izzGfuGxXPPPkBkzMwaZTNbZ/IDA9h1fM AYjZZXLmk60puDcd/HWzzzjZpQ9qFNjSEhLOLsAF/qh1yIjXcgp50iS7n FT6RVicBWRSe0GusuCEUGwKXCu3mi8WeHEVlMx7p2dHH2PkYM9rC1Vsha GKk+hsI35Mblw2ThhckYfaKCVbQOVmULsIb9Vczo+9GXBV1oCNj6HPzxc Q==; X-IronPort-AV: E=Sophos;i="5.98,307,1673938800"; d="scan'208";a="204349705" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 31 Mar 2023 00:18:49 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 31 Mar 2023 00:18:46 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 31 Mar 2023 00:18:44 -0700 From: Conor Dooley To: CC: , , Daire McNamara , Rob Herring , "Krzysztof Kozlowski" , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix , , , Subject: [PATCH v2 1/7] soc: microchip: mpfs: add a prefix to rx_callback() Date: Fri, 31 Mar 2023 08:18:17 +0100 Message-ID: <20230331071823.956087-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331071823.956087-1-conor.dooley@microchip.com> References: <20230331071823.956087-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1311; i=conor.dooley@microchip.com; h=from:subject; bh=v+iGAOoMCBTZGHjA4MlM8wSqYcR0Frqq6qIhcdJ6VMQ=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDClqnZYdwexPn4oeOna7jq3DNefegq0nhZf/fnGl8NcJfqG0 bRPPdZSyMIhxMMiKKbIk3u5rkVr/x2WHc89bmDmsTCBDGLg4BWAicsIM/2z2J17J72e+Xq1+ZdthlR 8a5kU5nxKvz9r7zWzLD5bJdvEM/5RWHLM+vDBzSmu4MEeniEXxJv8kW31v7/UcRaUK06cKswAA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a prefix to the function name to match the rest of the file. Signed-off-by: Conor Dooley --- drivers/soc/microchip/mpfs-sys-controller.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soc/microchip/mpfs-sys-controller.c b/drivers/soc/microchip/mpfs-sys-controller.c index ceaeebc1fc6b..216d9f4ea0ce 100644 --- a/drivers/soc/microchip/mpfs-sys-controller.c +++ b/drivers/soc/microchip/mpfs-sys-controller.c @@ -75,7 +75,7 @@ int mpfs_blocking_transaction(struct mpfs_sys_controller *sys_controller, struct } EXPORT_SYMBOL(mpfs_blocking_transaction); -static void rx_callback(struct mbox_client *client, void *msg) +static void mpfs_sys_controller_rx_callback(struct mbox_client *client, void *msg) { struct mpfs_sys_controller *sys_controller = container_of(client, struct mpfs_sys_controller, client); @@ -121,7 +121,7 @@ static int mpfs_sys_controller_probe(struct platform_device *pdev) return -ENOMEM; sys_controller->client.dev = dev; - sys_controller->client.rx_callback = rx_callback; + sys_controller->client.rx_callback = mpfs_sys_controller_rx_callback; sys_controller->client.tx_block = 1U; sys_controller->client.tx_tout = msecs_to_jiffies(MPFS_SYS_CTRL_TIMEOUT_MS); From patchwork Fri Mar 31 07:18:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 669173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E67CDC76196 for ; Fri, 31 Mar 2023 07:19:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230086AbjCaHTH (ORCPT ); Fri, 31 Mar 2023 03:19:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230092AbjCaHTE (ORCPT ); Fri, 31 Mar 2023 03:19:04 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86998191CB; Fri, 31 Mar 2023 00:18:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1680247138; x=1711783138; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hmGr/C098Sb3AUXweabbmZpCcG7wYNzd0OEreJaxcco=; b=NCsti61scp6XrceIFYpxP1qKVOaOJdJhRGjgxc5hwngqvezNUbHIMWP6 dq/wZI2lnXJ6yXWtiJ/t2hnJ5WWTSOeFmc0fTu3NKwZG7MUgo0jVN4uAN r/E24wl9kcYFy2Y/FhdFDfl8D4Xpcw/7SstWDCGOdFoWGlqSmFHMi2CtU j+Pc8KHBBjLz3GYHGRCdPWCgDlT9E/dyQzz3jDfdQSy36CSDOvJNt11yX 90qyrJaWwRfQvlmvTeUc9Us4T9q8kXck0hckl/Xe3W4jD8vZKJpXILfEj OaugqGmpS1iUnvz/ySRPL1Hv16qCvaNqV2XsGgzzmEYQ64p5Dqki00t2v A==; X-IronPort-AV: E=Sophos;i="5.98,307,1673938800"; d="scan'208";a="204349754" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 31 Mar 2023 00:18:55 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 31 Mar 2023 00:18:49 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 31 Mar 2023 00:18:46 -0700 From: Conor Dooley To: CC: , , Daire McNamara , Rob Herring , "Krzysztof Kozlowski" , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix , , , , Rob Herring Subject: [PATCH v2 2/7] dt-bindings: soc: microchip: add a property for system controller flash Date: Fri, 31 Mar 2023 08:18:18 +0100 Message-ID: <20230331071823.956087-3-conor.dooley@microchip.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331071823.956087-1-conor.dooley@microchip.com> References: <20230331071823.956087-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1674; i=conor.dooley@microchip.com; h=from:subject; bh=hmGr/C098Sb3AUXweabbmZpCcG7wYNzd0OEreJaxcco=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDClqnZat0x4YKoUkRnlFv5DtTu/kFma+UZoafsbv3LKSiOsW Vxs7SlkYxDgYZMUUWRJv97VIrf/jssO55y3MHFYmkCEMXJwCMJFZNowME/X7pt97O3VWxgGfDLfjoS U/xQycSqe9cM5bx1zQ7XVAi5Fhuaoqx9e2ZQwB7fabNzU7rVt+c0PpQQW+tK9f9xtJ3p7CDQA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The system controller "shares" a SPI flash device with a QSPI controller in the MSS. This flash is used to store FPGA bitstreams & other metadata. IAP and Auto Upgrade both write images to this flash that the System Controller will use to re-program the FPGA. Add a phandle property signifying which flash device is connected to the system controller. Reviewed-by: Rob Herring Signed-off-by: Conor Dooley --- .../soc/microchip/microchip,mpfs-sys-controller.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml index 04ffee3a7c59..aee96c639af7 100644 --- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml @@ -26,6 +26,16 @@ properties: compatible: const: microchip,mpfs-sys-controller + microchip,bitstream-flash: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The SPI flash connected to the system controller's QSPI controller. + The system controller may retrieve FPGA bitstreams from this flash to + perform In-Application Programming (IAP) or during device initialisation + for Auto Update. The MSS and system controller have separate QSPI + controllers and this flash is connected to both. Software running in the + MSS can write bitstreams to the flash. + required: - compatible - mboxes From patchwork Fri Mar 31 07:18:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 669171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 925DCC6FD18 for ; Fri, 31 Mar 2023 07:21:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230079AbjCaHVT (ORCPT ); Fri, 31 Mar 2023 03:21:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45720 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230304AbjCaHTG (ORCPT ); Fri, 31 Mar 2023 03:19:06 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F8B7CA27; Fri, 31 Mar 2023 00:19:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1680247141; x=1711783141; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=W8qT8cE/6L055WutV/rSWFJbSx6kVbMIQW0V4V6NhD4=; b=fH6jo2tc6liojCtkPjZRVaYi86nVrB5gP/n2/4FTOcD+a6VQJYPgS72g Ali1MZwD4kwFZ3JRNOnJymOGwCY3zfzPMIP5s24JQzCVtnv6jap72ozb7 d14EAhpNN3z37DZ2PQCQ9HxroTn/dNUeur/+nPyOpX25/qE+qQDmPJL/R +QOaiYuKChLF7VwtdbmXgiDivDGJO+jvYJoCrFeuVPAyAlRWxtMbw7Nsk VBHSJ64SznupNr18Zub5w+c6iv2I7znvK+qeKyg5zsL9OLRqxan53xREU 1iNe6+GwrCXKxPVBTuPIgNV6HhdW/h8aJpasxpeTzJP+o6Gj5bJlw5Zv2 Q==; X-IronPort-AV: E=Sophos;i="5.98,307,1673938800"; d="scan'208";a="204349782" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 31 Mar 2023 00:18:59 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 31 Mar 2023 00:18:56 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 31 Mar 2023 00:18:54 -0700 From: Conor Dooley To: CC: , , Daire McNamara , Rob Herring , "Krzysztof Kozlowski" , Moritz Fischer , Wu Hao , Xu Yilun , Tom Rix , , , Subject: [PATCH v2 5/7] soc: microchip: mpfs: add auto-update subdev to system controller Date: Fri, 31 Mar 2023 08:18:21 +0100 Message-ID: <20230331071823.956087-6-conor.dooley@microchip.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230331071823.956087-1-conor.dooley@microchip.com> References: <20230331071823.956087-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1866; i=conor.dooley@microchip.com; h=from:subject; bh=W8qT8cE/6L055WutV/rSWFJbSx6kVbMIQW0V4V6NhD4=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDClqnZZH/R4WB/2UWhIavnH5q7U/DdIlurKm7mpwa2SJXql0 ndW+o5SFQYyDQVZMkSXxdl+L1Po/Ljuce97CzGFlAhnCwMUpABNpiGNk6PMKyhS5dKvU4WSz9eZJWk o+s3+xHuzVeXC3gjG/Tj3PgOF/bWDzZJ8vhvyb+YQnva3XCTz7qX1VktCntX9rXbZpPNPkBgA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The PolarFire SoC's system controller offers the ability to re-program the FPGA from a user application via two, related, mechanisms. In-Application Programming (IAP) is not ideal for use in Linux, as it will immediately take down the system when requested. Auto Update is preferred, as it will only take affect at device power up*, allowing the OS (and potential applications in AMP) to be shut down gracefully. * Auto Update occurs at device initialisation, which can also be triggered by device reset - possible with the v2023.02 version of the Hart Software Services (HSS) and reference design. Signed-off-by: Conor Dooley --- drivers/soc/microchip/mpfs-sys-controller.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/soc/microchip/mpfs-sys-controller.c b/drivers/soc/microchip/mpfs-sys-controller.c index 1b7680e05cc0..0b94fdcc805d 100644 --- a/drivers/soc/microchip/mpfs-sys-controller.c +++ b/drivers/soc/microchip/mpfs-sys-controller.c @@ -118,7 +118,11 @@ static struct platform_device subdevs[] = { { .name = "mpfs-generic-service", .id = -1, - } + }, + { + .name = "mpfs-auto-update", + .id = -1, + }, }; static int mpfs_sys_controller_probe(struct platform_device *pdev) @@ -160,7 +164,6 @@ static int mpfs_sys_controller_probe(struct platform_device *pdev) platform_set_drvdata(pdev, sys_controller); - dev_info(&pdev->dev, "Registered MPFS system controller\n"); for (i = 0; i < ARRAY_SIZE(subdevs); i++) { subdevs[i].dev.parent = dev; @@ -168,6 +171,8 @@ static int mpfs_sys_controller_probe(struct platform_device *pdev) dev_warn(dev, "Error registering sub device %s\n", subdevs[i].name); } + dev_info(&pdev->dev, "Registered MPFS system controller\n"); + return 0; }