From patchwork Mon Mar 27 12:52:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 667558 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80D59C761AF for ; Mon, 27 Mar 2023 12:53:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232546AbjC0Mxe (ORCPT ); Mon, 27 Mar 2023 08:53:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232306AbjC0MxY (ORCPT ); Mon, 27 Mar 2023 08:53:24 -0400 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 441AC10F0 for ; Mon, 27 Mar 2023 05:53:22 -0700 (PDT) Received: by mail-wm1-x332.google.com with SMTP id l15-20020a05600c4f0f00b003ef6d684102so1996822wmq.3 for ; Mon, 27 Mar 2023 05:53:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1679921601; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MUtBx+ZDcvBvTMSzz6CyHu6NajXWGopTZJ1ZilR4jUE=; b=zQn43BYBE5LEVK7NNGzUv02OGgPeuZ/xlBOKv7AtwuRiLZJ63ecV0sbHQkd5fjt+vT ZAFZP5orxIiO4BiUb8rq9dWzmguDJBuWuvFXWcXNPzGBFipIx/XVRzYW4vr29G9arb5a L/6W6Ej6nX0gcFjo1HeUhIEkd7U+DQf0JVH1foL4cBPjhjzTXH1mT10FmPvCU20GddVa dsRj1g19Wa0H9TZAgYSOfXqTNjySCv63dNvGefyHUopd86VfIDWfZCnZNsYlLhFDOmWf mytruDw5bLHaK2inhJC9eX0fUbls6vZiyavQBHIDmjsXeQln77cR0HhM/Rmd++6e10D/ 0/qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679921601; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MUtBx+ZDcvBvTMSzz6CyHu6NajXWGopTZJ1ZilR4jUE=; b=4SC0PlMWfVYyF46pNO2fpKdCWRym5m37dWC32EcIY6trLsVYqjfLxlbtKkrEXI8qj+ 3QW2PTFNwv51+xyckTr2C2vEy2X3Os68T9YuC147Ok2eA5ZlMceZULq0/+9wsWXIK9Ar lNvVCLf1PbptyN2DtN96E8YvqnKeydarBF173dfoFmZgFa+FyaALq21igLrgi4aaPowB rUTJSf+LaOAOk8dfrvWYVoMP6cDzSfqDbLxZ6aYR1N4S1na/jS566M8tPODt7Org3Txu NNZjIeVKFWNrd5dt+X5Npq+PEEHH2TY9sDPMMxp9mIVYSyRR2wKSu33izCDivLeuyky4 R37Q== X-Gm-Message-State: AO0yUKXg+PC2syq5cxRaWsvZQjI8ut9rpjDQQpMdTssZ6jUhZMyBAFY7 U1yh4cAFQa3fARYw1EMExycjYA== X-Google-Smtp-Source: AK7set8foAhaEz1+Hy9mnqHQULu3bo54rjsgWxkfWmq5tyVDg/aq7y2lkEdRXdvEwJICbCNSw2i4EA== X-Received: by 2002:a7b:cd0d:0:b0:3ed:30cb:5569 with SMTP id f13-20020a7bcd0d000000b003ed30cb5569mr8471551wmj.20.1679921600794; Mon, 27 Mar 2023 05:53:20 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:20 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 01/18] arm64: dts: qcom: sa8775p: pad reg properties to 8 digits Date: Mon, 27 Mar 2023 14:52:59 +0200 Message-Id: <20230327125316.210812-2-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski The file has inconsistent padding of the address part of soc node children's reg properties. Fix it. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index c5b73c591e0f..5aa28a3b12ae 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -440,7 +440,7 @@ soc: soc@0 { gcc: clock-controller@100000 { compatible = "qcom,sa8775p-gcc"; - reg = <0x0 0x100000 0x0 0xc7018>; + reg = <0x0 0x00100000 0x0 0xc7018>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; @@ -464,7 +464,7 @@ gcc: clock-controller@100000 { ipcc: mailbox@408000 { compatible = "qcom,sa8775p-ipcc", "qcom,ipcc"; - reg = <0x0 0x408000 0x0 0x1000>; + reg = <0x0 0x00408000 0x0 0x1000>; interrupts = ; interrupt-controller; #interrupt-cells = <3>; @@ -473,7 +473,7 @@ ipcc: mailbox@408000 { qupv3_id_1: geniqup@ac0000 { compatible = "qcom,geni-se-qup"; - reg = <0x0 0xac0000 0x0 0x6000>; + reg = <0x0 0x00ac0000 0x0 0x6000>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -485,7 +485,7 @@ qupv3_id_1: geniqup@ac0000 { uart10: serial@a8c000 { compatible = "qcom,geni-uart"; - reg = <0x0 0xa8c000 0x0 0x4000>; + reg = <0x0 0x00a8c000 0x0 0x4000>; interrupts = ; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; @@ -735,7 +735,7 @@ rpmhpd_opp_turbo_l1: opp-9 { tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; - reg = <0x0 0x1f40000 0x0 0x20000>; + reg = <0x0 0x01f40000 0x0 0x20000>; #hwlock-cells = <1>; }; @@ -754,7 +754,7 @@ cpufreq_hw: cpufreq@18591000 { tlmm: pinctrl@f000000 { compatible = "qcom,sa8775p-tlmm"; - reg = <0x0 0xf000000 0x0 0x1000000>; + reg = <0x0 0x0f000000 0x0 0x1000000>; interrupts = ; gpio-controller; #gpio-cells = <2>; From patchwork Mon Mar 27 12:53:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 668296 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80894C761A6 for ; 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Mon, 27 Mar 2023 05:53:21 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:21 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 02/18] arm64: dts: qcom: sa8775p: sort soc nodes by reg property Date: Mon, 27 Mar 2023 14:53:00 +0200 Message-Id: <20230327125316.210812-3-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Sort all children of the soc node by the first address in their reg property. This was mostly already the case but there were some nodes that didn't follow it so fix it now for consistency. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 394 +++++++++++++------------- 1 file changed, 197 insertions(+), 197 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 5aa28a3b12ae..296ba69b81ab 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -471,50 +471,6 @@ ipcc: mailbox@408000 { #mbox-cells = <2>; }; - qupv3_id_1: geniqup@ac0000 { - compatible = "qcom,geni-se-qup"; - reg = <0x0 0x00ac0000 0x0 0x6000>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - clock-names = "m-ahb", "s-ahb"; - clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, - <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; - iommus = <&apps_smmu 0x443 0x0>; - status = "disabled"; - - uart10: serial@a8c000 { - compatible = "qcom,geni-uart"; - reg = <0x0 0x00a8c000 0x0 0x4000>; - interrupts = ; - clock-names = "se"; - clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; - interconnect-names = "qup-core", "qup-config"; - interconnects = <&clk_virt MASTER_QUP_CORE_1 0 - &clk_virt SLAVE_QUP_CORE_1 0>, - <&gem_noc MASTER_APPSS_PROC 0 - &config_noc SLAVE_QUP_1 0>; - power-domains = <&rpmhpd SA8775P_CX>; - operating-points-v2 = <&qup_opp_table_100mhz>; - status = "disabled"; - }; - - uart12: serial@a94000 { - compatible = "qcom,geni-uart"; - reg = <0x0 0x00a94000 0x0 0x4000>; - interrupts = ; - clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; - clock-names = "se"; - interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS - &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>, - <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS - &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>; - interconnect-names = "qup-core", "qup-config"; - power-domains = <&rpmhpd SA8775P_CX>; - status = "disabled"; - }; - }; - qupv3_id_2: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0x0 0x008c0000 0x0 0x6000>; @@ -585,173 +541,56 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>, }; }; - intc: interrupt-controller@17a00000 { - compatible = "arm,gic-v3"; - reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ - <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ - interrupt-controller; - #interrupt-cells = <3>; - interrupts = ; - #redistributor-regions = <1>; - redistributor-stride = <0x0 0x20000>; - }; - - memtimer: timer@17c20000 { - compatible = "arm,armv7-timer-mem"; - reg = <0x0 0x17c20000 0x0 0x1000>; - ranges = <0x0 0x0 0x0 0x20000000>; - #address-cells = <1>; - #size-cells = <1>; - - frame@17c21000 { - reg = <0x17c21000 0x1000>, - <0x17c22000 0x1000>; - interrupts = , - ; - frame-number = <0>; - }; - - frame@17c23000 { - reg = <0x17c23000 0x1000>; - interrupts = ; - frame-number = <1>; - status = "disabled"; - }; - - frame@17c25000 { - reg = <0x17c25000 0x1000>; - interrupts = ; - frame-number = <2>; - status = "disabled"; - }; - - frame@17c27000 { - reg = <0x17c27000 0x1000>; - interrupts = ; - frame-number = <3>; - status = "disabled"; - }; - - frame@17c29000 { - reg = <0x17c29000 0x1000>; - interrupts = ; - frame-number = <4>; - status = "disabled"; - }; + qupv3_id_1: geniqup@ac0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x00ac0000 0x0 0x6000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + iommus = <&apps_smmu 0x443 0x0>; + status = "disabled"; - frame@17c2b000 { - reg = <0x17c2b000 0x1000>; - interrupts = ; - frame-number = <5>; + uart10: serial@a8c000 { + compatible = "qcom,geni-uart"; + reg = <0x0 0x00a8c000 0x0 0x4000>; + interrupts = ; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; + interconnect-names = "qup-core", "qup-config"; + interconnects = <&clk_virt MASTER_QUP_CORE_1 0 + &clk_virt SLAVE_QUP_CORE_1 0>, + <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_QUP_1 0>; + power-domains = <&rpmhpd SA8775P_CX>; + operating-points-v2 = <&qup_opp_table_100mhz>; status = "disabled"; }; - frame@17c2d000 { - reg = <0x17c2d000 0x1000>; - interrupts = ; - frame-number = <6>; + uart12: serial@a94000 { + compatible = "qcom,geni-uart"; + reg = <0x0 0x00a94000 0x0 0x4000>; + interrupts = ; + clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; + clock-names = "se"; + interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS + &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "qup-core", "qup-config"; + power-domains = <&rpmhpd SA8775P_CX>; status = "disabled"; }; }; - apps_rsc: rsc@18200000 { - compatible = "qcom,rpmh-rsc"; - reg = <0x0 0x18200000 0x0 0x10000>, - <0x0 0x18210000 0x0 0x10000>, - <0x0 0x18220000 0x0 0x10000>; - reg-names = "drv-0", "drv-1", "drv-2"; - interrupts = , - , - ; - qcom,tcs-offset = <0xd00>; - qcom,drv-id = <2>; - qcom,tcs-config = , - , - , - ; - label = "apps_rsc"; - - apps_bcm_voter: bcm-voter { - compatible = "qcom,bcm-voter"; - }; - - rpmhcc: clock-controller { - compatible = "qcom,sa8775p-rpmh-clk"; - #clock-cells = <1>; - clock-names = "xo"; - clocks = <&xo_board_clk>; - }; - - rpmhpd: power-controller { - compatible = "qcom,sa8775p-rpmhpd"; - #power-domain-cells = <1>; - operating-points-v2 = <&rpmhpd_opp_table>; - - rpmhpd_opp_table: opp-table { - compatible = "operating-points-v2"; - - rpmhpd_opp_ret: opp-0 { - opp-level = ; - }; - - rpmhpd_opp_min_svs: opp-1 { - opp-level = ; - }; - - rpmhpd_opp_low_svs: opp2 { - opp-level = ; - }; - - rpmhpd_opp_svs: opp3 { - opp-level = ; - }; - - rpmhpd_opp_svs_l1: opp-4 { - opp-level = ; - }; - - rpmhpd_opp_nom: opp-5 { - opp-level = ; - }; - - rpmhpd_opp_nom_l1: opp-6 { - opp-level = ; - }; - - rpmhpd_opp_nom_l2: opp-7 { - opp-level = ; - }; - - rpmhpd_opp_turbo: opp-8 { - opp-level = ; - }; - - rpmhpd_opp_turbo_l1: opp-9 { - opp-level = ; - }; - }; - }; - }; - tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x20000>; #hwlock-cells = <1>; }; - cpufreq_hw: cpufreq@18591000 { - compatible = "qcom,sa8775p-cpufreq-epss", - "qcom,cpufreq-epss"; - reg = <0x0 0x18591000 0x0 0x1000>, - <0x0 0x18593000 0x0 0x1000>; - reg-names = "freq-domain0", "freq-domain1"; - - clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; - clock-names = "xo", "alternate"; - - #freq-domain-cells = <1>; - }; - tlmm: pinctrl@f000000 { compatible = "qcom,sa8775p-tlmm"; reg = <0x0 0x0f000000 0x0 0x1000000>; @@ -900,6 +739,167 @@ apps_smmu: iommu@15000000 { , ; }; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ + <0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */ + interrupt-controller; + #interrupt-cells = <3>; + interrupts = ; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + }; + + memtimer: timer@17c20000 { + compatible = "arm,armv7-timer-mem"; + reg = <0x0 0x17c20000 0x0 0x1000>; + ranges = <0x0 0x0 0x0 0x20000000>; + #address-cells = <1>; + #size-cells = <1>; + + frame@17c21000 { + reg = <0x17c21000 0x1000>, + <0x17c22000 0x1000>; + interrupts = , + ; + frame-number = <0>; + }; + + frame@17c23000 { + reg = <0x17c23000 0x1000>; + interrupts = ; + frame-number = <1>; + status = "disabled"; + }; + + frame@17c25000 { + reg = <0x17c25000 0x1000>; + interrupts = ; + frame-number = <2>; + status = "disabled"; + }; + + frame@17c27000 { + reg = <0x17c27000 0x1000>; + interrupts = ; + frame-number = <3>; + status = "disabled"; + }; + + frame@17c29000 { + reg = <0x17c29000 0x1000>; + interrupts = ; + frame-number = <4>; + status = "disabled"; + }; + + frame@17c2b000 { + reg = <0x17c2b000 0x1000>; + interrupts = ; + frame-number = <5>; + status = "disabled"; + }; + + frame@17c2d000 { + reg = <0x17c2d000 0x1000>; + interrupts = ; + frame-number = <6>; + status = "disabled"; + }; + }; + + apps_rsc: rsc@18200000 { + compatible = "qcom,rpmh-rsc"; + reg = <0x0 0x18200000 0x0 0x10000>, + <0x0 0x18210000 0x0 0x10000>, + <0x0 0x18220000 0x0 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + interrupts = , + , + ; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <2>; + qcom,tcs-config = , + , + , + ; + label = "apps_rsc"; + + apps_bcm_voter: bcm-voter { + compatible = "qcom,bcm-voter"; + }; + + rpmhcc: clock-controller { + compatible = "qcom,sa8775p-rpmh-clk"; + #clock-cells = <1>; + clock-names = "xo"; + clocks = <&xo_board_clk>; + }; + + rpmhpd: power-controller { + compatible = "qcom,sa8775p-rpmhpd"; + #power-domain-cells = <1>; + operating-points-v2 = <&rpmhpd_opp_table>; + + rpmhpd_opp_table: opp-table { + compatible = "operating-points-v2"; + + rpmhpd_opp_ret: opp-0 { + opp-level = ; + }; + + rpmhpd_opp_min_svs: opp-1 { + opp-level = ; + }; + + rpmhpd_opp_low_svs: opp2 { + opp-level = ; + }; + + rpmhpd_opp_svs: opp3 { + opp-level = ; + }; + + rpmhpd_opp_svs_l1: opp-4 { + opp-level = ; + }; + + rpmhpd_opp_nom: opp-5 { + opp-level = ; + }; + + rpmhpd_opp_nom_l1: opp-6 { + opp-level = ; + }; + + rpmhpd_opp_nom_l2: opp-7 { + opp-level = ; + }; + + rpmhpd_opp_turbo: opp-8 { + opp-level = ; + }; + + rpmhpd_opp_turbo_l1: opp-9 { + opp-level = ; + }; + }; + }; + }; + + cpufreq_hw: cpufreq@18591000 { + compatible = "qcom,sa8775p-cpufreq-epss", + "qcom,cpufreq-epss"; + reg = <0x0 0x18591000 0x0 0x1000>, + <0x0 0x18593000 0x0 0x1000>; + reg-names = "freq-domain0", "freq-domain1"; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; + clock-names = "xo", "alternate"; + + #freq-domain-cells = <1>; + }; }; arch_timer: timer { From patchwork Mon Mar 27 12:53:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 667557 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65902C77B6F for ; Mon, 27 Mar 2023 12:53:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232621AbjC0Mxh (ORCPT ); Mon, 27 Mar 2023 08:53:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230020AbjC0Mx0 (ORCPT ); Mon, 27 Mar 2023 08:53:26 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3556310FB for ; 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Mon, 27 Mar 2023 05:53:22 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski , Thomas Gleixner , Marc Zyngier Subject: [PATCH v3 03/18] dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p Date: Mon, 27 Mar 2023 14:53:01 +0200 Message-Id: <20230327125316.210812-4-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add a compatible for the Power Domain Controller on SA8775p platforms. Increase the number of PDC pin mappings. Signed-off-by: Bartosz Golaszewski Cc: Thomas Gleixner Cc: Marc Zyngier --- .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml index 94791e261c42..641ff32e4a6c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml @@ -26,6 +26,7 @@ properties: compatible: items: - enum: + - qcom,sa8775p-pdc - qcom,sc7180-pdc - qcom,sc7280-pdc - qcom,sc8280xp-pdc @@ -53,7 +54,7 @@ properties: qcom,pdc-ranges: $ref: /schemas/types.yaml#/definitions/uint32-matrix minItems: 1 - maxItems: 32 # no hard limit + maxItems: 38 # no hard limit items: items: - description: starting PDC port From patchwork Mon Mar 27 12:53:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 668292 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E4E8C77B6D for ; Mon, 27 Mar 2023 12:53:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232776AbjC0Mxr (ORCPT ); Mon, 27 Mar 2023 08:53:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232405AbjC0Mx0 (ORCPT ); Mon, 27 Mar 2023 08:53:26 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D90F010EC for ; Mon, 27 Mar 2023 05:53:24 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id p34so4985661wms.3 for ; Mon, 27 Mar 2023 05:53:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1679921603; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zqs1fkBQs8nw1jpdBWvEsWXPgVAImtCVIZ35WMtgf4Y=; b=LAausXqslBfOWHdLTIbdWiSB2uQLF7qvUx7rTugsESHd6BLL/Nxcz5U4OC6TMW+hf7 RCiSKCzrqLEEYLv7e4AtCKh7wuoOJg7v0qb+8obWdAPQHescy6yuwryH90qv05cKjSfJ nVjO9pw2MatOvFen5n+tiYxzZbp4B3ybgK0pi/Fhx7/ExWiEGsfwH4DiB9tC81v40WEK CLY1ZJvdCAKYxN5xXI9vXpFnx/rvd8lOpMuzYQQr3ze1yfDD+McNOfSn3oEpQXgCfMEv c9jquI6ZThkU58jL+G25eEP5KuVqadmrf3aQ+5wZMEs+i1xsieLcMES273cvpOxC04gR sUgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679921603; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zqs1fkBQs8nw1jpdBWvEsWXPgVAImtCVIZ35WMtgf4Y=; b=hK23zVLVClI0qoHOClA3cp++bYaXJ7AX4Ft4s1T2aHVzwsvL/lunk9sJWNonZuuzhN CVGrVtuIgVlAUz+4yeWOXGm9ekWQpaIDtGYvs/6HcbhGjQ7T1oOuMbOHSkmTR9ujqm3O 3UR9dpAi/MQr13E3FLzHyTHXiJxw1YSORRTEbHxKFsF3RMqWVG2NcPM7Tt6QSERQeb4N G+H2CKwwUSe2OD5xXBAOqPuiBXX8lyxM1XOdurVG+OFRftoKJqqe7qocgA3f2bH8AdwP iGcGbIZ1Ys6eFR7eN2DeCjakkllyPtm4lm0ojbwvoo4AXjoQKpCchl9vlfHiXnCTycMl glkA== X-Gm-Message-State: AO0yUKU2Wy9VIgxS9IacrC0vwoOT0G2pJxvZ4MFdJlkEoytNgbbcHjsM h4VxQBcmUPq1PqttwCLFLtvxvw== X-Google-Smtp-Source: AK7set+GJrq9WCTESgejHy8VIVpRUZcxemrJkaUssAb5F3qglJLgqnINejfzEiRq88QQN8o+OMpJrQ== X-Received: by 2002:a05:600c:d5:b0:3ed:bc83:3745 with SMTP id u21-20020a05600c00d500b003edbc833745mr8730794wmm.25.1679921603468; Mon, 27 Mar 2023 05:53:23 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:23 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 04/18] arm64: dts: qcom: sa8775p: add the pdc node Date: Mon, 27 Mar 2023 14:53:02 +0200 Message-Id: <20230327125316.210812-5-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the Power Domain Controller node for SA8775p. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 47 +++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 296ba69b81ab..6bb1db1839cc 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -591,6 +591,53 @@ tcsr_mutex: hwlock@1f40000 { #hwlock-cells = <1>; }; + pdc: interrupt-controller@b220000 { + compatible = "qcom,sa8775p-pdc", "qcom,pdc"; + reg = <0x0 0x0b220000 0x0 0x30000>, + <0x0 0x17c000f0 0x0 0x64>; + qcom,pdc-ranges = <0 480 40>, + <40 140 14>, + <54 263 1>, + <55 306 4>, + <59 312 3>, + <62 374 2>, + <64 434 2>, + <66 438 2>, + <70 520 1>, + <73 523 1>, + <118 568 6>, + <124 609 3>, + <159 638 1>, + <160 720 3>, + <169 728 30>, + <199 416 2>, + <201 449 1>, + <202 89 1>, + <203 451 1>, + <204 462 1>, + <205 264 1>, + <206 579 1>, + <207 653 1>, + <208 656 1>, + <209 659 1>, + <210 122 1>, + <211 699 1>, + <212 705 1>, + <213 450 1>, + <214 643 2>, + <216 646 5>, + <221 390 5>, + <226 700 2>, + <228 440 1>, + <229 663 1>, + <230 524 2>, + <232 612 3>, + <235 723 5>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + tlmm: pinctrl@f000000 { compatible = "qcom,sa8775p-tlmm"; reg = <0x0 0x0f000000 0x0 0x1000000>; From patchwork Mon Mar 27 12:53:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 667554 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD696C77B6F for ; Mon, 27 Mar 2023 12:53:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232400AbjC0Mxq (ORCPT ); Mon, 27 Mar 2023 08:53:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232432AbjC0Mx0 (ORCPT ); Mon, 27 Mar 2023 08:53:26 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6E7318C for ; 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Mon, 27 Mar 2023 05:53:23 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 05/18] arm64: dts: qcom: sa8775p: add the spmi node Date: Mon, 27 Mar 2023 14:53:03 +0200 Message-Id: <20230327125316.210812-6-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the SPMI PMIC Arbiter node for SA8775p platforms. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 6bb1db1839cc..2343df7e0ea4 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -638,6 +638,28 @@ pdc: interrupt-controller@b220000 { interrupt-controller; }; + spmi_bus: spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0 0x0c440000 0x0 0x1100>, + <0x0 0x0c600000 0x0 0x2000000>, + <0x0 0x0e600000 0x0 0x100000>, + <0x0 0x0e700000 0x0 0xa0000>, + <0x0 0x0c40a000 0x0 0x26000>; + reg-names = "core", + "chnls", + "obsrvr", + "intr", + "cnfg"; + qcom,channel = <0>; + qcom,ee = <0>; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + interrupt-controller; + #interrupt-cells = <4>; + #address-cells = <2>; + #size-cells = <0>; + }; + tlmm: pinctrl@f000000 { compatible = "qcom,sa8775p-tlmm"; reg = <0x0 0x0f000000 0x0 0x1000000>; From patchwork Mon Mar 27 12:53:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 668293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 095F5C77B71 for ; Mon, 27 Mar 2023 12:53:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232142AbjC0Mxp (ORCPT ); Mon, 27 Mar 2023 08:53:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232461AbjC0Mx1 (ORCPT ); Mon, 27 Mar 2023 08:53:27 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB215170D for ; Mon, 27 Mar 2023 05:53:26 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id o32so4992685wms.1 for ; Mon, 27 Mar 2023 05:53:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1679921605; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OdWVdTE/8Dyw4hqegkINdb1CQZwRDCkTAUWJC3MHmmA=; b=HvYgD4KGYU/NxUu1HsxoxwPql4ri+9vu7aNFmN/pL48Rqhg8qSXg6EJk94NuMbJu54 sVCkXD6JWcW1vJ2QCfwh65LyWiJNdXGN4aLIH1McTfvsBjhMr95Y0PcqOXgwIbQT+J7M U+xH04cfB+GTeUfoROWlcZg8iwEHQy+uPrgMAVChBrGlHeRUEkXrQ0/p0h51zw0dkoDd loC77Ifuc/ho6A1MMEnEfuBaSHyvBmHLRjTT/UUzG29Y7Rll+tVZ5P5QQAzbZN10oQYa mM48wLP2IeZg/ZI28lXy4J6y2MkDW4rmHJntSRGRwz5I0FPlKL2Kz6R9hOSwYTxwdtmr oIbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679921605; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OdWVdTE/8Dyw4hqegkINdb1CQZwRDCkTAUWJC3MHmmA=; b=aQuheWHDoi/O2f8OWcDpOz6qYvpujzEMfuxPE+sCU2tSrQNbdmY43dnBZEytGl30JY DuRm9tf8R12+lhJdM9bo2Q1j9TuJPHGsQqTZsdciuYclZYUkrUEPKhmyB18f2oADX4zN 4afQQO5a5eJPfbxPP9pPaVAioghwXez1hobHI4IcbTnKMtWcUQGbuZ4mtg4KHdOI5Aoy WOo5Xl7HgoMkkOfI6/KErVUZj5GSTH2jMSlT+He0D+9WIm2p8Yh1zI7T3LY+6C2PDu7y GIO+kDlBuJVgvsdwKF4nUxb/OvItq5Kc2cHkCEbrDoukeid2fN1pYytmt7fnd+aDqb5b IuAw== X-Gm-Message-State: AO0yUKX8L7FTe+GlJVtcYIDLW/0bChFXCGhk+ZIGzmnMnSzgiqhH8i5A gHkfWWeanJMo0bxglqdwXx3JcQ== X-Google-Smtp-Source: AK7set94sTqbHq2k11xMJPQMd1/OwxqKj4ebw0WPvxg1kpr6t6SgH7ZqF+5WDOJLKhR/GtJn+EEE7g== X-Received: by 2002:a1c:7318:0:b0:3ed:3cec:d2ec with SMTP id d24-20020a1c7318000000b003ed3cecd2ecmr9836530wmb.15.1679921605220; Mon, 27 Mar 2023 05:53:25 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:24 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski , Lee Jones , Rob Herring Subject: [PATCH v3 06/18] dt-bindings: mfd: qcom, spmi-pmic: add compatible for pmm8654au Date: Mon, 27 Mar 2023 14:53:04 +0200 Message-Id: <20230327125316.210812-7-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski PMM8654au is the SPMI PMIC variant used on sa8775p-ride. Add a compatible for it. Signed-off-by: Bartosz Golaszewski Cc: Lee Jones Acked-by: Rob Herring --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 975c30aad23c..0f7dd7ac9630 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -79,6 +79,7 @@ properties: - qcom,pmk8350 - qcom,pmk8550 - qcom,pmm8155au + - qcom,pmm8654au - qcom,pmp8074 - qcom,pmr735a - qcom,pmr735b From patchwork Mon Mar 27 12:53:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 668294 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50274C761A6 for ; Mon, 27 Mar 2023 12:53:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232762AbjC0Mxp (ORCPT ); Mon, 27 Mar 2023 08:53:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232142AbjC0Mxa (ORCPT ); Mon, 27 Mar 2023 08:53:30 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8215A19A7 for ; Mon, 27 Mar 2023 05:53:27 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id o24-20020a05600c511800b003ef59905f26so5193400wms.2 for ; Mon, 27 Mar 2023 05:53:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1679921606; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EER6tqhI6vUHVYjj6AGxC6PvPaE4KpffK80o6d6UVhA=; b=1Ly8lNpAV9k1UhP7Su28XfdkCDmVuHTha78ZXjqHRst1E6offaBB+HPOczENpuglyV bn5sbgYf/3YJzcodYOmF/G/d+aqm4+cQL9sY2Oh3AMaTfm5FUd4oBcMVD5XN6hHwrp5l uVaHAwFKM7IhUD4I80QGJM5G8qe/YicqF5HgzxX8vvqhdYrXre81UPwz7OEIFVDon5YX 7+wdHq4bPV0bo4DARk2cqOIPvsfp+FqxbKI/VS3qreU4ygZAtrbCGaQZbA+Tb77hcmI8 e/2mY/qwbgh3ESzt/gKzsEhZzAwexZ6/CB4xLtVbUxkfoVduLeRXUR4XLRs/i+B7fgKf q3hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679921606; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EER6tqhI6vUHVYjj6AGxC6PvPaE4KpffK80o6d6UVhA=; b=Ft+O1jlWQy6b6/Bbi83+n4jsHo/QzaxKM3fTf0RJ3i8HhV6IDEQHRFC4/ewSGUKUTw NyojU3tBvhMx8BKqlJkuzmnWAeUikJto1iDD6pvb7+hsDQJ2DOdHNiTBb37PgwhqlpvR pv304SiJguG+oJmwXpUCeCZreyCqWBokVP3zfwhBWZAWQJVrSeSJoUx7OiniLR/sc/z+ AD0axN7rMXayKtQEvMNXPMwy2J0En5YdeQIE+d6dT2SlDrIDwLkYRXGgNpa/RD37/Auy ObytWeOBqSDrVdjCu4HrFCUc6wBTwOd3pATYpw9Tefk/Hm6oTA82tbxwFdHvS8xnXE1l CZXQ== X-Gm-Message-State: AO0yUKXkMZWGuYCP50jjvwx4rYpEO03tu0eeu0JNn/khn2Sd9a8fSAjY DpTU6PtfCg+J3nOGRbJsMmYEOw== X-Google-Smtp-Source: AK7set/gDtCdlw+0ffazR+UtWVA1Dk219aeNa6+48pTJWrxYDJh//ywnZJHClJhoSiDgrTJhu7ubmQ== X-Received: by 2002:a7b:cd10:0:b0:3ee:672d:caa4 with SMTP id f16-20020a7bcd10000000b003ee672dcaa4mr9085581wmj.17.1679921606041; Mon, 27 Mar 2023 05:53:26 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:25 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 07/18] arm64: dts: qcom: sa8775p: add support for the on-board PMICs Date: Mon, 27 Mar 2023 14:53:05 +0200 Message-Id: <20230327125316.210812-8-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add a new .dtsi file for sa8775p PMICs and add the four PMICs interfaced to the SoC via SPMI. Enable the PMICs for sa8775p-ride. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 37 +++++++++++++++++++++ arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 1 + 2 files changed, 38 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file mode 100644 index 000000000000..afe220b374c2 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023, Linaro Limited + */ + +#include +#include + +&spmi_bus { + pmm8654au_0: pmic@0 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; + + pmm8654au_1: pmic@2 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x2 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; + + pmm8654au_2: pmic@4 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; + + pmm8654au_3: pmic@6 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x6 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index 1020dfd21da2..b7ee4cc676b5 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "sa8775p.dtsi" +#include "sa8775p-pmics.dtsi" / { model = "Qualcomm SA8775P Ride"; From patchwork Mon Mar 27 12:53:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 668295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A685EC77B6F for ; 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Mon, 27 Mar 2023 05:53:26 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:26 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 08/18] arm64: dts: qcom: sa8775p: add the Power On device node Date: Mon, 27 Mar 2023 14:53:06 +0200 Message-Id: <20230327125316.210812-9-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the PON node to PMIC #0 for sa8775p platforms. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi index afe220b374c2..dbc596e32253 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi @@ -12,6 +12,14 @@ pmm8654au_0: pmic@0 { reg = <0x0 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + pmm8654au_0_pon: pon@1200 { + compatible = "qcom,pmk8350-pon"; + reg = <0x1200>, <0x800>; + reg-names = "hlos", "pbs"; + mode-recovery = <0x1>; + mode-bootloader = <0x2>; + }; }; pmm8654au_1: pmic@2 { From patchwork Mon Mar 27 12:53:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 667555 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF288C77B73 for ; Mon, 27 Mar 2023 12:53:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232488AbjC0Mxn (ORCPT ); Mon, 27 Mar 2023 08:53:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232433AbjC0Mxb (ORCPT ); Mon, 27 Mar 2023 08:53:31 -0400 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 641D21987 for ; Mon, 27 Mar 2023 05:53:29 -0700 (PDT) Received: by mail-wm1-x333.google.com with SMTP id v20-20020a05600c471400b003ed8826253aso4929118wmo.0 for ; Mon, 27 Mar 2023 05:53:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1679921608; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CCfaLfkFa9+r23DNhVQqZmyOO2Rn4kY0uWG6aZK0HR8=; b=PYBN+u4b1Gohk9bh2TKYaETvHvNPu8a/7/SNvTVGy8lroSQ6N6YNFD3LFHqGuO/OHn ucJyoCHrpNHTvFYD+Fve6MCPLWomRjMJDY4tdk0dReUgC0Iubjy6wOi0EnjCM7VlqALs e6Kcd8Rq66c5HJVX5lyvB6K19tmWa9bIc3HlGSYJ6VOzYJHWFRQkjPuqwS0j2G7nVNt9 zww0SLIMSbSoL5jE+xEL0vT1WI102PMMAimVnzzgwRMaSY3gFqTBTvU9fHorqjVoxPoD tFEoA5B4ta2xMRZjxrL+WEpST86DotAQTbi5djxeYLdk5irUAVW1e/iHTPS2dqvM/KN5 vQxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679921608; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CCfaLfkFa9+r23DNhVQqZmyOO2Rn4kY0uWG6aZK0HR8=; b=P6FpqWlkFiEuPx/KpCt9BPOHVzbNrt4j5ZFISMx3b1vHqTcw4rES9XaAfb0sIlK6ON 7I+VbcA8Bc14mN1PubG7A2BWmBZ3bm3xB0bfbmqKc35hUnmR2K5fUBfwXmPad1JQjNx1 DxXF0ERgIixoHUc4/GCkVYDxJJQ/gdfgJ1+1BNAloqbz6FKogLsixMQ8FR1RYcC3YS5h aY9g/kA3lJEv5RP3cC1qpWDH38E4QYv0sHkJFEaZRVgegr+PvQThK9r2YvXpgRk4LAf4 jmfi5x7l70gZAAafDKX+2PLKxYy04j7YwhLqtfkPj2yOuOpTLgKBotIRHxhz9r6DsK/s 5xWQ== X-Gm-Message-State: AO0yUKUy7oG10ZHBx8q15zWwpJgBC4C1xT0oXuMlCY+58UAOphfMHpUN UEND9CwFF0/alXnfAFNJWPm1Ew== X-Google-Smtp-Source: AK7set+brWqvOktXTMt7JRWGxzKOEw32VebNsxv+m3zTuLyQQgQ+hqQDyx53EY5Yk3RvBviZPdJJQA== X-Received: by 2002:a1c:770b:0:b0:3ed:4b0f:5378 with SMTP id t11-20020a1c770b000000b003ed4b0f5378mr9168056wmi.27.1679921607876; Mon, 27 Mar 2023 05:53:27 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:27 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 09/18] arm64: dts: qcom: sa8775p: pmic: add the power key Date: Mon, 27 Mar 2023 14:53:07 +0200 Message-Id: <20230327125316.210812-10-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the power key node under the PON node for PMIC #0 on sa8775p. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi index dbc596e32253..f421d4d64c8e 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi @@ -19,6 +19,13 @@ pmm8654au_0_pon: pon@1200 { reg-names = "hlos", "pbs"; mode-recovery = <0x1>; mode-bootloader = <0x2>; + + pmm8654au_0_pon_pwrkey: pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts-extended = <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + debounce = <15625>; + }; }; }; From patchwork Mon Mar 27 12:53:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 667556 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4A25C7619A for ; Mon, 27 Mar 2023 12:53:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232484AbjC0Mxm (ORCPT ); Mon, 27 Mar 2023 08:53:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232488AbjC0Mxb (ORCPT ); Mon, 27 Mar 2023 08:53:31 -0400 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42E0519AF for ; Mon, 27 Mar 2023 05:53:29 -0700 (PDT) Received: by mail-wm1-x32e.google.com with SMTP id q7-20020a05600c46c700b003ef6e809574so1930334wmo.4 for ; Mon, 27 Mar 2023 05:53:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1679921609; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9xLbshkx8RN3Dp5pV4JMfPJgexrRDb08ZnEhmNgvIW8=; b=DN5zlzT8lBCRiq18EenA9tEbn5n8IpWw4jH6eQi+f7ZGyZUGT3RNp2lPyQ+nSTPnw8 g5cpS5ACzV/j8UyIyCbYakip31FlVZrcSwNhyXHEgqQcEujcGEd/XdN6p6/a+sKk/7SX Bhbjyk9BBl7Vg+fyf9dPeVYNvh1PQMycMKQy+RxOpvEiREEIrWuupNEhYGlVsop2I2DR FaXcT78CGQyQqBmZswzFMc8pEJqcTFcB0lRuOPn7d7IofcIVyrEySTIARP8bsyUjvnS1 fpYrFUAT3+IGewuV5yv95R5EIzZGdx6sN8AIcIX/DnrelZ+yKnODEW8w+X+nwuSdpRLs T4AA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679921609; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9xLbshkx8RN3Dp5pV4JMfPJgexrRDb08ZnEhmNgvIW8=; b=2brNOoA08OpgZD7GRqxW8+to5Dx11s4ekye6iUyNbGSdDKsM9jRic3LtLjux4o8HGJ NmXhylDNARIH4bsFBEUeWW/2/vo4+zsJ/D7vosGyNdkqNmTuRgpf7/iASxWxMzhgkf9I FeVhIB4lDi0cPKtC07KaD26sFuSyRUz2+4bnBIYJREY9yZAhqchePSbGVjyT7y9cIdQm 3l7tTRu/9cTRBBGqVsYIskWEO2PXlrqBrXuXZWLX6yPyB0wK8dClORXmDW298AqLhNEc yy+cNLLe23PGd3e96lEQxB4wFMRnlNhO/m6yfULm/JvINp4hZECBLj2VDhTh5s6tYONi HSbA== X-Gm-Message-State: AO0yUKW9AValep8uJ4Mq/5eDZSlXphc/IYuJLEd76ZwRzxJDzK6FXQqq AX6ZNdDsCGD2UlDxN0PnGi2jcw== X-Google-Smtp-Source: AK7set9WWTu28DjahOZNwv8/DaGb5PjaAwrlWJycYTjARylTu7X3/sB8BOqBaDO6igjO0Xcish5UiQ== X-Received: by 2002:a05:600c:258:b0:3ea:d611:f8 with SMTP id 24-20020a05600c025800b003ead61100f8mr9758392wmj.38.1679921608872; Mon, 27 Mar 2023 05:53:28 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:28 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 10/18] arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input Date: Mon, 27 Mar 2023 14:53:08 +0200 Message-Id: <20230327125316.210812-11-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the RESIN input for sa8775p platforms' PMIC. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi index f421d4d64c8e..8616ead3daf5 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi @@ -26,6 +26,13 @@ pmm8654au_0_pon_pwrkey: pwrkey { linux,code = ; debounce = <15625>; }; + + pmm8654au_0_pon_resin: resin { + compatible = "qcom,pmk8350-resin"; + interrupts-extended = <&spmi_bus 0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + status = "disabled"; + }; }; }; From patchwork Mon Mar 27 12:53:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 668291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91817C77B62 for ; Mon, 27 Mar 2023 12:54:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232336AbjC0Mx7 (ORCPT ); Mon, 27 Mar 2023 08:53:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232509AbjC0Mxc (ORCPT ); Mon, 27 Mar 2023 08:53:32 -0400 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E7DB2118 for ; Mon, 27 Mar 2023 05:53:30 -0700 (PDT) Received: by mail-wm1-x329.google.com with SMTP id bg16-20020a05600c3c9000b003eb34e21bdfso7336145wmb.0 for ; Mon, 27 Mar 2023 05:53:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1679921610; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oXI6ueezQMjbt8yHZkCuSNA3fjya7kV77Z0XtfmoN4Y=; b=f25hlpW9QN/snZVztVI/GN14nrUhdiFH0ofCY/er+aw7UPmL6nCNC5EjVReu0Ipn3j SpeCTdx8t/xrA8oq0WHSZRnZnPQLUBrA1o2trARs6mbqAc171Myrr1n2p97JWIJQPGdS y4MQPoN3GjII4qUnDD4ufgh4cZpUUD65fp83c0TKQr3VS6jSYqe3ERDDg9H6HDQTcgkb ObYqkOsd9hVTV2+IM9chcAEBIC/2jn5rk0mlzTwKN6eEgl6RPON4cSfAPl2V4wCHoT48 5qEtsFrlgCzW/oQ2FPYY3fzQjaI3rRNh/dMil5/TUas0XsJjJe5nFPVl8ZCyaOejLnKi Bvww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679921610; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oXI6ueezQMjbt8yHZkCuSNA3fjya7kV77Z0XtfmoN4Y=; b=3LKW0CZf4ZTaEfM8ClJ2dbBA76nMhrnpzmRpHpPhIn+3hzcRN2nBZunVVWB2X33Sme O0dyYYzZp9fnK+PT5cKeNTMXjpZsoJWIdiNGWrDWlaUBtJnzjRuMpy7yDejwIjivGTZM WJEFJ0D92aVzveRTHbPqy6HRvM8sdE3OdFIq0nO9BosuSmLP92mpFGUw1dbYcByEB9fQ KE4hOpl/ZA1ZhjzkGxa9kzoKX3PIWRUc7SbjxYqMFQ/CZwjwDCO4OZVZqE3heu5oiR9U sw9xsQe50ULn3Zja7wPidc8m5EEaopGIkchsQh1H0PVKFMZMZhacE4nAxpuxZhoIm/wA XTqA== X-Gm-Message-State: AAQBX9c2Y9eJLeShyv/gLMx7bC5IGW4oS29puECzdZBZtYvlaP8v50iC 3/9rySP61Jnt6TbzW4NOJ93ZWg== X-Google-Smtp-Source: AKy350YuH3QcIe3lv8XkoMUT6jWczr4hxMm2rs4MVH+WASq4OrJGnTlsRt/K8UNZDsEvLfHifnyz3A== X-Received: by 2002:a05:600c:2243:b0:3ef:6e1c:3ffa with SMTP id a3-20020a05600c224300b003ef6e1c3ffamr2887048wmm.28.1679921609742; Mon, 27 Mar 2023 05:53:29 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:29 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 11/18] arm64: dts: qcom: sa8775p: pmic: add thermal zones Date: Mon, 27 Mar 2023 14:53:09 +0200 Message-Id: <20230327125316.210812-12-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the thermal zones and associated alarm nodes for the PMICs that have them hooked up on sa8775p-ride. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 112 ++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi index 8616ead3daf5..be12997a080c 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi @@ -6,6 +6,90 @@ #include #include +/ { + thermal-zones { + pmm8654au_0_thermal: pm8775-0-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pmm8654au_0_temp_alarm>; + + trips { + trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pmm8654au_1_thermal: pm8775-1-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pmm8654au_1_temp_alarm>; + + trips { + trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pmm8654au_2_thermal: pm8775-2-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pmm8654au_2_temp_alarm>; + + trips { + trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pmm8654au_3_thermal: pm8775-3-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pmm8654au_3_temp_alarm>; + + trips { + trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + &spmi_bus { pmm8654au_0: pmic@0 { compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; @@ -13,6 +97,13 @@ pmm8654au_0: pmic@0 { #address-cells = <1>; #size-cells = <0>; + pmm8654au_0_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts-extended = <&spmi_bus 0x0 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + pmm8654au_0_pon: pon@1200 { compatible = "qcom,pmk8350-pon"; reg = <0x1200>, <0x800>; @@ -41,6 +132,13 @@ pmm8654au_1: pmic@2 { reg = <0x2 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + pmm8654au_1_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts-extended = <&spmi_bus 0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; }; pmm8654au_2: pmic@4 { @@ -48,6 +146,13 @@ pmm8654au_2: pmic@4 { reg = <0x4 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + pmm8654au_2_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts-extended = <&spmi_bus 0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; }; pmm8654au_3: pmic@6 { @@ -55,5 +160,12 @@ pmm8654au_3: pmic@6 { reg = <0x6 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + pmm8654au_3_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts-extended = <&spmi_bus 0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; }; }; From patchwork Mon Mar 27 12:53:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 667553 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A6C2C77B61 for ; Mon, 27 Mar 2023 12:54:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232876AbjC0Mx7 (ORCPT ); Mon, 27 Mar 2023 08:53:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232244AbjC0Mxc (ORCPT ); Mon, 27 Mar 2023 08:53:32 -0400 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B35F2681 for ; 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Mon, 27 Mar 2023 05:53:30 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij , Rob Herring Subject: [PATCH v3 12/18] dt-bindings: pinctrl: qcom, pmic-gpio: add compatible for pmm8654au-gpio Date: Mon, 27 Mar 2023 14:53:10 +0200 Message-Id: <20230327125316.210812-13-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add a new compatible for the GPIO controller on the pm8654au PMIC. It has 12 pins with no holes. Signed-off-by: Bartosz Golaszewski Cc: Linus Walleij Acked-by: Rob Herring Acked-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index db505fdeac86..512378a2d4fd 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -58,6 +58,7 @@ properties: - qcom,pmk8350-gpio - qcom,pmk8550-gpio - qcom,pmm8155au-gpio + - qcom,pmm8654au-gpio - qcom,pmp8074-gpio - qcom,pmr735a-gpio - qcom,pmr735b-gpio @@ -439,6 +440,7 @@ $defs: - gpio1-gpio4 for pmk8350 - gpio1-gpio6 for pmk8550 - gpio1-gpio10 for pmm8155au + - gpio1-gpio12 for pmm8654au - gpio1-gpio12 for pmp8074 (holes on gpio1 and gpio12) - gpio1-gpio4 for pmr735a - gpio1-gpio4 for pmr735b From patchwork Mon Mar 27 12:53:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 667552 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E093C761A6 for ; Mon, 27 Mar 2023 12:54:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232511AbjC0MyA (ORCPT ); Mon, 27 Mar 2023 08:54:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232519AbjC0Mxd (ORCPT ); Mon, 27 Mar 2023 08:53:33 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1370910E7 for ; Mon, 27 Mar 2023 05:53:32 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id r19-20020a05600c459300b003eb3e2a5e7bso5238906wmo.0 for ; Mon, 27 Mar 2023 05:53:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1679921611; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=165NgY7uZe0xEaE1msAHdv1OQit9UrOek6qTFAsHcZc=; b=ZzRhmBOYjHFtV/HSqmkL0kLriR8hVJjfbzzieDzQnAxxR0UBhTgzNsSNgRXNtq7wHy kZ1UlETe+FZzTaD/9lIyOGTVHf3dAh7ZohhWVUKFlXhOUmMrxeHk99/GawJ/hu/vwlcd 30+7bwW8hJjfs3a5GvkG7bDNETN/tGPlj7JNYWD4/vz4ePRb5tzQBvj3ZqNEJsf48zOc GxdKZk2I6tVYwvDDqKA1eOi4qRPHjCzTNP84/CvnbOCCUp96lGH6KvsD0YzQmhEATOrQ DqDMTlFCF7Id0cg/+prUJZdrlWUVva4ibYi9tLTssSS/xDvLgwpUO1SHpdtcNfp6ObaU XrBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679921611; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=165NgY7uZe0xEaE1msAHdv1OQit9UrOek6qTFAsHcZc=; b=q6xoGQTH8XVXg9l/uohit03cLrMzED92mxESMp/wsGYh/FD/JMdnKbmqWOQEwkidQL EiEPQJdJmE/vecm0i96nGqqnLtsXxi16SdN86lVsti1nElnRcHKgplZi5Bu0Ii+Z33l8 HffVBeffPVh2AQUGIBw3pVnNYvSHC0ru0s6SWG+w9MCd0XKWkEhHQbLsZgOedkhKsZrI /Xao0lkR6AMlW53xr+vPxP7pyuyELEbukoRn2wmgqykM5ybNNJZV1Rry8C/vEho6WBRz rVYXf+7JMResE7tjXoFOhihltY++Wj8j2R0gXzfjXhTxwWUfViL2TjFPNUDj13nNeOUc fmDA== X-Gm-Message-State: AAQBX9e7islQjGa5PpS78ijk0QnsthA94vdnSmPbwmLBcrAlxadW+ApD hlVF1vAWOhfSuB4dNgbXq6g5pA== X-Google-Smtp-Source: AKy350a5nFj/1tHgpxf8bwwMIZnECj2+1/tv1akuL5h+GSbziDVluF+PF1nfJKdEh1vXUrCcc4gGqA== X-Received: by 2002:a7b:c009:0:b0:3ef:62c6:9930 with SMTP id c9-20020a7bc009000000b003ef62c69930mr5765235wmb.3.1679921611697; Mon, 27 Mar 2023 05:53:31 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:31 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij Subject: [PATCH v3 13/18] pinctrl: qcom: spmi-gpio: add support for pmm8654au-gpio Date: Mon, 27 Mar 2023 14:53:11 +0200 Message-Id: <20230327125316.210812-14-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add support for the GPIO controller present on the pmm8654au PMIC. Signed-off-by: Bartosz Golaszewski Cc: Linus Walleij Reviewed-by: Konrad Dybcio Acked-by: Linus Walleij --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index ea3485344f06..0d94175b34f8 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1238,6 +1238,7 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 }, { .compatible = "qcom,pmk8550-gpio", .data = (void *) 6 }, { .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 }, + { .compatible = "qcom,pmm8654au-gpio", .data = (void *) 12 }, /* pmp8074 has 12 GPIOs with holes on 1 and 12 */ { .compatible = "qcom,pmp8074-gpio", .data = (void *) 12 }, { .compatible = "qcom,pmr735a-gpio", .data = (void *) 4 }, From patchwork Mon Mar 27 12:53:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 668290 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A4B8C76195 for ; Mon, 27 Mar 2023 12:54:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232918AbjC0MyC (ORCPT ); Mon, 27 Mar 2023 08:54:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232545AbjC0Mxe (ORCPT ); Mon, 27 Mar 2023 08:53:34 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E02FB173E for ; Mon, 27 Mar 2023 05:53:32 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id n19so5010609wms.0 for ; Mon, 27 Mar 2023 05:53:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; t=1679921612; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=48DD7pEvZ/2eHfxI/22xeFC054/nof7NI4mSTltG1IA=; b=0qkewywTMq3zwtAVbPsYdKJrT9Ha7uSKUBImwC3OtE5INrByAV8rNEuVqACE6cfzKD 0D/4jKGq6j2FIE2za5gXd+CRGYuzp7hQfZDzTygogRYUuwrU53IE3t0ZFh/dDth4CzS4 M5yzO79Q8VgoDzskRsLxjHpfuixeAtB9dKmIjaCZi1slEnxWLiiPgXbSH9iUy6GXC2Jf urnqrfFkOAHOBgcR674PiX4fbzuXG9Sp011O1SAs+Tz7/UsRiUTHLRaZaCKnG8ABOOeW fzeNzh1Ug1GCZRrcxXOb2yAsMAvDr/kuwsmZ5bQTFYJr3ITCjHn4p9lD1K+1EXAwQQhV o1XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679921612; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=48DD7pEvZ/2eHfxI/22xeFC054/nof7NI4mSTltG1IA=; b=3/i3nMEWYlbzkJ91qXvlShMDLg6Olqi22O2jVncjrDMY3CtzPqPeD3mycsWMSXxwq1 whipwSxteYK7t8uSw3SLZ3tBD7SgjRCe934tnK8nL7Y9tdnFGVQO77rEswA4B08ZQhha heQK+aOWlErmXjSkv+cfEIyGxO1p1uFwTRIQ7aYE3hQvfXu9KfDFVoLFUnh/Bmyn8Fxy +Dd59jQ+D4dIqodr1ru+BobA2NW99NFwGmX+af/WBmtsTFbt1PO5SWDsXVm+0p3eURSQ ogkW1QOUlP1SGAJr1E5oYBVvBPX1xEH+EE4SaqwtbBJ6kF/XOKa178HBBadtAd3S1kdy AlXg== X-Gm-Message-State: AO0yUKWghKqtlHhrLgxQYcMjdSJ7ihnG6ZDAYX2vUiRMk+v+6Yh7psfQ xo2GtQj9NTipjfKFZimqtSd1CQ== X-Google-Smtp-Source: AK7set+6ZtIOYq1O+MAd+cqd6ZRV4GQgCbWx3idh54HtPpw4qz3KIu+72QNPITA5E31mz9PVbDMWTA== X-Received: by 2002:a05:600c:4f91:b0:3ee:501f:c795 with SMTP id n17-20020a05600c4f9100b003ee501fc795mr13082362wmq.1.1679921612541; Mon, 27 Mar 2023 05:53:32 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:313d:a304:2790:a949]) by smtp.gmail.com with ESMTPSA id q25-20020a1ce919000000b003ee58e8c971sm13572220wmc.14.2023.03.27.05.53.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Mar 2023 05:53:32 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 14/18] arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes Date: Mon, 27 Mar 2023 14:53:12 +0200 Message-Id: <20230327125316.210812-15-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add GPIO controller nodes to PMICs that have the GPIO hooked up on sa8775p-ride. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 40 +++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi index be12997a080c..7602cca47bae 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi @@ -125,6 +125,16 @@ pmm8654au_0_pon_resin: resin { status = "disabled"; }; }; + + pmm8654au_0_gpios: gpio@8800 { + compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmm8654au_0_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; pmm8654au_1: pmic@2 { @@ -139,6 +149,16 @@ pmm8654au_1_temp_alarm: temp-alarm@a00 { interrupts-extended = <&spmi_bus 0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; #thermal-sensor-cells = <0>; }; + + pmm8654au_1_gpios: gpio@8800 { + compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmm8654au_2_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; pmm8654au_2: pmic@4 { @@ -153,6 +173,16 @@ pmm8654au_2_temp_alarm: temp-alarm@a00 { interrupts-extended = <&spmi_bus 0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; #thermal-sensor-cells = <0>; }; + + pmm8654au_2_gpios: gpio@8800 { + compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmm8654au_2_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; pmm8654au_3: pmic@6 { @@ -167,5 +197,15 @@ pmm8654au_3_temp_alarm: temp-alarm@a00 { interrupts-extended = <&spmi_bus 0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; #thermal-sensor-cells = <0>; }; + + pmm8654au_3_gpios: gpio@8800 { + compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmm8654au_3_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; }; From patchwork Mon Mar 27 12:53:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 667551 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AE1BC77B61 for ; Mon, 27 Mar 2023 12:54:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232922AbjC0MyD (ORCPT ); Mon, 27 Mar 2023 08:54:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232593AbjC0Mxg (ORCPT ); Mon, 27 Mar 2023 08:53:36 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D34D844B7 for ; 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Mon, 27 Mar 2023 05:53:33 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 15/18] arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs Date: Mon, 27 Mar 2023 14:53:13 +0200 Message-Id: <20230327125316.210812-16-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Set line names for GPIO lines exposed by PMICs on sa8775p-ride. Signed-off-by: Bartosz Golaszewski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 51 +++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index b7ee4cc676b5..a0d2024a69df 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -32,6 +32,57 @@ &i2c18 { status = "okay"; }; +&pmm8654au_0_gpios { + gpio-line-names = "DS_EN", + "POFF_COMPLETE", + "UFS0_VER_ID", + "FAST_POFF", + "DBU1_PON_DONE", + "AOSS_SLEEP", + "CAM_DES0_EN", + "CAM_DES1_EN", + "CAM_DES2_EN", + "CAM_DES3_EN", + "UEFI", + "ANALOG_PON_OPT"; +}; + +&pmm8654au_1_gpios { + gpio-line-names = "PMIC_C_ID0", + "PMIC_C_ID1", + "UFS1_VER_ID", + "IPA_PWR", + "", + "WLAN_DBU4_EN", + "WLAN_EN", + "BT_EN", + "USB2_PWR_EN", + "USB2_FAULT"; +}; + +&pmm8654au_2_gpios { + gpio-line-names = "PMIC_E_ID0", + "PMIC_E_ID1", + "USB0_PWR_EN", + "USB0_FAULT", + "SENSOR_IRQ_1", + "SENSOR_IRQ_2", + "SENSOR_RST", + "SGMIIO0_RST", + "SGMIIO1_RST", + "USB1_PWR_ENABLE", + "USB1_FAULT", + "VMON_SPX8"; +}; + +&pmm8654au_3_gpios { + gpio-line-names = "PMIC_G_ID0", + "PMIC_G_ID1", + "GNSS_RST", + "GNSS_EN", + "GNSS_BOOT_MODE"; +}; + &qupv3_id_1 { status = "okay"; }; From patchwork Mon Mar 27 12:53:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 668289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89E14C761A6 for ; Mon, 27 Mar 2023 12:54:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232563AbjC0MyF (ORCPT ); Mon, 27 Mar 2023 08:54:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232594AbjC0Mxg (ORCPT ); Mon, 27 Mar 2023 08:53:36 -0400 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1F73196 for ; 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Mon, 27 Mar 2023 05:53:33 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski , Mark Brown Subject: [PATCH v3 16/18] dt-bindings: regulator: qcom,rpmh: add compatible for pmm8654au RPMH Date: Mon, 27 Mar 2023 14:53:14 +0200 Message-Id: <20230327125316.210812-17-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add the compatible for the pmm8654au RPMH regulators present on the sa8775p-ride development board. Signed-off-by: Bartosz Golaszewski Cc: Mark Brown --- .../bindings/regulator/qcom,rpmh-regulator.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index a765837dc069..91054ed04c66 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -78,6 +78,7 @@ properties: - qcom,pmg1110-rpmh-regulators - qcom,pmi8998-rpmh-regulators - qcom,pmm8155au-rpmh-regulators + - qcom,pmm8654au-rpmh-regulators - qcom,pmr735a-rpmh-regulators - qcom,pmx55-rpmh-regulators - qcom,pmx65-rpmh-regulators @@ -244,6 +245,19 @@ allOf: patternProperties: "^vdd-s([1-9]|10)-supply$": true + - if: + properties: + compatible: + enum: + - qcom,pmm8654au-rpmh-regulators + then: + properties: + vdd-l2-l3-supply: true + vdd-l6-l7-supply: true + vdd-l8-l9-supply: true + patternProperties: + "^vdd-s[1-9]-supply$": true + - if: properties: compatible: From patchwork Mon Mar 27 12:53:15 2023 Content-Type: text/plain; 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Signed-off-by: Bartosz Golaszewski Cc: Mark Brown Reviewed-by: Konrad Dybcio --- drivers/regulator/qcom-rpmh-regulator.c | 55 +++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c index 4826d60e5d95..b0a58c62b1e2 100644 --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -694,6 +694,16 @@ static const struct rpmh_vreg_hw_data pmic5_pldo_lv = { .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, }; +static const struct rpmh_vreg_hw_data pmic5_pldo515_mv = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_range = REGULATOR_LINEAR_RANGE(1800000, 0, 187, 8000), + .n_voltages = 188, + .hpm_min_load_uA = 10000, + .pmic_mode_map = pmic_mode_map_pmic5_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + static const struct rpmh_vreg_hw_data pmic5_nldo = { .regulator_type = VRM, .ops = &rpmh_regulator_vrm_drms_ops, @@ -704,6 +714,16 @@ static const struct rpmh_vreg_hw_data pmic5_nldo = { .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, }; +static const struct rpmh_vreg_hw_data pmic5_nldo515 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_drms_ops, + .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000), + .n_voltages = 211, + .hpm_min_load_uA = 30000, + .pmic_mode_map = pmic_mode_map_pmic5_ldo, + .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, +}; + static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = { .regulator_type = VRM, .ops = &rpmh_regulator_vrm_ops, @@ -749,6 +769,15 @@ static const struct rpmh_vreg_hw_data pmic5_ftsmps525_mv = { .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, }; +static const struct rpmh_vreg_hw_data pmic5_ftsmps527 = { + .regulator_type = VRM, + .ops = &rpmh_regulator_vrm_ops, + .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), + .n_voltages = 215, + .pmic_mode_map = pmic_mode_map_pmic5_smps, + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, +}; + static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = { .regulator_type = VRM, .ops = &rpmh_regulator_vrm_ops, @@ -937,6 +966,28 @@ static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = { {} }; +static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = { + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps527, "vdd-s1"), + RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps527, "vdd-s2"), + RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps527, "vdd-s3"), + RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps527, "vdd-s4"), + RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps527, "vdd-s5"), + RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps527, "vdd-s6"), + RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps527, "vdd-s7"), + RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps527, "vdd-s8"), + RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps527, "vdd-s9"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-s9"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-l3"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l2-l3"), + RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-s9"), + RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo515, "vdd-s9"), + RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo515, "vdd-l6-l7"), + RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l6-l7"), + RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo515_mv, "vdd-l8-l9"), + RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"), + {} +}; + static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), @@ -1431,6 +1482,10 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { .compatible = "qcom,pmm8155au-rpmh-regulators", .data = pmm8155au_vreg_data, }, + { + .compatible = "qcom,pmm8654au-rpmh-regulators", + .data = pmm8654au_vreg_data, + }, { .compatible = "qcom,pmx55-rpmh-regulators", .data = pmx55_vreg_data, From patchwork Mon Mar 27 12:53:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 668288 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38DE4C761AF for ; Mon, 27 Mar 2023 12:54:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232970AbjC0MyZ (ORCPT ); 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Mon, 27 Mar 2023 05:53:35 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v3 18/18] arm64: dts: qcom: sa8775p-ride: add PMIC regulators Date: Mon, 27 Mar 2023 14:53:16 +0200 Message-Id: <20230327125316.210812-19-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230327125316.210812-1-brgl@bgdev.pl> References: <20230327125316.210812-1-brgl@bgdev.pl> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bartosz Golaszewski Add PMIC regulators for sa8775p-ride. Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 233 ++++++++++++++++++++++ 1 file changed, 233 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index a0d2024a69df..fdd229d232d1 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -5,6 +5,8 @@ /dts-v1/; +#include + #include "sa8775p.dtsi" #include "sa8775p-pmics.dtsi" @@ -25,6 +27,237 @@ chosen { }; }; +&apps_rsc { + regulators-0 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s4a: smps4 { + regulator-name = "vreg_s4a"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1816000>; + regulator-initial-mode = ; + }; + + vreg_s5a: smps5 { + regulator-name = "vreg_s5a"; + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1996000>; + regulator-initial-mode = ; + }; + + vreg_s9a: smps9 { + regulator-name = "vreg_s9a"; + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + regulator-initial-mode = ; + }; + + vreg_l4a: ldo4 { + regulator-name = "vreg_l4a"; + regulator-min-microvolt = <788000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l5a: ldo5 { + regulator-name = "vreg_l5a"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6a: ldo6 { + regulator-name = "vreg_l6a"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7a: ldo7 { + regulator-name = "vreg_l7a"; + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8a: ldo8 { + regulator-name = "vreg_l8a"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9a: ldo9 { + regulator-name = "vreg_l9a"; + regulator-min-microvolt = <2970000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-1 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_l1c: ldo1 { + regulator-name = "vreg_l1c"; + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l2c: ldo2 { + regulator-name = "vreg_l2c"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l3c: ldo3 { + regulator-name = "vreg_l3c"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l4c: ldo4 { + regulator-name = "vreg_l4c"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + /* + * FIXME: This should have regulator-allow-set-load but + * we're getting the over-current fault from the PMIC + * when switching to LPM. + */ + }; + + vreg_l5c: ldo5 { + regulator-name = "vreg_l5c"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6c: ldo6 { + regulator-name = "vreg_l6c"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7c: ldo7 { + regulator-name = "vreg_l7c"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8c: ldo8 { + regulator-name = "vreg_l8c"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9c: ldo9 { + regulator-name = "vreg_l9c"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2700000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-2 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "e"; + + vreg_s4e: smps4 { + regulator-name = "vreg_s4e"; + regulator-min-microvolt = <970000>; + regulator-max-microvolt = <1520000>; + regulator-initial-mode = ; + }; + + vreg_s7e: smps7 { + regulator-name = "vreg_s7e"; + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + regulator-initial-mode = ; + }; + + vreg_s9e: smps9 { + regulator-name = "vreg_s9e"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <570000>; + regulator-initial-mode = ; + }; + + vreg_l6e: ldo6 { + regulator-name = "vreg_l6e"; + regulator-min-microvolt = <1280000>; + regulator-max-microvolt = <1450000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8e: ldo8 { + regulator-name = "vreg_l8e"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; +}; + &i2c18 { clock-frequency = <400000>; pinctrl-0 = <&qup_i2c18_default>;