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[209.132.180.67]) by mx.google.com with ESMTP id q17si19220321pll.285.2019.05.21.02.35.47; Tue, 21 May 2019 02:35:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P0YGQzfJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727687AbfEUJfp (ORCPT + 30 others); Tue, 21 May 2019 05:35:45 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:43277 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727649AbfEUJfn (ORCPT ); Tue, 21 May 2019 05:35:43 -0400 Received: by mail-pl1-f193.google.com with SMTP id gn7so4007565plb.10 for ; Tue, 21 May 2019 02:35:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=YiFzZUDFNNH+WA+LKC8cHYcNE/oyfxuU+EKiZteprcA=; b=P0YGQzfJ3l725ZLFV27Ae+RQMAMp2ZIqj4kf636aaJM8AwO+STfy77eYWy1+alfg4h NHoQ9OKoM3Bfp7G5iJsxixxXPHo8JzULo3FafOzYHEWUs9o7EzYVfwTsP3cee5LdsUtJ kKT/31OvfRmzZELmH2BMt37+JVIdNwU9xxY7u4GoGnTiJsHShkrE0XCAE15rr/bATyVb Jo7pIdmVffNGfhZdsfpFVar4tm2U4J237nZB9Y5P5oVGrcgdea0NnX5Zp1Z9iuIaT+ej ZfM/voC7Y2L3a4mgevvfUoA6Z+uj3DwY4orptefBX1PNNljja/67t4Oy38fSdW6gYi9Y 2nXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=YiFzZUDFNNH+WA+LKC8cHYcNE/oyfxuU+EKiZteprcA=; b=pDQ9ytY4RRJ/ThOLH6ZSx4G6Y+XZZm9dWBaYfEsn2urhKnSNXFTxoEH9n4L9/iktRr v+J3dIkDx2NVzYuLN2Hka6xkkgLgFx6x3bMmnaODv09qobiuxH6WAhT1FaVZog7SJBXU /cQraSI3TiY9Kig+7jkdxNKgsAJFLbMya1jqiIZUbF43JvIP3ZSWxNdsAyF0ZVnZu8bB ByzmNW/t8iti5R+HtuXeRmtt+u1o8MRCrNPx5LsIZvSso4NL19t7BbZ4FOtbGMdJnGge 0LDziHRv8uqhPuq3GAdsXjwyG9sa95IQmX8HLl0lzo06Uwgx2TcbmQhRWkfUk6oNajpl bsWw== X-Gm-Message-State: APjAAAXx8GHqsVeWIVHXk7eaJSB9ff1brqeLSQWMnnzeHsvtcRzNMQOL 14Ai1K8pRSOjIOGSBfp+H0Ta7+yZ6DGocQ== X-Received: by 2002:a17:902:3363:: with SMTP id a90mr659741plc.153.1558431342315; Tue, 21 May 2019 02:35:42 -0700 (PDT) Received: from localhost ([49.248.189.249]) by smtp.gmail.com with ESMTPSA id o6sm43731344pfa.88.2019.05.21.02.35.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 May 2019 02:35:41 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, agross@kernel.org, niklas.cassel@linaro.org, marc.w.gonzalez@free.fr, sibis@codeaurora.org, daniel.lezcano@linaro.org, Andy Gross , David Brown , Li Yang , Shawn Guo Cc: devicetree@vger.kernel.org Subject: [PATCH v2 5/9] arm64: dts: qcom: qcs404: Add PSCI cpuidle low power states Date: Tue, 21 May 2019 15:05:15 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Niklas Cassel Add device bindings for cpuidle states for cpu devices. Signed-off-by: Niklas Cassel Reviewed-by: Vinod Koul [rename the idle-states to more generic names and fixups] Signed-off-by: Amit Kucheria Acked-by: Daniel Lezcano --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index e8fd26633d57..0a9b29af64c2 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -30,6 +30,7 @@ compatible = "arm,cortex-a53"; reg = <0x100>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; }; @@ -38,6 +39,7 @@ compatible = "arm,cortex-a53"; reg = <0x101>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; }; @@ -46,6 +48,7 @@ compatible = "arm,cortex-a53"; reg = <0x102>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; }; @@ -54,6 +57,7 @@ compatible = "arm,cortex-a53"; reg = <0x103>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; }; @@ -61,6 +65,20 @@ compatible = "cache"; cache-level = <2>; }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + idle-state-name = "standalone-power-collapse"; + arm,psci-suspend-param = <0x40000003>; + entry-latency-us = <125>; + exit-latency-us = <180>; + min-residency-us = <595>; + local-timer-stop; + }; + }; }; firmware { From patchwork Tue May 21 09:35:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 164702 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp1375352ili; Tue, 21 May 2019 02:35:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqymHHYGQIC4ylBrWnh2XZsnfZsZ+vby6pPwzm2DzN9rNtGfNaj2Yw7Z9qgmTwUlaU6W1Zfd X-Received: by 2002:a65:6088:: with SMTP id t8mr32697042pgu.381.1558431350774; Tue, 21 May 2019 02:35:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558431350; cv=none; d=google.com; s=arc-20160816; b=H+wmyAnPnXI2yZs5oAa4Z1xFYkb5WkRHinBRePN6Gy6PicJ/MJmqScaUOCTLoWUL7T NK077cZbSk9kqr9y6S4NaKsLRz4Y12OmhDs7FubgC6339sGNdFSMh+YZYJjDTm18nCvB m/NiEAB9J4SbD7tt3AP5Ul9UWz6mFdaUHUlxTMFHWLE5KydiJosDYyx7KGEnNQAsQJ51 3goEBjHrbveDjMyGccr5hzy2BV8pdn5C6WXSuERgP6VItXQn9ldOtwZ/Wvzr3+pRQ242 aqP/WMTWCb9b2WEPHSGyWNbVoT2AmwegHdZwPB+jZvpcnZ8pQt3nEnl2AMAsbszKgKFB 5mkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=5A+pTqqd2a8qNgMyuAo19hoC6uwfhm1K0BZ01QSlkgg=; b=LmzAeZLt3906sqHey7YYFxLkGAyGTBx5XS13m+krhW+ek83uNRpt1b4k+90f0wN19v mYgmoJhNPG/7BPO5g5IuiU2eaYWToBRA0tMKVurZeaAhpSWEIxgbU7xXiUEuX9ncPDrf evCJGk6Uxi1OE72BNhxF16bCgzQcbNweBppPQZ2wE8XDOQVEsuSa35ibCH2SaNiPr4zL u+WRx4jdxyDWtOJ9l1GtAIA+1GY9nf0R8U+Cfdmec24yEjNs8Rayh1EL+JRncQ5V2Uz4 lSJux/MkYvqWotJd4pJhge+On23wiS8AEIFf9HgnvUaOj0nx8iiIlKU1pedGCLKf+9Bc fUFg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Li1LAeqG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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However, all cpus implement the same microarchitecture and the two clusters only differ in the maximum frequency attainable by the CPUs. Signed-off-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c761269caf80..4f2fb7885f39 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -95,6 +95,7 @@ compatible = "qcom,kryo"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "cache"; @@ -107,6 +108,7 @@ compatible = "qcom,kryo"; reg = <0x0 0x1>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; }; @@ -115,6 +117,7 @@ compatible = "qcom,kryo"; reg = <0x0 0x100>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "cache"; @@ -127,6 +130,7 @@ compatible = "qcom,kryo"; reg = <0x0 0x101>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_1>; }; @@ -151,6 +155,19 @@ }; }; }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + idle-state-name = "standalone-power-collapse"; + arm,psci-suspend-param = <0x00000004>; + entry-latency-us = <40>; + exit-latency-us = <80>; + min-residency-us = <300>; + }; + }; }; thermal-zones { From patchwork Tue May 21 09:35:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 164703 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp1375390ili; Tue, 21 May 2019 02:35:53 -0700 (PDT) X-Google-Smtp-Source: APXvYqzj6LsepkIQ3dZxLu1bvDMi4RofIcYnlxOFa2FgrjccN3ATqU0mrqQFtrZriaiMt62dzZg0 X-Received: by 2002:a63:fb02:: with SMTP id o2mr79830608pgh.357.1558431353558; Tue, 21 May 2019 02:35:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558431353; cv=none; d=google.com; s=arc-20160816; b=j8F+/FzMOQGHAAdwrR5cCoVV5xYdEMuUEmjaJYu5x6QnfqMZvqDnEzkqJTJg8jZ418 wNcxd0sru0SI/huycChTGbO8JPoWuxUiF8cUP6Mby4r7RKN/6xiHM/kLCLLpf9AbSbyd 99I9ONwbNzUo0TznSJnxnE85IIKIZwKoRyqk9KQr51IgyFVX5+XdgzI+otuXpICk6XlK ZQJBvlCBhQBjb3MsCYmKNilX8n9y+pLXJv1VyAK39J/CX73cG4C0KVk4PalqHNajVdp7 FGOyZ4OQjk7PRFb4n8Uv1D3684TgdaniE9v1vNwmA3RUe36CZhLjNcE7uViH3k6wxQ1Y 0riQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=hZWhk/gl4Z1xokw4cH1p9gk38btAaqLGCZ6mHMUmOeE=; b=M69TvgCMTpRTQBCLiwZ4tWIJ2n0gVTXsIpdQiV4S5N3i/PLgJodKH8k1pWF4oldQJF HvPN6UQHm/heRfrao3VR2CI7MBftzU9RESts9quykgB7ZcatlkqK9b19fMT7nIcoOaeE V9EM8oSXdxwkeKzzbL1YcbkssVQjAx7EYv3JqGaxNG+utrWDhq98w56fx9XBA8Y3JkAy +YMp2Stq8EkK4/RLBcYK7pNTBvgSdjmf+pflTG5vyIStstzIrxOMZj5QHe9ZBiQXfbVV aF6XLBggklsoaflLke9gHlVg5u5j+ZuaYJhFrQ+IsSh9TdWMKferwgfuMN69i5+oPNvN 6mzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SPA5OfjV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c3si2724611pgq.289.2019.05.21.02.35.53; Tue, 21 May 2019 02:35:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SPA5OfjV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727745AbfEUJfw (ORCPT + 30 others); Tue, 21 May 2019 05:35:52 -0400 Received: from mail-pf1-f182.google.com ([209.85.210.182]:44378 "EHLO mail-pf1-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727723AbfEUJfu (ORCPT ); Tue, 21 May 2019 05:35:50 -0400 Received: by mail-pf1-f182.google.com with SMTP id g9so8757370pfo.11 for ; Tue, 21 May 2019 02:35:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=hZWhk/gl4Z1xokw4cH1p9gk38btAaqLGCZ6mHMUmOeE=; b=SPA5OfjVrYpfVS1IJi1xsatjBTD09NwSLSRhDSmmGdnQg+rsuD2X/EE08O6ebZZ8lG aTs+XhB0rBnOwGPSdC8sGipdGYJ4i87mQ2aLfmZGKAx1FxAIXCCDx1UQLUOgQaEW3MH3 QKq/qfRlwaPIYyAEOvxnyeSQO/dsKbz/EEyGqBiO3xuP+QF5lHVotRK2RNmz6UyM1y9k 0Sntkoawv1bOeSwkTRQnLpmEU4XZw4fFgYxvxeDWmKp/wxUqF7UJUxhVpYdiFe3YQo7I QneV163SoataU4a3jv/CA836uFA08skF1hnTnzbeTdw7o0sci8jp7pyMWxOGmyrnIK+M SX+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=hZWhk/gl4Z1xokw4cH1p9gk38btAaqLGCZ6mHMUmOeE=; b=dRvhUBXQTEdn/VGtZz6JnSk0v9/JEyxbotsujzyd1G2lPHfT1W/X+unmHDrfAxIPkI h/uatLsviBoU7k7eiEgdz4Nt9MCbt+n756PhecSvLCbMznV8E505MEYPIgYUND2wpjEt MR0vhxqnbMRm55XdDtNzVsiv7nVFLz7ISjZ0KACwqAIoBK7YE10/yPPShXBqdzmLFtzF R9L2Q9222bs9DHsyAA0ZPh9vqiaR/h8raxSEL2rN9IppShGwQVLrHN3ZHeJyPHawC7vH MJF1mrhLvPkWh1SyncQULwUvA/VASz6p5HwcyCME80PgPq5GmZibOQcYce5SxZ5FvR5Q xpxw== X-Gm-Message-State: APjAAAXhsRPmr18iXY6Kpv3/9xY3FvnDMIrmN6UlCRGl0J3kwLzTtbgo XA8hhUDjctdqUHHZGfz0fRw+oNhgAqoWdg== X-Received: by 2002:a63:1c10:: with SMTP id c16mr54781596pgc.442.1558431349298; Tue, 21 May 2019 02:35:49 -0700 (PDT) Received: from localhost ([49.248.189.249]) by smtp.gmail.com with ESMTPSA id i22sm23139715pfa.127.2019.05.21.02.35.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 May 2019 02:35:48 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, agross@kernel.org, niklas.cassel@linaro.org, marc.w.gonzalez@free.fr, sibis@codeaurora.org, daniel.lezcano@linaro.org, Andy Gross , David Brown , Li Yang , Shawn Guo Cc: devicetree@vger.kernel.org Subject: [PATCH v2 7/9] arm64: dts: qcom: msm8998: Add PSCI cpuidle low power states Date: Tue, 21 May 2019 15:05:17 +0530 Message-Id: <49cf5d94beb9af9ef4e78d4c52f3b0ad20b7c63f.1558430617.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add device bindings for cpuidle states for cpu devices. Cc: Marc Gonzalez Signed-off-by: Amit Kucheria Acked-by: Daniel Lezcano --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 50 +++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 3fd0769fe648..54810980fcf9 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -78,6 +78,7 @@ compatible = "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; efficiency = <1024>; next-level-cache = <&L2_0>; L2_0: l2-cache { @@ -97,6 +98,7 @@ compatible = "arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; efficiency = <1024>; next-level-cache = <&L2_0>; L1_I_1: l1-icache { @@ -112,6 +114,7 @@ compatible = "arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; efficiency = <1024>; next-level-cache = <&L2_0>; L1_I_2: l1-icache { @@ -127,6 +130,7 @@ compatible = "arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; efficiency = <1024>; next-level-cache = <&L2_0>; L1_I_3: l1-icache { @@ -142,6 +146,7 @@ compatible = "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; efficiency = <1536>; next-level-cache = <&L2_1>; L2_1: l2-cache { @@ -161,6 +166,7 @@ compatible = "arm,armv8"; reg = <0x0 0x101>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; efficiency = <1536>; next-level-cache = <&L2_1>; L1_I_101: l1-icache { @@ -176,6 +182,7 @@ compatible = "arm,armv8"; reg = <0x0 0x102>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; efficiency = <1536>; next-level-cache = <&L2_1>; L1_I_102: l1-icache { @@ -191,6 +198,7 @@ compatible = "arm,armv8"; reg = <0x0 0x103>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; efficiency = <1536>; next-level-cache = <&L2_1>; L1_I_103: l1-icache { @@ -238,6 +246,48 @@ }; }; }; + + idle-states { + entry-method = "psci"; + + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { + compatible = "arm,idle-state"; + idle-state-name = "little-retention"; + arm,psci-suspend-param = <0x00000002>; + entry-latency-us = <43>; + exit-latency-us = <86>; + min-residency-us = <200>; + }; + + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 { + compatible = "arm,idle-state"; + idle-state-name = "little-power-collapse"; + arm,psci-suspend-param = <0x00000003>; + entry-latency-us = <100>; + exit-latency-us = <612>; + min-residency-us = <1000>; + local-timer-stop; + }; + + BIG_CPU_SLEEP_0: cpu-sleep-1-0 { + compatible = "arm,idle-state"; + idle-state-name = "big-retention"; + arm,psci-suspend-param = <0x00000002>; + entry-latency-us = <41>; + exit-latency-us = <82>; + min-residency-us = <200>; + }; + + BIG_CPU_SLEEP_1: cpu-sleep-1-1 { + compatible = "arm,idle-state"; + idle-state-name = "big-power-collapse"; + arm,psci-suspend-param = <0x00000003>; + entry-latency-us = <100>; + exit-latency-us = <525>; + min-residency-us = <1000>; + local-timer-stop; + }; + }; }; firmware { From patchwork Tue May 21 09:35:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 164705 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp1375494ili; Tue, 21 May 2019 02:36:01 -0700 (PDT) X-Google-Smtp-Source: APXvYqzpzQzhjTLWX8rz7ojI4zjCS90M3g3coT6WHiVMW+Sx+O8rhnXmeKcUa1oFPMNBhFH/Y9Z7 X-Received: by 2002:a17:902:bb06:: with SMTP id l6mr23334114pls.78.1558431361549; Tue, 21 May 2019 02:36:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558431361; cv=none; d=google.com; s=arc-20160816; b=RhPgPpCml1pkMhh1pM2foKuNo9pYJFW+JC1fLmn0ZGxrI6bjiTl6FbOh1B7hQ0hGxH L0o26N9p0yI6G/E8yelcltfFD95ki0OTgUOUnvnqL0MyEi+ZCDBj1ztenQuxXwCXJ40u 1+ej3d1Gn4tobaX+6Pymkl3kGirRE3X/cWMpohO5RCYIaaHwzF2/J6H+YGn33gd8FjAg 6AmwKMITOYRM0+ESF7iN4Oz+cGz8rw83aLU0jQuEQ5ytYYyGVZvQirM6YBcQ4xjiB/FV WDNfcXt22HiZy2LdprBe8aoYSZ9BYPKvSGvtkAhi1CZAZPpzJ93kfFKfJrhECkiIGJWL TDuQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id d16si20018490plr.408.2019.05.21.02.36.01; Tue, 21 May 2019 02:36:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AIHFm7Hp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727800AbfEUJgA (ORCPT + 30 others); Tue, 21 May 2019 05:36:00 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:33043 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727779AbfEUJf5 (ORCPT ); Tue, 21 May 2019 05:35:57 -0400 Received: by mail-pg1-f196.google.com with SMTP id h17so8318966pgv.0 for ; Tue, 21 May 2019 02:35:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=dTr1UCKgplI1VGB/ZytO9oL3rPosZf7DuDvgJME+3jg=; b=AIHFm7Hp4l+4xNPyW1cX8dxq1awTwXVWdpBPVIR3sn4SXcSKSHlVgGImRIW5bXDUa4 lo0tOlSuFOBUL1R3fbgd7cJUHoMk3my3qscAJTjjlf/AViZ3Vv/IgzxGSayFt4cE7Uu2 0yWa5KvdgnE3+HdLj8ccnl1VQk3XVLm0yogjlk4FzbxrTC6hy9u35nLQCSB1cl/ytpsd AyPweRXFYA029GowWgM4Ql7lqa32mdbC2QzGMEhwG3atEB8r1k6aNOXYlrFd2IWMEY7F yCU6/Fy2CcxuhHznLygRhUT09LrZukpgH9Ftt7fSNGiz7zcuSZqAYVm6a2dVYdDQE1Lf s2UA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=dTr1UCKgplI1VGB/ZytO9oL3rPosZf7DuDvgJME+3jg=; b=GLhlmhCjIvz4/5kxABjNiM6vDK4Z4vYamaAjjEsqs9kAl31gVi7v0LL7J/vRh0/3ks kGgRFOrnYJoP/KR0+aVo/SkyhoGGVkD/AcBG24o+Lmg4qraGcB56BSc518Dp3BHfEPev MPvUhQ9kDXEnzlhelHUNcIU/4b5XhazPH7WRKfXVZR3bfHj8bY1uZ7iOILkg5kd9yEFJ zvcWSlW1P8zy7dHzc5SFCdzeKyPKEDthLCwArhsGP5VvhpkHUFyeFiSjaUSD7D+muPR1 zijDmSskreAD4WX2QG2QJ/x5WraUxqESAle0kz/KVt6Dz8DL07WjCyPuy6mFNa0L3Vwu Tz4w== X-Gm-Message-State: APjAAAUoh2icCa/837sNmGEkDLnH8SbsXujipOKs2Z+XrXP+nW6w1MRT bRD5qIpbE+7Yyzk0yQXT5VVKyanHt90BiQ== X-Received: by 2002:a63:4c06:: with SMTP id z6mr80149345pga.296.1558431356498; Tue, 21 May 2019 02:35:56 -0700 (PDT) Received: from localhost ([49.248.189.249]) by smtp.gmail.com with ESMTPSA id q20sm22215653pgq.66.2019.05.21.02.35.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 May 2019 02:35:55 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, agross@kernel.org, niklas.cassel@linaro.org, marc.w.gonzalez@free.fr, sibis@codeaurora.org, daniel.lezcano@linaro.org, Andy Gross , David Brown , Li Yang , Shawn Guo Cc: devicetree@vger.kernel.org Subject: [PATCH v2 9/9] arm64: dts: msm8996: Add proper capacity scaling for the cpus Date: Tue, 21 May 2019 15:05:19 +0530 Message-Id: <5224535a7ef5b257e3baa698991bf6deeefccc36.1558430617.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org msm8996 features 4 cpus - 2 in each cluster. However, all cpus implement the same microarchitecture and the two clusters only differ in the maximum frequency attainable by the CPUs. Add capacity-dmips-mhz property to allow the topology code to determine the actual capacity by taking into account the highest frequency for each CPU. Signed-off-by: Amit Kucheria Suggested-by: Daniel Lezcano --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++++ 1 file changed, 4 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 4f2fb7885f39..e0e8f30ce11a 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -96,6 +96,7 @@ reg = <0x0 0x0>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + capacity-dmips-mhz = <1024>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "cache"; @@ -109,6 +110,7 @@ reg = <0x0 0x1>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + capacity-dmips-mhz = <1024>; next-level-cache = <&L2_0>; }; @@ -118,6 +120,7 @@ reg = <0x0 0x100>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "cache"; @@ -131,6 +134,7 @@ reg = <0x0 0x101>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; };