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[209.132.180.67]) by mx.google.com with ESMTP id b3si19120059plk.200.2019.05.20.03.12.28; Mon, 20 May 2019 03:12:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CqYTASlz; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732388AbfETKM2 (ORCPT + 7 others); Mon, 20 May 2019 06:12:28 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:36053 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732416AbfETKM1 (ORCPT ); Mon, 20 May 2019 06:12:27 -0400 Received: by mail-pl1-f196.google.com with SMTP id d21so6514451plr.3 for ; Mon, 20 May 2019 03:12:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=va9J4UW4i6NFUGtzfpaY8tfEC/B62lw3LIia2oCGJ4I=; b=CqYTASlzHxuj19VEkiNYFaWBgj/+AcONyfvUgSBiBiQDowtzgjclMCFW17Cx6Liwr/ yTHpl33VMY+PK1nwAw97ptE/aov9Ny5Gd9CDUPr0BmI6OPlfMVCa88nBG0nfPFrWKmc5 4xJmj6AY4t13zS/X2WSYUqFnK48emMw1jtHxivKXmKM0FLP1o78D9881x/AX5Y5H4trs BR7RWlDcGDLZXJQywZ1nZaZE1slyONTDCdLubvEOiOJ43/lPQo5uRKtVdbjKNxgEFBYR psxab5AHlmJ1Xmw4MdgUFX5yEcnCO4VWW9lbwf2QlwniZg7uBKRAoLg1DUSzr20QZmNr 5xsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=va9J4UW4i6NFUGtzfpaY8tfEC/B62lw3LIia2oCGJ4I=; b=K2RMKv3AmNF08MtwVPvjK9yvNDntBfkx7KOOXdJLouioVj4q0U7c8vryX7nWjdp4li /fFXYs518n6n/kt+LOemH8IT5KsfkNuq+XP4UVaoEKhA66FUeZ7PrzSujx0mwBwODVR3 R9zp+9HF3+v2NlsHW+RnLLWyDneko6tp3Ge+mcpEHw55sktEqyrWf6C298kZphJrcUqk uvitQfIfjM5ALCjg5Tui3cvIgKINoRvJETqdgDmR9qL/SHmdMvsqrPTfUwJhWQXSl0iB wfXVzVY4kialnqxi8LByOuBFksucl9mrHdtaq1snc0X24CEKAjrLqd3IygVfYxlAyqpk 2G4A== X-Gm-Message-State: APjAAAVLO2c1c8LCoa8t0niyIw057uNamKGC5wdz5m7YSTuFu9XtRk6G NLMvsL0i6LBvRtlaP0oMsx69Gw== X-Received: by 2002:a17:902:f212:: with SMTP id gn18mr12999942plb.106.1558347147096; Mon, 20 May 2019 03:12:27 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id b3sm30098127pfr.146.2019.05.20.03.12.23 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 20 May 2019 03:12:26 -0700 (PDT) From: Baolin Wang To: adrian.hunter@intel.com, ulf.hansson@linaro.org, zhang.lyra@gmail.com, orsonzhai@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, arnd@arndb.de, olof@lixom.net Cc: baolin.wang@linaro.org, vincent.guittot@linaro.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/9] mmc: sdhci-sprd: Check the enable clock's return value correctly Date: Mon, 20 May 2019 18:11:54 +0800 Message-Id: <7e4d922ba5aff5241b0186e9480a98b14693b28d.1558346019.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Missed to check the enable clock's return value, fix it. Signed-off-by: Baolin Wang --- drivers/mmc/host/sdhci-sprd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.7.9.5 diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c index 9a822e2..e741491 100644 --- a/drivers/mmc/host/sdhci-sprd.c +++ b/drivers/mmc/host/sdhci-sprd.c @@ -368,7 +368,7 @@ static int sdhci_sprd_probe(struct platform_device *pdev) if (ret) goto pltfm_free; - clk_prepare_enable(sprd_host->clk_enable); + ret = clk_prepare_enable(sprd_host->clk_enable); if (ret) goto clk_disable; From patchwork Mon May 20 10:11:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "\(Exiting\) Baolin Wang" X-Patchwork-Id: 164580 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp93749ili; Mon, 20 May 2019 03:12:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqwppEI+Nlkhs4MMNim3xAPpuMatFni4idkiAacg0equ9haepF1XEbR/1qBhiZMaSxDcF4Zf X-Received: by 2002:a62:e101:: with SMTP id q1mr79258572pfh.160.1558347154472; Mon, 20 May 2019 03:12:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558347154; cv=none; d=google.com; s=arc-20160816; b=Zpr16MmXr1kbYAuf0l4h8zzSgolWTW+F/NmMUlFquUuCwGZLCfq29YMwruhXXQaZzW PKu0TM/K8x+e3Z/2INRHloFGoXsqnK0lz9gno0ufaEXrirAIi+no4jGmOG0gIlv4yucY /n3kq4J6IBTNeMKDg8SUWO5iwpYb18T8lzjf9SBYW3fkepJknp22MgPp1CaeA6C3tUw8 mzJ8xKS1hCg31r+HW/lL86+o0DF4wmNnnIIu088LJqYk6Cph7uWNEQFA3qkFUQKUEH6p 96zPlZlEYotTYRi30QKkgIl1pBI8D3IJULCCtcWkvH+vuoNq3o6H13JDgdZHhHFbZfp1 /5fA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=e4QisK5dlRTGLzT7/Rg8a2odjBOSln7PHE3O27n2JN8=; b=IV3r1ChrwNFv6wZlM+OavoHz+3aYIDZt8YG1JkuXmlPcEbbZb5J0IOaRObN5rbn0kA h4hNANkPMsskXCzFFkMIrcn6hpUnM4AhCZaKiKgeDtWqYhysnD+iej5o7+0kpn1wkLW7 H4NZXfPFP6zdrukw55yTamLCMBQ6bHakP6K0anx/Q4OSByIzcVmQPDrzG5CASApGrsan XibSMBc/0VIXyruSGZ0XcHh2Va6No1s26T15jCEsC12J7tThXGvpOrI6bXvNudLw3CTs FzAM+NQ4MyQvAojk9xqlQPLV6yl0hYqLeFLZUVkUw8PZjhChHVx0ABhHX7gXM6RgkNsV 5a+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TwF5AsO5; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thus add documentation for this optional clock. Signed-off-by: Baolin Wang --- .../devicetree/bindings/mmc/sdhci-sprd.txt | 1 + 1 file changed, 1 insertion(+) -- 1.7.9.5 diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt index 45c9978..a285c77 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt @@ -14,6 +14,7 @@ Required properties: - clock-names: Should contain the following: "sdio" - SDIO source clock (required) "enable" - gate clock which used for enabling/disabling the device (required) + "2x_enable" - gate clock controlling the device for some special platforms (optional) Optional properties: - assigned-clocks: the same with "sdio" clock From patchwork Mon May 20 10:12:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "\(Exiting\) Baolin Wang" X-Patchwork-Id: 164585 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp94099ili; Mon, 20 May 2019 03:12:56 -0700 (PDT) X-Google-Smtp-Source: APXvYqwpFULsag97bdWW5b0oEpEb0gNKhJEOalWwYepOaj1hhdlKFR0+Adbc8IU3vCip3stJBwze X-Received: by 2002:aa7:8f2f:: with SMTP id y15mr68831717pfr.124.1558347176335; Mon, 20 May 2019 03:12:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558347176; cv=none; d=google.com; s=arc-20160816; b=SnVMAd065MWChIDIouGAfMNWvK8D9/zVf5fp/U7I2fVwLAu+3HLW8TspY3cU7bhpLt o+cxB05TA8xBnw1JRfFNzP2eMHaeOZ/fdxRT4SUtVILkEG3zJ4Y2pbXL5k4y01QIgkbC Nwymk1n2USDsasZp4oQ3KM0G9D/II2fTm+FTXIp3bebZIYLU+K4CzA7EhNo+vRqJmB+s qNVpzpPd3cqRF7BYGYsP3lGM2yz/cjL86zpBpVKLzN7zQ72Vx4wu4KkN+gsDIhnA7KwD N3FSVQx4yEfh8r+NL95tzeZNgJnTzsSK3ydq3ep8fB4Q0c2iVa8UkOqvUH8fgFWeL3Mc xrzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=psGipp4xyvA6ITMw9MQePCESgWaNPblRsxWV83tCX+4=; b=xzT/CEi2Hw4Cwev9E6QGG0e4GWbk16MLJi6QaH7Ceo3UUF+w6QQbf/l11i+XMaH2oS DWYJw2jeBAYx/Nfy4bQQfnqCbyOJDtPFswUYZe0qdtVmdVBgt4GwkhlyflL6wWLd8vzk +1PTOK50tLsaV9Ri+WR7IeVzmg6SWos+jXYkjIb2xPvgC6KDIZ6nak+ThAPhzdJXXL0O Sfxdn/PCXl1Ih7KKJQyTBil0Fc1wNk2VU0z7+AAi2DMmbKNj1yPniYFvzpBaMf/KR6EW gFeO30wvlVngRpJgu1OhJxML5OCj27QvtYaI6q7B8Jw1FI3UwFbxO8y7iQUuzdKHeID3 CNeQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DDe6R5++; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g1si3739937pgq.350.2019.05.20.03.12.56; Mon, 20 May 2019 03:12:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DDe6R5++; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732513AbfETKMz (ORCPT + 7 others); Mon, 20 May 2019 06:12:55 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:42622 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732510AbfETKMy (ORCPT ); Mon, 20 May 2019 06:12:54 -0400 Received: by mail-pg1-f196.google.com with SMTP id 145so6566358pgg.9 for ; Mon, 20 May 2019 03:12:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=psGipp4xyvA6ITMw9MQePCESgWaNPblRsxWV83tCX+4=; b=DDe6R5++Fzja9VoGMt+SiLItI4KCRzkHl1b612rdgS5J8T5Qo1eIV3EEf38bAPOSdX TBv+I1VgFq1YeFO/fFRQRdPJ6yP5ucgrpKCWk5BCNuPPINN0PWn5aD6QgPmuzNveadlu z5b/l/Apk0KMKQQSP15dUy5V2i24M/9JCfl6AGpouxMxxq6jpBGZeJEGhmp0DVEJ9Mgc rViySazF3M83zMmXn0ze7FWpzMkzuWVcq1y77Ry53gK5IVKl7fWbhNWrcXAeaEaEwgZo IL+bDsrmOJ7riSZ/XjjTj9qBDLdOzEOWfW39uNyHzXJfoylddvQhKcTfId6Sn3+7lWo+ k4GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=psGipp4xyvA6ITMw9MQePCESgWaNPblRsxWV83tCX+4=; b=IMa6MhRI3qhi//byYr52CalSTW7e3kTgZjqPfqr+RfJgq9v7JEqEQW+G0SAnmIz4aR +jZld4eYvIdsU0tS+IcHPK49TIbZLGwEnYsTe/0xsXiZavMXOeI8t5Hp8qZRRnwCSbpj IsqtM/8GnS8a7p9wVMGAljL6cuSnY4L4R8dLdsNPNCVxddiyBQcdkG3p3VMwOSasJyJv Ori4B8IL6WUqL7EdoRx3UHYAdVQHDseffT129T4t0txaIDieujAEQ63ZnJ3/ryixQuA5 oH8JVhCOw1fKaSBSosOyAsqzuPUs+ROWXhwAA9o4ii083NHNkBdZCr6PHwaMfg0k2Drn F6cw== X-Gm-Message-State: APjAAAVYlQGJfsN7Szh823nQ8RP9fBr+XRVaPzEld2RqJ5jaThGAOhjj ThKhn8Uma5JHoGfKOtBCKVUiNg== X-Received: by 2002:a63:d54f:: with SMTP id v15mr33040134pgi.107.1558347174204; Mon, 20 May 2019 03:12:54 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id b3sm30098127pfr.146.2019.05.20.03.12.49 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 20 May 2019 03:12:53 -0700 (PDT) From: Baolin Wang To: adrian.hunter@intel.com, ulf.hansson@linaro.org, zhang.lyra@gmail.com, orsonzhai@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, arnd@arndb.de, olof@lixom.net Cc: baolin.wang@linaro.org, vincent.guittot@linaro.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 7/9] dt-bindings: mmc: sprd: Add PHY DLL delay documentation Date: Mon, 20 May 2019 18:12:00 +0800 Message-Id: <96f4304c001c0cf81ecc6bec69665d239203b9b7.1558346019.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Introduce some PHY DLL delays properties to help to sample the PHY clock. Signed-off-by: Baolin Wang --- .../devicetree/bindings/mmc/sdhci-sprd.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) -- 1.7.9.5 diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt index a285c77..e675397 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt @@ -20,6 +20,23 @@ Optional properties: - assigned-clocks: the same with "sdio" clock - assigned-clock-parents: the default parent of "sdio" clock +PHY DLL delays are used to delay the data valid window, and align the window +to sampling clock. PHY DLL delays can be configured by following properties, +and each property contains 4 cells which are used to configure the clock data +write line delay value, clock read command line delay value, clock read data +positive edge delay value and clock read data negative edge delay value. +Each cell's delay value unit is cycle of the PHY clock. + +- sprd,phy-delay-legacy: Delay value for legacy timing. +- sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing. +- sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing. +- sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing. +- sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing. +- sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing. +- sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing. +- sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing. +- sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing. + Examples: sdio0: sdio@20600000 { @@ -33,6 +50,7 @@ sdio0: sdio@20600000 { assigned-clocks = <&ap_clk CLK_EMMC_2X>; assigned-clock-parents = <&rpll CLK_RPLL_390M>; + sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>; bus-width = <8>; non-removable; no-sdio;