From patchwork Thu Mar 16 13:17:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 664164 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15ABBC6FD19 for ; Thu, 16 Mar 2023 13:19:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230154AbjCPNS7 (ORCPT ); Thu, 16 Mar 2023 09:18:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230075AbjCPNS6 (ORCPT ); Thu, 16 Mar 2023 09:18:58 -0400 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 286CFCD669 for ; Thu, 16 Mar 2023 06:18:22 -0700 (PDT) Received: by mail-wm1-x334.google.com with SMTP id ay8so1242900wmb.1 for ; Thu, 16 Mar 2023 06:18:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; t=1678972698; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Tp3HoPN4Gc82+RijS+v6sxY9JgB+vr3DxCDQErkACNI=; b=PToYMu0cKs8JYZ6vE0jZ7YqptxvvNxzJLVidWaPVHOytoFMIFwdTLHn0duEcW9msRA 1DEp4a1ec5G0nWISGMpEGtVdHHRcqLIy32AocIm6p96VGsWXu1VqxQPHrribt2ncNfPa IT7NvAy3f1XFXxF4ab7MvjC7CER1BZR7JNhxXrN5STyfV/hVjikL5OIksSxcZfM5NZ7b p+sKuSERVfHhmhbBauv0yFqr6stSOvpGururNP0b9AutYpWisTZOOvIyYvb+WKc3PTc5 kSNH7H862sCAjFRcT5NtWiledbRkxgFXVqgQFo/OSB2M+TbcKKYrTnLSa0NrQWaJraNx warg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678972698; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Tp3HoPN4Gc82+RijS+v6sxY9JgB+vr3DxCDQErkACNI=; b=6mjMJJ5iuvokWjl5fX0v8ExXzKYH4a1lP5wYdD5yBCTKLsuaxtfMLSgmR0KGMqgh0o +G8KdzzWl9zoI5wVilvOqY+VdBbNbcLExOmC00spaklJ/VG3Tuu+2cBuvc9q6XwBE/2l IDuyo0SJi8wwdd7ZekyZ6Z0khnCZYEuxERyPM19RtvDjsBJaGkq95s9Elpk1rtq0WWhN Kra5bWZgT3cF2NU6a2YhKglnM5Iz40fMs6Mf6+nrHSa7xv0n4eStavgu/bjJBqr+3kmM CFsZGX3NM6AqGD5yC4GWhcgKK69FlHew/3FfIfW7t8+qKIXInyQW6HtDcfpR2FY9Y0TV Nn9A== X-Gm-Message-State: AO0yUKXJ/zIGDnCenphVF3h66MYjoKmHJyHAhu1RyK5GxF0Z9DPqURuh jPyEfYPdNYrdOb/kkE5bBgd7Rg== X-Google-Smtp-Source: AK7set/fPYDWjI/nDNH4Tp4cX0o/pdQFhcmC6kakh/lPH0h+uqTf9K4xF0cfCvGEO1gwABpPdHlqIw== X-Received: by 2002:a05:600c:a46:b0:3ec:4621:680b with SMTP id c6-20020a05600c0a4600b003ec4621680bmr17906976wmq.14.1678972698428; Thu, 16 Mar 2023 06:18:18 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (238.174.185.81.rev.sfr.net. [81.185.174.238]) by smtp.gmail.com with ESMTPSA id c16-20020adffb50000000b002d2f0e23acbsm24648wrs.12.2023.03.16.06.18.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 06:18:18 -0700 (PDT) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , Rob Herring , Frank Rowand , Mike Rapoport , Andrew Morton , Anup Patel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-mm@kvack.org Cc: Alexandre Ghiti , Andrew Jones Subject: [PATCH v8 1/4] riscv: Get rid of riscv_pfn_base variable Date: Thu, 16 Mar 2023 14:17:08 +0100 Message-Id: <20230316131711.1284451-2-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230316131711.1284451-1-alexghiti@rivosinc.com> References: <20230316131711.1284451-1-alexghiti@rivosinc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use directly phys_ram_base instead, riscv_pfn_base is just the pfn of the address contained in phys_ram_base. Even if there is no functional change intended in this patch, actually setting phys_ram_base that early changes the behaviour of kernel_mapping_pa_to_va during the early boot: phys_ram_base used to be zero before this patch and now it is set to the physical start address of the kernel. But it does not break the conversion of a kernel physical address into a virtual address since kernel_mapping_pa_to_va should only be used on kernel physical addresses, i.e. addresses greater than the physical start address of the kernel. Signed-off-by: Alexandre Ghiti Reviewed-by: Andrew Jones Reviewed-by: Anup Patel Tested-by: Anup Patel --- arch/riscv/include/asm/page.h | 3 +-- arch/riscv/mm/init.c | 6 +----- 2 files changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h index 7fed7c431928..8dc686f549b6 100644 --- a/arch/riscv/include/asm/page.h +++ b/arch/riscv/include/asm/page.h @@ -91,8 +91,7 @@ typedef struct page *pgtable_t; #endif #ifdef CONFIG_MMU -extern unsigned long riscv_pfn_base; -#define ARCH_PFN_OFFSET (riscv_pfn_base) +#define ARCH_PFN_OFFSET (PFN_DOWN((unsigned long)phys_ram_base)) #else #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) #endif /* CONFIG_MMU */ diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 87f6a5d475a6..cc558d94559a 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -271,9 +271,6 @@ static void __init setup_bootmem(void) #ifdef CONFIG_MMU struct pt_alloc_ops pt_ops __initdata; -unsigned long riscv_pfn_base __ro_after_init; -EXPORT_SYMBOL(riscv_pfn_base); - pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss; static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss; @@ -285,7 +282,6 @@ static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAG #ifdef CONFIG_XIP_KERNEL #define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops)) -#define riscv_pfn_base (*(unsigned long *)XIP_FIXUP(&riscv_pfn_base)) #define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir)) #define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte)) #define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir)) @@ -985,7 +981,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr; kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr; - riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr); + phys_ram_base = kernel_map.phys_addr; /* * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit From patchwork Thu Mar 16 13:17:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 664163 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98582C6FD19 for ; Thu, 16 Mar 2023 13:20:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229804AbjCPNUs (ORCPT ); Thu, 16 Mar 2023 09:20:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230075AbjCPNUr (ORCPT ); Thu, 16 Mar 2023 09:20:47 -0400 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ECD6023D8D for ; Thu, 16 Mar 2023 06:20:24 -0700 (PDT) Received: by mail-wr1-x42f.google.com with SMTP id o7so1520594wrg.5 for ; Thu, 16 Mar 2023 06:20:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; t=1678972822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cNtcjIvt7Jcu6BbJu0k6G/sx5AHflabOU3bxX5prrUE=; b=L6eAT+smuQGoJO4DezL+IdwC0T7yTp/6MdgBgpSYGnzsE3GMtH0OsHZCA5KvkK/jsL SCQbzTNJRG+h5gG55AwIc3rp3qvPJ5HvHBpBdMMvum+UhNDX3K0d4mevTt2us+FFR9fP /SkYJ3PFgwjlEeZJ4QPID/NaQDyD2lSqhEWFJsMLe0iYwjDfErv7L30D/hLJYYVSFfx7 jrT7h87/rKRPpMs9Aij8oJj9DBxmwR0E5LN3DULWfc0aFVYbJwTggaKYwjOlxm9f5rbi T0csEj0sYOg1wDUvvVEpshdAj9QA/fAZ/IJurP8+1WuNoMR3+2zSN2/cqzpGfR2FuvNh EyZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678972822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cNtcjIvt7Jcu6BbJu0k6G/sx5AHflabOU3bxX5prrUE=; b=ksAZY2L5a5MYqVRBGXL2Ys2xpvAXmhll5eQ41LWzXEl14XPlXR8yw5Twa8RSu8oCfi QvB46m8xXeBNf64JhspmqCXIhEuiCFsVgcntBEMdbETrpTLddqolorgD6BbiWLYpMgzN AnrbEvDd8rOdttCM+8/FNlYhi1UFFGnqiKfw0cO5KuqnHSrGYl30Onf5QcTU1I2EuzQR ChQmd9NmJ+bFoBm16kaJ05R3c7gd8EnloL2Q8xKWnd3FJtJBSBrgayuLYZiKEPcnpPNy aZCVS+2VYlyPWEhxFiJzjVnBq+qHlqYBJGIU10+n86EXN6KLYg52ZCJD7UWnfwzqshpF Nx9w== X-Gm-Message-State: AO0yUKV3UBArESue2A3KBAcU5dL4//jYslHTTsU7RN//kF4oTHxz/NIj dB6Egj6wwhOljPkXqbOEdUWNwg== X-Google-Smtp-Source: AK7set98CBvIraFbTCbJWdo8CgRP1gvKzH5/GyoF0yuADO0rA+pPToO5CbtwnI+LruqnMYg8TXy3Ww== X-Received: by 2002:adf:ce11:0:b0:2cf:e3d0:2a43 with SMTP id p17-20020adfce11000000b002cfe3d02a43mr4536359wrn.4.1678972821966; Thu, 16 Mar 2023 06:20:21 -0700 (PDT) Received: from alex-rivos.ba.rivosinc.com (238.174.185.81.rev.sfr.net. [81.185.174.238]) by smtp.gmail.com with ESMTPSA id z4-20020a5d6544000000b002c56013c07fsm7218162wrv.109.2023.03.16.06.20.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 06:20:21 -0700 (PDT) From: Alexandre Ghiti To: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , Rob Herring , Frank Rowand , Mike Rapoport , Andrew Morton , Anup Patel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-mm@kvack.org Cc: Alexandre Ghiti Subject: [PATCH v8 3/4] arm64: Make use of memblock_isolate_memory for the linear mapping Date: Thu, 16 Mar 2023 14:17:10 +0100 Message-Id: <20230316131711.1284451-4-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230316131711.1284451-1-alexghiti@rivosinc.com> References: <20230316131711.1284451-1-alexghiti@rivosinc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In order to isolate the kernel text mapping and the crash kernel region, we used some sort of hack to isolate thoses ranges which consisted in marking them as not mappable with memblock_mark_nomap. Simply use the newly introduced memblock_isolate_memory function which does exactly the same but does not uselessly mark the region as not mappable. Signed-off-by: Alexandre Ghiti --- arch/arm64/mm/mmu.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 6f9d8898a025..387c2a065a09 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -548,19 +548,18 @@ static void __init map_mem(pgd_t *pgdp) /* * Take care not to create a writable alias for the - * read-only text and rodata sections of the kernel image. - * So temporarily mark them as NOMAP to skip mappings in - * the following for-loop + * read-only text and rodata sections of the kernel image so isolate + * those regions and map them after the for loop. */ - memblock_mark_nomap(kernel_start, kernel_end - kernel_start); + memblock_isolate_memory(kernel_start, kernel_end - kernel_start); #ifdef CONFIG_KEXEC_CORE if (crash_mem_map) { if (defer_reserve_crashkernel()) flags |= NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; else if (crashk_res.end) - memblock_mark_nomap(crashk_res.start, - resource_size(&crashk_res)); + memblock_isolate_memory(crashk_res.start, + resource_size(&crashk_res)); } #endif @@ -568,6 +567,17 @@ static void __init map_mem(pgd_t *pgdp) for_each_mem_range(i, &start, &end) { if (start >= end) break; + + if (start == kernel_start) + continue; + +#ifdef CONFIG_KEXEC_CORE + if (start == crashk_res.start && + crash_mem_map && !defer_reserve_crashkernel() && + crashk_res.end) + continue; +#endif + /* * The linear map must allow allocation tags reading/writing * if MTE is present. Otherwise, it has the same attributes as @@ -589,7 +599,6 @@ static void __init map_mem(pgd_t *pgdp) */ __map_memblock(pgdp, kernel_start, kernel_end, PAGE_KERNEL, NO_CONT_MAPPINGS); - memblock_clear_nomap(kernel_start, kernel_end - kernel_start); /* * Use page-level mappings here so that we can shrink the region @@ -603,8 +612,6 @@ static void __init map_mem(pgd_t *pgdp) crashk_res.end + 1, PAGE_KERNEL, NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); - memblock_clear_nomap(crashk_res.start, - resource_size(&crashk_res)); } } #endif