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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id s4-20020a19ad44000000b004dda87ecae3sm379058lfd.246.2023.03.14.05.14.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 05:14:07 -0700 (PDT) From: Konrad Dybcio Date: Tue, 14 Mar 2023 13:13:39 +0100 Subject: [PATCH v4 01/10] dt-bindings: display/msm: dsi-controller-main: Fix deprecated QCM2290 compatible MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v4-1-54b4898189cb@linaro.org> References: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678796043; l=1083; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Eh63V3hQJ0V0iEgOzc+LSRnQ4e7sliZ5heAo7YfywsQ=; b=XMDG9U0mfUCsKS5AsCiZDdtg2eJBZV+LlYeluv9OhuVeZDwOILnyipcH8rhQ5vpe7w7s5pJr6Okm 8HksazrxAkfaybhRRFNJiYHqx9O4IjbB8/c2u2Uvs5KlBv01G+6r X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The qcom, prefix was missed previously. Fix it. Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC") Acked-by: Rob Herring Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index e75a3efe4dac..2494817c1bd6 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -33,7 +33,7 @@ properties: - const: qcom,mdss-dsi-ctrl - items: - enum: - - dsi-ctrl-6g-qcm2290 + - qcom,dsi-ctrl-6g-qcm2290 - const: qcom,mdss-dsi-ctrl deprecated: true From patchwork Tue Mar 14 12:13:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 663729 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66F6AC74A5B for ; Tue, 14 Mar 2023 12:18:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231986AbjCNMSQ (ORCPT ); Tue, 14 Mar 2023 08:18:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229961AbjCNMPx (ORCPT ); Tue, 14 Mar 2023 08:15:53 -0400 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66CAF20043 for ; Tue, 14 Mar 2023 05:14:46 -0700 (PDT) Received: by mail-lf1-x12b.google.com with SMTP id i28so19774475lfv.0 for ; Tue, 14 Mar 2023 05:14:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678796052; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6mz7dhLEVkKzAk8Lkvywe3WYisGA69PWt7jvCUOITN8=; b=HGJihVuXqmaNpkKE6OASK6S8pCs+R6AVH7H+a3jtu7RHrbQzEgRdqH0BlJkqULB32g GB6xV5EBySMLF905ASruuUgYKcixd3WiPC59Iue5fcYzUUllW5oVQeDa7iIi9mfKzBz1 FG6CllYhNasXgN31QZSvOJXoBfcmAuv9JdJ/O91jGAhGUxX9Sa8dLLmAqnG0hQAVCwgk l3wYWgPz4vbSsB8s09Mf1eO9W7Vjf/8QcsBTKN2u2Qwkhy9q97ZBbQJGzBXePAMemdt9 i8xdYXGHTzY3VEIUsoCNAsBtvGNxi0A6SF+B3oKfmc1lc4LbxiRbL+MalUsvRd5IEOtR F+ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678796052; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6mz7dhLEVkKzAk8Lkvywe3WYisGA69PWt7jvCUOITN8=; b=Oe19fBBzVXFnrpnoqC5tQrgCxAbH7o7zHUBBT5s07hpB6eZAqM/0V+rSJLgJmRXXk5 4cdmsyq0Xkd6YuYbk1M4HaMC1Dr1SaqvpvM2VxCok1mud+2RHm+0Gkb136P9UMDRCcLu j5eoc8OT/I9CMU93XH8EO8v4T/R5/JEdZ/nGA2XJjxuWMDLDH4mAONVPIJkzADRMjR/7 cyBxmiY8o9WI6dwjFhwls+Kv7tKGmm1hcmRoTIu1UDvxnjQQXEGBTgz3mHEohLpUf460 EInPuaSjgzyQDY4zcuZk6KcDwil1NesAMg8p2eq0LxCfmzzjSnfcAEJuKoeg/juaa2bf 0rAA== X-Gm-Message-State: AO0yUKV9qlmDgeKzpijpXhEdcftVVJTo5oAo1OP5bClJPvV9YVCeJkAR pCt93j5fdFbNfRck4TCBlpvjFg== X-Google-Smtp-Source: AK7set9/eR+vXYLR2jRRXysbZqw/STovymXX2a5d9shKPi1P9OWEiH1K5UG1FFakSPtyBexRFkmTlQ== X-Received: by 2002:a19:ae0f:0:b0:4e1:8309:1db5 with SMTP id f15-20020a19ae0f000000b004e183091db5mr592261lfc.2.1678796052346; Tue, 14 Mar 2023 05:14:12 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id s4-20020a19ad44000000b004dda87ecae3sm379058lfd.246.2023.03.14.05.14.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 05:14:11 -0700 (PDT) From: Konrad Dybcio Date: Tue, 14 Mar 2023 13:13:41 +0100 Subject: [PATCH v4 03/10] drm/msm/dsi: Fix DSI index detection when version clash occurs MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v4-3-54b4898189cb@linaro.org> References: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678796043; l=8216; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=b+otjvnFVNWNHQbPO9HD+5KH7xMK3hiBo7WDBK4sSP4=; b=+W4gI1DVS2qhKB44WrWkHtiTTlIxlj6zFFaoObscMtR0m//6JucI1y5sm2XT4KBb55XhUODcxTz/ 5wqy092dA3bAHIx+a7fWm2nNnVCgXWds5cqHeLm0OKY5JhQBNCSS X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently, we allow for MAX_DSI entries in io_start to facilitate for MAX_DSI number of DSI hosts at different addresses. The configuration is matched against the DSI CTRL hardware revision read back from the component. We need a way to resolve situations where multiple SoCs with different register maps may use the same version of DSI CTRL. In preparation to do so, make msm_dsi_config a 2d array where each entry represents a set of configurations adequate for a given SoC. This is totally fine to do, as the only differentiating factors between same-version-different-SoCs configurations are the number of DSI hosts (1 or 2, at least as of today) and the set of base registers. The regulator setup is the same, because the DSI hardware is the same, regardless of the SoC it was implemented in. In addition to that, update the matching logic such that it will loop over VARIANTS_MAX variants, making sure they are all taken into account. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 52 ++++++++++++++++++++++++++++---------- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 5 +++- drivers/gpu/drm/msm/dsi/dsi_host.c | 10 ++++---- 3 files changed, 48 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c index 4515f52b407a..6c192963c100 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -21,7 +21,9 @@ static const struct msm_dsi_config apq8064_dsi_cfg = { .num_regulators = ARRAY_SIZE(apq8064_dsi_regulators), .bus_clk_names = dsi_v2_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names), - .io_start = { 0x4700000, 0x5800000 }, + .io_start = { + { 0x4700000, 0x5800000 }, + }, }; static const char * const dsi_6g_bus_clk_names[] = { @@ -40,7 +42,9 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8974_apq8084_regulators), .bus_clk_names = dsi_6g_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), - .io_start = { 0xfd922800, 0xfd922b00 }, + .io_start = { + { 0xfd922800, 0xfd922b00 }, + }, }; static const char * const dsi_8916_bus_clk_names[] = { @@ -58,7 +62,9 @@ static const struct msm_dsi_config msm8916_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8916_dsi_regulators), .bus_clk_names = dsi_8916_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names), - .io_start = { 0x1a98000 }, + .io_start = { + { 0x1a98000 }, + }, }; static const char * const dsi_8976_bus_clk_names[] = { @@ -76,7 +82,9 @@ static const struct msm_dsi_config msm8976_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8976_dsi_regulators), .bus_clk_names = dsi_8976_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names), - .io_start = { 0x1a94000, 0x1a96000 }, + .io_start = { + { 0x1a94000, 0x1a96000 }, + }, }; static const struct regulator_bulk_data msm8994_dsi_regulators[] = { @@ -94,7 +102,9 @@ static const struct msm_dsi_config msm8994_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8994_dsi_regulators), .bus_clk_names = dsi_6g_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), - .io_start = { 0xfd998000, 0xfd9a0000 }, + .io_start = { + { 0xfd998000, 0xfd9a0000 }, + }, }; static const char * const dsi_8996_bus_clk_names[] = { @@ -113,7 +123,9 @@ static const struct msm_dsi_config msm8996_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8996_dsi_regulators), .bus_clk_names = dsi_8996_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), - .io_start = { 0x994000, 0x996000 }, + .io_start = { + { 0x994000, 0x996000 }, + }, }; static const char * const dsi_msm8998_bus_clk_names[] = { @@ -131,7 +143,9 @@ static const struct msm_dsi_config msm8998_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8998_dsi_regulators), .bus_clk_names = dsi_msm8998_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names), - .io_start = { 0xc994000, 0xc996000 }, + .io_start = { + { 0xc994000, 0xc996000 }, + }, }; static const char * const dsi_sdm660_bus_clk_names[] = { @@ -148,7 +162,9 @@ static const struct msm_dsi_config sdm660_dsi_cfg = { .num_regulators = ARRAY_SIZE(sdm660_dsi_regulators), .bus_clk_names = dsi_sdm660_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names), - .io_start = { 0xc994000, 0xc996000 }, + .io_start = { + { 0xc994000, 0xc996000 }, + }, }; static const char * const dsi_sdm845_bus_clk_names[] = { @@ -169,7 +185,9 @@ static const struct msm_dsi_config sdm845_dsi_cfg = { .num_regulators = ARRAY_SIZE(sdm845_dsi_regulators), .bus_clk_names = dsi_sdm845_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), - .io_start = { 0xae94000, 0xae96000 }, + .io_start = { + { 0xae94000, 0xae96000 }, + }, }; static const struct regulator_bulk_data sm8550_dsi_regulators[] = { @@ -182,7 +200,9 @@ static const struct msm_dsi_config sm8550_dsi_cfg = { .num_regulators = ARRAY_SIZE(sm8550_dsi_regulators), .bus_clk_names = dsi_sdm845_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), - .io_start = { 0xae94000, 0xae96000 }, + .io_start = { + { 0xae94000, 0xae96000 }, + }, }; static const struct regulator_bulk_data sc7180_dsi_regulators[] = { @@ -195,7 +215,9 @@ static const struct msm_dsi_config sc7180_dsi_cfg = { .num_regulators = ARRAY_SIZE(sc7180_dsi_regulators), .bus_clk_names = dsi_sc7180_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names), - .io_start = { 0xae94000 }, + .io_start = { + { 0xae94000 }, + }, }; static const char * const dsi_sc7280_bus_clk_names[] = { @@ -212,7 +234,9 @@ static const struct msm_dsi_config sc7280_dsi_cfg = { .num_regulators = ARRAY_SIZE(sc7280_dsi_regulators), .bus_clk_names = dsi_sc7280_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names), - .io_start = { 0xae94000, 0xae96000 }, + .io_start = { + { 0xae94000, 0xae96000 }, + }, }; static const char * const dsi_qcm2290_bus_clk_names[] = { @@ -229,7 +253,9 @@ static const struct msm_dsi_config qcm2290_dsi_cfg = { .num_regulators = ARRAY_SIZE(qcm2290_dsi_cfg_regulators), .bus_clk_names = dsi_qcm2290_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names), - .io_start = { 0x5e94000 }, + .io_start = { + { 0x5e94000 }, + }, }; static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/dsi_cfg.h index 6b6b16c5fd25..8772a3631ac1 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h @@ -32,13 +32,16 @@ #define DSI_6G_REG_SHIFT 4 +/* Maximum number of configurations matched against the same hw revision */ +#define VARIANTS_MAX 2 + struct msm_dsi_config { u32 io_offset; const struct regulator_bulk_data *regulator_data; int num_regulators; const char * const *bus_clk_names; const int num_bus_clks; - const resource_size_t io_start[DSI_MAX]; + const resource_size_t io_start[VARIANTS_MAX][DSI_MAX]; }; struct msm_dsi_host_cfg_ops { diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 9021f0d65515..9cfb9e91bfea 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1862,16 +1862,16 @@ static int dsi_host_get_id(struct msm_dsi_host *msm_host) struct platform_device *pdev = msm_host->pdev; const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg; struct resource *res; - int i; + int i, j; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dsi_ctrl"); if (!res) return -EINVAL; - for (i = 0; i < DSI_MAX; i++) { - if (cfg->io_start[i] == res->start) - return i; - } + for (i = 0; i < VARIANTS_MAX; i++) + for (j = 0; j < DSI_MAX; j++) + if (cfg->io_start[i][j] == res->start) + return j; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id s4-20020a19ad44000000b004dda87ecae3sm379058lfd.246.2023.03.14.05.14.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 05:14:14 -0700 (PDT) From: Konrad Dybcio Date: Tue, 14 Mar 2023 13:13:42 +0100 Subject: [PATCH v4 04/10] drm/msm/dsi: dsi_cfg: Deduplicate identical structs MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v4-4-54b4898189cb@linaro.org> References: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678796043; l=7014; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=eQGewel5eMIUbnjRWU8o9jYKXbfa44urQPoDhCO0rnI=; b=FyVhROOoq9ftspfHBWr0zw7UexP/6KqtucfkH6saVhjSA38c9qfcOnAt1HMA5GjZobCgGDugJLfH R9fWKMI8Dxt8FxU+9maWv+oD03ps8bV30cmRAT+9ArexPUGguzwH X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some structs were defined multiple times for no apparent reason. Deduplicate them. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 93 +++++++++++++-------------------------- 1 file changed, 30 insertions(+), 63 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c index 6c192963c100..039f503233d7 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -47,41 +47,32 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { }, }; -static const char * const dsi_8916_bus_clk_names[] = { +static const char * const dsi_v1_3_1_clk_names[] = { "mdp_core", "iface", "bus", }; -static const struct regulator_bulk_data msm8916_dsi_regulators[] = { +static const struct regulator_bulk_data dsi_v1_3_1_regulators[] = { { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ }; static const struct msm_dsi_config msm8916_dsi_cfg = { .io_offset = DSI_6G_REG_SHIFT, - .regulator_data = msm8916_dsi_regulators, - .num_regulators = ARRAY_SIZE(msm8916_dsi_regulators), - .bus_clk_names = dsi_8916_bus_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names), + .regulator_data = dsi_v1_3_1_regulators, + .num_regulators = ARRAY_SIZE(dsi_v1_3_1_regulators), + .bus_clk_names = dsi_v1_3_1_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_v1_3_1_clk_names), .io_start = { { 0x1a98000 }, }, }; -static const char * const dsi_8976_bus_clk_names[] = { - "mdp_core", "iface", "bus", -}; - -static const struct regulator_bulk_data msm8976_dsi_regulators[] = { - { .supply = "vdda", .init_load_uA = 100000 }, /* 1.2 V */ - { .supply = "vddio", .init_load_uA = 100000 }, /* 1.8 V */ -}; - static const struct msm_dsi_config msm8976_dsi_cfg = { .io_offset = DSI_6G_REG_SHIFT, - .regulator_data = msm8976_dsi_regulators, - .num_regulators = ARRAY_SIZE(msm8976_dsi_regulators), - .bus_clk_names = dsi_8976_bus_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names), + .regulator_data = dsi_v1_3_1_regulators, + .num_regulators = ARRAY_SIZE(dsi_v1_3_1_regulators), + .bus_clk_names = dsi_v1_3_1_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_v1_3_1_clk_names), .io_start = { { 0x1a94000, 0x1a96000 }, }, @@ -107,10 +98,6 @@ static const struct msm_dsi_config msm8994_dsi_cfg = { }, }; -static const char * const dsi_8996_bus_clk_names[] = { - "mdp_core", "iface", "bus", "core_mmss", -}; - static const struct regulator_bulk_data msm8996_dsi_regulators[] = { { .supply = "vdda", .init_load_uA = 18160 }, /* 1.25 V */ { .supply = "vcca", .init_load_uA = 17000 }, /* 0.925 V */ @@ -121,8 +108,8 @@ static const struct msm_dsi_config msm8996_dsi_cfg = { .io_offset = DSI_6G_REG_SHIFT, .regulator_data = msm8996_dsi_regulators, .num_regulators = ARRAY_SIZE(msm8996_dsi_regulators), - .bus_clk_names = dsi_8996_bus_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), + .bus_clk_names = dsi_6g_bus_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), .io_start = { { 0x994000, 0x996000 }, }, @@ -167,24 +154,20 @@ static const struct msm_dsi_config sdm660_dsi_cfg = { }, }; -static const char * const dsi_sdm845_bus_clk_names[] = { +static const char * const dsi_v2_4_clk_names[] = { "iface", "bus", }; -static const char * const dsi_sc7180_bus_clk_names[] = { - "iface", "bus", -}; - -static const struct regulator_bulk_data sdm845_dsi_regulators[] = { +static const struct regulator_bulk_data dsi_v2_4_regulators[] = { { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */ }; static const struct msm_dsi_config sdm845_dsi_cfg = { .io_offset = DSI_6G_REG_SHIFT, - .regulator_data = sdm845_dsi_regulators, - .num_regulators = ARRAY_SIZE(sdm845_dsi_regulators), - .bus_clk_names = dsi_sdm845_bus_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), + .regulator_data = dsi_v2_4_regulators, + .num_regulators = ARRAY_SIZE(dsi_v2_4_regulators), + .bus_clk_names = dsi_v2_4_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), .io_start = { { 0xae94000, 0xae96000 }, }, @@ -198,32 +181,24 @@ static const struct msm_dsi_config sm8550_dsi_cfg = { .io_offset = DSI_6G_REG_SHIFT, .regulator_data = sm8550_dsi_regulators, .num_regulators = ARRAY_SIZE(sm8550_dsi_regulators), - .bus_clk_names = dsi_sdm845_bus_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), + .bus_clk_names = dsi_v2_4_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), .io_start = { { 0xae94000, 0xae96000 }, }, }; -static const struct regulator_bulk_data sc7180_dsi_regulators[] = { - { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */ -}; - static const struct msm_dsi_config sc7180_dsi_cfg = { .io_offset = DSI_6G_REG_SHIFT, - .regulator_data = sc7180_dsi_regulators, - .num_regulators = ARRAY_SIZE(sc7180_dsi_regulators), - .bus_clk_names = dsi_sc7180_bus_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names), + .regulator_data = dsi_v2_4_regulators, + .num_regulators = ARRAY_SIZE(dsi_v2_4_regulators), + .bus_clk_names = dsi_v2_4_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), .io_start = { { 0xae94000 }, }, }; -static const char * const dsi_sc7280_bus_clk_names[] = { - "iface", "bus", -}; - static const struct regulator_bulk_data sc7280_dsi_regulators[] = { { .supply = "vdda", .init_load_uA = 8350 }, /* 1.2 V */ }; @@ -232,27 +207,19 @@ static const struct msm_dsi_config sc7280_dsi_cfg = { .io_offset = DSI_6G_REG_SHIFT, .regulator_data = sc7280_dsi_regulators, .num_regulators = ARRAY_SIZE(sc7280_dsi_regulators), - .bus_clk_names = dsi_sc7280_bus_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names), + .bus_clk_names = dsi_v2_4_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), .io_start = { { 0xae94000, 0xae96000 }, }, }; -static const char * const dsi_qcm2290_bus_clk_names[] = { - "iface", "bus", -}; - -static const struct regulator_bulk_data qcm2290_dsi_cfg_regulators[] = { - { .supply = "vdda", .init_load_uA = 21800 }, /* 1.2 V */ -}; - static const struct msm_dsi_config qcm2290_dsi_cfg = { .io_offset = DSI_6G_REG_SHIFT, - .regulator_data = qcm2290_dsi_cfg_regulators, - .num_regulators = ARRAY_SIZE(qcm2290_dsi_cfg_regulators), - .bus_clk_names = dsi_qcm2290_bus_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names), + .regulator_data = dsi_v2_4_regulators, + .num_regulators = ARRAY_SIZE(dsi_v2_4_regulators), + .bus_clk_names = dsi_v2_4_clk_names, + .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), .io_start = { { 0x5e94000 }, }, From patchwork Tue Mar 14 12:13:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 663727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F7ADC7618B for ; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id s4-20020a19ad44000000b004dda87ecae3sm379058lfd.246.2023.03.14.05.14.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 05:14:18 -0700 (PDT) From: Konrad Dybcio Date: Tue, 14 Mar 2023 13:13:44 +0100 Subject: [PATCH v4 06/10] drm/msm/dsi: Switch the QCM2290-specific compatible to index autodetection MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v4-6-54b4898189cb@linaro.org> References: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678796043; l=2654; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=XlklCU0Bm1/3LNZplT2epg3iipbpHP7NoPAo99TDW0s=; b=PlK3eC/4gdexHFVgKpaJ2/qDm8skkomACDMObeK8OIEVlLOKWUPraJQqVcIoVVAtUCZu8HjYErLv gazZMQTDDr46kBH/S9oniqWqeJhpuhHOOnkMiRw6jMo6dhIwsMrR X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now that the logic can handle multiple sets of registers, move the QCM2290 to the common logic and mark it deprecated. This allows us to remove a couple of structs, saving some memory. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi.c | 5 +++-- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 20 ++------------------ 2 files changed, 5 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c index 31fdee2052be..f761973e4cba 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.c +++ b/drivers/gpu/drm/msm/dsi/dsi.c @@ -4,7 +4,6 @@ */ #include "dsi.h" -#include "dsi_cfg.h" bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi) { @@ -174,7 +173,9 @@ static int dsi_dev_remove(struct platform_device *pdev) static const struct of_device_id dt_match[] = { { .compatible = "qcom,mdss-dsi-ctrl", .data = NULL /* autodetect cfg */ }, - { .compatible = "qcom,dsi-ctrl-6g-qcm2290", .data = &qcm2290_dsi_cfg_handler }, + + /* Deprecated, don't use */ + { .compatible = "qcom,dsi-ctrl-6g-qcm2290", .data = NULL }, {} }; diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c index 03d98cbcc978..29ccd755cc2e 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -169,7 +169,8 @@ static const struct msm_dsi_config sdm845_dsi_cfg = { .bus_clk_names = dsi_v2_4_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), .io_start = { - { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 / SC7180 */ + { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 */ + { 0x5e94000 }, /* QCM2290 / SM6115 / SM6125 / SM6375 */ }, }; @@ -203,17 +204,6 @@ static const struct msm_dsi_config sc7280_dsi_cfg = { }, }; -static const struct msm_dsi_config qcm2290_dsi_cfg = { - .io_offset = DSI_6G_REG_SHIFT, - .regulator_data = dsi_v2_4_regulators, - .num_regulators = ARRAY_SIZE(dsi_v2_4_regulators), - .bus_clk_names = dsi_v2_4_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), - .io_start = { - { 0x5e94000 }, - }, -}; - static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { .link_clk_set_rate = dsi_link_clk_set_rate_v2, .link_clk_enable = dsi_link_clk_enable_v2, @@ -304,9 +294,3 @@ const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor) return cfg_hnd; } - -/* Non autodetect configs */ -const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler = { - .cfg = &qcm2290_dsi_cfg, - .ops = &msm_dsi_6g_v2_host_ops, -}; From patchwork Tue Mar 14 12:13:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 663726 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEF5EC6FD1D for ; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id s4-20020a19ad44000000b004dda87ecae3sm379058lfd.246.2023.03.14.05.14.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 05:14:23 -0700 (PDT) From: Konrad Dybcio Date: Tue, 14 Mar 2023 13:13:47 +0100 Subject: [PATCH v4 09/10] dt-bindings: display/msm: dsi-controller-main: Add SM6115 MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v4-9-54b4898189cb@linaro.org> References: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678796043; l=2294; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=SrFjrl3hjjd6jTZmTfeOIcB1iG8ZWHw//K7P30Y1IYE=; b=ilkdJdfqSf8IuJJOZxOWUoZY9G+1PFVahC6fWUEls2j/8BN3zw1uAzrxxAWELiTwTmpCpmmv3vqv FMBevoo8DD5DaJ+8WB/H2V5y+tC3QOcMI0Y1Qbqetx0EcahBejA4 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a compatible for the DSI on SM6115. Acked-by: Rob Herring Signed-off-by: Konrad Dybcio --- .../devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++ .../devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml | 10 ++++++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index 94f4cdf88c95..d534451c8f7f 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -25,6 +25,7 @@ properties: - qcom,sc7280-dsi-ctrl - qcom,sdm660-dsi-ctrl - qcom,sdm845-dsi-ctrl + - qcom,sm6115-dsi-ctrl - qcom,sm8150-dsi-ctrl - qcom,sm8250-dsi-ctrl - qcom,sm8350-dsi-ctrl @@ -351,6 +352,7 @@ allOf: contains: enum: - qcom,sdm845-dsi-ctrl + - qcom,sm6115-dsi-ctrl then: properties: clocks: diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml index 2491cb100b33..b9f83088f370 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml @@ -40,7 +40,13 @@ patternProperties: type: object properties: compatible: - const: qcom,dsi-ctrl-6g-qcm2290 + oneOf: + - items: + - const: qcom,sm6115-dsi-ctrl + - const: qcom,mdss-dsi-ctrl + - description: Old binding, please don't use + deprecated: true + const: qcom,dsi-ctrl-6g-qcm2290 "^phy@[0-9a-f]+$": type: object @@ -114,7 +120,7 @@ examples: }; dsi@5e94000 { - compatible = "qcom,dsi-ctrl-6g-qcm2290"; + compatible = "qcom,sm6115-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg = <0x05e94000 0x400>; reg-names = "dsi_ctrl"; From patchwork Tue Mar 14 12:13:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 663724 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F267C6FD1D for ; Tue, 14 Mar 2023 12:38:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231153AbjCNMiK (ORCPT ); Tue, 14 Mar 2023 08:38:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230355AbjCNMiJ (ORCPT ); Tue, 14 Mar 2023 08:38:09 -0400 Received: from mail-lf1-f50.google.com (mail-lf1-f50.google.com [209.85.167.50]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 521479EF6D for ; Tue, 14 Mar 2023 05:37:36 -0700 (PDT) Received: by mail-lf1-f50.google.com with SMTP id r27so19770850lfe.10 for ; Tue, 14 Mar 2023 05:37:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678797092; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=yeylFVo7UbFotxXKN5Jk9AW63WMsXe+ARjqLamdFW7w=; b=TnC/4hFGapHh68zKp4S+/zqfvQiyon/r3tWK0PyeaeGPN69yAVNeMxRTXbGtwrkICW F1oiW5TMWIW6yxyt27InWqWQuTXkjCDfIknY7GeL+ZE97Fow41SWnmtG3dnOAQh5ov4U p3Yar1GlPxlm+MgrzfmTrtmKEku6H+iZcF0Z9sBkti0BScvbkiX2xNCBUeLGM/ynymS4 eJRhqqHU1Fiym1KK01AnUjN9c3gMIZ+2+Pp5RclvcgtLbMYTcUnuaQJMRL4ChAmTrTEX 56F07o0VlgvUy+D2c9RW2rIJMdh0vj3qxFElIlR7rqDHyT3OfQci/DOshFKVMWhhMWO8 uV5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678797092; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yeylFVo7UbFotxXKN5Jk9AW63WMsXe+ARjqLamdFW7w=; b=NIRSRvI9t0Y/aLi0er8famHlBiHdGuk7J3Cczp2YqXvTXMjH7Mnl5BuHf9ginRPRzc hNT15L0rlpz3SwJ8NRc8zRdwIa8qBgjLLnMy9ma2gufxcNE7LuEnxOZkJbAUitH0MBHM a5y56cNQcNTECDI0xW2ICF0paWZ4AfhDJcYcyBlLA72I0sdesQq0GncGswHIm9mVttdm JV998P2neP//w19WlMqWpgVOzKvka2AY3XIOptmIp3KRpIq9VPuBaExfqRD7TdX4K1An axhcIim8I82b4d5PC9vHb+df4uXS48kvIdZ6cL0KLtbudTnwn2PXj3MHNKUtdRZEv5tv HE9g== X-Gm-Message-State: AO0yUKXIGTSRNG9JOkjYoEY59LwK2jPNLlvQonoCJrlJ9MZywHOjlNfW LrbksZtOHCpsy8X1iHOk1ebf74NNIhNLsaJfnEs= X-Google-Smtp-Source: AK7set83jGmoRhPfkqMbcEJHHm7krfEcVsYNn3fRI8hjQUMi1nyZZcK+S70SwgroH8ClftZB5Jk5Hg== X-Received: by 2002:ac2:446d:0:b0:4e4:b9b4:bf25 with SMTP id y13-20020ac2446d000000b004e4b9b4bf25mr748332lfl.68.1678796066123; Tue, 14 Mar 2023 05:14:26 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id s4-20020a19ad44000000b004dda87ecae3sm379058lfd.246.2023.03.14.05.14.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 05:14:25 -0700 (PDT) From: Konrad Dybcio Date: Tue, 14 Mar 2023 13:13:48 +0100 Subject: [PATCH v4 10/10] arm64: dts: qcom: sm6115: Use the correct DSI compatible MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v4-10-54b4898189cb@linaro.org> References: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v4-0-54b4898189cb@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678796043; l=835; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=fTDJ/Pk/K83TEsz8nt+gatYoQ7InKrC5bjtKXy4Z9Sw=; b=HhZ4vHeSq1k1zTiLWtKr3SD+hh+THRKo/3SDYCP8seyGUW6Irn5LUOqcX+223SewxioRXEQR3Uzk jQn7R0qWCdG+pjWnvGDWgOMp24G1gVyrZyKTgLB39uI8m2Ev/nR7 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the non-deprecated, SoC-specific DSI compatible. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index fbd67d2c8d78..18c7eedff300 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1219,7 +1219,7 @@ opp-384000000 { }; mdss_dsi0: dsi@5e94000 { - compatible = "qcom,dsi-ctrl-6g-qcm2290"; + compatible = "qcom,sm6115-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg = <0x0 0x05e94000 0x0 0x400>; reg-names = "dsi_ctrl";