From patchwork Tue Mar 14 08:04:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 663080 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00D79C6FD1F for ; Tue, 14 Mar 2023 08:05:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230341AbjCNIFD (ORCPT ); Tue, 14 Mar 2023 04:05:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229456AbjCNIFB (ORCPT ); Tue, 14 Mar 2023 04:05:01 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 716091E9E6 for ; Tue, 14 Mar 2023 01:04:59 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id k18-20020a17090a591200b0023d36e30cb5so1444771pji.1 for ; Tue, 14 Mar 2023 01:04:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678781099; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e2qLWiEu+kwQHNuuyN9RiYgLYwjEZFKFrGhRPUZl538=; b=kUttmv50P6JaqbAfZWMvjFT69NXu1Mn44b5z8H5CQIUokMJkaddWBjXPbDl4gno60y bzBIGnQNDD5UZSDt3gbM/Izp479BCMnLTG9AfGHJlfC2C6B+iAqZABelML15p2Dzt+b0 d2Klm4DT5X8GEJLoh9Sc6MyStWYXaOmXq/+e5p1LhRac/IkExM2EQR9XaQ+aSi1MgmTM 7ynbySiUWnTa8veOsW7b6wy+WRLB7uU0qosh61Ki3QCwzcC6W1ka89KiBkDjqtOCkHcn y1MdyIDsSP8mPcxj7zIbI2Grt7m/m9tuuhiTnEkY8LKZ7ghH1MXeo3tOEnw9DdUhwCyW 330Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678781099; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e2qLWiEu+kwQHNuuyN9RiYgLYwjEZFKFrGhRPUZl538=; b=OEQ86yniRXqSbnhVGg2+xleWne35pcGp1QxW0qfHGu+cLkxDK0ZqiLit5tUORsnEBd +dP7Dk4t/MT8QHgviVHvjQl4NJYe8GRy2sRRyyEy+pDPRXzUFbO5zXxqxYAzn+jQhxF6 ARIhs6aINoP9nbQkrRaw+neoJ/dzd92NtNIdY6KBZo7dtqn01Cy0zehR6L3LkbSFmYTe PnxAI8DR/xMIGK7v1Mj1JZY+m9NzJSovGoCkzlRqKwNhA10jmU/7YVp6Z/7PRmGO4kky hzCIS5OAb4rdwhqMhn93G1PoiM4mSwbURyG5vdyNqiNQE8Owr9tJcAzXB2ZQCVDglmbA bmcQ== X-Gm-Message-State: AO0yUKWIErgiGmXGPQbMyVpzUpcBw13vtJK3j93cM36IdZiYVMIXyVZJ mefWZm5JjrJs7Bo7zDHVPLYy X-Google-Smtp-Source: AK7set/Wuc2f6xzJUbp88JtCtHXmKq6x8/IUFkEzI3k5FSxbK7fOxSRzO6ogfiwCrJFmPAUMq5dQpg== X-Received: by 2002:a17:902:c949:b0:19a:59d1:389e with SMTP id i9-20020a170902c94900b0019a59d1389emr14167228pla.23.1678781098879; Tue, 14 Mar 2023 01:04:58 -0700 (PDT) Received: from localhost.localdomain ([117.217.177.49]) by smtp.gmail.com with ESMTPSA id l8-20020a170902f68800b001994a0f3380sm1078022plg.265.2023.03.14.01.04.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 01:04:58 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v8 01/14] dt-bindings: arm: msm: Update the maintainers for LLCC Date: Tue, 14 Mar 2023 13:34:30 +0530 Message-Id: <20230314080443.64635-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> References: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Both Rishabh and Sai have left Qualcomm, and there is no evidence of them maintaining with a new identity. So their entry needs to be removed. Listed Bjorn as the interim maintainer until someone volunteers to maintain this binding. Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index 38efcad56dbd..6570b808fd0d 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Last Level Cache Controller maintainers: - - Rishabh Bhatnagar - - Sai Prakash Ranjan + - Bjorn Andersson description: | LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, From patchwork Tue Mar 14 08:04:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 663079 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85F91C6FD1F for ; Tue, 14 Mar 2023 08:05:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230461AbjCNIFk (ORCPT ); Tue, 14 Mar 2023 04:05:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230187AbjCNIFV (ORCPT ); Tue, 14 Mar 2023 04:05:21 -0400 Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E97974DDF for ; Tue, 14 Mar 2023 01:05:13 -0700 (PDT) Received: by mail-pl1-x629.google.com with SMTP id k2so7828718pll.8 for ; Tue, 14 Mar 2023 01:05:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678781112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4tE4o5E5NxTGWs0FFcIpd5GaMpz3q7yKukVUL4nRPNs=; b=SmbC3Sr+D60stiRGJZXsRljMJ9EGtv0OIO9wD1szac0xQEdjxAe3HoEMnXxycEv0M8 SgvcLf4e0+XZgqSILauKVvLZbJZ5njuOxNi29bPYpN8NQ4hzlDFrXobTq9xd5ipr2TmM b1GG/vzvBYmfi1RgXuvJEn4n8sxU7TbMucES+ZhVvcYFv6x7k6PpgSXCBhaiqEZfF+oo uEE1P1JHVl9h3wE6fO84Lnr5vA+tkG+K4s1GY8AXFMPA9oPvOadzpP5IYecdldDz3eg6 usnty6Hc0vl86IfjdVKi7B1igYRvEia7S3TJxla28WLeSiqpd8PCS9LyZGWw3fDtcf1k W7wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678781112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4tE4o5E5NxTGWs0FFcIpd5GaMpz3q7yKukVUL4nRPNs=; b=Dt34yaNSXATMo8qJMiNMPhIyGYBl30amDgR00+4Kf7+oeDHksRGN2yirFiGVyEzaRS 2rHHqWzOfixN7ZDT/r7L+eYL7qQ+fpMv75u5zMxDFM/bnE0VV/NN1SppIjUhUf48Hx1A 2P7k2zALQSnnVB3gC2Kdu16KOtYODJXLChW7PRmg7qBMtOVgePXi+I2ReTN61a9UcWz7 e1RBNiOz3ogLe6vydNjziv37+GizzHkxEkYxjRu7mf7fhC6u8utJguL871OGGgiFkkLZ m3zO3x5ZZyYVC+A0o3pLZSS4vfTJ2YWPRh59Ovs7Eqfh39+N3D8nWzUXC8NPkATNywv/ EbqA== X-Gm-Message-State: AO0yUKWCtRAo+YmERj2N/hKN9r52yXnaJmJ18LazkGjCi3uPs1soGipt fkF9y5WPc3fuo8XaUrxeLYsc X-Google-Smtp-Source: AK7set+A0dHBQOGRoBb3IGYCa3wKgRf9EDI9tNGdBjwCcw3Q/olMEHPtzMPMK9JzYYGiraLJjvCTNQ== X-Received: by 2002:a17:902:f684:b0:19e:68b0:b06a with SMTP id l4-20020a170902f68400b0019e68b0b06amr46982825plg.50.1678781112473; Tue, 14 Mar 2023 01:05:12 -0700 (PDT) Received: from localhost.localdomain ([117.217.177.49]) by smtp.gmail.com with ESMTPSA id l8-20020a170902f68800b001994a0f3380sm1078022plg.265.2023.03.14.01.05.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 01:05:11 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v8 03/14] arm64: dts: qcom: sdm845: Fix the base addresses of LLCC banks Date: Tue, 14 Mar 2023 13:34:32 +0530 Message-Id: <20230314080443.64635-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> References: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SDM845, the size of the LLCC bank 0 needs to be reduced to 0x4500 as there are LLCC BWMON registers located after this range. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 479859bd8ab3..3bf95a12ebb9 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2192,8 +2192,11 @@ uart15: serial@a9c000 { llcc: system-cache-controller@1100000 { compatible = "qcom,sdm845-llcc"; - reg = <0 0x01100000 0 0x31000>, <0 0x01300000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x01100000 0 0x45000>, <0 0x01180000 0 0x50000>, + <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>, + <0 0x01300000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Tue Mar 14 08:04:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 663078 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD532C6FD1C for ; Tue, 14 Mar 2023 08:06:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230456AbjCNIGD (ORCPT ); Tue, 14 Mar 2023 04:06:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230460AbjCNIFk (ORCPT ); Tue, 14 Mar 2023 04:05:40 -0400 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F14796B31B for ; Tue, 14 Mar 2023 01:05:24 -0700 (PDT) Received: by mail-pj1-x102f.google.com with SMTP id h11-20020a17090a2ecb00b00237c740335cso14302349pjs.3 for ; Tue, 14 Mar 2023 01:05:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678781124; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H3jjAvyClxqCSaG5sOi6OveXFyY33UJ9o9fFaRGOIoU=; b=TPe49wQ55ZzjXtL1UhusZl5uDaWHm9T2bYehPMS/MgB1zXGYXYXd+Il8eMkq3hVezK Jxl0H1dW3Z4Dh4DnVnxdD0GHDOrGhsqNw4XajjmEk5hadqij+8/HsaCK9GeAJPmn6L8k fE6nt06k4eCKMBmVEkHElAN+09cYJ54nbpSIlZ9OChY5I+SEjKp/b6pTMc/MYOSJr2CZ zCbaVqG1lIED2bPKylCCmXu3LWAUAMeJLRF8aW/v/SAuhl0RwicXXGaR1xT0ryQ9omzu bzYWCTAN81C88SbdXaG3t1p7iCLwuqq4cmJJEOv92d/SWrW42hyHuijuBC0tcAlzQFP+ 3rTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678781124; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H3jjAvyClxqCSaG5sOi6OveXFyY33UJ9o9fFaRGOIoU=; b=I0HUhXTNipx3avw3XuJW5ijOCBEl1a7iNsiEZeBhu4IjwFg2nX8Lu7R1XVckoouYL6 W4fxZN0KQXGWl31NI6K+JjxpEeNlPlyp5GssUrHMiwlDy0T86TXuYZI2lx3ehlFRCdn1 IfCGRlPesAjVVPCOInNFmj+VWFEwZI6klI8NFgcUwNNwfieSS0MGGh9QQj41msH/T2iV WD11xlxXfdtox8R4KYJ7rg3gY52sL9nQi7B+aeWmJxbMDbk+T7UPlyLOhc89CMQgjz7I lDGsXBiIwHXUP0/xZ1kXIkO9bzsOzFy8TOKHFPCZMYYBiJqy0s20fkEHamjL3fZS8/Rz r5Pw== X-Gm-Message-State: AO0yUKXl1ENzpQ8BXWEMw63b1sAoy+RnBLEryoE7X6/czzW/y+grbUVJ +/f83mIvVtVJTXLDaF6BFjaQ X-Google-Smtp-Source: AK7set/YSOsQvqiPeL9DG52pW06edvX1Z7qaNl3Bn0+V0f31PkjxqRhu0MdFbr9SW/n2qr7smeYKQw== X-Received: by 2002:a17:903:41c9:b0:19f:380e:9cca with SMTP id u9-20020a17090341c900b0019f380e9ccamr7917000ple.20.1678781124191; Tue, 14 Mar 2023 01:05:24 -0700 (PDT) Received: from localhost.localdomain ([117.217.177.49]) by smtp.gmail.com with ESMTPSA id l8-20020a170902f68800b001994a0f3380sm1078022plg.265.2023.03.14.01.05.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 01:05:23 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v8 05/14] arm64: dts: qcom: sc7280: Fix the base addresses of LLCC banks Date: Tue, 14 Mar 2023 13:34:34 +0530 Message-Id: <20230314080443.64635-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> References: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. While at it, let's also fix the size of the llcc_broadcast_base to cover the whole region. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index bdcb74925313..afe74db1f5ae 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3582,8 +3582,9 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sc7280-llcc"; - reg = <0 0x09200000 0 0xd0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Tue Mar 14 08:04:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 663077 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DDE0C6FD1F for ; Tue, 14 Mar 2023 08:06:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230493AbjCNIGQ (ORCPT ); Tue, 14 Mar 2023 04:06:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230498AbjCNIFr (ORCPT ); Tue, 14 Mar 2023 04:05:47 -0400 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 651DB72012 for ; Tue, 14 Mar 2023 01:05:35 -0700 (PDT) Received: by mail-pl1-x62f.google.com with SMTP id p6so15761861plf.0 for ; Tue, 14 Mar 2023 01:05:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678781135; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cI9fzySm6xkOQqRMGGXIyCN4K6R+WsFVLi5pzorIgXU=; b=SmrW6DYZUiRCkcs6iV1lliQ4cARMhvs11o78dH/KFKBz++3pDZF9LSJXafidza+V/X bi3oMZ3YKstKS9jq1P01frvzijVXejgUEysFIZOW2xyol2nISWCpeIBHwEX8bd0Y4TH9 rGosPDpMJlOeQmr6rvkRU20ais1xjTXycslgHrC7L4sO+yuABk0mjPdDoUaLYAdUMzgL 5OKoE2rlkBZLGm8UEm164kpl/07Yojm8pO1T/n3JvIkvCjy+EWn0hO3u0Q7Z/sZ3KQpq UpU5sczU8qXfxr3kg8J8F/Y4Vho5KAL+LYxTOgySXwfGfHzCYdNkSKi0lRdZlnAQ496V C/ww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678781135; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cI9fzySm6xkOQqRMGGXIyCN4K6R+WsFVLi5pzorIgXU=; b=4lrO1ha1eJSrQZO9qmJ+jPIiUkXIEp+a1Pp67SLwI7xnj+uhA4ZFSWp8TBBO9xvsnv jYsKKMOwE3GYDcuhwqRZGGFbkBf+c13E5KLR3DWVaNOrP6xKX67i3Cig2FPE4wbsQv3n NV1hpmAgFdOs9pzyjV6Bj9rR8XSr+MDF1Sv5PP97cmWA1xeRM/HWGBS7nKl+oJOeA60S dlDXY5HhbWfanGl66IcEm7mzT6557JZ7wln0L9w7mWovTf8hBKLlxNRfIno+Z1ZW9qUk FNxqNv3eXCwgZg5Vw/XbmFNx/bJZyb2x00QntYEsrclbXcq2p8z2O+qDxYrPTpEFyrbo 7I5A== X-Gm-Message-State: AO0yUKWQkqdwHRgjX0TqXcrFgntEgYoqZEKkFG6+USonYfYzhbxmYBWK Qi3qjGKuJe1hklPfJOsw0kXY X-Google-Smtp-Source: AK7set8D8ZyqM86gwm/xlOKVjJkQGMY8l814PI+TikC0iw+CMEQOSDA0tC0uf8VZ+PWrcaW2zms5vQ== X-Received: by 2002:a17:902:ab82:b0:19b:da8:1ce6 with SMTP id f2-20020a170902ab8200b0019b0da81ce6mr29920545plr.55.1678781134905; Tue, 14 Mar 2023 01:05:34 -0700 (PDT) Received: from localhost.localdomain ([117.217.177.49]) by smtp.gmail.com with ESMTPSA id l8-20020a170902f68800b001994a0f3380sm1078022plg.265.2023.03.14.01.05.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 01:05:34 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v8 07/14] arm64: dts: qcom: sm8150: Fix the base addresses of LLCC banks Date: Tue, 14 Mar 2023 13:34:36 +0530 Message-Id: <20230314080443.64635-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> References: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e..e316a4e4b5aa 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1772,8 +1772,11 @@ mmss_noc: interconnect@1740000 { system-cache-controller@9200000 { compatible = "qcom,sm8150-llcc"; - reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; }; From patchwork Tue Mar 14 08:04:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 663076 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3613CC74A44 for ; Tue, 14 Mar 2023 08:06:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231161AbjCNIGX (ORCPT ); Tue, 14 Mar 2023 04:06:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230444AbjCNIFw (ORCPT ); Tue, 14 Mar 2023 04:05:52 -0400 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C29174DDF for ; Tue, 14 Mar 2023 01:05:46 -0700 (PDT) Received: by mail-pj1-x1029.google.com with SMTP id e15-20020a17090ac20f00b0023d1b009f52so4214543pjt.2 for ; Tue, 14 Mar 2023 01:05:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678781146; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WM/W3mGHWee04PiGhWaePDSEFLq+5Xz9JBoWs5RSs+4=; b=RDGwems7PyJZDZ29pYgfkme1i95dPUInFnXwzopbD6Em5qAza9fIY+En5MtKlgSpqG YEPMHWlaC2/G41YoL0usMUjvOqq6fkjWNI2RQgNUSoJ8ZfjSU3PQicRblMHRdBichWpX F3V6cYIEFrkj1FxBuPNHqp7ry3wbusvjYzSCqEJZbieoKqxWeyfuVvMAI0tNXSlv+lmJ EahXwYc/ksWZIJKinruI87wppf+TUFSw2IyyVpTBJBR1ED8VZh8ycFvca2pz01phKde0 xD8pFjaG4RgYhg3aupoOE+6jC1Dq4epW1Hyjzh1dH5/bF5+H5p4UWzBpA4HgQPTBrXiz 3+Vw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678781146; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WM/W3mGHWee04PiGhWaePDSEFLq+5Xz9JBoWs5RSs+4=; b=sYdlIOzNhZDaqIi2Laa1LxTk432BqW44gWTzZTLFHSMW+HXDPzthcOlExRQEnCwW3o +8i6PV5Eb+2sEyljyZ1OuDHvsg0lM2uqVIl+0eEJcUfkRULqCtXDCvkBYljs+/khqNZ0 8oWpG6ndkxa+kDGQ3TGI7duY8WiLyEac+59/GjFY3qEqHrvq7rVh1TCHdVyP+0tttKzA rVIDlItsxiqBFL6oO81Io2ufWQAwjf8+yBz7QlePwuvpvaAb9WV2y8ZekMdhuJ4mk+rD tGlMzKiEiqw54HiJoJZdnYKFYban79B5IRBGdYU5ccZrTG4vFxv7VrKRwmHNbvwpFNMm piNw== X-Gm-Message-State: AO0yUKXYIaef5p//SpWmonJ6eScMvLTQnsYlMXWZmXsQwM7oI9jji9sh 0WzVyRh5uC2/VgcQd67jbJ6IQlcligGABLj4KA== X-Google-Smtp-Source: AK7set/EBRWn+iFCvwCLybzCKfHdXTnJNY/XzNdvpeEfeBdb0/V4NEbBLT9p7swb5llI6OB4biA5cg== X-Received: by 2002:a17:902:d502:b0:19d:16e4:ac0f with SMTP id b2-20020a170902d50200b0019d16e4ac0fmr46377415plg.5.1678781145728; Tue, 14 Mar 2023 01:05:45 -0700 (PDT) Received: from localhost.localdomain ([117.217.177.49]) by smtp.gmail.com with ESMTPSA id l8-20020a170902f68800b001994a0f3380sm1078022plg.265.2023.03.14.01.05.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 01:05:44 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v8 09/14] arm64: dts: qcom: sm8350: Fix the base addresses of LLCC banks Date: Tue, 14 Mar 2023 13:34:38 +0530 Message-Id: <20230314080443.64635-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> References: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 1c97e28da6ad..3fefd8cbba6d 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2204,8 +2204,11 @@ gem_noc: interconnect@9100000 { system-cache-controller@9200000 { compatible = "qcom,sm8350-llcc"; - reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09600000 0 0x58000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; }; compute_noc: interconnect@a0c0000 { From patchwork Tue Mar 14 08:04:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 663075 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F707C6FD1C for ; Tue, 14 Mar 2023 08:07:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231207AbjCNIG7 (ORCPT ); Tue, 14 Mar 2023 04:06:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230174AbjCNIGU (ORCPT ); Tue, 14 Mar 2023 04:06:20 -0400 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D87D197FF3 for ; Tue, 14 Mar 2023 01:05:57 -0700 (PDT) Received: by mail-pl1-x62d.google.com with SMTP id p6so15762687plf.0 for ; Tue, 14 Mar 2023 01:05:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678781157; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sggevdgcbKkipnWP4TBoy7JyP1Clj0YxXKdQjrw2BUc=; b=n5ShiHu8TkifJ0rpTG3JyQ6+qX/9SlTcOKdiiRJo/l6aDmDiBrYXy1HcKwqr7467jj oEXtF/BwJ27I+1JMUNMVG66bwuQQwdnQx5qfFmOW/QBIUk26+ohXYo2xo96qW/heofsd El6IBaTR2yEu+ge99Ysh36mUSo7WAKF4wLgzThC9+uKTGaCjkshefW7pC28U8qj32lr0 cf6RoTkIRqYduRW7JGM9Bkr5GTUZ7D2CMmHsylcX9uCKA9Cg5BpFjZiAtLejSDqr/2m0 u4MOGQHHdsx9uzIIeSnV82eN0d9vpvKy61lG8/2X+Jnw7ZmEYW5PI34Tc6soqaT4fZmI PnEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678781157; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sggevdgcbKkipnWP4TBoy7JyP1Clj0YxXKdQjrw2BUc=; b=OrzXdiYEOGU3hDR7Q9TVJZ+sLAbeDw+CnEJnbHSGrSHwddVVeZS+Mqj9y1D4ohVFdx tkDfgmb7ukXKomnDcLYaiaL8tFZXobmAQlVsHpGHiHoi4kn4OzS+b+hJd6uyYpog2pHl GJntRqivAmohFa8TeY3VtdqtLoZ3T21pevXLUHvl7gLPck62i8E0lw4jt2ae4g9JOPqs dqm6ZkOZNLFCZs/4KrrtmUE52g6YDDUeMJ/tdnHzi9FXhXZQ7bVvBmz5yKl2LzSDsL63 QSVAU+H213E0aca+pv4TNiA5eRZz3Pad57USD76kFhooK1FDUiE+0h/k+5+q+xibnQR0 5o/Q== X-Gm-Message-State: AO0yUKUjPyRHDlJgvfVlutmiovj7fjLH0dhnHc1LUz0ocNiza/LhN7MJ d4o3kk0bfvGbqL+l/H6Drfi9 X-Google-Smtp-Source: AK7set91E81Z5ue0s+hViGYIWmltBDyOFXxkdskzB+J3ofRfV5NNi52ZEZ0p16JswB08mvE13xUctQ== X-Received: by 2002:a17:903:24f:b0:19c:c8c8:b545 with SMTP id j15-20020a170903024f00b0019cc8c8b545mr40241222plh.50.1678781157396; Tue, 14 Mar 2023 01:05:57 -0700 (PDT) Received: from localhost.localdomain ([117.217.177.49]) by smtp.gmail.com with ESMTPSA id l8-20020a170902f68800b001994a0f3380sm1078022plg.265.2023.03.14.01.05.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 01:05:56 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v8 11/14] arm64: dts: qcom: sm6350: Fix the base addresses of LLCC banks Date: Tue, 14 Mar 2023 13:34:40 +0530 Message-Id: <20230314080443.64635-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> References: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SM6350, there is only one LLCC bank available. So let's just pass that as "llcc0_base". Reported-by: Parikshit Pareek Tested-by: Luca Weiss Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 1e1d366c92c1..63e55579e9c4 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1348,7 +1348,7 @@ dc_noc: interconnect@9160000 { system-cache-controller@9200000 { compatible = "qcom,sm6350-llcc"; reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg-names = "llcc0_base", "llcc_broadcast_base"; }; gem_noc: interconnect@9680000 { From patchwork Tue Mar 14 08:04:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 663074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88350C6FD1C for ; Tue, 14 Mar 2023 08:07:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230455AbjCNIH1 (ORCPT ); Tue, 14 Mar 2023 04:07:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230416AbjCNIGq (ORCPT ); Tue, 14 Mar 2023 04:06:46 -0400 Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E40E56BC33 for ; Tue, 14 Mar 2023 01:06:08 -0700 (PDT) Received: by mail-pl1-x635.google.com with SMTP id a9so15688172plh.11 for ; Tue, 14 Mar 2023 01:06:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678781168; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hfib3mid0RNv0awlNHyD0vxmGxxP3t1h5XoLVgGQYbk=; b=yf4ZTxotOIU67QI6f/wXZ/zJYvgr6n43s20tJqrl65vBN3IC13gEOytr6OGzX8+fD1 0o4CO3msCjAHU1/Dg1lU1YFE9AG9yHSv33akNRqof0AInDypR0SMRDQISBnr1OEpDxRU OVCpOUMU3o212GffdTDsPOqRsJga4/nY8eWtiifY3BS4H+5zeuYI4Kgrkyk4mU4T5lEw MrfX2AglTYOkmUBFZOe6ydxVSWxjUE17qWREIlOkKr8ZspRKhjm+Ym1w7vlyMNHNr5yH WLnUvlbdsNRjOhm35uwDTbyH8eEc82sNNcRYvAr4Rejn046Imzsvcs55nhQ7BcmyMYa4 rI1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678781168; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hfib3mid0RNv0awlNHyD0vxmGxxP3t1h5XoLVgGQYbk=; b=JjDaCVqedjUoQgLwfzG1teJBaM2+8CASfJqJUTq3tmO2pe5+9P2w6jemx8oX6aFM2s vZZ9fE7MvuxVu1Tl+tVgSVQM6LFuYXqpqI2bi4zkJ2Q1P2ozOlgk0jG2/vbQqMrzSKnp Svda6FiGKaGaPPJK4nvcGRYKFJLlEp3bbw+mNmRsOXOkoSYSxQZlbQYm2qLdu12N8g3h HU9zCw9jNkZsSUunXHlcGWUT505T8qk2M/Uc+da0emwiy+KVp1nUL45SR3myoJ2r8hg1 au1VZjKlQqTsd/I5EeLXrp0YDXJUdBQYn2IpbxX69oUxseDTMv/nv1vrWX20QJbAngqT TclQ== X-Gm-Message-State: AO0yUKU7o0aRcyuitcnneK9884ogNREwBtRLGQ/rz3RyenDp5mYt6to4 qM7JQ2ZYLq62HgynCOex9l+0gFJTkPsN5DcKpw== X-Google-Smtp-Source: AK7set8D0WZOisXVIllIVwyzE9SNHCjSM9A+Uc56ksiGi2TMM4jJ/I7VRFKuvqiAyLOS0SGZXkDSdg== X-Received: by 2002:a17:902:d50f:b0:19e:aafe:f7e9 with SMTP id b15-20020a170902d50f00b0019eaafef7e9mr40448490plg.25.1678781168473; Tue, 14 Mar 2023 01:06:08 -0700 (PDT) Received: from localhost.localdomain ([117.217.177.49]) by smtp.gmail.com with ESMTPSA id l8-20020a170902f68800b001994a0f3380sm1078022plg.265.2023.03.14.01.06.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 01:06:07 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, bp@alien8.de, tony.luck@intel.com Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, quic_ppareek@quicinc.com, luca.weiss@fairphone.com, ahalaney@redhat.com, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v8 13/14] qcom: llcc/edac: Support polling mode for ECC handling Date: Tue, 14 Mar 2023 13:34:42 +0530 Message-Id: <20230314080443.64635-14-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> References: <20230314080443.64635-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Not all Qcom platforms support IRQ mode for ECC handling. For those platforms, the current EDAC driver will not be probed due to missing ECC IRQ in devicetree. So add support for polling mode so that the EDAC driver can be used on all Qcom platforms supporting LLCC. The polling delay of 5000ms is chosen based on Qcom downstream/vendor driver. Reported-by: Luca Weiss Tested-by: Luca Weiss Tested-by: Steev Klimaszewski # Thinkpad X13s Tested-by: Andrew Halaney # sa8540p-ride Reviewed-by: Borislav Petkov (AMD) Signed-off-by: Manivannan Sadhasivam --- drivers/edac/qcom_edac.c | 50 +++++++++++++++++++++--------------- drivers/soc/qcom/llcc-qcom.c | 13 +++++----- 2 files changed, 35 insertions(+), 28 deletions(-) diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c index 1d3cc1930a74..265e0fb39bc7 100644 --- a/drivers/edac/qcom_edac.c +++ b/drivers/edac/qcom_edac.c @@ -76,6 +76,8 @@ #define DRP0_INTERRUPT_ENABLE BIT(6) #define SB_DB_DRP_INTERRUPT_ENABLE 0x3 +#define ECC_POLL_MSEC 5000 + enum { LLCC_DRAM_CE = 0, LLCC_DRAM_UE, @@ -283,8 +285,7 @@ dump_syn_reg(struct edac_device_ctl_info *edev_ctl, int err_type, u32 bank) return ret; } -static irqreturn_t -llcc_ecc_irq_handler(int irq, void *edev_ctl) +static irqreturn_t llcc_ecc_irq_handler(int irq, void *edev_ctl) { struct edac_device_ctl_info *edac_dev_ctl = edev_ctl; struct llcc_drv_data *drv = edac_dev_ctl->dev->platform_data; @@ -328,6 +329,11 @@ llcc_ecc_irq_handler(int irq, void *edev_ctl) return irq_rc; } +static void llcc_ecc_check(struct edac_device_ctl_info *edev_ctl) +{ + llcc_ecc_irq_handler(0, edev_ctl); +} + static int qcom_llcc_edac_probe(struct platform_device *pdev) { struct llcc_drv_data *llcc_driv_data = pdev->dev.platform_data; @@ -355,29 +361,31 @@ static int qcom_llcc_edac_probe(struct platform_device *pdev) edev_ctl->ctl_name = "llcc"; edev_ctl->panic_on_ue = LLCC_ERP_PANIC_ON_UE; - rc = edac_device_add_device(edev_ctl); - if (rc) - goto out_mem; - - platform_set_drvdata(pdev, edev_ctl); - - /* Request for ecc irq */ + /* Check if LLCC driver has passed ECC IRQ */ ecc_irq = llcc_driv_data->ecc_irq; - if (ecc_irq < 0) { - rc = -ENODEV; - goto out_dev; - } - rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, + if (ecc_irq > 0) { + /* Use interrupt mode if IRQ is available */ + rc = devm_request_irq(dev, ecc_irq, llcc_ecc_irq_handler, IRQF_TRIGGER_HIGH, "llcc_ecc", edev_ctl); - if (rc) - goto out_dev; + if (!rc) { + edac_op_state = EDAC_OPSTATE_INT; + goto irq_done; + } + } - return rc; + /* Fall back to polling mode otherwise */ + edev_ctl->poll_msec = ECC_POLL_MSEC; + edev_ctl->edac_check = llcc_ecc_check; + edac_op_state = EDAC_OPSTATE_POLL; -out_dev: - edac_device_del_device(edev_ctl->dev); -out_mem: - edac_device_free_ctl_info(edev_ctl); +irq_done: + rc = edac_device_add_device(edev_ctl); + if (rc) { + edac_device_free_ctl_info(edev_ctl); + return rc; + } + + platform_set_drvdata(pdev, edev_ctl); return rc; } diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 72f3f2a9aaa0..7b7c5a38bac6 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -1011,13 +1011,12 @@ static int qcom_llcc_probe(struct platform_device *pdev) goto err; drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); - if (drv_data->ecc_irq >= 0) { - llcc_edac = platform_device_register_data(&pdev->dev, - "qcom_llcc_edac", -1, drv_data, - sizeof(*drv_data)); - if (IS_ERR(llcc_edac)) - dev_err(dev, "Failed to register llcc edac driver\n"); - } + + llcc_edac = platform_device_register_data(&pdev->dev, + "qcom_llcc_edac", -1, drv_data, + sizeof(*drv_data)); + if (IS_ERR(llcc_edac)) + dev_err(dev, "Failed to register llcc edac driver\n"); return 0; err: