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[88.29.167.233]) by smtp.gmail.com with ESMTPSA id 12-20020a05600c228c00b003dec22de1b1sm2579915wmf.10.2023.03.14.04.14.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 14 Mar 2023 04:14:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , "Michael S. Tsirkin" , Jason Wang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 1/4] hw/pci/msi: Fix debug format string Date: Tue, 14 Mar 2023 12:14:32 +0100 Message-Id: <20230314111435.89796-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230314111435.89796-1-philmd@linaro.org> References: <20230314111435.89796-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Fix this format string warning when defining MSI_DEBUG: hw/pci/msi.c:209:28: warning: format specifies type 'char' but the argument has type 'unsigned int' [-Wformat] offset, nr_vectors, msi64bit, msi_per_vector_mask); ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/pci/msi.c:83:61: note: expanded from macro 'MSI_DEV_PRINTF' MSI_DPRINTF("%s:%x " fmt, (dev)->name, (dev)->devfn, ## __VA_ARGS__) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~ hw/pci/msi.c:78:58: note: expanded from macro 'MSI_DPRINTF' fprintf(stderr, "%s:%d " fmt, __func__, __LINE__, ## __VA_ARGS__) ~~~ ^~~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daudé --- hw/pci/msi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci/msi.c b/hw/pci/msi.c index 041b0bdbec..5de6df8154 100644 --- a/hw/pci/msi.c +++ b/hw/pci/msi.c @@ -204,7 +204,7 @@ int msi_init(struct PCIDevice *dev, uint8_t offset, } MSI_DEV_PRINTF(dev, - "init offset: 0x%"PRIx8" vector: %"PRId8 + "init offset: 0x%"PRIx8" vector: %u" " 64bit %d mask %d\n", offset, nr_vectors, msi64bit, msi_per_vector_mask); From patchwork Tue Mar 14 11:14:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 662991 Delivered-To: patch@linaro.org Received: by 2002:a5d:5602:0:0:0:0:0 with SMTP id l2csp994487wrv; Tue, 14 Mar 2023 04:16:09 -0700 (PDT) X-Google-Smtp-Source: AK7set8g8K8CWs8+hVOOUQDCguxjsDe2vJqPTPeNLv0e+etF5jY92sXoIo24cxUK8RV3QPqj1JO0 X-Received: by 2002:a05:6214:1d01:b0:56e:b009:69a3 with SMTP id e1-20020a0562141d0100b0056eb00969a3mr22451754qvd.18.1678792569300; Tue, 14 Mar 2023 04:16:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678792569; cv=none; d=google.com; s=arc-20160816; b=VIeNHjNZ1qGl4gQMvAqdJqEkvw/ftFqGmxkbPtsWY+fTCw833KDBvrC0xjI9TDDx0Q 7oOH+pVNb0X+vsn6Qx/vsCakV4I0veY/i4sQvfcrA/yVmKoc0464mal/Bi2KunZSFvlt ak1hQN6YyBV0b9sNWLWcbtn+chYMJ83BQ9c/ezhgeHyyQ5qrfpAky53J+dVYGbGpkvF5 lvmQReV17mxXYr/AhkTY0qrPDx0tI7LL11M6OtoC3ClWATBluIROH9Jz/iFFyUuHq1YN 87Rek5ip6ozgbClW6MbIOz9ybNgyeww7+H+rklnnkQmazss9o0vM+l6un7rrEH6KHIT1 LEMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=PdkgNhaJPRrRdkwIFpantMiXyAUBdqjpuNqmDmvsuyE=; b=tgRQx83aK8+Ew5SdZLFEav++hiVm2y58naw9JskjxfwQqjs0wwjIr78wsYA/gxlVBB bYW50CNgypQ0WgIkZhFohUigC24nEcjiE/61elO78oKxAOx7cReH5K0clP0vFxncvfte 34K2QMJ8MD4qRKlXV3rQ37JDOwtTzZtEl/khEA96co232w+5vgH2ke0Vigbfw/u8lzTB tV/Sy72z23h5nzg9WnRvtpL4F4qTxVKOy9unsBt5FxBcjiy5kZTZxVGSERlgBRmvjjMl hARWD2SCzli41N6wATNP+JVWhheM5/0Nl6r7JTXe+OdE3NnNvoLO1p5odE/sBsTiqy1x 7ZBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P5wjeinb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.29.167.233]) by smtp.gmail.com with ESMTPSA id i5-20020a1c5405000000b003ed246f76a2sm2605303wmb.1.2023.03.14.04.14.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 14 Mar 2023 04:14:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , "Michael S. Tsirkin" , Jason Wang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 2/4] hw/pci/msi: Ensure msi_init() is called before device is realized Date: Tue, 14 Mar 2023 12:14:33 +0100 Message-Id: <20230314111435.89796-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230314111435.89796-1-philmd@linaro.org> References: <20230314111435.89796-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org A PCI device can't magically become MSI-capable at runtime. Guests aren't expecting that. Assert MSI is initialized _before_ a device instance is realized. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci/msi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/pci/msi.c b/hw/pci/msi.c index 5de6df8154..dfa257cc22 100644 --- a/hw/pci/msi.c +++ b/hw/pci/msi.c @@ -182,6 +182,7 @@ bool msi_enabled(const PCIDevice *dev) * address. * If @msi_per_vector_mask, make the device support per-vector masking. * @errp is for returning errors. + * @dev must be unrealized. * Return 0 on success; set @errp and return -errno on error. * * -ENOTSUP means lacking msi support for a msi-capable platform. @@ -208,6 +209,7 @@ int msi_init(struct PCIDevice *dev, uint8_t offset, " 64bit %d mask %d\n", offset, nr_vectors, msi64bit, msi_per_vector_mask); + assert(!DEVICE(dev)->realized); assert(!(nr_vectors & (nr_vectors - 1))); /* power of 2 */ assert(nr_vectors > 0); assert(nr_vectors <= PCI_MSI_VECTORS_MAX); From patchwork Tue Mar 14 11:14:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 662990 Delivered-To: patch@linaro.org Received: by 2002:a5d:5602:0:0:0:0:0 with SMTP id l2csp994267wrv; Tue, 14 Mar 2023 04:15:37 -0700 (PDT) X-Google-Smtp-Source: AK7set8KHvCF29w3N1SS0W7tyGQlEuLymL0eVcK+jeFWjVgdFkIVpeNhUJo8LM5roOKlQlMQNxiU X-Received: by 2002:a05:622a:50:b0:3c0:3d68:540a with SMTP id y16-20020a05622a005000b003c03d68540amr24053046qtw.8.1678792537041; Tue, 14 Mar 2023 04:15:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678792537; cv=none; d=google.com; s=arc-20160816; b=zFDTDmMlCT68l4Pg1nuZGskw3Be3ixxGFE/JlSM7rU60BEaDbaSxmJM8ILfFlksUdJ dpb4NpLeQJivoGJNPCznESM6ZVh0x8D2AkEeh7MWh2vzejCi2EdfFjAirjunPjzkjIvE Nne+FSITHER9xWnvDrmr93QvuFhINPy81vDVzjsV0BO+UexGZYYZPZoOns1ImenonqSR 0KMncMJiRbrr7Z2NfWbsWvB0uA+l7aDdF6ss3ZdrmXMvyiKXDg5fclNhT+grHdK2PLzf iMXU3eVzgSTlCivL4c9PtthoTvB47/wBi3M7O8kJpzhK+4lVlOWy21YS6VkUA49Tyjka w5rw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=OAR+F6n4v/j09daumAcHV4U9McsXvObmKUx9h2b2hsI=; b=qJkEGPJoUcKB6zMUswYWMfmb3xJvhd/plz4xy1ksObmbNVLnwn9fuPbgEiMjf/1QPg TWtVJ6L63yAAoW3/3e1b0F043UICxCOfWjF91wgSL8NlwVe1KGbDT69usmJZ2WrBel+c 4Ab3vSoBQSTu8aSE23utVYTg0++6gOzlm9SACaKKVEUn0qoHaxIEBjmeEMzbMn8JWXjJ EQAl5nPnucj6m7qnDAFhJCM9FIrWPpUIA79P11MfK1izEq/E2g4UsmUCR3y4ijPPSLAb tTtbEQ/PLLvoSIWlwe7O9aFuvpMsRyyIq1VwzkM75E9AtFSwu+2pfMqI94OCJ1ibl0Q0 y9yA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xP+URl10; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.29.167.233]) by smtp.gmail.com with ESMTPSA id z4-20020a1c4c04000000b003eb395a8280sm2491151wmf.37.2023.03.14.04.14.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 14 Mar 2023 04:14:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , "Michael S. Tsirkin" , Jason Wang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 3/4] hw/pci: Add sanity check in pci_find_space() Date: Tue, 14 Mar 2023 12:14:34 +0100 Message-Id: <20230314111435.89796-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230314111435.89796-1-philmd@linaro.org> References: <20230314111435.89796-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This 'used' array is allocated via: pci_qdev_realize() -> do_pci_register_device() -> pci_config_alloc() In a perfect world where all device models are correctly QOM'ified this can't happen. Still it occured to me while refactoring QDev and it was not obvious to figure out. This assert helped, so keep it. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci/pci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index def5000e7b..ac41fcbf6a 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2185,6 +2185,7 @@ static uint8_t pci_find_space(PCIDevice *pdev, uint8_t size) { int offset = PCI_CONFIG_HEADER_SIZE; int i; + assert(pdev->used); for (i = PCI_CONFIG_HEADER_SIZE; i < PCI_CONFIG_SPACE_SIZE; ++i) { if (pdev->used[i]) offset = i + 1; From patchwork Tue Mar 14 11:14:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 662989 Delivered-To: patch@linaro.org Received: by 2002:a5d:5602:0:0:0:0:0 with SMTP id l2csp994215wrv; Tue, 14 Mar 2023 04:15:31 -0700 (PDT) X-Google-Smtp-Source: AK7set+9WFOzJCuAZWNasRCCj0vQaSKDVbXaU19flsAq86YTXe5AUhSTQEbzgD8jRnfVwZphlcAu X-Received: by 2002:a05:622a:34d:b0:3b8:6c8e:4f85 with SMTP id r13-20020a05622a034d00b003b86c8e4f85mr69805620qtw.43.1678792530962; Tue, 14 Mar 2023 04:15:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678792530; cv=none; d=google.com; s=arc-20160816; b=a8R8sbhkXSSjSKLYDXCvjJofBBBkPQ0JLjEfWpDNSNhU+gvFMTjaOwNHzlCrfTPujB 4dhMYHNaPNO4C9IBWeK6/itCSMH6EFHEhlRxZjRoGtyVZ+3GXo43iCcuXtLoN5ETuIZQ VpaAaf11RbwnN0TeMYPR2gqt0qscFVNhjJWH7skqin5opgkeyzUORmJWv2aTf1mn77kO 24PJmn4QCSkBj97inUvwm4iXLDpPJX5iQjnBQWmTbVGCffgZq866NX1p1jnUXIRYVe3H l1nGBeZ7OWjwiZRLrDEDQD/T0IRCpIsORwYpUGj7WtObr+nZi8nFzbIaDhTMgmTiigM8 Mwhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qfZpyN/6cn0lQTIIg8sb3mDy2U0N3ziNO6V5wkqMbpY=; b=UNnzcwWssro5px8iaYcgfUsuxRwdHvUpk7oHRm11tzzt0ZK5Ps4J98HzyKQGpQC7qy ++HnTZTF7Rq7GR/gJbh3Np15NvDsCbU3Uz1AbplwJNxU7iAi9/UueqiGFKARRMpNPHiv KBagNQWsQ9zVr/tsLJOpKnn+o7rR329KBXRUtOUf8AaPgrZ4G00Q5Blhn1ztBy/ztym9 WcPK+K1Sa5sJI5L2G8JzVspJCSFVdBepucJI/8X9VzdCt8mcbMGfWnr3Bc3d8b+W5yEb J7enfMQbBPKYyWNjON/gDvD13Sykb54hLzs8KzVFiG61LJcD5xZBubCh0Ws73n83iJNu zFqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vEMvkQFo; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.29.167.233]) by smtp.gmail.com with ESMTPSA id t18-20020a1c7712000000b003ed2987690dsm2450277wmi.26.2023.03.14.04.15.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 14 Mar 2023 04:15:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , "Michael S. Tsirkin" , Jason Wang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 4/4] hw/pci: Ensure pci_add_capability() is called before device is realized Date: Tue, 14 Mar 2023 12:14:35 +0100 Message-Id: <20230314111435.89796-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230314111435.89796-1-philmd@linaro.org> References: <20230314111435.89796-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org PCI capabilities can't appear magically at runtime. Guests aren't expecting that. Assert all capabilities are added _before_ a device instance is realized. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci/pci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index ac41fcbf6a..ed60b352e4 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2397,7 +2397,7 @@ static void pci_del_option_rom(PCIDevice *pdev) * On success, pci_add_capability() returns a positive value * that the offset of the pci capability. * On failure, it sets an error and returns a negative error - * code. + * code. @pdev must be unrealized. */ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t offset, uint8_t size, @@ -2406,6 +2406,8 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t *config; int i, overlapping_cap; + assert(!DEVICE(pdev)->realized); + if (!offset) { offset = pci_find_space(pdev, size); /* out of PCI config space is programming error */