From patchwork Wed Mar 8 16:55:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 660750 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54940C678D5 for ; Wed, 8 Mar 2023 20:19:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230200AbjCHUTI (ORCPT ); Wed, 8 Mar 2023 15:19:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38270 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230171AbjCHUTH (ORCPT ); Wed, 8 Mar 2023 15:19:07 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92CF36286E; Wed, 8 Mar 2023 12:19:06 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 328GtvkC017364; Wed, 8 Mar 2023 10:55:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678294557; bh=nEXDI2pP8NrRKO9ZRFc0Igp655a88nKLbVqk5OIrnVs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rEtoy58UESPPfcrT/8wanfDyNo0o+xU4dQvOuBH040BFoZIwI+MQIkv7DxW0WGGXL 2rwUneTQ+eVfnJM6AIbFtLmIsq1RdIlfemfRIK29Pjzhp9kVjBgaYz3gz5JKH5noyx UFOjUUsOq+bO4c1x0kxcqNCBAyo+CM68uVDq3f04= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 328GtvGs018199 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 8 Mar 2023 10:55:57 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 8 Mar 2023 10:55:57 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 8 Mar 2023 10:55:57 -0600 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 328Gtvaj014057; Wed, 8 Mar 2023 10:55:57 -0600 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v6 1/9] dt-bindings: mfd: Add TI-Nspire misc registers Date: Wed, 8 Mar 2023 10:55:48 -0600 Message-ID: <20230308165557.2242-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308165557.2242-1-afd@ti.com> References: <20230308165557.2242-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The TI Nspire devices contain a set of registers with a seemingly miscellaneous set of functionality. This area is known simply as the "misc" region. Signed-off-by: Andrew Davis Reviewed-by: Rob Herring --- .../bindings/mfd/ti,nspire-misc.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml diff --git a/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml b/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml new file mode 100644 index 000000000000..28cd5164d46f --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,nspire-misc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI Nspire MISC hardware block + +maintainers: + - Andrew Davis + +description: + System controller node represents a register region containing a set + of miscellaneous registers. The registers are not cohesive enough to + represent as any specific type of device. Currently there is a reset + controller. + +properties: + compatible: + items: + - enum: + - ti,nspire-misc + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + reboot: + $ref: /schemas/power/reset/syscon-reboot.yaml# + +required: + - compatible + - reg + - reboot + +additionalProperties: false + +examples: + - | + misc: misc@900a0000 { + compatible = "ti,nspire-misc", "syscon", "simple-mfd"; + reg = <0x900a0000 0x1000>; + + reboot { + compatible = "syscon-reboot"; + offset = <0x08>; + value = <0x02>; + }; + }; From patchwork Wed Mar 8 16:55:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 660757 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADC9FC6FD1E for ; Wed, 8 Mar 2023 16:59:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229544AbjCHQ7T (ORCPT ); Wed, 8 Mar 2023 11:59:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230018AbjCHQ66 (ORCPT ); Wed, 8 Mar 2023 11:58:58 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7BD15CC307; Wed, 8 Mar 2023 08:57:31 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 328Gtvdw017368; Wed, 8 Mar 2023 10:55:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678294557; bh=N8wZAUOz9p7nMkG96hQaSMPHIVuT06B8CLDSE+c1oFA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eCV6gMYJA4EPdDyOTdqzK/ZrPNEuz91e6pvz7ztkS0xYykh79Lgts5L9fUMyl58xt VAhp4lNTOrnsxQMEThema3qVeoYIu4A5nkKpbtGH2ZhXZ8OKEiF4gCo7rAiAQ1wOdn Mx+gKrFA/qEyE3kEJ+9fbyWrX4lSN1IsRnCBLGQQ= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 328Gtvfs018203 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 8 Mar 2023 10:55:57 -0600 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 8 Mar 2023 10:55:57 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 8 Mar 2023 10:55:57 -0600 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 328Gtvak014057; Wed, 8 Mar 2023 10:55:57 -0600 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v6 2/9] ARM: dts: nspire: Use syscon-reboot to handle restart Date: Wed, 8 Mar 2023 10:55:49 -0600 Message-ID: <20230308165557.2242-3-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308165557.2242-1-afd@ti.com> References: <20230308165557.2242-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Writing this bit can be handled by the syscon-reboot driver. Add this node to DT. Signed-off-by: Andrew Davis Reviewed-by: Linus Walleij Tested-by: Fabian Vogt Reviewed-by: Fabian Vogt --- arch/arm/boot/dts/nspire.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index bb240e6a3a6f..48fbc9d533c3 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -172,7 +172,14 @@ rtc: rtc@90090000 { }; misc: misc@900a0000 { + compatible = "ti,nspire-misc", "syscon", "simple-mfd"; reg = <0x900a0000 0x1000>; + + reboot { + compatible = "syscon-reboot"; + offset = <0x08>; + value = <0x02>; + }; }; pwr: pwr@900b0000 { From patchwork Wed Mar 8 16:55:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 660753 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C463C64EC4 for ; Wed, 8 Mar 2023 18:19:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229914AbjCHSTM (ORCPT ); Wed, 8 Mar 2023 13:19:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38160 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229558AbjCHSTL (ORCPT ); Wed, 8 Mar 2023 13:19:11 -0500 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E875B4801; Wed, 8 Mar 2023 10:19:10 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 328GtwPN018203; Wed, 8 Mar 2023 10:55:58 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678294558; bh=DrQHO08GzmuLn6kOKALeYvqXK5SaqhyLHlz/PyXfu0k=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=G36gNPfbJnauzeRx4KaBeCODNBk30Xrk3uXOlvgPTpnfZBmu5P3AGjjEO9domITEh Aul3Mrbq5OXj/dI3oP+Fwf0LOvhVzZHCSzXbVk5L9fTz8go4m2g85q+f4e/iCEh60H /BUQgTox7/LlCh7ODeeybSmBoMtZkeVU9LCW/Ugs= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 328GtwYY003910 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 8 Mar 2023 10:55:58 -0600 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 8 Mar 2023 10:55:57 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 8 Mar 2023 10:55:57 -0600 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 328Gtvam014057; Wed, 8 Mar 2023 10:55:57 -0600 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v6 4/9] ARM: dts: nspire: Fix sram node to conform with DT binding Date: Wed, 8 Mar 2023 10:55:51 -0600 Message-ID: <20230308165557.2242-5-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308165557.2242-1-afd@ti.com> References: <20230308165557.2242-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This node does not follow the DT binding schema, correct this. Should result in no functional change. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index cb7237051512..f979b28e2576 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -26,8 +26,15 @@ bootrom: bootrom@0 { }; sram: sram@a4000000 { - device = "memory"; - reg = <0xa4000000 0x20000>; + compatible = "mmio-sram"; + reg = <0xa4000000 0x20000>; /* 128k */ + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xa4000000 0x20000>; + + sram@0 { + reg = <0x0 0x20000>; + }; }; timer_clk: timer_clk { From patchwork Wed Mar 8 16:55:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 660755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C55EC64EC4 for ; Wed, 8 Mar 2023 17:08:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229480AbjCHRIQ (ORCPT ); Wed, 8 Mar 2023 12:08:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229477AbjCHRIP (ORCPT ); Wed, 8 Mar 2023 12:08:15 -0500 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 466FC3757C; Wed, 8 Mar 2023 09:08:14 -0800 (PST) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 328Gtwbw086690; Wed, 8 Mar 2023 10:55:58 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678294558; bh=KkxnDIKZAd5mEV1kw4/83Nnm/NWKIJkuOO6nsAciL/Q=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yDk6RTSEl5uxlw0RHLO2xZVbjE2ci9N9aX7Q8JKiSZf+BTPRXDntjktIz1ZVmjhNr DiOBzVU5hUt9LnW2CdsBr/iw+hlCuv0Vmi5UUorO2vfLTXjgDH8g2zQvbKPsH7eL+h gg4kl/yxh4xzh+y3CfGQetqD8yUfOR3bxs9OFcHQ= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 328GtwD0126410 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 8 Mar 2023 10:55:58 -0600 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 8 Mar 2023 10:55:57 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 8 Mar 2023 10:55:58 -0600 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 328Gtvan014057; Wed, 8 Mar 2023 10:55:57 -0600 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v6 5/9] ARM: dts: nspire: Fix vbus_reg node to conform with DT binding Date: Wed, 8 Mar 2023 10:55:52 -0600 Message-ID: <20230308165557.2242-6-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308165557.2242-1-afd@ti.com> References: <20230308165557.2242-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This node does not follow the DT binding schema, correct this. All "regulator-fixed" are voltage type, so drop "regulator-type". Should result in no functional change. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index f979b28e2576..9587e1ebeb93 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -71,7 +71,6 @@ vbus_reg: vbus_reg { compatible = "regulator-fixed"; regulator-name = "USB VBUS output"; - regulator-type = "voltage"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; From patchwork Wed Mar 8 16:55:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 660756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16C1CC64EC4 for ; Wed, 8 Mar 2023 16:59:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229480AbjCHQ7h (ORCPT ); Wed, 8 Mar 2023 11:59:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229981AbjCHQ7H (ORCPT ); Wed, 8 Mar 2023 11:59:07 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B45EACC31A; Wed, 8 Mar 2023 08:57:50 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 328GtwgF017376; Wed, 8 Mar 2023 10:55:58 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678294558; bh=0c4Yf1D4ezENq+KkbcWU0ygzzyav+VN/gibqactG3eA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NNr10ca+V13H5A+IkIQwbllv870HtEwljzkTmeLc30rcDHOX0loHgkYKRce25oHgS 49oWjKM2THXOSz0DNWwqCplvUOBkv/VMvC60vVftRrKl4iP+3ZfWtyMhuAAG4EMGbo W9MAFF/a0p7egOC4UHAIMir+oGC+92lXzXGosqeA= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 328GtwpJ003921 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 8 Mar 2023 10:55:58 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 8 Mar 2023 10:55:58 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 8 Mar 2023 10:55:58 -0600 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 328Gtvap014057; Wed, 8 Mar 2023 10:55:58 -0600 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v6 7/9] ARM: dts: nspire: Use MATRIX_KEY macro for linux,keymap Date: Wed, 8 Mar 2023 10:55:54 -0600 Message-ID: <20230308165557.2242-8-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230308165557.2242-1-afd@ti.com> References: <20230308165557.2242-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This looks better and allows us to see the row and column numbers more easily. Switch to this macro here. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire-clp.dts | 90 ++++++++++++++++++++++++-------- arch/arm/boot/dts/nspire-cx.dts | 90 ++++++++++++++++++++++++-------- arch/arm/boot/dts/nspire-tp.dts | 90 ++++++++++++++++++++++++-------- 3 files changed, 204 insertions(+), 66 deletions(-) diff --git a/arch/arm/boot/dts/nspire-clp.dts b/arch/arm/boot/dts/nspire-clp.dts index f52f38c61588..916ede0c2499 100644 --- a/arch/arm/boot/dts/nspire-clp.dts +++ b/arch/arm/boot/dts/nspire-clp.dts @@ -6,32 +6,78 @@ */ /dts-v1/; +#include + /include/ "nspire-classic.dtsi" &keypad { linux,keymap = < - 0x0000001c 0x0001001c 0x00020039 - 0x0004002c 0x00050034 0x00060015 - 0x0007000b 0x0008002d 0x01000033 - 0x0101004e 0x01020011 0x01030004 - 0x0104002f 0x01050003 0x01060016 - 0x01070002 0x01080014 0x02000062 - 0x0201000c 0x0202001f 0x02030007 - 0x02040013 0x02050006 0x02060010 - 0x02070005 0x02080019 0x03000027 - 0x03010037 0x03020018 0x0303000a - 0x03040031 0x03050009 0x03060032 - 0x03070008 0x03080026 0x04000028 - 0x04010035 0x04020025 0x04040024 - 0x04060017 0x04080023 0x05000028 - 0x05020022 0x0503001b 0x05040021 - 0x0505001a 0x05060012 0x0507006f - 0x05080020 0x0509002a 0x0601001c - 0x0602002e 0x06030068 0x06040030 - 0x0605006d 0x0606001e 0x06070001 - 0x0608002b 0x0609000f 0x07000067 - 0x0702006a 0x0704006c 0x07060069 - 0x0707000e 0x0708001d 0x070a000d + MATRIX_KEY(0, 0, 0x1c) + MATRIX_KEY(0, 1, 0x1c) + MATRIX_KEY(0, 2, 0x39) + MATRIX_KEY(0, 4, 0x2c) + MATRIX_KEY(0, 5, 0x34) + MATRIX_KEY(0, 6, 0x15) + MATRIX_KEY(0, 7, 0x0b) + MATRIX_KEY(0, 8, 0x2d) + MATRIX_KEY(1, 0, 0x33) + MATRIX_KEY(1, 1, 0x4e) + MATRIX_KEY(1, 2, 0x11) + MATRIX_KEY(1, 3, 0x04) + MATRIX_KEY(1, 4, 0x2f) + MATRIX_KEY(1, 5, 0x03) + MATRIX_KEY(1, 6, 0x16) + MATRIX_KEY(1, 7, 0x02) + MATRIX_KEY(1, 8, 0x14) + MATRIX_KEY(2, 0, 0x62) + MATRIX_KEY(2, 1, 0x0c) + MATRIX_KEY(2, 2, 0x1f) + MATRIX_KEY(2, 3, 0x07) + MATRIX_KEY(2, 4, 0x13) + MATRIX_KEY(2, 5, 0x06) + MATRIX_KEY(2, 6, 0x10) + MATRIX_KEY(2, 7, 0x05) + MATRIX_KEY(2, 8, 0x19) + MATRIX_KEY(3, 0, 0x27) + MATRIX_KEY(3, 1, 0x37) + MATRIX_KEY(3, 2, 0x18) + MATRIX_KEY(3, 3, 0x0a) + MATRIX_KEY(3, 4, 0x31) + MATRIX_KEY(3, 5, 0x09) + MATRIX_KEY(3, 6, 0x32) + MATRIX_KEY(3, 7, 0x08) + MATRIX_KEY(3, 8, 0x26) + MATRIX_KEY(4, 0, 0x28) + MATRIX_KEY(4, 1, 0x35) + MATRIX_KEY(4, 2, 0x25) + MATRIX_KEY(4, 4, 0x24) + MATRIX_KEY(4, 6, 0x17) + MATRIX_KEY(4, 8, 0x23) + MATRIX_KEY(5, 0, 0x28) + MATRIX_KEY(5, 2, 0x22) + MATRIX_KEY(5, 3, 0x1b) + MATRIX_KEY(5, 4, 0x21) + MATRIX_KEY(5, 5, 0x1a) + MATRIX_KEY(5, 6, 0x12) + MATRIX_KEY(5, 7, 0x6f) + MATRIX_KEY(5, 8, 0x20) + MATRIX_KEY(5, 9, 0x2a) + MATRIX_KEY(6, 1, 0x1c) + MATRIX_KEY(6, 2, 0x2e) + MATRIX_KEY(6, 3, 0x68) + MATRIX_KEY(6, 4, 0x30) + MATRIX_KEY(6, 5, 0x6d) + MATRIX_KEY(6, 6, 0x1e) + MATRIX_KEY(6, 7, 0x01) + MATRIX_KEY(6, 8, 0x2b) + MATRIX_KEY(6, 9, 0x0f) + MATRIX_KEY(7, 0, 0x67) + MATRIX_KEY(7, 2, 0x6a) + MATRIX_KEY(7, 4, 0x6c) + MATRIX_KEY(7, 6, 0x69) + MATRIX_KEY(7, 7, 0x0e) + MATRIX_KEY(7, 8, 0x1d) + MATRIX_KEY(7, 10, 0x0d) >; }; diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts index 837dbdd9af55..96c48fc52203 100644 --- a/arch/arm/boot/dts/nspire-cx.dts +++ b/arch/arm/boot/dts/nspire-cx.dts @@ -6,6 +6,8 @@ */ /dts-v1/; +#include + /include/ "nspire.dtsi" &lcd { @@ -45,28 +47,72 @@ &ahb_clk { &keypad { linux,keymap = < - 0x0000001c 0x0001001c 0x00040039 - 0x0005002c 0x00060015 0x0007000b - 0x0008000f 0x0100002d 0x01010011 - 0x0102002f 0x01030004 0x01040016 - 0x01050014 0x0106001f 0x01070002 - 0x010a006a 0x02000013 0x02010010 - 0x02020019 0x02030007 0x02040018 - 0x02050031 0x02060032 0x02070005 - 0x02080028 0x0209006c 0x03000026 - 0x03010025 0x03020024 0x0303000a - 0x03040017 0x03050023 0x03060022 - 0x03070008 0x03080035 0x03090069 - 0x04000021 0x04010012 0x04020020 - 0x0404002e 0x04050030 0x0406001e - 0x0407000d 0x04080037 0x04090067 - 0x05010038 0x0502000c 0x0503001b - 0x05040034 0x0505001a 0x05060006 - 0x05080027 0x0509000e 0x050a006f - 0x0600002b 0x0602004e 0x06030068 - 0x06040003 0x0605006d 0x06060009 - 0x06070001 0x0609000f 0x0708002a - 0x0709001d 0x070a0033 >; + MATRIX_KEY(0, 0, 0x1c) + MATRIX_KEY(0, 1, 0x1c) + MATRIX_KEY(0, 4, 0x39) + MATRIX_KEY(0, 5, 0x2c) + MATRIX_KEY(0, 6, 0x15) + MATRIX_KEY(0, 7, 0x0b) + MATRIX_KEY(0, 8, 0x0f) + MATRIX_KEY(1, 0, 0x2d) + MATRIX_KEY(1, 1, 0x11) + MATRIX_KEY(1, 2, 0x2f) + MATRIX_KEY(1, 3, 0x04) + MATRIX_KEY(1, 4, 0x16) + MATRIX_KEY(1, 5, 0x14) + MATRIX_KEY(1, 6, 0x1f) + MATRIX_KEY(1, 7, 0x02) + MATRIX_KEY(1, 10, 0x6a) + MATRIX_KEY(2, 0, 0x13) + MATRIX_KEY(2, 1, 0x10) + MATRIX_KEY(2, 2, 0x19) + MATRIX_KEY(2, 3, 0x07) + MATRIX_KEY(2, 4, 0x18) + MATRIX_KEY(2, 5, 0x31) + MATRIX_KEY(2, 6, 0x32) + MATRIX_KEY(2, 7, 0x05) + MATRIX_KEY(2, 8, 0x28) + MATRIX_KEY(2, 9, 0x6c) + MATRIX_KEY(3, 0, 0x26) + MATRIX_KEY(3, 1, 0x25) + MATRIX_KEY(3, 2, 0x24) + MATRIX_KEY(3, 3, 0x0a) + MATRIX_KEY(3, 4, 0x17) + MATRIX_KEY(3, 5, 0x23) + MATRIX_KEY(3, 6, 0x22) + MATRIX_KEY(3, 7, 0x08) + MATRIX_KEY(3, 8, 0x35) + MATRIX_KEY(3, 9, 0x69) + MATRIX_KEY(4, 0, 0x21) + MATRIX_KEY(4, 1, 0x12) + MATRIX_KEY(4, 2, 0x20) + MATRIX_KEY(4, 4, 0x2e) + MATRIX_KEY(4, 5, 0x30) + MATRIX_KEY(4, 6, 0x1e) + MATRIX_KEY(4, 7, 0x0d) + MATRIX_KEY(4, 8, 0x37) + MATRIX_KEY(4, 9, 0x67) + MATRIX_KEY(5, 1, 0x38) + MATRIX_KEY(5, 2, 0x0c) + MATRIX_KEY(5, 3, 0x1b) + MATRIX_KEY(5, 4, 0x34) + MATRIX_KEY(5, 5, 0x1a) + MATRIX_KEY(5, 6, 0x06) + MATRIX_KEY(5, 8, 0x27) + MATRIX_KEY(5, 9, 0x0e) + MATRIX_KEY(5, 10, 0x6f) + MATRIX_KEY(6, 0, 0x2b) + MATRIX_KEY(6, 2, 0x4e) + MATRIX_KEY(6, 3, 0x68) + MATRIX_KEY(6, 4, 0x03) + MATRIX_KEY(6, 5, 0x6d) + MATRIX_KEY(6, 6, 0x09) + MATRIX_KEY(6, 7, 0x01) + MATRIX_KEY(6, 9, 0x0f) + MATRIX_KEY(7, 8, 0x2a) + MATRIX_KEY(7, 9, 0x1d) + MATRIX_KEY(7, 10, 0x33) + >; }; &vbus_reg { diff --git a/arch/arm/boot/dts/nspire-tp.dts b/arch/arm/boot/dts/nspire-tp.dts index f7d0faacd4cc..235cd4264da7 100644 --- a/arch/arm/boot/dts/nspire-tp.dts +++ b/arch/arm/boot/dts/nspire-tp.dts @@ -6,32 +6,78 @@ */ /dts-v1/; +#include + /include/ "nspire-classic.dtsi" &keypad { linux,keymap = < - 0x0000001c 0x0001001c 0x00040039 - 0x0005002c 0x00060015 0x0007000b - 0x0008000f 0x0100002d 0x01010011 - 0x0102002f 0x01030004 0x01040016 - 0x01050014 0x0106001f 0x01070002 - 0x010a006a 0x02000013 0x02010010 - 0x02020019 0x02030007 0x02040018 - 0x02050031 0x02060032 0x02070005 - 0x02080028 0x0209006c 0x03000026 - 0x03010025 0x03020024 0x0303000a - 0x03040017 0x03050023 0x03060022 - 0x03070008 0x03080035 0x03090069 - 0x04000021 0x04010012 0x04020020 - 0x0404002e 0x04050030 0x0406001e - 0x0407000d 0x04080037 0x04090067 - 0x05010038 0x0502000c 0x0503001b - 0x05040034 0x0505001a 0x05060006 - 0x05080027 0x0509000e 0x050a006f - 0x0600002b 0x0602004e 0x06030068 - 0x06040003 0x0605006d 0x06060009 - 0x06070001 0x0609000f 0x0708002a - 0x0709001d 0x070a0033 >; + MATRIX_KEY(0, 0, 0x1c) + MATRIX_KEY(0, 1, 0x1c) + MATRIX_KEY(0, 4, 0x39) + MATRIX_KEY(0, 5, 0x2c) + MATRIX_KEY(0, 6, 0x15) + MATRIX_KEY(0, 7, 0x0b) + MATRIX_KEY(0, 8, 0x0f) + MATRIX_KEY(1, 0, 0x2d) + MATRIX_KEY(1, 1, 0x11) + MATRIX_KEY(1, 2, 0x2f) + MATRIX_KEY(1, 3, 0x04) + MATRIX_KEY(1, 4, 0x16) + MATRIX_KEY(1, 5, 0x14) + MATRIX_KEY(1, 6, 0x1f) + MATRIX_KEY(1, 7, 0x02) + MATRIX_KEY(1, 10, 0x6a) + MATRIX_KEY(2, 0, 0x13) + MATRIX_KEY(2, 1, 0x10) + MATRIX_KEY(2, 2, 0x19) + MATRIX_KEY(2, 3, 0x07) + MATRIX_KEY(2, 4, 0x18) + MATRIX_KEY(2, 5, 0x31) + MATRIX_KEY(2, 6, 0x32) + MATRIX_KEY(2, 7, 0x05) + MATRIX_KEY(2, 8, 0x28) + MATRIX_KEY(2, 9, 0x6c) + MATRIX_KEY(3, 0, 0x26) + MATRIX_KEY(3, 1, 0x25) + MATRIX_KEY(3, 2, 0x24) + MATRIX_KEY(3, 3, 0x0a) + MATRIX_KEY(3, 4, 0x17) + MATRIX_KEY(3, 5, 0x23) + MATRIX_KEY(3, 6, 0x22) + MATRIX_KEY(3, 7, 0x08) + MATRIX_KEY(3, 8, 0x35) + MATRIX_KEY(3, 9, 0x69) + MATRIX_KEY(4, 0, 0x21) + MATRIX_KEY(4, 1, 0x12) + MATRIX_KEY(4, 2, 0x20) + MATRIX_KEY(4, 4, 0x2e) + MATRIX_KEY(4, 5, 0x30) + MATRIX_KEY(4, 6, 0x1e) + MATRIX_KEY(4, 7, 0x0d) + MATRIX_KEY(4, 8, 0x37) + MATRIX_KEY(4, 9, 0x67) + MATRIX_KEY(5, 1, 0x38) + MATRIX_KEY(5, 2, 0x0c) + MATRIX_KEY(5, 3, 0x1b) + MATRIX_KEY(5, 4, 0x34) + MATRIX_KEY(5, 5, 0x1a) + MATRIX_KEY(5, 6, 0x06) + MATRIX_KEY(5, 8, 0x27) + MATRIX_KEY(5, 9, 0x0e) + MATRIX_KEY(5, 10, 0x6f) + MATRIX_KEY(6, 0, 0x2b) + MATRIX_KEY(6, 2, 0x4e) + MATRIX_KEY(6, 3, 0x68) + MATRIX_KEY(6, 4, 0x03) + MATRIX_KEY(6, 5, 0x6d) + MATRIX_KEY(6, 6, 0x09) + MATRIX_KEY(6, 7, 0x01) + MATRIX_KEY(6, 9, 0x0f) + MATRIX_KEY(7, 8, 0x2a) + MATRIX_KEY(7, 9, 0x1d) + MATRIX_KEY(7, 10, 0x33) + >; }; / {