From patchwork Fri Mar 3 14:51:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658682 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40D4EC7EE37 for ; Fri, 3 Mar 2023 14:52:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229968AbjCCOwd (ORCPT ); Fri, 3 Mar 2023 09:52:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230432AbjCCOw1 (ORCPT ); Fri, 3 Mar 2023 09:52:27 -0500 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 077031ADF8 for ; Fri, 3 Mar 2023 06:52:26 -0800 (PST) Received: by mail-pl1-x62e.google.com with SMTP id i10so2875932plr.9 for ; Fri, 03 Mar 2023 06:52:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=75obg6WaKxGAouYp8L8vU99A5I1ZieLyIbshRx9ot/0=; b=nwx3nUHwxYB+MWEpPux9HLvk8V4noZ7L+o+7LujBV5Kj/aMUzpWTVRIoXDVdVIatL8 PxKHmTzFqu8hHKTC1Y9yr6DnGMfO/UldXSuEx6m7RuJioml+wq0PoBBNuEvEzipmdG01 y0qaUqzqQ1tzuVji8CliTx1YYQnKk2zjXQlhU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=75obg6WaKxGAouYp8L8vU99A5I1ZieLyIbshRx9ot/0=; b=7xkWXDmjsekdPcQqQ/ffy/5EOQrcsSh9EA+MlQAlpkiW+cyGRVByFoghX9a4P575hy eJijSAY9YaQXhhTXvjJm98fLrG2oRqI2QebIXZbQboRwHXuNAaso71Yy8EAY2XbV/0eg TIGT76J48kUUJwDqeij+F5rMTBAbFGGW0bxNkddelc67qdGRBKAm4gmCTgYwuq4lSCKI shSsQcmRjT2axMJd4NuCKjTG+vI760OlqdmYd8CYdU1r1o9/WS5fO65qJiTDoiee6Z/s 12KH6YiR/fqz2eP99vKxbS2MKOu6XmefApufa9ew9AnFKLoiK8RGw+Zsu4UN7A5DGQah tWXg== X-Gm-Message-State: AO0yUKVhtGv/IaLi0XkC/QUOzjm14XwguK8OWWlTW+vFWkQ3Kc+3iWKc pFUCOnquP+FR75iTlYR33tz1Qg== X-Google-Smtp-Source: AK7set9ddne/co5GxlXg9Z5y/8Uyd9N9Zo8lSmWtNpR1RY239kYYX6ZIxpoVDg7hxSfEjK9DP+o/yw== X-Received: by 2002:a05:6a20:5487:b0:c6:d37c:2a62 with SMTP id i7-20020a056a20548700b000c6d37c2a62mr2981782pzk.11.1677855145441; Fri, 03 Mar 2023 06:52:25 -0800 (PST) Received: from localhost.localdomain ([183.83.137.89]) by smtp.gmail.com with ESMTPSA id z4-20020a63e544000000b00502fd70b0bdsm1660856pgj.52.2023.03.03.06.52.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 06:52:24 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Cc: Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-amarula , Jagan Teki Subject: [PATCH v15 02/16] drm: exynos: dsi: Lookup OF-graph or Child node devices Date: Fri, 3 Mar 2023 20:21:24 +0530 Message-Id: <20230303145138.29233-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303145138.29233-1-jagan@amarulasolutions.com> References: <20230303145138.29233-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org In general, for MIPI DSI there are three ways to represent the pipeline for an upstream bridge to find the connected downstream panel or bridge. 1. Child panel or bridge as a conventional device tree child node. 2. Child panel or bridge as an OF-graph port node. 3. Child panel or bridge as an OF-graph ports node. There are three different downstream panels or bridges that are possible to connect an upstream DSI host bridge - DSI Panel, DSI Bridge, and I2C-Configured DSI bridge. An example of the downstream panel represented as a child node, &dsi { compatible = "samsung,exynos5433-mipi-dsi"; ports { port@0 { reg = <0>; dsi_to_mic: endpoint { remote-endpoint = <&mic_to_dsi>; }; }; }; panel@0 { reg = <0>; }; }; An example of the downstream bridge represented as a port node, &i2c4 { bridge@2c { compatible = "ti,sn65dsi84"; ports { port@0 { reg = <0>; bridge_in_dsi: endpoint { remote-endpoint = <&dsi_out_bridge>; data-lanes = <1 2>; }; }; port@2 { reg = <2>; bridge_out_panel: endpoint { remote-endpoint = <&panel_out_bridge>; }; }; }; }; }; &dsi { compatible = "fsl,imx8mm-mipi-dsim"; port { dsi_in_lcdif: endpoint@0 { reg = <0>; remote-endpoint = <&lcdif_out_dsi>; }; dsi_out_bridge: endpoint@1 { reg = <1>; remote-endpoint = <&bridge_in_dsi>; }; }; }; An example of the downstream bridge represented as a ports node, &dsi { compatible = "fsl,imx8mm-mipi-dsim"; ports { port@0 { reg = <0>; dsi_in_lcdif: endpoint@0 { reg = <0>; remote-endpoint = <&lcdif_out_dsi>; }; }; port@1 { reg = <1>; dsi_out_bridge: endpoint { remote-endpoint = <&bridge_in_dsi>; }; }; }; In, summary it is possible to represent all three downstream slaves devices using OF-graph port or ports node however only DSI Panel and DSI Bridge are possible but not possible to represent I2C-Configured DSI bridge child nodes since I2C-Configure bridges are child of I2C node, not upstream DSI host bridge and it is must represent them endpoint port linking. This indeed means, the OF-graph port or ports representation is mandatory for I2C-Configured DSI bridges. This patch tries to add an OF-graph port or ports representation detection code on top of existing child node detection. It is possible to replace the entire detection code using existing drm_of helper drm_of_find_panel_or_bridge but it will break the Exynos DSI since the pipeline doesn't support OF-graph port or ports node. Overall, this patch has a combination of child and OF-graph pipeline detections in order to support the backward compatibility of Exynos DSI child node and i.MX8M Mini/Nano/Plus OF-graph port or ports node pipelines. This is the first common DSI host bridge driver that needs to support all possible downstream connection pipeline combinations. Signed-off-by: Jagan Teki --- Changes for v15: - droped from drm_of - added in exynos dsi - updated commit messages Changes for v13, v12: - none Changes for v11: - drop extra line Changes for v10: - new patch drivers/gpu/drm/exynos/exynos_drm_dsi.c | 38 +++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index df15501b1075..f44a5a702ad5 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1470,18 +1470,52 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, struct device *dev = dsi->dev; struct drm_encoder *encoder = &dsi->encoder; struct drm_device *drm = encoder->dev; + struct device_node *np = dev->of_node; + struct device_node *remote; struct drm_panel *panel; int ret; - panel = of_drm_find_panel(device->dev.of_node); + /** + * Devices can also be child nodes when we also control that device + * through the upstream device (ie, MIPI-DCS for a MIPI-DSI device). + * + * Lookup for a child node of the given parent that isn't either port + * or ports. + */ + for_each_available_child_of_node(np, remote) { + if (of_node_name_eq(remote, "port") || + of_node_name_eq(remote, "ports")) + continue; + + goto of_find_panel_or_bridge; + } + + /* + * of_graph_get_remote_node() produces a noisy error message if port + * node isn't found and the absence of the port is a legit case here, + * so at first we silently check whether graph presents in the + * device-tree node. + */ + if (!of_graph_is_present(np)) + return -ENODEV; + + remote = of_graph_get_remote_node(np, 1, 0); + +of_find_panel_or_bridge: + if (!remote) + return -ENODEV; + + panel = of_drm_find_panel(remote); if (!IS_ERR(panel)) { dsi->out_bridge = devm_drm_panel_bridge_add(dev, panel); } else { - dsi->out_bridge = of_drm_find_bridge(device->dev.of_node); + dsi->out_bridge = of_drm_find_bridge(remote); if (!dsi->out_bridge) dsi->out_bridge = ERR_PTR(-EINVAL); } + of_node_put(remote); + if (IS_ERR(dsi->out_bridge)) { ret = PTR_ERR(dsi->out_bridge); DRM_DEV_ERROR(dev, "failed to find the bridge: %d\n", ret); From patchwork Fri Mar 3 14:51:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658681 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D209FC7EE39 for ; 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Fri, 03 Mar 2023 06:52:30 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Cc: Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-amarula , Jagan Teki Subject: [PATCH v15 03/16] drm: exynos: dsi: Mark PHY as optional Date: Fri, 3 Mar 2023 20:21:25 +0530 Message-Id: <20230303145138.29233-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303145138.29233-1-jagan@amarulasolutions.com> References: <20230303145138.29233-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The same Samsung MIPI DSIM master can also be used in NXP's i.MX8M Mini/Nano/Plus SoC. In i.MX8M Mini/Nano/Plus SoC the DSI Phy requires a MIPI DPHY bit to reset in order to activate the PHY and that can be done via upstream i.MX8M blk-ctrl driver. So, mark the phy get as optional. Reviewed-by: Frieder Schrempf Reviewed-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v15, v13, v12: - none Changes for v11: - collect Frieder RB Changes for v10: - add Plus in commit message - collect Marek RB Changes for v9, v8, v7, v6, v5, v4, v3, v2: - none Changes for v1: - new patch drivers/gpu/drm/exynos/exynos_drm_dsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index f44a5a702ad5..af16af404e87 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1732,7 +1732,7 @@ static int exynos_dsi_probe(struct platform_device *pdev) if (IS_ERR(dsi->reg_base)) return PTR_ERR(dsi->reg_base); - dsi->phy = devm_phy_get(dev, "dsim"); + dsi->phy = devm_phy_optional_get(dev, "dsim"); if (IS_ERR(dsi->phy)) { dev_info(dev, "failed to get dsim phy\n"); return PTR_ERR(dsi->phy); From patchwork Fri Mar 3 14:51:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D142C64EC4 for ; Fri, 3 Mar 2023 14:53:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229586AbjCCOxG (ORCPT ); Fri, 3 Mar 2023 09:53:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229997AbjCCOwn (ORCPT ); Fri, 3 Mar 2023 09:52:43 -0500 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB8AE1ADF8 for ; Fri, 3 Mar 2023 06:52:41 -0800 (PST) Received: by mail-pl1-x62e.google.com with SMTP id n6so2907983plf.5 for ; Fri, 03 Mar 2023 06:52:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8ZuKEGIK8u3BOHalvqGIm9UnoS+t9+HMUkXfXB/tUbc=; b=FhHtWBPoTziy4721t48tzL+hQ4Sh8wu03HDTlgLUT8m+yTRIoXLYsm6zZY2WB0MBgW v4k3Ll0E+feL6F8miBK4Rfjok+/RKJTnE8MwnXDLazYKUPupv12HanZllQTfc3wKtl9q AHtaiZFBB9aHszdxV5H/mUtLy40aEmcKdfl84= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8ZuKEGIK8u3BOHalvqGIm9UnoS+t9+HMUkXfXB/tUbc=; b=I8n99FRUqKq5j9KuLVaEZsviQZ7/kq6auIhmdoOxknpz4qcFEllq0Hj/Dk354wzS8d cTLi3Vg6MOjJcwduDXJJs5IQf83zY5uuApTZIlcXFwdBwuFq5AHog7nQinmKpPthGyG/ IRHaWUd4DxHIuzONVHj9SNI7+OMMK+1G23BZOUhc8Cjy2R+yPq9+qVEWY44/lZWEDXAy 34/0nS6Ai4fsIUCM0N9HmYTXWpALldlu8AkQ3ltvnH4f3mdVPs6m48Fg0s4Nr1cqlBl6 KOe+XmD/yOyZ1T3UmgbErKnF6DymXeh+7yIUUrjc/wR+tMO3XFbucSz/iah8s8Lp1MmB fCyg== X-Gm-Message-State: AO0yUKW6Or9tpuFEdp/MoHQeDQgTJwUrPzKt3C8/w93GkEYHfI2tIHCg LOXt5kLZyyAR02+WlPSGDjzs4w== X-Google-Smtp-Source: AK7set+RkFNAeEsapWV/uGUrS3UaYYa/Jw3DvCQ8EYwhaRzG8qbHfkhRA+pZE4T4XYfXomc8YzqIvA== X-Received: by 2002:a05:6a20:a8a6:b0:cc:8ac6:90ca with SMTP id ca38-20020a056a20a8a600b000cc8ac690camr2228469pzb.27.1677855161400; Fri, 03 Mar 2023 06:52:41 -0800 (PST) Received: from localhost.localdomain ([183.83.137.89]) by smtp.gmail.com with ESMTPSA id z4-20020a63e544000000b00502fd70b0bdsm1660856pgj.52.2023.03.03.06.52.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 06:52:40 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Cc: Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-amarula , Jagan Teki Subject: [PATCH v15 05/16] drm: exynos: dsi: Introduce hw_type platform data Date: Fri, 3 Mar 2023 20:21:27 +0530 Message-Id: <20230303145138.29233-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303145138.29233-1-jagan@amarulasolutions.com> References: <20230303145138.29233-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Samsung MIPI DSIM controller is common DSI IP that can be used in various SoCs like Exynos, i.MX8M Mini/Nano/Plus. Add hw_type enum via platform_data so that accessing the different controller data between various platforms becomes easy and meaningful. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Suggested-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v15, v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder - drop extra line Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" - update enum type names drivers/gpu/drm/exynos/exynos_drm_dsi.c | 83 ++++++++++++++++++++----- 1 file changed, 68 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 603fed107fd1..64cf69995750 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -254,6 +254,15 @@ struct exynos_dsi_transfer { #define DSIM_STATE_CMD_LPM BIT(2) #define DSIM_STATE_VIDOUT_AVAILABLE BIT(3) +enum exynos_dsi_type { + DSIM_TYPE_EXYNOS3250, + DSIM_TYPE_EXYNOS4210, + DSIM_TYPE_EXYNOS5410, + DSIM_TYPE_EXYNOS5422, + DSIM_TYPE_EXYNOS5433, + DSIM_TYPE_COUNT, +}; + struct exynos_dsi_driver_data { const unsigned int *reg_ofs; unsigned int plltmr_reg; @@ -267,6 +276,10 @@ struct exynos_dsi_driver_data { const unsigned int *reg_values; }; +struct exynos_dsi_plat_data { + enum exynos_dsi_type hw_type; +}; + struct exynos_dsi { struct drm_encoder encoder; struct mipi_dsi_host dsi_host; @@ -297,6 +310,7 @@ struct exynos_dsi { struct list_head transfer_list; const struct exynos_dsi_driver_data *driver_data; + const struct exynos_dsi_plat_data *plat_data; }; #define host_to_dsi(host) container_of(host, struct exynos_dsi, dsi_host) @@ -524,18 +538,13 @@ static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { .reg_values = exynos5422_reg_values, }; -static const struct of_device_id exynos_dsi_of_match[] = { - { .compatible = "samsung,exynos3250-mipi-dsi", - .data = &exynos3_dsi_driver_data }, - { .compatible = "samsung,exynos4210-mipi-dsi", - .data = &exynos4_dsi_driver_data }, - { .compatible = "samsung,exynos5410-mipi-dsi", - .data = &exynos5_dsi_driver_data }, - { .compatible = "samsung,exynos5422-mipi-dsi", - .data = &exynos5422_dsi_driver_data }, - { .compatible = "samsung,exynos5433-mipi-dsi", - .data = &exynos5433_dsi_driver_data }, - { } +static const struct exynos_dsi_driver_data * +exynos_dsi_types[DSIM_TYPE_COUNT] = { + [DSIM_TYPE_EXYNOS3250] = &exynos3_dsi_driver_data, + [DSIM_TYPE_EXYNOS4210] = &exynos4_dsi_driver_data, + [DSIM_TYPE_EXYNOS5410] = &exynos5_dsi_driver_data, + [DSIM_TYPE_EXYNOS5422] = &exynos5422_dsi_driver_data, + [DSIM_TYPE_EXYNOS5433] = &exynos5433_dsi_driver_data, }; static void exynos_dsi_wait_for_reset(struct exynos_dsi *dsi) @@ -1468,8 +1477,6 @@ static const struct drm_bridge_funcs exynos_dsi_bridge_funcs = { .attach = exynos_dsi_attach, }; -MODULE_DEVICE_TABLE(of, exynos_dsi_of_match); - static int exynos_dsi_host_attach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { @@ -1704,7 +1711,8 @@ static int exynos_dsi_probe(struct platform_device *pdev) dsi->dsi_host.dev = dev; dsi->dev = dev; - dsi->driver_data = of_device_get_match_data(dev); + dsi->plat_data = of_device_get_match_data(dev); + dsi->driver_data = exynos_dsi_types[dsi->plat_data->hw_type]; dsi->supplies[0].supply = "vddcore"; dsi->supplies[1].supply = "vddio"; @@ -1862,6 +1870,51 @@ static const struct dev_pm_ops exynos_dsi_pm_ops = { pm_runtime_force_resume) }; +static const struct exynos_dsi_plat_data exynos3250_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS3250, +}; + +static const struct exynos_dsi_plat_data exynos4210_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS4210, +}; + +static const struct exynos_dsi_plat_data exynos5410_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS5410, +}; + +static const struct exynos_dsi_plat_data exynos5422_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS5422, +}; + +static const struct exynos_dsi_plat_data exynos5433_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS5433, +}; + +static const struct of_device_id exynos_dsi_of_match[] = { + { + .compatible = "samsung,exynos3250-mipi-dsi", + .data = &exynos3250_dsi_pdata, + }, + { + .compatible = "samsung,exynos4210-mipi-dsi", + .data = &exynos4210_dsi_pdata, + }, + { + .compatible = "samsung,exynos5410-mipi-dsi", + .data = &exynos5410_dsi_pdata, + }, + { + .compatible = "samsung,exynos5422-mipi-dsi", + .data = &exynos5422_dsi_pdata, + }, + { + .compatible = "samsung,exynos5433-mipi-dsi", + .data = &exynos5433_dsi_pdata, + }, + { /* sentinel. */ } +}; +MODULE_DEVICE_TABLE(of, exynos_dsi_of_match); + struct platform_driver dsi_driver = { .probe = exynos_dsi_probe, .remove = exynos_dsi_remove, From patchwork Fri Mar 3 14:51:29 2023 Content-Type: text/plain; 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Fri, 03 Mar 2023 06:52:51 -0800 (PST) Received: from localhost.localdomain ([183.83.137.89]) by smtp.gmail.com with ESMTPSA id z4-20020a63e544000000b00502fd70b0bdsm1660856pgj.52.2023.03.03.06.52.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 06:52:51 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Cc: Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-amarula , Jagan Teki Subject: [PATCH v15 07/16] drm: exynos: dsi: Add atomic check Date: Fri, 3 Mar 2023 20:21:29 +0530 Message-Id: <20230303145138.29233-8-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303145138.29233-1-jagan@amarulasolutions.com> References: <20230303145138.29233-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Look like an explicit fixing up of mode_flags is required for DSIM IP present in i.MX8M Mini/Nano SoCs. At least the LCDIF + DSIM needs active low sync polarities in order to correlate the correct sync flags of the surrounding components in the chain to make sure the whole pipeline can work properly. On the other hand the i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 says. "13.6.3.5.2 RGB interface Vsync, Hsync, and VDEN are active high signals." i.MX 8M Mini Applications Processor Reference Manual Rev. 3, 11/2020 3.6.3.5.2 RGB interface i.MX 8M Nano Applications Processor Reference Manual Rev. 2, 07/2022 13.6.2.7.2 RGB interface both claim "Vsync, Hsync, and VDEN are active high signals.", the LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. No clear evidence about whether it can be documentation issues or something, so added proper comments on the code. Comments are suggested by Marek Vasut. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Signed-off-by: Jagan Teki --- Changes for v15, v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder - fix commit message Changes for v10, v9: - none Changes for v8: - update the comments about sync signals polarities - added clear commit message by including i.MX8M Nano details Changes for v7: - fix the hw_type checking logic Changes for v6: - none Changes for v5: - rebase based new bridge changes [mszyprow] - remove DSIM_QUIRK_FIXUP_SYNC_POL - add hw_type check for sync polarities change. Changes for v4: - none Changes for v3: - add DSIM_QUIRK_FIXUP_SYNC_POL to handle mode_flasg fixup Changes for v2: - none Changes for v1: - fix mode flags in atomic_check instead of mode_fixup drivers/gpu/drm/exynos/exynos_drm_dsi.c | 28 +++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index fe195d76ce76..796480e4a18b 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -263,6 +263,7 @@ enum exynos_dsi_type { DSIM_TYPE_EXYNOS5410, DSIM_TYPE_EXYNOS5422, DSIM_TYPE_EXYNOS5433, + DSIM_TYPE_IMX8MM, DSIM_TYPE_COUNT, }; @@ -1465,6 +1466,32 @@ static void exynos_dsi_atomic_post_disable(struct drm_bridge *bridge, pm_runtime_put_sync(dsi->dev); } +static int exynos_dsi_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct exynos_dsi *dsi = bridge_to_dsi(bridge); + struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; + + /* + * The i.MX8M Mini/Nano glue logic between LCDIF and DSIM + * inverts HS/VS/DE sync signals polarity, therefore, while + * i.MX 8M Mini Applications Processor Reference Manual Rev. 3, 11/2020 + * 13.6.3.5.2 RGB interface + * i.MX 8M Nano Applications Processor Reference Manual Rev. 2, 07/2022 + * 13.6.2.7.2 RGB interface + * both claim "Vsync, Hsync, and VDEN are active high signals.", the + * LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. + */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) { + adjusted_mode->flags |= (DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + adjusted_mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); + } + + return 0; +} + static void exynos_dsi_mode_set(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode) @@ -1487,6 +1514,7 @@ static const struct drm_bridge_funcs exynos_dsi_bridge_funcs = { .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, .atomic_reset = drm_atomic_helper_bridge_reset, + .atomic_check = exynos_dsi_atomic_check, .atomic_pre_enable = exynos_dsi_atomic_pre_enable, .atomic_enable = exynos_dsi_atomic_enable, .atomic_disable = exynos_dsi_atomic_disable, From patchwork Fri Mar 3 14:51:30 2023 Content-Type: text/plain; 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Fri, 03 Mar 2023 06:52:57 -0800 (PST) Received: from localhost.localdomain ([183.83.137.89]) by smtp.gmail.com with ESMTPSA id z4-20020a63e544000000b00502fd70b0bdsm1660856pgj.52.2023.03.03.06.52.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 06:52:56 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Cc: Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-amarula , Jagan Teki Subject: [PATCH v15 08/16] drm: exynos: dsi: Add input_bus_flags Date: Fri, 3 Mar 2023 20:21:30 +0530 Message-Id: <20230303145138.29233-9-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303145138.29233-1-jagan@amarulasolutions.com> References: <20230303145138.29233-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting the i.MX8M Mini/Nano DSI host to add additional Data Enable signal active low (DE_LOW). This makes the valid data transfer on each horizontal line. So, add additional bus flags DE_LOW setting via input_bus_flags for i.MX8M Mini/Nano platforms. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Suggested-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v15, v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder Changes for v10, v9: - none Changes for v8: - add DE_LOW for i.MX8M Mini/Nano platforms. Changes for v7, v6: - none Changes for v5: - rebased based on updated bridge changes Changes for v4 - v1: - none drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 796480e4a18b..5d971b607e1a 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1736,6 +1736,10 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static const struct drm_bridge_timings dsim_bridge_timings_de_low = { + .input_bus_flags = DRM_BUS_FLAG_DE_LOW, +}; + static int exynos_dsi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1822,6 +1826,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; dsi->bridge.pre_enable_prev_first = true; + /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) + dsi->bridge.timings = &dsim_bridge_timings_de_low; + ret = component_add(dev, &exynos_dsi_component_ops); if (ret) goto err_disable_runtime; From patchwork Fri Mar 3 14:51:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24ED3C64EC4 for ; Fri, 3 Mar 2023 14:53:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230511AbjCCOxj (ORCPT ); Fri, 3 Mar 2023 09:53:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230042AbjCCOxO (ORCPT ); Fri, 3 Mar 2023 09:53:14 -0500 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BB8414EA1 for ; Fri, 3 Mar 2023 06:53:13 -0800 (PST) Received: by mail-pl1-x631.google.com with SMTP id n6so2909575plf.5 for ; Fri, 03 Mar 2023 06:53:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jZ7rcemt848q2zQcT+lSKMTmWxXIUz+vskppcEdmPWE=; b=MECwk9YwcW4hH23pMpV9ibT0/I9cpvyQWibnA+4yOERhp24mOst0xorAsLQePkxzNH 9Owr8gVgkd/Su95DEzZpfEfhmZ+u8hxsiH8tR7guGt3xsfCOHBPy8R5zBId3gPmSPAdS c4rKtH3N9pcRitKx9ZVOIUWd95lInZEvruzQQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jZ7rcemt848q2zQcT+lSKMTmWxXIUz+vskppcEdmPWE=; b=IwFpwYLPcaEW4oJWFIaMj7UnFqggOzAylKjCUJEG44SLhdjTJmGYUaEh46aYRDf+4x oQi0Iay6NTzRWN7RrGi6C1TFtlHRkGqj6i39Pv5NaehizfifA/uJeQF8aKszxfdW03QI EPdjQP3vP1CteQvlatiFrW/5iX8xJaHparJE8vbNJv6zYasJPz90CVn3FdTk9OlIWGXt 9MRoUeztTt7vPht2RHo6VH5NM4BzBPaNZbG8gzURUlTbrhmXYa4YMux+vDki3rPz1Tqd MrthuYE1tcMCtv0OimRO9YCAzZ1WTjHW7W/HwY3lSv0tQhrra8GZMLkHAAY1/WiLPwKn 26Fw== X-Gm-Message-State: AO0yUKW2O7ysuMmZ0xoHkxbflEyb9yhPfYSVAimw6G0uUbPUCw01Jp2c GePLpIRAeTYiQDO1Xwj/2gHQ8A== X-Google-Smtp-Source: AK7set99ggwcpnKkofUANhGMbdjMO4m7mdjgdXuo4LpOoEXmvDTaX4RwpDrfsgV2A635WiPYyV6g3Q== X-Received: by 2002:a05:6a20:9386:b0:cc:d762:64a with SMTP id x6-20020a056a20938600b000ccd762064amr3085837pzh.8.1677855192602; Fri, 03 Mar 2023 06:53:12 -0800 (PST) Received: from localhost.localdomain ([183.83.137.89]) by smtp.gmail.com with ESMTPSA id z4-20020a63e544000000b00502fd70b0bdsm1660856pgj.52.2023.03.03.06.53.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 06:53:12 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Cc: Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-amarula , Jagan Teki Subject: [PATCH v15 11/16] drm: exynos: dsi: Add host helper for te_irq_handler Date: Fri, 3 Mar 2023 20:21:33 +0530 Message-Id: <20230303145138.29233-12-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303145138.29233-1-jagan@amarulasolutions.com> References: <20230303145138.29233-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org IRQ handler for te-gpio seems to be common across DSIM host. However, Exynos is handling this via CRTC drivers but there is no clear evidence on how the same has been handled in i.MX8MM. Keeping the handler as-it-is can be a viable option but adding DSIM bridge core in upcoming patches is not possible to call Exynos CRTC handler as DSIM bridge has to be common across DRM bridge core instead of platform specific DRM drivers like Exynos here. So, this patch handles the handler via platform host helper, so-that handling platform specific hook across Exynos and generic can be reasonable till it makes it generic across all platforms. Reviewed-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v15: - remove leading underscores in function names - collect RB from Marek Changes for v13: - none Changes for v12: - updated patch - suggested by Marek V Changes for v11: - none Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" drivers/gpu/drm/exynos/exynos_drm_dsi.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index afe2d293c785..2fc166ebe3c7 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -325,6 +325,7 @@ struct exynos_dsim_host_ops { void (*unregister_host)(struct exynos_dsi *dsim); int (*attach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); int (*detach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); + irqreturn_t (*te_irq_handler)(struct exynos_dsi *dsim); }; struct exynos_dsi_enc { @@ -1333,11 +1334,10 @@ static irqreturn_t exynos_dsi_irq(int irq, void *dev_id) static irqreturn_t exynos_dsi_te_irq_handler(int irq, void *dev_id) { struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; - struct exynos_dsi_enc *dsi_enc = dsi->priv; - struct drm_encoder *encoder = &dsi_enc->encoder; + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; - if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) - exynos_drm_crtc_te_handler(encoder->crtc); + if (pdata->host_ops && pdata->host_ops->te_irq_handler) + return pdata->host_ops->te_irq_handler(dsi); return IRQ_HANDLED; } @@ -1761,6 +1761,17 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) return 0; } +static irqreturn_t exynos_dsim_te_irq_handler(struct exynos_dsi *dsim) +{ + struct exynos_dsi_enc *dsi_enc = dsim->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; + + if (dsim->state & DSIM_STATE_VIDOUT_AVAILABLE) + exynos_drm_crtc_te_handler(encoder->crtc); + + return IRQ_HANDLED; +} + static int exynos_dsim_host_attach(struct exynos_dsi *dsim, struct mipi_dsi_device *device) { @@ -2075,6 +2086,7 @@ static const struct exynos_dsim_host_ops exynos_dsi_host_ops = { .unregister_host = exynos_dsi_unregister_host, .attach = exynos_dsim_host_attach, .detach = exynos_dsim_host_detach, + .te_irq_handler = exynos_dsim_te_irq_handler, }; static const struct exynos_dsi_plat_data exynos3250_dsi_pdata = { From patchwork Fri Mar 3 14:51:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658676 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25F44C7EE2F for ; Fri, 3 Mar 2023 14:53:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230481AbjCCOxl (ORCPT ); Fri, 3 Mar 2023 09:53:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231127AbjCCOxb (ORCPT ); Fri, 3 Mar 2023 09:53:31 -0500 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 329D8166D5 for ; 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Fri, 03 Mar 2023 06:53:29 -0800 (PST) Received: from localhost.localdomain ([183.83.137.89]) by smtp.gmail.com with ESMTPSA id z4-20020a63e544000000b00502fd70b0bdsm1660856pgj.52.2023.03.03.06.53.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 06:53:29 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Cc: Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-amarula , Jagan Teki , Robert Foss , Laurent Pinchart Subject: [PATCH v15 14/16] drm: bridge: samsung-dsim: Add i.MX8M Mini/Nano support Date: Fri, 3 Mar 2023 20:21:36 +0530 Message-Id: <20230303145138.29233-15-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303145138.29233-1-jagan@amarulasolutions.com> References: <20230303145138.29233-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Samsung MIPI DSIM master can also be found in i.MX8M Mini/Nano SoC. Add compatible and associated driver_data for it. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Acked-by: Robert Foss Reviewed-by: Laurent Pinchart Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v15, v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder - collect ACK from Robert Changes for v10, v9: - none Changed for v8: - fix and update the comment Changes for v7, v6: - none Changes for v3: - enable DSIM_QUIRK_FIXUP_SYNC_POL quirk Changes for v5: - [mszyprow] rebased and adjusted to the new driver initialization - drop quirk Changes for v4: - none Changes for v3: - enable DSIM_QUIRK_FIXUP_SYNC_POL quirk Changes for v2: - collect Laurent r-b Changes for v1: - none drivers/gpu/drm/bridge/samsung-dsim.c | 44 +++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 42e3536cb2fc..3ffdaedaa261 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -376,6 +376,24 @@ static const unsigned int exynos5433_reg_values[] = { [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0c), }; +static const unsigned int imx8mm_dsim_reg_values[] = { + [RESET_TYPE] = DSIM_SWRST, + [PLL_TIMER] = 500, + [STOP_STATE_CNT] = 0xf, + [PHYCTRL_ULPS_EXIT] = 0, + [PHYCTRL_VREG_LP] = 0, + [PHYCTRL_SLEW_UP] = 0, + [PHYTIMING_LPX] = DSIM_PHYTIMING_LPX(0x06), + [PHYTIMING_HS_EXIT] = DSIM_PHYTIMING_HS_EXIT(0x0b), + [PHYTIMING_CLK_PREPARE] = DSIM_PHYTIMING1_CLK_PREPARE(0x07), + [PHYTIMING_CLK_ZERO] = DSIM_PHYTIMING1_CLK_ZERO(0x26), + [PHYTIMING_CLK_POST] = DSIM_PHYTIMING1_CLK_POST(0x0d), + [PHYTIMING_CLK_TRAIL] = DSIM_PHYTIMING1_CLK_TRAIL(0x08), + [PHYTIMING_HS_PREPARE] = DSIM_PHYTIMING2_HS_PREPARE(0x08), + [PHYTIMING_HS_ZERO] = DSIM_PHYTIMING2_HS_ZERO(0x0d), + [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0b), +}; + static const struct samsung_dsim_driver_data exynos3_dsi_driver_data = { .reg_ofs = exynos_reg_ofs, .plltmr_reg = 0x50, @@ -437,6 +455,22 @@ static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = { .reg_values = exynos5422_reg_values, }; +static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = { + .reg_ofs = exynos5433_reg_ofs, + .plltmr_reg = 0xa0, + .has_clklane_stop = 1, + .num_clks = 2, + .max_freq = 2100, + .wait_for_reset = 0, + .num_bits_resol = 12, + /* + * Unlike Exynos, PLL_P(PMS_P) offset 14 is used in i.MX8M Mini/Nano/Plus + * downstream driver - drivers/gpu/drm/bridge/sec-dsim.c + */ + .pll_p_offset = 14, + .reg_values = imx8mm_dsim_reg_values, +}; + static const struct samsung_dsim_driver_data * samsung_dsim_types[DSIM_TYPE_COUNT] = { [DSIM_TYPE_EXYNOS3250] = &exynos3_dsi_driver_data, @@ -444,6 +478,7 @@ samsung_dsim_types[DSIM_TYPE_COUNT] = { [DSIM_TYPE_EXYNOS5410] = &exynos5_dsi_driver_data, [DSIM_TYPE_EXYNOS5422] = &exynos5422_dsi_driver_data, [DSIM_TYPE_EXYNOS5433] = &exynos5433_dsi_driver_data, + [DSIM_TYPE_IMX8MM] = &imx8mm_dsi_driver_data, }; static inline struct samsung_dsim *host_to_dsi(struct mipi_dsi_host *h) @@ -1875,7 +1910,16 @@ const struct dev_pm_ops samsung_dsim_pm_ops = { }; EXPORT_SYMBOL_GPL(samsung_dsim_pm_ops); +static const struct samsung_dsim_plat_data samsung_dsim_imx8mm_pdata = { + .hw_type = DSIM_TYPE_IMX8MM, + .host_ops = &generic_dsim_host_ops, +}; + static const struct of_device_id samsung_dsim_of_match[] = { + { + .compatible = "fsl,imx8mm-mipi-dsim", + .data = &samsung_dsim_imx8mm_pdata, + }, { /* sentinel. */ } }; MODULE_DEVICE_TABLE(of, samsung_dsim_of_match); From patchwork Fri Mar 3 14:51:38 2023 Content-Type: text/plain; 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Fri, 03 Mar 2023 06:53:40 -0800 (PST) Received: from localhost.localdomain ([183.83.137.89]) by smtp.gmail.com with ESMTPSA id z4-20020a63e544000000b00502fd70b0bdsm1660856pgj.52.2023.03.03.06.53.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 06:53:39 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Cc: Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-amarula , Robert Foss , Jagan Teki Subject: [PATCH v15 16/16] drm: bridge: samsung-dsim: Add i.MX8M Plus support Date: Fri, 3 Mar 2023 20:21:38 +0530 Message-Id: <20230303145138.29233-17-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303145138.29233-1-jagan@amarulasolutions.com> References: <20230303145138.29233-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org From: Marek Vasut Add extras to support i.MX8M Plus. The main change is the removal of HS/VS/DE signal inversion in the LCDIFv3-DSIM glue logic, otherwise the implementation of this IP in i.MX8M Plus is very much compatible with the i.MX8M Mini/Nano one. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Acked-by: Robert Foss Signed-off-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v15, v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder - collect ACK from Robert Changes for v10: - none Changes for v9: - added im8mp in DSIM_STATE_REINITIALIZED check - drop previous = NULL check drivers/gpu/drm/bridge/samsung-dsim.c | 23 +++++++++++++++++++++++ include/drm/bridge/samsung-dsim.h | 1 + 2 files changed, 24 insertions(+) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 3ffdaedaa261..b4a5348b763c 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -479,6 +479,7 @@ samsung_dsim_types[DSIM_TYPE_COUNT] = { [DSIM_TYPE_EXYNOS5422] = &exynos5422_dsi_driver_data, [DSIM_TYPE_EXYNOS5433] = &exynos5433_dsi_driver_data, [DSIM_TYPE_IMX8MM] = &imx8mm_dsi_driver_data, + [DSIM_TYPE_IMX8MP] = &imx8mm_dsi_driver_data, }; static inline struct samsung_dsim *host_to_dsi(struct mipi_dsi_host *h) @@ -1452,10 +1453,17 @@ static int samsung_dsim_atomic_check(struct drm_bridge *bridge, * 13.6.2.7.2 RGB interface * both claim "Vsync, Hsync, and VDEN are active high signals.", the * LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. + * + * The i.MX8M Plus glue logic between LCDIFv3 and DSIM does not + * implement the same behavior, therefore LCDIFv3 must generate + * HS/VS/DE signals active HIGH. */ if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) { adjusted_mode->flags |= (DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); adjusted_mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); + } else if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MP) { + adjusted_mode->flags &= ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); } return 0; @@ -1721,6 +1729,10 @@ static const struct samsung_dsim_host_ops generic_dsim_host_ops = { .unregister_host = generic_dsim_unregister_host, }; +static const struct drm_bridge_timings samsung_dsim_bridge_timings_de_high = { + .input_bus_flags = DRM_BUS_FLAG_DE_HIGH, +}; + static const struct drm_bridge_timings samsung_dsim_bridge_timings_de_low = { .input_bus_flags = DRM_BUS_FLAG_DE_LOW, }; @@ -1810,6 +1822,8 @@ int samsung_dsim_probe(struct platform_device *pdev) /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) dsi->bridge.timings = &samsung_dsim_bridge_timings_de_low; + else + dsi->bridge.timings = &samsung_dsim_bridge_timings_de_high; if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host) ret = dsi->plat_data->host_ops->register_host(dsi); @@ -1915,11 +1929,20 @@ static const struct samsung_dsim_plat_data samsung_dsim_imx8mm_pdata = { .host_ops = &generic_dsim_host_ops, }; +static const struct samsung_dsim_plat_data samsung_dsim_imx8mp_pdata = { + .hw_type = DSIM_TYPE_IMX8MP, + .host_ops = &generic_dsim_host_ops, +}; + static const struct of_device_id samsung_dsim_of_match[] = { { .compatible = "fsl,imx8mm-mipi-dsim", .data = &samsung_dsim_imx8mm_pdata, }, + { + .compatible = "fsl,imx8mp-mipi-dsim", + .data = &samsung_dsim_imx8mp_pdata, + }, { /* sentinel. */ } }; MODULE_DEVICE_TABLE(of, samsung_dsim_of_match); diff --git a/include/drm/bridge/samsung-dsim.h b/include/drm/bridge/samsung-dsim.h index 4ba387c958ae..fb923caf09e1 100644 --- a/include/drm/bridge/samsung-dsim.h +++ b/include/drm/bridge/samsung-dsim.h @@ -28,6 +28,7 @@ enum samsung_dsim_type { DSIM_TYPE_EXYNOS5422, DSIM_TYPE_EXYNOS5433, DSIM_TYPE_IMX8MM, + DSIM_TYPE_IMX8MP, DSIM_TYPE_COUNT, };