From patchwork Wed Mar 1 09:55:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 657893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D904C64ED6 for ; Wed, 1 Mar 2023 10:30:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229752AbjCAKaE (ORCPT ); Wed, 1 Mar 2023 05:30:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229486AbjCAKaD (ORCPT ); Wed, 1 Mar 2023 05:30:03 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46A8B2CC47; Wed, 1 Mar 2023 02:30:00 -0800 (PST) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3215PqaM032331; Wed, 1 Mar 2023 09:57:03 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=cJOvygwa3MxthitwhxT0SKDN9LAhp1SoHdP0PoFL/28=; b=lEFxQ+vpnSxlzX9V92IV5Z9Bwemz/pNe2aG0b8RNuBqtJx7XJ7TA/9VCeBzkB1+KCYuu yI8spWnoEiKy2M9LCQqCdXzGq0E934NDT/gRDtpuo/5Nr4xmY80c68z3DLt/yUjtAxdP KOlAN+PPFnxz+sFanaP/ELMEZ/eX7T2jOR2SEWVnpdCGJS5CQysyg9h/Gsz0RMSCtvNt nQcAkYrtpvBFN+SI2/GmZ0y9nW5C3S5Ld+unJA+LBUAg+bnIqIxyLoffKqGDmhHqj+Ed rRf6GLBx5kBP5aBqeglH3SwBrDasROfIk7FHmk6SMEetADutacLbX8Ewwt3QZ+8P4eu9 gg== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3p20j2gw32-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 01 Mar 2023 09:57:02 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3219v1nS002591 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 1 Mar 2023 09:57:01 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 1 Mar 2023 01:56:59 -0800 From: Mukesh Ojha To: , , CC: , , "Mukesh Ojha" Subject: [PATCH v2 2/4] firmware: scm: Modify only the DLOAD bit in TCSR register for download mode Date: Wed, 1 Mar 2023 15:25:53 +0530 Message-ID: <1677664555-30191-3-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1677664555-30191-1-git-send-email-quic_mojha@quicinc.com> References: <1677664555-30191-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Dj_aXoQqxv6q8YRs2SB2RLK0SUdS_Yah X-Proofpoint-GUID: Dj_aXoQqxv6q8YRs2SB2RLK0SUdS_Yah X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-01_04,2023-02-28_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 spamscore=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 mlxscore=0 adultscore=0 bulkscore=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303010082 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org CrashDump collection is based on the DLOAD bit of TCSR register. To retain other bits, we read the register and modify only the DLOAD bit as the other bits have their own significance. Originally-by: Poovendhan Selvaraj Signed-off-by: Mukesh Ojha --- Changes in v2: - Addressed comment made by Bjorn. - Added download mask from patch 3 to this. drivers/firmware/qcom_scm.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 51eb853..c9f1fad 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -27,6 +27,8 @@ module_param(download_mode, bool, 0); #define SCM_HAS_IFACE_CLK BIT(1) #define SCM_HAS_BUS_CLK BIT(2) +#define QCOM_DOWNLOAD_MODE_MASK 0x30 + struct qcom_scm { struct device *dev; struct clk *core_clk; @@ -419,6 +421,7 @@ static void qcom_scm_set_download_mode(bool enable) { bool avail; int ret = 0; + u32 val; avail = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_BOOT, @@ -426,8 +429,18 @@ static void qcom_scm_set_download_mode(bool enable) if (avail) { ret = __qcom_scm_set_dload_mode(__scm->dev, enable); } else if (__scm->dload_mode_addr) { - ret = qcom_scm_io_writel(__scm->dload_mode_addr, - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + ret = qcom_scm_io_readl(__scm->dload_mode_addr, &val); + if (ret) { + dev_err(__scm->dev, + "failed to read dload mode address value: %d\n", ret); + return; + } + + val &= ~QCOM_DOWNLOAD_MODE_MASK; + if (enable) + val |= QCOM_SCM_BOOT_SET_DLOAD_MODE; + + ret = qcom_scm_io_writel(__scm->dload_mode_addr, val); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n");