From patchwork Tue Feb 28 10:47:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657569 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67E66C7EE31 for ; Tue, 28 Feb 2023 10:47:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229951AbjB1Krz (ORCPT ); Tue, 28 Feb 2023 05:47:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230151AbjB1Krx (ORCPT ); Tue, 28 Feb 2023 05:47:53 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E9FA81996; Tue, 28 Feb 2023 02:47:51 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 459E16602FD8; Tue, 28 Feb 2023 10:47:50 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581270; bh=hCOuhzILoJBXJQ8GwcXy/t+mRkm6ZJBcUpxH7FjYYQQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OYeliOY9+LesjMYhIx7f5QCcRs2qu3uoATLfmuW161HAHJsRBbA7dGR8kJMeyWlN7 VknOmJMi0yrWc0B/6RBmvyxo8qwWkdRABE9k28d+72bvdQBAUB0YQvAPvs7AeviDDp DZOqbEeffJY6yA8Bq5w+D8wMWQAKantkckWH84Fiitl8WN4BBh/kBWO0CdRaPvdu5+ FvipDMtYmV0DHmY8FNE3ZukS4sAFh4Kyrdp4c0VaKpSLjbcofQzH9wO6Lyy+5HSZgR TkypHtjO/yVP2CiD2LKq7oHH+qsTZuS9D+93y3jXXYfP7YqtgXL21IMdt1fcfbTzNy Cpbmyhm4b9+7A== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 02/18] arm64: dts: mediatek: mt8183-kukui: Override vgpu/vsram_gpu constraints Date: Tue, 28 Feb 2023 11:47:25 +0100 Message-Id: <20230228104741.717819-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index de9778c85b94..63952c1251df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -401,6 +401,9 @@ &mt6358codec { }; &mt6358_vgpu_reg { + regulator-min-microvolt = <625000>; + regulator-max-microvolt = <900000>; + regulator-coupled-with = <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread = <100000>; }; @@ -416,6 +419,9 @@ &mt6358_vsim2_reg { }; &mt6358_vsram_gpu_reg { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1000000>; + regulator-coupled-with = <&mt6358_vgpu_reg>; regulator-coupled-max-spread = <100000>; }; From patchwork Tue Feb 28 10:47:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657568 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80F66C7EE31 for ; Tue, 28 Feb 2023 10:47:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230341AbjB1Kr5 (ORCPT ); Tue, 28 Feb 2023 05:47:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230313AbjB1Kry (ORCPT ); Tue, 28 Feb 2023 05:47:54 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE3093AB2; Tue, 28 Feb 2023 02:47:53 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2F0106602FDC; Tue, 28 Feb 2023 10:47:52 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581272; bh=MrIqGkrI7LujwoSZ7Bc2owhtRwNGguk3yNGZ02UZ6+Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dR4/b3b5lltCNN8KfeulljLkwod7OuVNaM74a5HrWCCgegN1d2AhvW1vKT6Tr1vaR 1/SObUDle1lbS2jS+xAY5A7XfAZT/4WOhOgyNU6EKlFOvvJjQaWxpA8/ZcVUL5eVyA goyY64+helLLB/rgqG0gQjaCUs2CreVyKfqEzt5z+wTAdOUcj5Q4BqJFIIPFpdOw/9 sg07ArnkLn47yTd+Hg1/ugU4uMQX3fyHn3k+kDWe6+1yTKYG1gZhO3kj5Yb3m/WN1m A9LK6MVj+j2mC5orTIAkjMgZT1aL3SK3Yal8sxhThI4/vWBDUP7ziDaQr8uez07c1E AnFuCFXdJE9+g== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 05/18] arm64: dts: mediatek: mt8183-evb: Couple VGPU and VSRAM_GPU regulators Date: Tue, 28 Feb 2023 11:47:28 +0100 Message-Id: <20230228104741.717819-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts index 52dc4a50e34d..fd327437e932 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -52,7 +52,6 @@ &auxadc { &gpu { mali-supply = <&mt6358_vgpu_reg>; - sram-supply = <&mt6358_vsram_gpu_reg>; }; &i2c0 { @@ -138,6 +137,16 @@ &mmc1 { non-removable; }; +&mt6358_vgpu_reg { + regulator-coupled-with = <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-coupled-with = <&mt6358_vgpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + &pio { i2c_pins_0: i2c0{ pins_i2c{ From patchwork Tue Feb 28 10:47:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657567 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5411C7EE32 for ; Tue, 28 Feb 2023 10:48:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230494AbjB1Kr7 (ORCPT ); Tue, 28 Feb 2023 05:47:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230381AbjB1Kr4 (ORCPT ); Tue, 28 Feb 2023 05:47:56 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFA5B423F; Tue, 28 Feb 2023 02:47:54 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C902D6602FDD; Tue, 28 Feb 2023 10:47:52 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581273; bh=7nrUbCRYVnwYMTUi2s51QYeV3DhvJQJoBM8PfyrS3Ok=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AdrM3BuVZzfiKKrYYkFPomdI7sp+7R98ThxfEuzos9BLkOXV4Y202LwUlimO5rp5g 1yxBPpnu07eB1MuQhc9/fqvuLWPiwyhtkwe/6r+JSectev19ZNrmaQNemuMTc5+GRB pELshWUNgV4trouIlEFAmLeOz4IE5nw/cPU3cMwBT4bCPZndvKcUnaXQsvfjtpDmCu 45nULDczz1ts90NEc0e1Lm9qXRgyyCwJZEgs9GxaKtw1JouNAHW3U/PU3XtdBTajO5 n2Prbgj13wA4R6LphJuDRTUwYYkOeu68I2W9t/x+zlm8R+4hX5MIE+TXwa6oRw95C5 z/CIDWEtXTyLg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 06/18] arm64: dts: mediatek: mt8183: Use mediatek,mt8183b-mali as GPU compatible Date: Tue, 28 Feb 2023 11:47:29 +0100 Message-Id: <20230228104741.717819-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the new GPU related compatible to finally enable GPU DVFS on the MT8183 SoC. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index e01b96adef02..5169779d01df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1752,7 +1752,7 @@ mfgcfg: syscon@13000000 { }; gpu: gpu@13040000 { - compatible = "mediatek,mt8183-mali", "arm,mali-bifrost"; + compatible = "mediatek,mt8183b-mali", "arm,mali-bifrost"; reg = <0 0x13040000 0 0x4000>; interrupts = , From patchwork Tue Feb 28 10:47:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657565 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 014D6C7EE31 for ; Tue, 28 Feb 2023 10:48:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231233AbjB1KsQ (ORCPT ); Tue, 28 Feb 2023 05:48:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231159AbjB1KsG (ORCPT ); Tue, 28 Feb 2023 05:48:06 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C57406E9B; Tue, 28 Feb 2023 02:47:55 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 297D56602FD6; Tue, 28 Feb 2023 10:47:54 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581274; bh=2d8a1s6Yhde89pXYtEnq08v+ES25mvl579PIaEXQyEw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ima4zDZiIey6aYeTZgcLCNjPNHGjugB/Df1/IfaoIYBEivRgbURpY7DngWKPpL4IN bTPc+7QzSiOv44327eM+ZQGsEs0ewW2kgtQta4Uyp13ddd9/dcA5U/earYcBMoqJf0 OE9DgpcdUav5OgHsjnYuA+8LefTbmI3bwb4pNptqhYDU5Ui574U9YpEC0iVCaNQI8P jidOEyEuUASIf5J+FmOL36A74vQj0OFbFX74LCWavpC8cPg498ZUx7daM1/JdlISJy R184Qb853erFpVWQNLbFLeyjghIh/YcJhLQ/M/7gTOaN7tL2Dk4wJ2NcdbJTr7b9/8 aSFqUCItI9ftQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 08/18] arm64: dts: mediatek: mt8192: Add mfg_ref_sel clock to MFG0 domain Date: Tue, 28 Feb 2023 11:47:31 +0100 Message-Id: <20230228104741.717819-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The mfg_ref_sel clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 34631adc52c6..a29cdff8a095 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -499,8 +499,9 @@ power-domain@MT8192_POWER_DOMAIN_CONN { power-domain@MT8192_POWER_DOMAIN_MFG0 { reg = ; - clocks = <&topckgen CLK_TOP_MFG_PLL_SEL>; - clock-names = "mfg"; + clocks = <&topckgen CLK_TOP_MFG_PLL_SEL>, + <&topckgen CLK_TOP_MFG_REF_SEL>; + clock-names = "mfg", "alt"; #address-cells = <1>; #size-cells = <0>; #power-domain-cells = <1>; From patchwork Tue Feb 28 10:47:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657566 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 711BFC7EE2E for ; Tue, 28 Feb 2023 10:48:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231219AbjB1KsP (ORCPT ); Tue, 28 Feb 2023 05:48:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231160AbjB1KsG (ORCPT ); Tue, 28 Feb 2023 05:48:06 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69A4EA5FB; Tue, 28 Feb 2023 02:47:56 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C54BB6602FD8; Tue, 28 Feb 2023 10:47:54 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581275; bh=/37a11W4Djj29RkQI1F06mX5BvaAyxmllH1tjzesJsU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jUnwV8DkKYgp0efQlZ3Av9SsbY6lnJiN2sKcpLo/e4f3yhDfgFMfut41lHFFvxFJF 7ZaNMdC5qXqThl/VOOPyDJdTSvotOxLx6I+hQtMNgy2AOkVx3GjwHFHi9BUzXETiSn D9Htts/fzp+ZHMRu8u0SVAE1T0LxZOfO3pjH4tZ4b1omL8+eroO8SAU9tvIIYkpV4X HuZP6Nfj14F9VHdUOvoAnRyABirJJRD/x+vGKaHFNDPmpbXHv/adsWc7yVjjjBVEXK OcUP987PtCzd+cLJT+jhhJzO5sBuqKgFmsGi+MD9ec7pmuT6yg/NL2+TSUsQSBe5Yt 1NNvMZLvyqSAg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, =?utf-8?b?TsOtY29s?= =?utf-8?b?YXMgRi4gUi4gQS4gUHJhZG8=?= Subject: [PATCH v3 09/18] arm64: dts: mediatek: mt8192-asurada: Add MFG0 domain supply Date: Tue, 28 Feb 2023 11:47:32 +0100 Message-Id: <20230228104741.717819-10-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Nícolas F. R. A. Prado The mfg0 power domain encompasses the whole GPU and its surrounding glue logic. This power domain has a separate power rail. Add its power supply for Asurada. Signed-off-by: Nícolas F. R. A. Prado [wenst@chromium.org: fix subject prefix and add commit message] Signed-off-by: Chen-Yu Tsai [Angelo: Reordered commits to address DVFS stability issues] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 9f12257ab4e7..ec013d5ef157 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -380,6 +380,10 @@ &i2c7 { pinctrl-0 = <&i2c7_pins>; }; +&mfg0 { + domain-supply = <&mt6315_7_vbuck1>; +}; + &mipi_tx0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index a29cdff8a095..f19d4a8ef3f6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -497,7 +497,7 @@ power-domain@MT8192_POWER_DOMAIN_CONN { #power-domain-cells = <0>; }; - power-domain@MT8192_POWER_DOMAIN_MFG0 { + mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { reg = ; clocks = <&topckgen CLK_TOP_MFG_PLL_SEL>, <&topckgen CLK_TOP_MFG_REF_SEL>; From patchwork Tue Feb 28 10:47:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657564 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89534C64EC7 for ; Tue, 28 Feb 2023 10:48:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231230AbjB1KsV (ORCPT ); Tue, 28 Feb 2023 05:48:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231222AbjB1KsP (ORCPT ); Tue, 28 Feb 2023 05:48:15 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD9416A61; Tue, 28 Feb 2023 02:47:58 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id AF3B56602FDB; Tue, 28 Feb 2023 10:47:56 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581277; bh=ZrDmD1sWJzuZxLXrgoqDyjE5ZroJ8Fh1Xr2mllsFmVQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bzE81dy4xS0Ef1DuEpeSeEggU2pTIVv0EEEeHxy2rgtWa6PLl78uXWV5jKW57KKIc 1Q2clOeaUFd6WKMZqR3Bp1eRJZPSxtDVNFhIaUUNgsIG6cfEUlayeJtPTT9enM46y9 wPzHDPulBQGKMzJHvKKOVNUF9S1gTWW5PWbqFdKz2yanajmh0WDSLcykvKFyzgKlNq OoEWATOBFu2YUX1PS1mJKXI7798a8hFgNcBBwXZxe7mGD+8jQ8XXNY935R9IRPxn0P 37csBH6y/ZPxiDWkMo5mAQXD96snxtWPQ4xF+5zWWjxNEPB3ZPQ6I/8iw/142ZIStF lltp0oZWz6ATQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Alyssa Rosenzweig Subject: [PATCH v3 12/18] arm64: dts: mediatek: mt8192-asurada: Enable GPU Date: Tue, 28 Feb 2023 11:47:35 +0100 Message-Id: <20230228104741.717819-13-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Alyssa Rosenzweig Enable the GPU with its power supplies described. Signed-off-by: Alyssa Rosenzweig [wenst@: patch split out from MT8192 GPU node patch] Signed-off-by: Chen-Yu Tsai [Angelo: Minor commit title fix] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index c8b6e1a9605b..067685191ba6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -275,6 +275,11 @@ &dsi_out { remote-endpoint = <&anx7625_in>; }; +&gpu { + mali-supply = <&mt6315_7_vbuck1>; + status = "okay"; +}; + &i2c0 { status = "okay"; From patchwork Tue Feb 28 10:47:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657563 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49267C64ED6 for ; Tue, 28 Feb 2023 10:48:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231351AbjB1Ksl (ORCPT ); Tue, 28 Feb 2023 05:48:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230381AbjB1KsR (ORCPT ); Tue, 28 Feb 2023 05:48:17 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53A102885F; Tue, 28 Feb 2023 02:47:59 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 065186602FDE; Tue, 28 Feb 2023 10:47:57 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581278; bh=smKRDmDdu68lnpbPgqG4z/RTkzBSVrXMEAsrpvTEOiY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ar5wQuJ/4XMRO/fhjH1erUDGVxa2IrETJPY3HYhhDkbOnhBN49QpB+RSCUpUm98je Q+BV1ivVx6kqXx0wLmg8mmMOSczH3bJvWN0rC7Oh1cnvgvLdB/+ErTkRxlZxgzNEO7 +6xFd570rLl1/a4f7Adtx+49khPcOLZMYPMFKIohalxbMFBPmR63g++cMg+MCU4tXv kaAnEtO3YCbMh4VdX6cTfIoGULFgNjj2TfBUtHArpxkuWtIGrx6AfDu88xcSQIO6tb UXOwEArS1zdQ5wbUwPYx4UfqIQsEdV2YKIKKLRFABBr7/nXntCkTxVDKzCvYSSnF7y 4pstYL5APJD9Q== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 14/18] arm64: dts: mt8195: Add panfrost node for Mali-G57 Valhall Natt GPU Date: Tue, 28 Feb 2023 11:47:37 +0100 Message-Id: <20230228104741.717819-15-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add GPU support through panfrost for the Mali-G57 GPU on MT8195 with its OPP table but keep it in disabled state. This is expected to be enabled only on boards which make use of the GPU. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 90 ++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index d116830d6af3..0e4ee7713c30 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -333,6 +333,76 @@ performance: performance-controller@11bc10 { #performance-domain-cells = <1>; }; + gpu_opp_table: opp-table-gpu { + compatible = "operating-points-v2"; + opp-shared; + + opp-390000000 { + opp-hz = /bits/ 64 <390000000>; + opp-microvolt = <625000>; + }; + opp-410000000 { + opp-hz = /bits/ 64 <410000000>; + opp-microvolt = <631250>; + }; + opp-431000000 { + opp-hz = /bits/ 64 <431000000>; + opp-microvolt = <631250>; + }; + opp-473000000 { + opp-hz = /bits/ 64 <473000000>; + opp-microvolt = <637500>; + }; + opp-515000000 { + opp-hz = /bits/ 64 <515000000>; + opp-microvolt = <637500>; + }; + opp-556000000 { + opp-hz = /bits/ 64 <556000000>; + opp-microvolt = <643750>; + }; + opp-598000000 { + opp-hz = /bits/ 64 <598000000>; + opp-microvolt = <650000>; + }; + opp-640000000 { + opp-hz = /bits/ 64 <640000000>; + opp-microvolt = <650000>; + }; + opp-670000000 { + opp-hz = /bits/ 64 <670000000>; + opp-microvolt = <662500>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <675000>; + }; + opp-730000000 { + opp-hz = /bits/ 64 <730000000>; + opp-microvolt = <687500>; + }; + opp-760000000 { + opp-hz = /bits/ 64 <760000000>; + opp-microvolt = <700000>; + }; + opp-790000000 { + opp-hz = /bits/ 64 <790000000>; + opp-microvolt = <712500>; + }; + opp-820000000 { + opp-hz = /bits/ 64 <820000000>; + opp-microvolt = <725000>; + }; + opp-850000000 { + opp-hz = /bits/ 64 <850000000>; + opp-microvolt = <737500>; + }; + opp-880000000 { + opp-hz = /bits/ 64 <880000000>; + opp-microvolt = <750000>; + }; + }; + pmu-a55 { compatible = "arm,cortex-a55-pmu"; interrupt-parent = <&gic>; @@ -1790,6 +1860,26 @@ ufsphy: ufs-phy@11fa0000 { status = "disabled"; }; + gpu: gpu@13000000 { + compatible = "mediatek,mt8195-mali", "mediatek,mt8192-mali", + "arm,mali-valhall-jm"; + reg = <0 0x13000000 0 0x4000>; + + clocks = <&mfgcfg CLK_MFG_BG3D>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&spm MT8195_POWER_DOMAIN_MFG2>, + <&spm MT8195_POWER_DOMAIN_MFG3>, + <&spm MT8195_POWER_DOMAIN_MFG4>, + <&spm MT8195_POWER_DOMAIN_MFG5>, + <&spm MT8195_POWER_DOMAIN_MFG6>; + power-domain-names = "core0", "core1", "core2", "core3", "core4"; + status = "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible = "mediatek,mt8195-mfgcfg"; reg = <0 0x13fbf000 0 0x1000>; From patchwork Tue Feb 28 10:47:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657562 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F4B0C64ED6 for ; Tue, 28 Feb 2023 10:49:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231378AbjB1KtB (ORCPT ); Tue, 28 Feb 2023 05:49:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231265AbjB1KsS (ORCPT ); Tue, 28 Feb 2023 05:48:18 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEA7B2CFD4; Tue, 28 Feb 2023 02:48:01 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id EB3506602FDA; Tue, 28 Feb 2023 10:47:59 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581280; bh=Iwin79s7Du0gnKNyuCiVlTOYzAcjAthdmz358wfq0fA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ONRPHnIoSN/2rIxjTIP1qdq1UCGfN07Z5Pgt6f7WkCkjwy/XUFFsA3fCwym+ZmK/s yxuQ57xO+xuczLY9KBo67vhLS47z/Mrkyr+Jo4RMvB4GUqmFd/NquiDnoJKk6bZI2r lcFzVMxj9xQAK4ulv7jpj1My1JddC8Ipteop4gG1l/vZQ/+5o6z3lc400s7ee1jOHu nsErMvydS/PzCNH91kH13fgkRFBju5L9X4Tqjfyf+453Gj30yP1cLimBAGchtX96iU tzcQbnZqPfBaeRezWagDfHJBKYh6srThZbRrboB+rJmZPlvtrpambKjp1GadifDxCf v/309XhTRdyrw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 17/18] arm64: dts: mediatek: mt8183-pumpkin: Override vgpu/vsram_gpu constraints Date: Tue, 28 Feb 2023 11:47:40 +0100 Message-Id: <20230228104741.717819-18-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno Suggested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts index c228f04d086b..526bcae7a3f8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts @@ -176,11 +176,17 @@ &mmc1 { }; &mt6358_vgpu_reg { + regulator-min-microvolt = <625000>; + regulator-max-microvolt = <900000>; + regulator-coupled-with = <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread = <100000>; }; &mt6358_vsram_gpu_reg { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1000000>; + regulator-coupled-with = <&mt6358_vgpu_reg>; regulator-coupled-max-spread = <100000>; }; From patchwork Tue Feb 28 10:47:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657561 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C871EC7EE2E for ; Tue, 28 Feb 2023 10:49:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231429AbjB1KtL (ORCPT ); Tue, 28 Feb 2023 05:49:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231319AbjB1Ksa (ORCPT ); Tue, 28 Feb 2023 05:48:30 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BAF9C469A; Tue, 28 Feb 2023 02:48:02 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 929D76602FDC; Tue, 28 Feb 2023 10:48:00 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677581281; bh=xNmiw2ujYQURCmwW9t7m1kerphWvM2Xx2d/qe8evz/4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EsL4UoDdDIceOXiCYkSlqmWUwfG44aQh0lfZSEHL8OECQjdQuvUBvh1ZolqJtIaU8 RUj2bFLzPSTuVesYRUOmQ282jVzYJ4RGjhKZuRh3Ss8MAywL1z7ohC3E9bNreQMTPL 0au+IEQ+7cZbTtuXWwX1Dc3uzp1egiNOGXeVcqIn7zIXQSny54lpAt2JviiQ2Smngf Hoqk1M8I7WShI7dgWtT63W9sUUNyAGTS9FYvqSNR5yAuUl/UMWfS1RYA1aJdtvdeYi sCuc1Gl4WImVJz6Z4H4F1Naerwq6+b+Wj2r50WzbPfU8Ob3ShzqvsMkymKAmcT63h8 jk8AQxf7bYZlg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v3 18/18] arm64: dts: mediatek: mt8183-evb: Override vgpu/vsram_gpu constraints Date: Tue, 28 Feb 2023 11:47:41 +0100 Message-Id: <20230228104741.717819-19-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> References: <20230228104741.717819-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno Suggested-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts index fd327437e932..3e3f4b1b00f0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -138,11 +138,17 @@ &mmc1 { }; &mt6358_vgpu_reg { + regulator-min-microvolt = <625000>; + regulator-max-microvolt = <900000>; + regulator-coupled-with = <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread = <100000>; }; &mt6358_vsram_gpu_reg { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1000000>; + regulator-coupled-with = <&mt6358_vgpu_reg>; regulator-coupled-max-spread = <100000>; };