From patchwork Tue Feb 28 16:47:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657906 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3089C64EC7 for ; Tue, 28 Feb 2023 16:48:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229830AbjB1Qss (ORCPT ); Tue, 28 Feb 2023 11:48:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229812AbjB1Qsm (ORCPT ); Tue, 28 Feb 2023 11:48:42 -0500 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9C24F760 for ; Tue, 28 Feb 2023 08:48:10 -0800 (PST) Received: by mail-pj1-x1035.google.com with SMTP id m20-20020a17090ab79400b00239d8e182efso3509339pjr.5 for ; Tue, 28 Feb 2023 08:48:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Idewr/c6anuiFZ8W+ANFStw5VD2DBWot5T+luCDLkeE=; b=HaEDfnx9/yzRqav9tJjlQHDYW4Aqn7/xGfokNxMrpyWPm661fo87bSmbc3jTGwGJkg 5KKX0H21UMvVlnT3IH50T5kUjKwG/vdQUJEqmXMcxYcYKv975/3A3t3QKo4KndgFVVVX Mk+boSqvyHOqYJX1nopulRW5/KQJXAkc8krfofbZmYxDQjmYV21Wh35o0aQlGxVvNY0+ vq28EPjvWvULxyqLSXuV852Ib02Fwj6iG2WILIh5KZNBPVrU4qnAFhbeA2swWzgH9uXV 25B2sAtPW8MHNU0k1joa4ok13CRc0MBbjPeTbio6ogEwtPG+d4H6yPQf3s8pTXqzFUAq Zy9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Idewr/c6anuiFZ8W+ANFStw5VD2DBWot5T+luCDLkeE=; b=EGk1nmePT6HtCZekUMeODjj6Xv6FM0pWW3L2Rj62ROK8Ehrs7FbxBjo9HF+ayQernw uWypymTmc6ArcviH7Sd6ayLVCwInIMSAoaQx7htpZ24zj3h/RjFds4oCAMcg6+zXgXPx G4+6CoeUZyCJpEUKHiNcgpxGsPj6JuXjYh0+3zMH+eWig4KuIUDpzdSsZJFQs5Brso1v ToXt+tLkZi9k57ae/VDfb4FtICBJW5AmqSr2iv/VuzNgInc6JkAbzIQ/rKQkLBKuTvqU B1niVI3osiygQ+E/BbWghB6yDikDZ5KjmcY5sqwdrC1glomYOZLCgslf4sENu7dGOhVr mijg== X-Gm-Message-State: AO0yUKXmD54QcF653vsXcnqLKMMjLg1/mQtspxiOAtS8uyD4zsj8VUGQ tEYUI2Dn0O4JbsHnzrqM7l+g X-Google-Smtp-Source: AK7set8C0QfAqgl3jK8W5EJAII6wqS0FLRKYLHd/U6ullJGd+tsVTYAtVh8gl1PnzfvnOs0fFCJatA== X-Received: by 2002:a05:6a20:3947:b0:cd:fe1b:df8 with SMTP id r7-20020a056a20394700b000cdfe1b0df8mr1489022pzg.56.1677602890307; Tue, 28 Feb 2023 08:48:10 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:09 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 01/16] arm64: dts: qcom: sdm845: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:37 +0530 Message-Id: <20230228164752.55682-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 42ad231338c1 ("arm64: dts: qcom: sdm845: Add second PCIe PHY and controller") Fixes: 5c538e09cb19 ("arm64: dts: qcom: sdm845: Add first PCIe controller and PHY") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 479859bd8ab3..1c060ea960ff 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2292,8 +2292,8 @@ pcie0: pci@1c00000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0xd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000>; interrupts = ; interrupt-names = "msi"; @@ -2397,7 +2397,7 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; interrupts = ; From patchwork Tue Feb 28 16:47:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657513 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F921C6FA8E for ; Tue, 28 Feb 2023 16:48:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229841AbjB1Qsx (ORCPT ); Tue, 28 Feb 2023 11:48:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229778AbjB1Qsv (ORCPT ); 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Tue, 28 Feb 2023 08:48:14 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 02/16] arm64: dts: qcom: msm8998: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:38 +0530 Message-Id: <20230228164752.55682-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI address (0x1b200000) specified in the ranges property for I/O region. Fixes: b84dfd175c09 ("arm64: dts: qcom: msm8998: Add PCIe PHY and RC nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 8bc1c59127e5..5863332962e4 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -922,7 +922,7 @@ pcie0: pci@1c00000 { phy-names = "pciephy"; status = "disabled"; - ranges = <0x01000000 0x0 0x1b200000 0x1b200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x1b200000 0x0 0x100000>, <0x02000000 0x0 0x1b300000 0x1b300000 0x0 0xd00000>; #interrupt-cells = <1>; From patchwork Tue Feb 28 16:47:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657905 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CDE4C64ED6 for ; Tue, 28 Feb 2023 16:48:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229870AbjB1Qs5 (ORCPT ); Tue, 28 Feb 2023 11:48:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229834AbjB1Qsv (ORCPT ); Tue, 28 Feb 2023 11:48:51 -0500 Received: from mail-pf1-x433.google.com (mail-pf1-x433.google.com [IPv6:2607:f8b0:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71C9614998 for ; Tue, 28 Feb 2023 08:48:18 -0800 (PST) Received: by mail-pf1-x433.google.com with SMTP id b20so6177493pfo.6 for ; Tue, 28 Feb 2023 08:48:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZAtK7Zk8PyaaL2KGK3kPqF4OjS65bLvo7hShFbPeFVg=; b=nrya+soptTdI+aVebLmaWMGBRv/+IgaWafwBA7BC7AU0DCOP0PJtJVrDcjOwnmZNrg Ojasv/Y0KrsbmmBAoCcBxfdVq4ZcgmBa5/orhxZpr9SPBFAnHCoytBjJh2tiMPu4CDSU aP051dg1nXEUVUdWBfLf6IjagPq7RhzFKfZhyDfqAlWAK4cCWkfC3FdDXkv8Bk6hhd3i H3GBW6QMIK7LVb4n40xlBrmQ/RP+cweJBkP2X/G2MqmYDo6sKHkFFxjSpTe2UulbBM8w uwoPupBrCbncz52+cywpp53rtIWsD255o8DL2G9wdl66IDRhfJDsNJPp3c9YpsS30Xjm LdTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZAtK7Zk8PyaaL2KGK3kPqF4OjS65bLvo7hShFbPeFVg=; b=tcOX3K7mS3Ppob4bNADwDL4jAcdgPQOVd7DeNbPtC4/j6anVI6JFBGDc7Gc5EpkKQL bAWXiszLLWK39+fK9AKBiIoWfQTbTftXyksIIW6lj/Yo+r9RTzrHhYcBsMywuOlgjZtp GBMnd1VMG6k0uF811xvZuFsnQS7ENJ3kZMZPCuVQETKFuwMPJ7V2+f3DVVaZvzyeshQZ WVHHfC4Ztt0FUXP1eU45BOoXAXGtO06LiiTzWvIUf1LZtjYrCD4VaMwuq1TbdtPIs+cD OKuzsH1NC19VByOHgVmWtrlsw6gX0xBYLfXYsrBmis/3EqjCI+tLilHG56yplmptlLrw nGuQ== X-Gm-Message-State: AO0yUKUIPEqGEMDJ3BeRTpF7OMRURkR1OJEyAFB8L5hqbwHbKwGEBQJj lsH8+fYQnF/9uRYNhuQ/E4pt X-Google-Smtp-Source: AK7set+EMzHa12KqUL/NDb86FlILLUHVMy1zN2cY1AOIncUop4kjqpuG9W/BS9q6kMU3yX+iB5T5Pg== X-Received: by 2002:a62:62c6:0:b0:5a8:aa1d:30e9 with SMTP id w189-20020a6262c6000000b005a8aa1d30e9mr2605831pfb.18.1677602897942; Tue, 28 Feb 2023 08:48:17 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:17 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 03/16] arm64: dts: qcom: sc7280: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:39 +0530 Message-Id: <20230228164752.55682-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI address (0x40200000) specified in the ranges property for I/O region. Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index bdcb74925313..99845c79a8c4 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2077,7 +2077,7 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; interrupts = ; From patchwork Tue Feb 28 16:47:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657512 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4EBEC64EC7 for ; Tue, 28 Feb 2023 16:49:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229889AbjB1QtE (ORCPT ); Tue, 28 Feb 2023 11:49:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39842 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229845AbjB1Qsy (ORCPT ); Tue, 28 Feb 2023 11:48:54 -0500 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A00C199D7 for ; Tue, 28 Feb 2023 08:48:23 -0800 (PST) Received: by mail-pj1-x1030.google.com with SMTP id oj5so6495622pjb.5 for ; Tue, 28 Feb 2023 08:48:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nw2kwwdY04mwrOWVYrVzs4I0LPxS7ZuXOh7KWbCAYF4=; b=HYm7C2CBsxRoKbhO9gur1eRYPy184yM8vTZPGuYYzRv9PF3O8SYlkVcn/A7XQO2eyS LiUz7M2vNJmIOPrPjMmU3i9E7lh3n2hpr/jf9LCxHvtl7kroWar56dFBVgS7zohxStus LLZMOZvo7eOh/HGl6kqwJbU2J+tYm2w8S7VB2oTT3LjUPeKLSakpgCAjtFc3z7Tb+Dmr D7J8XUEt/o2pLKR9ZMAyhS58YOC6mKlF9gc49TiXOCgi/7lUsoW/dTlH5FUDOiT5Y8N1 A88PhR+RFAF4F8zw3Kf/VObuFdrBX8ZkDVkDW+Q/slRceBPAtqB2tYmCSQzY1WW61vh9 aK9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nw2kwwdY04mwrOWVYrVzs4I0LPxS7ZuXOh7KWbCAYF4=; b=esT+bw4oNVkblVYUcw25Y/EFrN8DPeFV3stQWWJ/Se6clDzgPhHzOqgE4m+thV0WA5 cjRrnm2bPrWqyarItNKUwm7UVhirx3Pb89Tgw42vhb1XT6UCCdZCmHRB2k2bRi1sLQTr HJP3Ay5g8MvJzvPsycbsH8z4C3EwE/Fn1Vf5DfXtkCXLgu2kaofpNDIW7wy1JAk6MheK KJJI9zvgHWWfPJ1uQR7qx1iJQKEwuKToXIWWUwXPdK1AT8DKPDVDsvrrKp4WXa1dxaOE bJQ/k+kBy0s3w5fxoRjJD0lmgsGQ2Tm8XdGWxFNupXjTlz0+BPz/QS+UqlFe6zf9iNX2 TQNg== X-Gm-Message-State: AO0yUKX/IVzvwhPQ2LOyRDIOst7JwBic77PpIdgAHlIhZNFpUkASXAdu 10xuZLQT6txlbsewf+k1r+tt X-Google-Smtp-Source: AK7set/gFnIrOWvw1kqm2mbi9pBSv+ggoNXU3AiSDgZXEBW0EtLOn/hQou9GYrbFNBBohJKOJRiqYA== X-Received: by 2002:a17:902:fb8d:b0:19d:397b:eb4 with SMTP id lg13-20020a170902fb8d00b0019d397b0eb4mr2613738plb.48.1677602902784; Tue, 28 Feb 2023 08:48:22 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:22 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 04/16] arm64: dts: qcom: sm8550: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:40 +0530 Message-Id: <20230228164752.55682-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 7d1158c984d3 ("arm64: dts: qcom: sm8550: Add PCIe PHYs and controllers nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index ff4d342c0725..f8d7b4dde878 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1653,8 +1653,8 @@ pcie0: pci@1c00000 { reg-names = "parf", "dbi", "elbi", "atu", "config"; #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; bus-range = <0x00 0xff>; dma-coherent; @@ -1752,8 +1752,8 @@ pcie1: pci@1c08000 { reg-names = "parf", "dbi", "elbi", "atu", "config"; #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0 0x40200000 0x0 0x100000>, - <0x02000000 0x0 0x40300000 0 0x40300000 0x0 0x1fd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, + <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; bus-range = <0x00 0xff>; dma-coherent; From patchwork Tue Feb 28 16:47:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657904 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30240C7EE30 for ; Tue, 28 Feb 2023 16:49:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229895AbjB1QtF (ORCPT ); Tue, 28 Feb 2023 11:49:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229873AbjB1Qs6 (ORCPT ); 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Tue, 28 Feb 2023 08:48:25 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 05/16] arm64: dts: qcom: ipq8074: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:41 +0530 Message-Id: <20230228164752.55682-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI addresses (0x10200000, 0x20200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses and align them in a single line. Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 62d05d740646..e8dad3ff4fcc 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -780,10 +780,8 @@ pcie1: pci@10000000 { phys = <&pcie_phy1>; phy-names = "pciephy"; - ranges = <0x81000000 0 0x10200000 0x10200000 - 0 0x10000>, /* downstream I/O */ - <0x82000000 0 0x10220000 0x10220000 - 0 0xfde0000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */ + <0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */ interrupts = ; interrupt-names = "msi"; @@ -844,10 +842,8 @@ pcie0: pci@20000000 { phys = <&pcie_phy0>; phy-names = "pciephy"; - ranges = <0x81000000 0 0x20200000 0x20200000 - 0 0x10000>, /* downstream I/O */ - <0x82000000 0 0x20220000 0x20220000 - 0 0xfde0000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */ + <0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */ interrupts = ; interrupt-names = "msi"; From patchwork Tue Feb 28 16:47:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657511 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E7A9C7EE32 for ; Tue, 28 Feb 2023 16:49:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229873AbjB1QtF (ORCPT ); Tue, 28 Feb 2023 11:49:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229876AbjB1Qs7 (ORCPT ); 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Tue, 28 Feb 2023 08:48:28 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 06/16] arm64: dts: qcom: ipq6018: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:42 +0530 Message-Id: <20230228164752.55682-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI address (0x20200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 095bbdd9a5c3 ("arm64: dts: qcom: ipq6018: Add pcie support") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index bbd94025ff5d..9ff4e9d45065 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -738,8 +738,8 @@ pcie0: pci@20000000 { phys = <&pcie_phy0>; phy-names = "pciephy"; - ranges = <0x81000000 0 0x20200000 0 0x20200000 0 0x10000>, - <0x82000000 0 0x20220000 0 0x20220000 0 0xfde0000>; + ranges = <0x81000000 0x0 0x00000000 0x0 0x20200000 0x0 0x10000>, + <0x82000000 0x0 0x20220000 0x0 0x20220000 0x0 0xfde0000>; interrupts = ; interrupt-names = "msi"; From patchwork Tue Feb 28 16:47:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657903 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 808F3C7EE30 for ; Tue, 28 Feb 2023 16:49:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229903AbjB1QtK (ORCPT ); Tue, 28 Feb 2023 11:49:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229845AbjB1QtH (ORCPT ); Tue, 28 Feb 2023 11:49:07 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C20D81D926 for ; Tue, 28 Feb 2023 08:48:33 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id x20-20020a17090a8a9400b00233ba727724so1986999pjn.1 for ; Tue, 28 Feb 2023 08:48:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TSam4VbhOsjeJo0NIo+Ag2QMw9mjy0Qu1lNaBB69VmM=; b=VlrDwcjfd6OGvzbjaXfRrW1QV8ufKg3mXTJwI2T1knFugZkp1hUoL+TZRA+1/2zCEz HXvaewIWLV0Bd6elGrgIl+spdqmxDjnmJmeCMnvt4qwT5xnWkAZWXRcYDueTV3UqR15L viihSguOyTg2+I94EvjD2sqPugp9sLhQ7663jSCTcEw/VQxC9xxfG1hH2KiA6CYgg3ED yHMzU68r6MM0CKGnYHyimkUru1e6pcGQtT65K6n3whukZQYao5ICW83SKCHvQzK+ioOj UTE1CZc6E3F0FlJ7gihMwvesdoNc+11GVGQSrR1r60YSGwmLfQg/RmN5H8PvnJEbKSN4 +41w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TSam4VbhOsjeJo0NIo+Ag2QMw9mjy0Qu1lNaBB69VmM=; b=1PJg8xflOd4U1Ocp/jNvKtKfoKsLKFqdLuLe44lp0eK2kP9qDXeghyfiR27dFHO3O2 9R+ky8h0HNfL9nS20DnT2sjfc3Dne2Z5ywKd6iec9MSlz8WLFxnPmy1kGO/VtElFPsok 8tZkyHYPPZebeOgfAFDzlrKnKzY7V9XA60bKWZ6pNpaVWhYmAL5GzM8Th7TNtLNFUN8N AQ/lODJTNE0vy+eXdBDoMeHNVw8DlVT4ZzF2UujNffdhEDsmj/FZeJLb/3nd/P+F5Z1c GSSWHbp2kaE+9/rivvMd727yrGm3+FsNYCHf5gxB460pyeoZlJtG9xMmID9bINAIHxSv F/3g== X-Gm-Message-State: AO0yUKU5KFV6mP1KkKRH7CEShwfxwjdeyySFEqWQWx7MwQ6LBInNPFbp TUtPsjwjiEOpeIDfZTO1/kjR X-Google-Smtp-Source: AK7set+Z617HWx2PfAxLlytKtd90pYSM/Lvh31pLOIbMolGWNaR/bZoJapngHaECyUsZK0WI4b6h6A== X-Received: by 2002:a17:90b:4ad1:b0:234:1a60:a6b0 with SMTP id mh17-20020a17090b4ad100b002341a60a6b0mr4094464pjb.34.1677602912457; Tue, 28 Feb 2023 08:48:32 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:32 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 07/16] arm64: dts: qcom: msm8996: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:43 +0530 Message-Id: <20230228164752.55682-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x0c200000, 0x0d200000, 0x0e200000) specified in the ranges property for I/O region. While at it, let's also align the entries. Fixes: ed965ef89227 ("arm64: dts: qcom: msm8996: add support to pcie") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 905678e7175d..66af9526c98b 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1851,8 +1851,8 @@ pcie0: pcie@600000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x0c200000 0x0c200000 0x0 0x100000>, - <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0c200000 0x0 0x100000>, + <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>; device_type = "pci"; @@ -1905,8 +1905,8 @@ pcie1: pcie@608000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x0d200000 0x0d200000 0x0 0x100000>, - <0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0d200000 0x0 0x100000>, + <0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>; device_type = "pci"; @@ -1956,8 +1956,8 @@ pcie2: pcie@610000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x0e200000 0x0e200000 0x0 0x100000>, - <0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0e200000 0x0 0x100000>, + <0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>; device_type = "pci"; From patchwork Tue Feb 28 16:47:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657510 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06418C64EC7 for ; Tue, 28 Feb 2023 16:49:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229912AbjB1QtL (ORCPT ); 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Tue, 28 Feb 2023 08:48:35 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 08/16] arm64: dts: qcom: sm8250: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:44 +0530 Message-Id: <20230228164752.55682-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000, 0x64200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: e53bdfc00977 ("arm64: dts: qcom: sm8250: Add PCIe support") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 2f0e460acccd..e592ddcc0f07 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1834,8 +1834,8 @@ pcie0: pci@1c00000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; interrupts = , , @@ -1943,7 +1943,7 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; interrupts = ; @@ -2051,7 +2051,7 @@ pcie2: pci@1c10000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x64200000 0x0 0x64200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x64200000 0x0 0x100000>, <0x02000000 0x0 0x64300000 0x0 0x64300000 0x0 0x3d00000>; interrupts = ; From patchwork Tue Feb 28 16:47:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657902 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7127DC6FA8E for ; Tue, 28 Feb 2023 16:49:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229962AbjB1QtV (ORCPT ); Tue, 28 Feb 2023 11:49:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229934AbjB1QtP (ORCPT ); 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Tue, 28 Feb 2023 08:48:38 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 09/16] arm64: dts: qcom: qcs404: Use 0x prefix for the PCI I/O and MEM ranges Date: Tue, 28 Feb 2023 22:17:45 +0530 Message-Id: <20230228164752.55682-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org To maintain the uniformity, let's use the 0x prefix for the values of ranges property. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index bc2ed73afb74..42fc33ab8b2e 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1469,8 +1469,8 @@ pcie: pci@10000000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0 0x10003000 0 0x00010000>, /* I/O */ - <0x82000000 0 0x10013000 0x10013000 0 0x007ed000>; /* memory */ + ranges = <0x81000000 0x0 0x00000000 0x10003000 0x0 0x00010000>, /* I/O */ + <0x82000000 0x0 0x10013000 0x10013000 0x0 0x007ed000>; /* memory */ interrupts = ; interrupt-names = "msi"; From patchwork Tue Feb 28 16:47:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657901 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1BDBC64ED6 for ; Tue, 28 Feb 2023 16:49:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229845AbjB1Qt2 (ORCPT ); Tue, 28 Feb 2023 11:49:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229965AbjB1Qt1 (ORCPT ); Tue, 28 Feb 2023 11:49:27 -0500 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A5E3241C1 for ; Tue, 28 Feb 2023 08:48:43 -0800 (PST) Received: by mail-pl1-x634.google.com with SMTP id a2so641961plm.4 for ; Tue, 28 Feb 2023 08:48:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+mOXZ9qyQvv5sAkxxgH4iBEQJ9SxMhQVCvClo14WEls=; b=XT9Ge0azEd179tHlw2pSwavkiX0F9mGy47gdOEuNULHly3fiCsNMl7Tqn5xPYhNVse IYHBsvuwFB/rtt6CnWX2Eu0YOeAWacGkFLQ3vvnJ6doGAo5imhBNdsUk6BNsf9RWIF+E LQZouNgcGpKt6mqX/7qhCFuxeTD4QtmXAa7+Y0wZZDsqjB+YJ3N16zYdElts87jbfWhN 1JBvu+J4BLTrJoqSbJst/Mju5xvXoAP/z03RgIpyPHqCaxqtuwhDBMYjfaJ4l5u9bHDh 9JVl7SS/ZPrXpJsBW2dHWhfY2iIN9R/FnPAmMILB4oksgJD2yyNsZhJv7HGHAfmetspH Gbjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+mOXZ9qyQvv5sAkxxgH4iBEQJ9SxMhQVCvClo14WEls=; b=aQhCF7salfbgTkaMiTG7TLaYgFoSoa4z189G5oIgeYM+vaixIUfpaqOjqh2sUMNAI6 gYKRsvSH1PYoRvSEvnomv7ZyHaPAC/yy/PpstfW+Bd8HOWYHrSTb69xAUC1UQUutiHLS 6lfZlolKL4kEF1+sranyQyQ57+nqgywpk5d9iSaVnjc3zLbyL+CPfPYeXcfZCLPtQPKo SEWCoWw725mZZ1nan/y/hwZowEMzNRbmiMtoP5mlB20hbUn+mPVrX7tun7Vjr7EeJWu1 yRfPRhNR9B88J8VC+v0v3q7zm5ZGq3xiTggmH0DwvUZPbohQLOnfW22XI0WdyeIg9kpt G2nA== X-Gm-Message-State: AO0yUKVocH3f7yxyKZ8XEzNk3emBpVJwuLP9ndLn3hh+gK4RaGBNtEzB nmXq6ll6KeOZuLww1fZgV0iB X-Google-Smtp-Source: AK7set9ZrqcVy8UGFbcDLQHMhw6Gg+BYvupVH/rHxZQU7eRrkxNSBkRhHUubgwjF62tE3xBTaXnbyg== X-Received: by 2002:a17:902:e801:b0:19a:b4a9:9df7 with SMTP id u1-20020a170902e80100b0019ab4a99df7mr3750511plg.53.1677602922957; Tue, 28 Feb 2023 08:48:42 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:42 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 10/16] arm64: dts: qcom: sc8280xp: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:46 +0530 Message-Id: <20230228164752.55682-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x30200000, 0x32200000, 0x34200000, 0x38200000, 0x3c200000) specified in the ranges property for I/O region. Fixes: 813e83157001 ("arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 0d02599d8867..a0065656442c 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1657,7 +1657,7 @@ pcie4: pcie@1c00000 { reg-names = "parf", "dbi", "elbi", "atu", "config"; #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x30200000 0x0 0x30200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x30200000 0x0 0x100000>, <0x02000000 0x0 0x30300000 0x0 0x30300000 0x0 0x1d00000>; bus-range = <0x00 0xff>; @@ -1756,7 +1756,7 @@ pcie3b: pcie@1c08000 { reg-names = "parf", "dbi", "elbi", "atu", "config"; #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x32200000 0x0 0x32200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x32200000 0x0 0x100000>, <0x02000000 0x0 0x32300000 0x0 0x32300000 0x0 0x1d00000>; bus-range = <0x00 0xff>; @@ -1853,7 +1853,7 @@ pcie3a: pcie@1c10000 { reg-names = "parf", "dbi", "elbi", "atu", "config"; #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x34200000 0x0 0x34200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x34200000 0x0 0x100000>, <0x02000000 0x0 0x34300000 0x0 0x34300000 0x0 0x1d00000>; bus-range = <0x00 0xff>; @@ -1953,7 +1953,7 @@ pcie2b: pcie@1c18000 { reg-names = "parf", "dbi", "elbi", "atu", "config"; #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x38200000 0x0 0x38200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x38200000 0x0 0x100000>, <0x02000000 0x0 0x38300000 0x0 0x38300000 0x0 0x1d00000>; bus-range = <0x00 0xff>; @@ -2050,7 +2050,7 @@ pcie2a: pcie@1c20000 { reg-names = "parf", "dbi", "elbi", "atu", "config"; #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x3c200000 0x0 0x100000>, <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>; bus-range = <0x00 0xff>; From patchwork Tue Feb 28 16:47:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657509 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F842C7EE33 for ; Tue, 28 Feb 2023 16:49:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229968AbjB1Qt3 (ORCPT ); Tue, 28 Feb 2023 11:49:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229940AbjB1Qt2 (ORCPT ); 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Tue, 28 Feb 2023 08:48:45 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 11/16] arm64: dts: qcom: sm8150: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:47 +0530 Message-Id: <20230228164752.55682-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: a1c86c680533 ("arm64: dts: qcom: sm8150: Add PCIe nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e..1fabfa05708c 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1799,8 +1799,8 @@ pcie0: pci@1c00000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; interrupts = ; interrupt-names = "msi"; @@ -1895,7 +1895,7 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; interrupts = ; From patchwork Tue Feb 28 16:47:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657508 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53691C64EC7 for ; Tue, 28 Feb 2023 16:49:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229981AbjB1Qtn (ORCPT ); Tue, 28 Feb 2023 11:49:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229982AbjB1Qtm (ORCPT ); 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Tue, 28 Feb 2023 08:48:50 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 12/16] arm64: dts: qcom: sm8450: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:48 +0530 Message-Id: <20230228164752.55682-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: bc6588bc25fb ("arm64: dts: qcom: sm8450: add PCIe1 root device") Fixes: 7b09b1b47335 ("arm64: dts: qcom: sm8450: add PCIe0 RC device") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 1a744a33bcf4..3c9b9425da12 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -1746,8 +1746,8 @@ pcie0: pci@1c00000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; /* * MSIs for BDF (1:0.0) only works with Device ID 0x5980. @@ -1862,8 +1862,8 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0 0x40200000 0x0 0x100000>, - <0x02000000 0x0 0x40300000 0 0x40300000 0x0 0x1fd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, + <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; /* * MSIs for BDF (1:0.0) only works with Device ID 0x5a00. From patchwork Tue Feb 28 16:47:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3F75C64EC7 for ; Tue, 28 Feb 2023 16:49:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230019AbjB1Qty (ORCPT ); Tue, 28 Feb 2023 11:49:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229994AbjB1Qtw (ORCPT ); Tue, 28 Feb 2023 11:49:52 -0500 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E856C3019E for ; Tue, 28 Feb 2023 08:48:54 -0800 (PST) Received: by mail-pl1-x62f.google.com with SMTP id v11so7552156plz.8 for ; Tue, 28 Feb 2023 08:48:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=whT3aUmNdS5fuKcmFu2oegzQXBPH9cSV0MhwaeSEqaQ=; b=p89BVizFoCt2rywjb8ir45QqgmNYWpQsCliA7iowjoGG0Bcad9SJQlConyNwAPtkig ImTddcogyI2LJM8zDae5BeMaJsgp8VAUp0O7eKZmfwnhGzOSw0MhCfidV4UqIkxpwGut GhoNtT5GaTAiRDJ2vtPEx2eJg4Ea10yPECVhZdz1KyIrOrq8K2B5y9EhzGDZBP9UQAQR GfXnI5QeNqEv2RyO+lfnATsZHkIbG5tYhnV0Mpbohr4fp+ZrjgpLbcGgd9VTG6AiMYWP Qc4vsojgjBcsKe1qogHX5cwDtF1D/ExiXoGgsWvxuq9k0pEOnnFXLvEvRVyOphBlOejO 9PYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=whT3aUmNdS5fuKcmFu2oegzQXBPH9cSV0MhwaeSEqaQ=; b=0a2hsxzJvzWNl/nuc6iTx/+6qaBfwp6+AH4yjU3ekDF78LaW2Tj0cxc8aSdP4WDWNX 8GuoR2ZuY6zweYPXQmeiZ6qcF733o31mEEL/isMnjzXF961L/RPKFCPuGoupYup5otGc mPBDsbOI6P9xbUpoywDHjLBd7KdpvigBDck3omC3pACnoLkvegldELWlvmucjr2XohE1 yb205I196Cic82nPOyJNnT469O1HCE/sGnOrAfpkQbxFw34nlXoWvIAVN16E2xNVcfVW VR+ADAcxUom3pTlb73ZJQgcGpn/vYPos7OKl6LNqxMYKeQpvqvdKrX4UHk4pWgZiTWYe PNkw== X-Gm-Message-State: AO0yUKX1FX7zrXLaoZuBMtYjIBdMmpR4cBx5m9ZfWigcXj+Kt5Vb/4CF t82v6Zls1Ga1ysMoK74LHulp X-Google-Smtp-Source: AK7set/ahJIG+lUGu0BS6YWnsnOmtBqfqpRp6Vdmc/erZoTHqT3mfhvyqmCT5nd+wiXj/p684Uc5xA== X-Received: by 2002:a05:6a21:32a9:b0:cc:70df:ae20 with SMTP id yt41-20020a056a2132a900b000cc70dfae20mr13348786pzb.0.1677602933956; Tue, 28 Feb 2023 08:48:53 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:53 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 13/16] arm64: dts: qcom: sm8350: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:49 +0530 Message-Id: <20230228164752.55682-14-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 6daee40678a0 ("arm64: dts: qcom: sm8350: add PCIe devices") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 1c97e28da6ad..1ca16bfc8988 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -1487,8 +1487,8 @@ pcie0: pci@1c00000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; interrupts = , , @@ -1581,8 +1581,8 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0 0x40200000 0x0 0x100000>, - <0x02000000 0x0 0x40300000 0 0x40300000 0x0 0x1fd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, + <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; interrupts = ; interrupt-names = "msi"; From patchwork Tue Feb 28 16:47:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657507 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEECDC6FA8E for ; Tue, 28 Feb 2023 16:50:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230015AbjB1QuD (ORCPT ); Tue, 28 Feb 2023 11:50:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230022AbjB1QuC (ORCPT ); Tue, 28 Feb 2023 11:50:02 -0500 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACDAF15158 for ; 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Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 92aa2b081901..210b24e510c5 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1494,8 +1494,8 @@ pcie: pci@1b500000 { num-lanes = <1>; #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, /* I/O */ - <0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* mem */ + ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00100000>, /* I/O */ + <0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* mem */ interrupts = ; interrupt-names = "msi"; #interrupt-cells = <1>; From patchwork Tue Feb 28 16:47:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657899 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3CC6C6FA8E for ; Tue, 28 Feb 2023 16:50:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230001AbjB1QuT (ORCPT ); Tue, 28 Feb 2023 11:50:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229984AbjB1QuS (ORCPT ); Tue, 28 Feb 2023 11:50:18 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F41A15578 for ; Tue, 28 Feb 2023 08:49:04 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id x34so10510069pjj.0 for ; Tue, 28 Feb 2023 08:49:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/rPNL7OOm49xO0wH+mNw58JIW/pmslpKxDJsE0yTDiI=; b=yVYy3gqMzYa8QWcJUQJu0il8VlRwpPnXqY8B8yo+nG3koa7pl84gSPtl11GPgHPJh0 BsG+G3BUQyENKP9EymRy4xJOKKL1tb1o+0YpFariumLXvUWG8ECrroTlnqxRm7kfXVCD ODfguzCvSu6JWuD3mbeX6ajDSqllFmWLYwob7ICD80gWz4Jl951nvaFlS01IFpDpIB88 wmXNQA0mnylok6x00kSmk09iIg3yZrsWsQW81EVJq3VEvDEolT13kTtCLRzqVWc/kPAX nVDkBMHyK6RlGlHfk29V8rlbY/vWk+clppFMiqh5yT+AZB0JrbTualNqQQ2uZmOo3KYT RmtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/rPNL7OOm49xO0wH+mNw58JIW/pmslpKxDJsE0yTDiI=; b=rR0bfo7Jq4pNHNV35RAStFWTY7tAjVnLcXN3IHIMU7xlizHWAX4p010RgCyjL+f7iC fGegLdTwc8lG9cIgVkqCJjJvQHhry5Oj3u8DSBnrlFhVZUd7785D+GdN43jiu3o1T+GA HxGnXThiUJbPbFIzPxbkVmQdnJq0W7CfkBJVYLIw/CEpmXHRx/YKtiLvPLXGAPBmHSqo boqJcK64nX14h2JU29JLehuXyAhCCLlSoO/jm9FuKQE+jdEZ4snh3qmpUyaDbI4Z3L79 I17Y5+/kK6ovpVTC4bTA+rQangup15VtH4yyvlvRIwFlF45r2kjveaYeQeEAbXpZEH7e iqUw== X-Gm-Message-State: AO0yUKWihlbRiqL2jMOo1Ao/kAi+PTbDdhvSeoxF1fao62fvqQqNsIl9 Mt+lVD/YZh3qpE+7AzGSYgmH X-Google-Smtp-Source: AK7set9gzknrsbZmUorBTBisjOuHHwHobtO6UGHqglFK6C2biqfkcx3wRl0jUwTzayqrO7WMzPjNCw== X-Received: by 2002:a17:90b:3510:b0:234:157:a264 with SMTP id ls16-20020a17090b351000b002340157a264mr3808978pjb.43.1677602940166; Tue, 28 Feb 2023 08:49:00 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:59 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 15/16] ARM: dts: qcom: ipq4019: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:51 +0530 Message-Id: <20230228164752.55682-16-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI address (0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 187519403273 ("ARM: dts: ipq4019: Add a few peripheral nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index 02e9ea78405d..1159268f06d7 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -426,8 +426,8 @@ pcie0: pci@40000000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>, - <0x82000000 0 0x40300000 0x40300000 0 0x00d00000>; + ranges = <0x81000000 0x0 0x00000000 0x40200000 0x0 0x00100000>, + <0x82000000 0x0 0x40300000 0x40300000 0x0 0x00d00000>; interrupts = ; interrupt-names = "msi"; From patchwork Tue Feb 28 16:47:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657506 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DBA5C64EC7 for ; Tue, 28 Feb 2023 16:50:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230006AbjB1Qu0 (ORCPT ); Tue, 28 Feb 2023 11:50:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229993AbjB1QuZ (ORCPT ); Tue, 28 Feb 2023 11:50:25 -0500 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D159C1CF7A for ; Tue, 28 Feb 2023 08:49:08 -0800 (PST) Received: by mail-pl1-x636.google.com with SMTP id h8so7781394plf.10 for ; Tue, 28 Feb 2023 08:49:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3eNassO9Vnm8zgaO1p6R8ZkRqE+XYfqCv7XBdpZWD1Y=; b=LCv6//91hcHhzEyZAsytIU78+WAzK+RKLx+VZQAOnBh1cqUyRSNrcDspccX2RyUGFk 2/9Yn+GfyJPheITtQKnJxTT6g2t4Ifb9dE+w+uUZtYFAUP2Ffk4x8vSvdiRss+1HrdtX 9AMC6VANMxSSuOea51f2eTGiKmX1Ki+rPdJHdqkSrfNAyygf6/99JM2hJfIj+ATXqc2P H/zdtaIJZ34z/6jXBO++hbaz+b/g/GZy5pLS7foyn5EXjv+TOMNF3q1uTMju0cyjtCo+ kYmRtO1ZlCa1GqA4SyFNciCNVj78n7RjqecctcCvnh1B1LytkyKBvvkXgWThufOi9cPV F/YQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3eNassO9Vnm8zgaO1p6R8ZkRqE+XYfqCv7XBdpZWD1Y=; b=3DdY8wRdayJ09C/qOWStVpezrvoCCJgEaJhO9Fs3H/uu+nW/AeiZAaL8x0YZue+8Vy 8P6rrZgI1vtk8JoFqV/J5AaNncBXBx1R4rll1+UMh0Y17xWC75WIes+NY4L3zrc28I9m gua41Ff7j521qmE4QrfwFJmRyw47ThBP7d8fj++p0ZsO5Cl94R0JUnATL3WMwDtbyJMV XB858mXsAKt/Td9ZCMkAFmVMoL5CxK4Objq8GIv4P7TZbz8Cj+qDVx5GfGo8yIfFyOPV vSzE00uSahqLEp4ecEBpr2ul6ScszG2pt9V2Tc83yAEmphvV/7eGE/iDChpESfu818Cw Ermg== X-Gm-Message-State: AO0yUKVGoOy2sQB9+Yd1bFLRL77SUM/APVUGLhjcWphomJkbSFRufLxN 93bQU3HYRK/n7nwMoHBzr1nL X-Google-Smtp-Source: AK7set9KfUERT3EJgDtWDZi4ewKw09o+m9bxhqSAPTR+TI4pOeNWXbB26QjwfD0A8OGvaEIR9PLrdA== X-Received: by 2002:a05:6a20:a11f:b0:cc:32a8:323d with SMTP id q31-20020a056a20a11f00b000cc32a8323dmr10165721pzk.28.1677602943395; Tue, 28 Feb 2023 08:49:03 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.49.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:49:03 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 16/16] ARM: dts: qcom: ipq8064: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:52 +0530 Message-Id: <20230228164752.55682-17-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI addresses (0x0fe00000, 0x31e00000, 0x35e00000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 93241840b664 ("ARM: dts: qcom: Add pcie nodes for ipq8064") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 52d77e105957..59fc18c448c4 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -1081,8 +1081,8 @@ pcie0: pci@1b500000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000 /* downstream I/O */ - 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00010000 /* I/O */ + 0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* MEM */ interrupts = ; interrupt-names = "msi"; @@ -1132,8 +1132,8 @@ pcie1: pci@1b700000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000 /* downstream I/O */ - 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x31e00000 0x0 0x00010000 /* I/O */ + 0x82000000 0x0 0x2e000000 0x2e000000 0x0 0x03e00000>; /* MEM */ interrupts = ; interrupt-names = "msi"; @@ -1183,8 +1183,8 @@ pcie2: pci@1b900000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000 /* downstream I/O */ - 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x35e00000 0x0 0x00010000 /* I/O */ + 0x82000000 0x0 0x32000000 0x32000000 0x0 0x03e00000>; /* MEM */ interrupts = ; interrupt-names = "msi";