From patchwork Mon Feb 27 11:39:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1201C64ED8 for ; Mon, 27 Feb 2023 11:39:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229613AbjB0Ljr (ORCPT ); Mon, 27 Feb 2023 06:39:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229542AbjB0Ljr (ORCPT ); Mon, 27 Feb 2023 06:39:47 -0500 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 28715E388 for ; Mon, 27 Feb 2023 03:39:45 -0800 (PST) Received: by mail-pj1-x102c.google.com with SMTP id oj5so1823794pjb.5 for ; Mon, 27 Feb 2023 03:39:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gbvjHStPQvWuSxXASASmwsU09AsH+4vOrw1mjy5ckwY=; b=i5B0FixjlQAeniBvFoCRRwtNmIjGbLibxLKhgIss3CJKFTMa+UkvjbxGYekZ7AyPIO VDWylpr22KcnMHD+jbC65G9w7JXsh9vT51W2HZ/JIwbl8/BhkDVZ1qhp6YNfL5+aHGq6 Yy5DMroh2ZsRjYD+5NBk+TQFeSR35g8hpyh8w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gbvjHStPQvWuSxXASASmwsU09AsH+4vOrw1mjy5ckwY=; b=n63s7+SGEZ11KKwWvfSNVDKbMZkdJMFUOrMcgvVmhYsOlmiQSCrCWDvHMDGMMeTaIZ DgOykxVV7eF6O180ysT+vNLXjn6yXicOHsV4Pb4mbDoISABpPYnX7b/VPHI8qjW1NOUe owejfAXXKKzXSnjgJUP6Apn5cqH6xyxnNW0Cj6JuDVHLG8ZKvqBTYhMX5inQhb0bWQV7 VjYoVG2vTWJseEjQYRmRa/wEjOu6QS9ZvFOC6VhLg+IV+6OMe5igjIbJff1H7kpnLPpi Ivy2ONr1tg3RQxD5ajsjilGgJSksUz4VPJ/7k6hXEYybgOYPfQ5bZ0ml5V8IHbm1UBz0 uFXQ== X-Gm-Message-State: AO0yUKUab1C40QE5IHMXCjak7SimkI3S5hbtPBVMCPro10GvnJVEfkY/ WF+rQkoKaAX60kvH8k+JZqrB1A== X-Google-Smtp-Source: AK7set/BJ9W9t54aSPTvs74Tg8dnzeEpcdgJ7xSNZqMRnw3iwtYDk5oZculhJ+UgUnZk7423Rrmq5g== X-Received: by 2002:a17:902:db0f:b0:19c:edcd:26cf with SMTP id m15-20020a170902db0f00b0019cedcd26cfmr9443714plx.61.1677497984630; Mon, 27 Feb 2023 03:39:44 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.39.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:39:44 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki , Maxime Ripard , Linus Walleij , Maarten Lankhorst Subject: [PATCH v13 01/18] drm: of: Lookup if child node has DSI panel or bridge Date: Mon, 27 Feb 2023 17:09:08 +0530 Message-Id: <20230227113925.875425-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Devices can also be child nodes when we also control that device through the upstream device (ie, MIPI-DCS for a MIPI-DSI device). Unlike the drm_of_find_panel_or_bridge helper it requires a special case to lookup a child node of the given parent that isn't either port or ports. Lookup for a child DSI node of the given parent that isn't either port or ports. If it is found then it will directly find the panel or bridge otherwise lookup for the child node with a given port and endpoint number as drm_of_find_panel_or_bridge does. Supporting this feature via existing drm_of_find_panel_or_bridge found several issues while handling usecases. Here is the previously failed attempt of similar and the same has been reverted later. commit <80253168dbfd> ("drm: of: Lookup if child node has panel or bridge") So, add a separate helper to handle this DSI use case. Example OF graph representation of DSI host, which has port but not has ports and has child panel node. dsi { compatible = "allwinner,sun6i-a31-mipi-dsi"; #address-cells = <1>; #size-cells = <0>; port { dsi_in_tcon0: endpoint { remote-endpoint = ; }; panel@0 { reg = <0>; }; }; Example OF graph representation of DSI host, which has ports but not has port and has child panel node. dsi { compatible = "samsung,exynos5433-mipi-dsi"; #address-cells = <1>; #size-cells = <0>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dsi_to_mic: endpoint { remote-endpoint = <&mic_to_dsi>; }; }; }; panel@0 { reg = <0>; }; }; Example OF graph representation of DSI host, which has neither a port nor a ports but has child panel node. dsi0 { compatible = "ste,mcde-dsi"; #address-cells = <1>; #size-cells = <0>; panel@0 { reg = <0>; }; }; Cc: Maxime Ripard Cc: Laurent Pinchart Cc: Linus Walleij Cc: Maarten Lankhorst Signed-off-by: Jagan Teki --- Changes for v13, v12: - none Changes for v11: - drop extra line Changes for v10: - new patch drivers/gpu/drm/drm_of.c | 112 ++++++++++++++++++++++++++++++++------- include/drm/drm_of.h | 12 +++++ 2 files changed, 104 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c index 177b600895d3..87cfd685318a 100644 --- a/drivers/gpu/drm/drm_of.c +++ b/drivers/gpu/drm/drm_of.c @@ -217,6 +217,35 @@ int drm_of_encoder_active_endpoint(struct device_node *node, } EXPORT_SYMBOL_GPL(drm_of_encoder_active_endpoint); +static int of_drm_find_panel_or_bridge(struct device_node *remote, + struct drm_panel **panel, + struct drm_bridge **bridge) +{ + int ret = -EPROBE_DEFER; + + if (panel) { + *panel = of_drm_find_panel(remote); + if (!IS_ERR(*panel)) + ret = 0; + else + *panel = NULL; + } + + /* No panel found yet, check for a bridge next. */ + if (bridge) { + if (ret) { + *bridge = of_drm_find_bridge(remote); + if (*bridge) + ret = 0; + } else { + *bridge = NULL; + } + } + + of_node_put(remote); + return ret; +} + /** * drm_of_find_panel_or_bridge - return connected panel or bridge device * @np: device tree node containing encoder output ports @@ -239,7 +268,6 @@ int drm_of_find_panel_or_bridge(const struct device_node *np, struct drm_panel **panel, struct drm_bridge **bridge) { - int ret = -EPROBE_DEFER; struct device_node *remote; if (!panel && !bridge) @@ -260,30 +288,74 @@ int drm_of_find_panel_or_bridge(const struct device_node *np, if (!remote) return -ENODEV; - if (panel) { - *panel = of_drm_find_panel(remote); - if (!IS_ERR(*panel)) - ret = 0; - else - *panel = NULL; - } + return of_drm_find_panel_or_bridge(remote, panel, bridge); +} +EXPORT_SYMBOL_GPL(drm_of_find_panel_or_bridge); - /* No panel found yet, check for a bridge next. */ - if (bridge) { - if (ret) { - *bridge = of_drm_find_bridge(remote); - if (*bridge) - ret = 0; - } else { - *bridge = NULL; - } +/** + * drm_of_dsi_find_panel_or_bridge - return connected DSI panel or bridge device + * @np: device tree node containing encoder output ports + * @port: port in the device tree node + * @endpoint: endpoint in the device tree node + * @panel: pointer to hold returned drm_panel + * @bridge: pointer to hold returned drm_bridge + * + * Lookup for a child DSI node of the given parent that isn't either port + * or ports. If it is found then it will directly find the panel or bridge + * otherwise lookup for the child node with a given port and endpoint number + * as drm_of_find_panel_or_bridge does. + * + * Lookup a given child DSI node or a DT node's port and endpoint number, + * find the connected node and return either the associated struct drm_panel + * or drm_bridge device. Either @panel or @bridge must not be NULL. + * + * Returns zero if successful, or one of the standard error codes if it fails. + */ +int drm_of_dsi_find_panel_or_bridge(const struct device_node *np, + int port, int endpoint, + struct drm_panel **panel, + struct drm_bridge **bridge) +{ + struct device_node *remote; + + if (!panel && !bridge) + return -EINVAL; + if (panel) + *panel = NULL; + /** + * Devices can also be child nodes when we also control that device + * through the upstream device (ie, MIPI-DCS for a MIPI-DSI device). + * + * Lookup for a child node of the given parent that isn't either port + * or ports. + */ + for_each_available_child_of_node(np, remote) { + if (of_node_name_eq(remote, "port") || + of_node_name_eq(remote, "ports")) + continue; + + goto of_find_panel_or_bridge; } - of_node_put(remote); - return ret; + /* + * of_graph_get_remote_node() produces a noisy error message if port + * node isn't found and the absence of the port is a legit case here, + * so at first we silently check whether graph presents in the + * device-tree node. + */ + if (!of_graph_is_present(np)) + return -ENODEV; + + remote = of_graph_get_remote_node(np, port, endpoint); + +of_find_panel_or_bridge: + if (!remote) + return -ENODEV; + + return of_drm_find_panel_or_bridge(remote, panel, bridge); } -EXPORT_SYMBOL_GPL(drm_of_find_panel_or_bridge); +EXPORT_SYMBOL_GPL(drm_of_dsi_find_panel_or_bridge); enum drm_of_lvds_pixels { DRM_OF_LVDS_EVEN = BIT(0), diff --git a/include/drm/drm_of.h b/include/drm/drm_of.h index 082a6e980d01..5e0d958121ce 100644 --- a/include/drm/drm_of.h +++ b/include/drm/drm_of.h @@ -49,6 +49,10 @@ int drm_of_find_panel_or_bridge(const struct device_node *np, int port, int endpoint, struct drm_panel **panel, struct drm_bridge **bridge); +int drm_of_dsi_find_panel_or_bridge(const struct device_node *np, + int port, int endpoint, + struct drm_panel **panel, + struct drm_bridge **bridge); int drm_of_lvds_get_dual_link_pixel_order(const struct device_node *port1, const struct device_node *port2); int drm_of_lvds_get_data_mapping(const struct device_node *port); @@ -101,6 +105,14 @@ static inline int drm_of_find_panel_or_bridge(const struct device_node *np, return -EINVAL; } +static inline int drm_of_dsi_find_panel_or_bridge(const struct device_node *np, + int port, int endpoint, + struct drm_panel **panel, + struct drm_bridge **bridge) +{ + return -EINVAL; +} + static inline int drm_of_lvds_get_dual_link_pixel_order(const struct device_node *port1, const struct device_node *port2) From patchwork Mon Feb 27 11:39:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 657421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA6A7C64ED6 for ; Mon, 27 Feb 2023 11:39:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229542AbjB0Ljy (ORCPT ); Mon, 27 Feb 2023 06:39:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229616AbjB0Ljx (ORCPT ); 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Mon, 27 Feb 2023 03:39:51 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki , Maxime Ripard , Linus Walleij , Maarten Lankhorst Subject: [PATCH v13 02/18] drm: bridge: panel: Support nodrm case for drmm_panel_bridge_add Date: Mon, 27 Feb 2023 17:09:09 +0530 Message-Id: <20230227113925.875425-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org drmm_panel_bridge_add DRM-managed action helper is useful for the bridge which automatically removes the bridge when drm pointer is cleaned. Supporting the same on non-component bridges like host DSI bridge requires a drm pointer which is indeed available only when a panel-bridge is found. For these use cases, the caller would call the drmm_panel_bridge_add by passing NULL to drm pointer. So, assign the bridge->dev to drm pointer for those cases. Cc: Maxime Ripard Cc: Laurent Pinchart Cc: Linus Walleij Cc: Maarten Lankhorst Signed-off-by: Jagan Teki --- Changes for v13: - new patch Note: use case on "[PATCH v13 04/18] drm: exynos: dsi: Switch to DSI panel or bridge find helper" drivers/gpu/drm/bridge/panel.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/bridge/panel.c b/drivers/gpu/drm/bridge/panel.c index d4b112911a99..45a0c6671000 100644 --- a/drivers/gpu/drm/bridge/panel.c +++ b/drivers/gpu/drm/bridge/panel.c @@ -402,6 +402,13 @@ struct drm_bridge *drmm_panel_bridge_add(struct drm_device *drm, if (IS_ERR(bridge)) return bridge; + /* + * For non-component bridges, like host DSI bridge the DRM pointer + * can be available only when a panel-bridge is found. + */ + if (!drm) + drm = bridge->dev; + ret = drmm_add_action_or_reset(drm, drmm_drm_panel_bridge_release, bridge); if (ret) From patchwork Mon Feb 27 11:39:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD370C64ED6 for ; Mon, 27 Feb 2023 11:40:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229616AbjB0LkB (ORCPT ); Mon, 27 Feb 2023 06:40:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229608AbjB0LkA (ORCPT ); Mon, 27 Feb 2023 06:40:00 -0500 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF90F11674 for ; Mon, 27 Feb 2023 03:39:59 -0800 (PST) Received: by mail-pj1-x102b.google.com with SMTP id x34so5847378pjj.0 for ; Mon, 27 Feb 2023 03:39:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+rsXUA1KC0Yo0ZaAbDx/BQxkAqMf2mzDgWqmsD9i/BI=; b=eZ7KZSmMRN5/NNRkc88HUUlo+bZewhD9hLYONuMIxZUQVGbzisbr0iNvz9GPLyiNvP bnF+aE3VJvwPjQfQMQUNtRewgzE+amUN0OryL9Z3wdRMN/HZMaZu02LWvPWvBw7+OHRW HPvqpX2dYFiOj7I89gta7UFVIRomCtogdPrEs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+rsXUA1KC0Yo0ZaAbDx/BQxkAqMf2mzDgWqmsD9i/BI=; b=RpOM47Nkm6VwVE7y+/MfyQfdb/RyEq7u2ObXWH153aQNm+aM/DAYRKFZD3agRtG54x rFoGOPYaSlHLzFnWFgKVs5yQqN2aqX3EK0vWPdg/uiI5lfWXQM3WGm5DNRCxHTSfrJl5 4BL5pNPnanGG64EtmUGqxgazFz5+UnuXFzytLlG0kcJNEqgjmomNnbGaB80WsUvTDQO+ BFKBVzwJPneNm2BJofYgx1vsPIc0KNHkRDdpViUXLmNWhm+tX4aHMcykImTLVjXohZ4q rcwrGgkBosa+HTX6wfPMrhhK2G/qf4Paw7ePdWEskEyOYVKmu5hpBF2nga33ewWZHsoH XmIA== X-Gm-Message-State: AO0yUKVT6bAJmGBqLC3eFyvTqmlWHV4N8LKg5qCHLhU8pv41KCdsOkrs FOOYl8MtLJqLSgrWDgbD55XCJQ== X-Google-Smtp-Source: AK7set9liMsOr27MdRyeWehoz6qo7iJGYnzUHNMJqJYFfXfb/J46WFubYCRG6IV8hhlwMeKNw2KcnA== X-Received: by 2002:a17:902:d2c6:b0:19d:1dfe:eac8 with SMTP id n6-20020a170902d2c600b0019d1dfeeac8mr1802046plc.26.1677497999350; Mon, 27 Feb 2023 03:39:59 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.39.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:39:58 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 03/18] drm: exynos: dsi: Drop explicit call to bridge detach Date: Mon, 27 Feb 2023 17:09:10 +0530 Message-Id: <20230227113925.875425-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Exynos DSI already converted into a bridge driver, so bridge detach will suppose happened during bridge chain removal done by the bridge core. Drop the explicit call chain to detach the bridge. Signed-off-by: Jagan Teki --- Changes for v13, v12, v11: - none Changes for v10: - new patch drivers/gpu/drm/exynos/exynos_drm_dsi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 06d6513ddaae..df15501b1075 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1531,8 +1531,6 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, struct exynos_dsi *dsi = host_to_dsi(host); struct drm_device *drm = dsi->encoder.dev; - if (dsi->out_bridge->funcs->detach) - dsi->out_bridge->funcs->detach(dsi->out_bridge); dsi->out_bridge = NULL; if (drm->mode_config.poll_enabled) From patchwork Mon Feb 27 11:39:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 657420 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F640C64ED8 for ; Mon, 27 Feb 2023 11:40:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229657AbjB0LkI (ORCPT ); Mon, 27 Feb 2023 06:40:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37982 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229639AbjB0LkH (ORCPT ); Mon, 27 Feb 2023 06:40:07 -0500 Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D02F21284A for ; Mon, 27 Feb 2023 03:40:06 -0800 (PST) Received: by mail-pl1-x635.google.com with SMTP id ky4so6394241plb.3 for ; Mon, 27 Feb 2023 03:40:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=N1ZnzcX6mJcklgIlxO4H+jhNQQoX1Q7wrMHIRpiIlXQ=; b=gPmtRl7o/gvgryv9Forg6QUIlY4pxym14sRc75prF3j8+RJzmSIINSVdMaENOs1e5g KAk0UL5oiDxhVixkLGLKLcd6AlhoblZ5QY6ZfyC4+V4Ng4Si2AKgM+TidR/HX1MA2Ih5 n+85lVvWCrrKoSvHcORCVU88KrfneKq/Wy1os= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=N1ZnzcX6mJcklgIlxO4H+jhNQQoX1Q7wrMHIRpiIlXQ=; b=DGdjvCQGIo+93WaJlMW/Z+sv26a32XN6rnkA5vZh6PpJaz/1v33lCbYqmWOq1UAv/P NWPc8MXFHEfGCmFpE1IXh+RMDUXm7cL6m/2pdlVQgsLtolaTxRdkbOMvsb1uvjmcVpmY mEfexD7IwFiAzhSl8EbxWfDT0JChqYdFAvUvSfb8WcWjeKB0Cu//aokVgs3PaTu2mUuE ToENUIL993lIxluPZv/pC++wCzxa6NFfHY9xAkvubGOggV2ZD35FLpikQZIIKVncnLxG 7vdTDNmlVDMbfnXpIX2i8F+gaGw/pwEYv2Q5yjJo0dWRuecCN7L3du9jsG6NEOuOuZFW JOLA== X-Gm-Message-State: AO0yUKW7zFMNvNzqTi2fEoWJBZYDJlBIGjIzNNcK/QKDh0/+M2t3Ci8r g70AoJ5uqNsVFKMq36SvEid9S3G98EAOEngBECs= X-Google-Smtp-Source: AK7set/sHrlW+bT0OuPrRs9R8JYcXfvDbAW5REUG+10aoyqgeKq6Zk8Q/5QxU9HPeAUD+xb8ZkTZxQ== X-Received: by 2002:a17:902:d48b:b0:19d:20d7:d51 with SMTP id c11-20020a170902d48b00b0019d20d70d51mr1628482plg.29.1677498006324; Mon, 27 Feb 2023 03:40:06 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.39.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:40:05 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 04/18] drm: exynos: dsi: Switch to DSI panel or bridge find helper Date: Mon, 27 Feb 2023 17:09:11 +0530 Message-Id: <20230227113925.875425-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org drm_of_dsi_find_panel_or_bridge is capable of looking up the downstream DSI bridge and panel and trying to add a panel bridge if the panel is found. Replace explicit finding calls with drm_of_dsi_find_panel_or_bridge followed with drmm_panel_bridge_add. Signed-off-by: Jagan Teki --- Changes for v13, v12, v11: - none Changes for v10: - new patch drivers/gpu/drm/exynos/exynos_drm_dsi.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index df15501b1075..12a6dd987e8f 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -1470,24 +1471,26 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, struct device *dev = dsi->dev; struct drm_encoder *encoder = &dsi->encoder; struct drm_device *drm = encoder->dev; + struct drm_bridge *bridge; struct drm_panel *panel; int ret; - panel = of_drm_find_panel(device->dev.of_node); - if (!IS_ERR(panel)) { - dsi->out_bridge = devm_drm_panel_bridge_add(dev, panel); - } else { - dsi->out_bridge = of_drm_find_bridge(device->dev.of_node); - if (!dsi->out_bridge) - dsi->out_bridge = ERR_PTR(-EINVAL); - } + ret = drm_of_dsi_find_panel_or_bridge(dev->of_node, 1, 0, + &panel, &bridge); + if (ret) + return ret; - if (IS_ERR(dsi->out_bridge)) { - ret = PTR_ERR(dsi->out_bridge); + if (panel) + bridge = drmm_panel_bridge_add(NULL, panel); + + if (IS_ERR(bridge)) { + ret = PTR_ERR(bridge); DRM_DEV_ERROR(dev, "failed to find the bridge: %d\n", ret); return ret; } + dsi->out_bridge = bridge; + DRM_DEV_INFO(dev, "Attached %s device\n", device->name); drm_bridge_add(&dsi->bridge); @@ -1531,8 +1534,6 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, struct exynos_dsi *dsi = host_to_dsi(host); struct drm_device *drm = dsi->encoder.dev; - dsi->out_bridge = NULL; - if (drm->mode_config.poll_enabled) drm_kms_helper_hotplug_event(drm); From patchwork Mon Feb 27 11:39:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9EB7C64ED8 for ; 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Mon, 27 Feb 2023 03:40:12 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 05/18] drm: exynos: dsi: Mark PHY as optional Date: Mon, 27 Feb 2023 17:09:12 +0530 Message-Id: <20230227113925.875425-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org The same Samsung MIPI DSIM master can also be used in NXP's i.MX8M Mini/Nano/Plus SoC. In i.MX8M Mini/Nano/Plus SoC the DSI Phy requires a MIPI DPHY bit to reset in order to activate the PHY and that can be done via upstream i.MX8M blk-ctrl driver. So, mark the phy get as optional. Reviewed-by: Frieder Schrempf Reviewed-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v13, v12: - none Changes for v11: - collect Frieder RB Changes for v10: - add Plus in commit message - collect Marek RB Changes for v9, v8, v7, v6, v5, v4, v3, v2: - none Changes for v1: - new patch drivers/gpu/drm/exynos/exynos_drm_dsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 12a6dd987e8f..529e010291c8 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1699,7 +1699,7 @@ static int exynos_dsi_probe(struct platform_device *pdev) if (IS_ERR(dsi->reg_base)) return PTR_ERR(dsi->reg_base); - dsi->phy = devm_phy_get(dev, "dsim"); + dsi->phy = devm_phy_optional_get(dev, "dsim"); if (IS_ERR(dsi->phy)) { dev_info(dev, "failed to get dsim phy\n"); return PTR_ERR(dsi->phy); From patchwork Mon Feb 27 11:39:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 657419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1CCBC7EE2E for ; Mon, 27 Feb 2023 11:40:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229562AbjB0LkW (ORCPT ); Mon, 27 Feb 2023 06:40:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229608AbjB0LkV (ORCPT ); Mon, 27 Feb 2023 06:40:21 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 32A8E14237 for ; Mon, 27 Feb 2023 03:40:20 -0800 (PST) Received: by mail-pj1-x1034.google.com with SMTP id m8-20020a17090a4d8800b002377bced051so9864366pjh.0 for ; Mon, 27 Feb 2023 03:40:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hcK49RjKscvvI/Bcjzdcif+XCEL3a0d7sa1A+ZWBEvs=; b=dZV/bNLqpVLWgoh5Q8FOQsM84G/3wvtg8Qz91+nkt5Hd1hsjXhyt53qzLn0pl/fuSI X9BbOXH7UNF5bPrC1OqZkwu86v5BMjV3fLnITqsEosHwO5wjtZ7zdDSgnqJGPJpVIdc9 0t+XY/dNTsXjYMA6hoEF2WMOLA5F8nvau6mlI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hcK49RjKscvvI/Bcjzdcif+XCEL3a0d7sa1A+ZWBEvs=; b=SptbTFWUky0FEzjNgddzRR1PPeYqlhsk3Oex7O7C047Z+6Wj+nIBmIuUlztx10QaMq hGTZZ3apsNwm1vsiJp1UtKt8d87aalWK7G47a9E/gatavG/LMqlw7zdliuA6v6FppZq/ NEUYYwDHBcB1Zl3O/9q2Twi5owrzVHhpIl/dHIo99Y2+aMgHR0bOWI/LaCJMf/6nBvJD iilfJzLXKD3B4GwRe6Vz4v88giC/a9ldR0gk+soWNaJGM+tyZrQQXNAzw4eUzYjG34K3 EduyYupuciHrfv+Anc20xyiy+ebSiRTJKsBS1xnL/SoNkn/k+W3MfltAPQvRSDubXuGk nqnQ== X-Gm-Message-State: AO0yUKWUKWasEKVKpsRa00GqumgLaKZIDbomH578hJiTYEnKqtQuZRVU 0cpeU/kuvgKg0z1VEkc5bUXs4g== X-Google-Smtp-Source: AK7set9jf8p4M9A8PJ9OOdRajeAoRkHwqtnCogGGvtaSOCfXYnO+fCCnGd65hzljdodGCJM0futqqA== X-Received: by 2002:a17:902:e84b:b0:196:44d4:2453 with SMTP id t11-20020a170902e84b00b0019644d42453mr29018973plg.7.1677498019646; Mon, 27 Feb 2023 03:40:19 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.40.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:40:19 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 06/18] drm: exynos: dsi: Add platform PLL_P (PMS_P) offset Date: Mon, 27 Feb 2023 17:09:13 +0530 Message-Id: <20230227113925.875425-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Look like PLL PMS_P offset value varies between platforms that have Samsung DSIM IP. However, there is no clear evidence for it as both Exynos and i.MX 8M Mini Application Processor Reference Manual is still referring the PMS_P offset as 13. The offset 13 is not working for i.MX8M Mini SoCs but the downstream NXP sec-dsim.c driver is using offset 14 for i.MX8M Mini SoC platforms [1] [2]. PMS_P value set in sec_mipi_dsim_check_pll_out using PLLCTRL_SET_P() with offset 13 and then an additional offset of one bit added in sec_mipi_dsim_config_pll via PLLCTRL_SET_PMS(). Not sure whether it is reference manual documentation or something else but this patch trusts the downstream code and handle PLL_P offset via platform driver data so-that imx8mm driver data shall use pll_p_offset to 14. Similar to Mini the i.MX8M Nano/Plus also has P=14, unlike Exynos. [1] https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/gpu/drm/bridge/sec-dsim.c?h=imx_5.4.47_2.2.0#n210 [2] https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/gpu/drm/bridge/sec-dsim.c?h=imx_5.4.47_2.2.0#n211 Reviewed-by: Marek Vasut Signed-off-by: Frieder Schrempf Signed-off-by: Jagan Teki --- Changes for v13, v12, v11, v10, v9: - none Changes for v8: - updated commit message for 8M Nano/Plus Changes for v7, v6: - none Changes for v5: - updated clear commit message Changes for v4, v3, v2: - none Changes for v1: - updated commit message - add downstream driver link drivers/gpu/drm/exynos/exynos_drm_dsi.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 529e010291c8..8eac1c6e35c2 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -195,7 +195,7 @@ /* DSIM_PLLCTRL */ #define DSIM_FREQ_BAND(x) ((x) << 24) #define DSIM_PLL_EN (1 << 23) -#define DSIM_PLL_P(x) ((x) << 13) +#define DSIM_PLL_P(x, offset) ((x) << (offset)) #define DSIM_PLL_M(x) ((x) << 4) #define DSIM_PLL_S(x) ((x) << 1) @@ -264,6 +264,7 @@ struct exynos_dsi_driver_data { unsigned int max_freq; unsigned int wait_for_reset; unsigned int num_bits_resol; + unsigned int pll_p_offset; const unsigned int *reg_values; }; @@ -472,6 +473,7 @@ static const struct exynos_dsi_driver_data exynos3_dsi_driver_data = { .max_freq = 1000, .wait_for_reset = 1, .num_bits_resol = 11, + .pll_p_offset = 13, .reg_values = reg_values, }; @@ -484,6 +486,7 @@ static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { .max_freq = 1000, .wait_for_reset = 1, .num_bits_resol = 11, + .pll_p_offset = 13, .reg_values = reg_values, }; @@ -494,6 +497,7 @@ static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { .max_freq = 1000, .wait_for_reset = 1, .num_bits_resol = 11, + .pll_p_offset = 13, .reg_values = reg_values, }; @@ -505,6 +509,7 @@ static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { .max_freq = 1500, .wait_for_reset = 0, .num_bits_resol = 12, + .pll_p_offset = 13, .reg_values = exynos5433_reg_values, }; @@ -516,6 +521,7 @@ static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { .max_freq = 1500, .wait_for_reset = 1, .num_bits_resol = 12, + .pll_p_offset = 13, .reg_values = exynos5422_reg_values, }; @@ -629,7 +635,8 @@ static unsigned long exynos_dsi_set_pll(struct exynos_dsi *dsi, writel(driver_data->reg_values[PLL_TIMER], dsi->reg_base + driver_data->plltmr_reg); - reg = DSIM_PLL_EN | DSIM_PLL_P(p) | DSIM_PLL_M(m) | DSIM_PLL_S(s); + reg = DSIM_PLL_EN | DSIM_PLL_P(p, driver_data->pll_p_offset) | + DSIM_PLL_M(m) | DSIM_PLL_S(s); if (driver_data->has_freqband) { static const unsigned long freq_bands[] = { From patchwork Mon Feb 27 11:39:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658048 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85084C64ED6 for ; Mon, 27 Feb 2023 11:40:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229630AbjB0Lk3 (ORCPT ); Mon, 27 Feb 2023 06:40:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229608AbjB0Lk2 (ORCPT ); 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Add hw_type enum via platform_data so that accessing the different controller data between various platforms becomes easy and meaningful. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Suggested-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder - drop extra line Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" - update enum type names drivers/gpu/drm/exynos/exynos_drm_dsi.c | 83 ++++++++++++++++++++----- 1 file changed, 68 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 8eac1c6e35c2..9217b362224a 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -255,6 +255,15 @@ struct exynos_dsi_transfer { #define DSIM_STATE_CMD_LPM BIT(2) #define DSIM_STATE_VIDOUT_AVAILABLE BIT(3) +enum exynos_dsi_type { + DSIM_TYPE_EXYNOS3250, + DSIM_TYPE_EXYNOS4210, + DSIM_TYPE_EXYNOS5410, + DSIM_TYPE_EXYNOS5422, + DSIM_TYPE_EXYNOS5433, + DSIM_TYPE_COUNT, +}; + struct exynos_dsi_driver_data { const unsigned int *reg_ofs; unsigned int plltmr_reg; @@ -268,6 +277,10 @@ struct exynos_dsi_driver_data { const unsigned int *reg_values; }; +struct exynos_dsi_plat_data { + enum exynos_dsi_type hw_type; +}; + struct exynos_dsi { struct drm_encoder encoder; struct mipi_dsi_host dsi_host; @@ -298,6 +311,7 @@ struct exynos_dsi { struct list_head transfer_list; const struct exynos_dsi_driver_data *driver_data; + const struct exynos_dsi_plat_data *plat_data; }; #define host_to_dsi(host) container_of(host, struct exynos_dsi, dsi_host) @@ -525,18 +539,13 @@ static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { .reg_values = exynos5422_reg_values, }; -static const struct of_device_id exynos_dsi_of_match[] = { - { .compatible = "samsung,exynos3250-mipi-dsi", - .data = &exynos3_dsi_driver_data }, - { .compatible = "samsung,exynos4210-mipi-dsi", - .data = &exynos4_dsi_driver_data }, - { .compatible = "samsung,exynos5410-mipi-dsi", - .data = &exynos5_dsi_driver_data }, - { .compatible = "samsung,exynos5422-mipi-dsi", - .data = &exynos5422_dsi_driver_data }, - { .compatible = "samsung,exynos5433-mipi-dsi", - .data = &exynos5433_dsi_driver_data }, - { } +static const struct exynos_dsi_driver_data * +exynos_dsi_types[DSIM_TYPE_COUNT] = { + [DSIM_TYPE_EXYNOS3250] = &exynos3_dsi_driver_data, + [DSIM_TYPE_EXYNOS4210] = &exynos4_dsi_driver_data, + [DSIM_TYPE_EXYNOS5410] = &exynos5_dsi_driver_data, + [DSIM_TYPE_EXYNOS5422] = &exynos5422_dsi_driver_data, + [DSIM_TYPE_EXYNOS5433] = &exynos5433_dsi_driver_data, }; static void exynos_dsi_wait_for_reset(struct exynos_dsi *dsi) @@ -1469,8 +1478,6 @@ static const struct drm_bridge_funcs exynos_dsi_bridge_funcs = { .attach = exynos_dsi_attach, }; -MODULE_DEVICE_TABLE(of, exynos_dsi_of_match); - static int exynos_dsi_host_attach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { @@ -1671,7 +1678,8 @@ static int exynos_dsi_probe(struct platform_device *pdev) dsi->dsi_host.dev = dev; dsi->dev = dev; - dsi->driver_data = of_device_get_match_data(dev); + dsi->plat_data = of_device_get_match_data(dev); + dsi->driver_data = exynos_dsi_types[dsi->plat_data->hw_type]; dsi->supplies[0].supply = "vddcore"; dsi->supplies[1].supply = "vddio"; @@ -1829,6 +1837,51 @@ static const struct dev_pm_ops exynos_dsi_pm_ops = { pm_runtime_force_resume) }; +static const struct exynos_dsi_plat_data exynos3250_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS3250, +}; + +static const struct exynos_dsi_plat_data exynos4210_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS4210, +}; + +static const struct exynos_dsi_plat_data exynos5410_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS5410, +}; + +static const struct exynos_dsi_plat_data exynos5422_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS5422, +}; + +static const struct exynos_dsi_plat_data exynos5433_dsi_pdata = { + .hw_type = DSIM_TYPE_EXYNOS5433, +}; + +static const struct of_device_id exynos_dsi_of_match[] = { + { + .compatible = "samsung,exynos3250-mipi-dsi", + .data = &exynos3250_dsi_pdata, + }, + { + .compatible = "samsung,exynos4210-mipi-dsi", + .data = &exynos4210_dsi_pdata, + }, + { + .compatible = "samsung,exynos5410-mipi-dsi", + .data = &exynos5410_dsi_pdata, + }, + { + .compatible = "samsung,exynos5422-mipi-dsi", + .data = &exynos5422_dsi_pdata, + }, + { + .compatible = "samsung,exynos5433-mipi-dsi", + .data = &exynos5433_dsi_pdata, + }, + { /* sentinel. */ } +}; +MODULE_DEVICE_TABLE(of, exynos_dsi_of_match); + struct platform_driver dsi_driver = { .probe = exynos_dsi_probe, .remove = exynos_dsi_remove, From patchwork Mon Feb 27 11:39:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 657418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0F2CC64ED6 for ; Mon, 27 Feb 2023 11:40:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229640AbjB0Lkf (ORCPT ); Mon, 27 Feb 2023 06:40:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38232 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229608AbjB0Lke (ORCPT ); Mon, 27 Feb 2023 06:40:34 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F73A14237 for ; Mon, 27 Feb 2023 03:40:33 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id me6-20020a17090b17c600b0023816b0c7ceso1857172pjb.2 for ; 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Mon, 27 Feb 2023 03:40:32 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.40.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:40:32 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 08/18] drm: exynos: dsi: Handle proper host initialization Date: Mon, 27 Feb 2023 17:09:15 +0530 Message-Id: <20230227113925.875425-9-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org From: Marek Szyprowski Host transfer() in the DSI master will invoke only when the DSI commands are sent from DSI devices like DSI Panel or DSI bridges and this host the transfer wouldn't invoke for I2C-based-DSI bridge drivers. Handling DSI host initialization in transfer calls misses the controller setup for I2C configured DSI bridges. This patch updates the DSI host initialization by calling host to init from bridge pre_enable as the bridge pre_enable API is invoked by core as it is common across all classes of DSI device drivers. The host init during pre_enable is conditional and not invoked for Exynos as existing downstream drm panels and bridges in Exynos are expecting the host initialization during DSI transfer. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder Changes for v10: - update the to simple logic to handle all platforms Changs for v9 - v8: - none Changes for v2: - check initialized state in samsung_dsim_init Changes for v1: - keep DSI init in host transfer drivers/gpu/drm/exynos/exynos_drm_dsi.c | 27 +++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 9217b362224a..5723d91ff686 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -255,6 +255,9 @@ struct exynos_dsi_transfer { #define DSIM_STATE_CMD_LPM BIT(2) #define DSIM_STATE_VIDOUT_AVAILABLE BIT(3) +#define exynos_dsi_hw_is_exynos(hw) \ + ((hw) >= DSIM_TYPE_EXYNOS3250 && (hw) <= DSIM_TYPE_EXYNOS5433) + enum exynos_dsi_type { DSIM_TYPE_EXYNOS3250, DSIM_TYPE_EXYNOS4210, @@ -1344,6 +1347,9 @@ static int exynos_dsi_init(struct exynos_dsi *dsi) { const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; + if (dsi->state & DSIM_STATE_INITIALIZED) + return 0; + exynos_dsi_reset(dsi); exynos_dsi_enable_irq(dsi); @@ -1356,6 +1362,8 @@ static int exynos_dsi_init(struct exynos_dsi *dsi) exynos_dsi_set_phy_ctrl(dsi); exynos_dsi_init_link(dsi); + dsi->state |= DSIM_STATE_INITIALIZED; + return 0; } @@ -1411,6 +1419,16 @@ static void exynos_dsi_atomic_pre_enable(struct drm_bridge *bridge, } dsi->state |= DSIM_STATE_ENABLED; + + /* + * For Exynos-DSIM the downstream bridge, or panel are expecting + * the host initialization during DSI transfer. + */ + if (!exynos_dsi_hw_is_exynos(dsi->plat_data->hw_type)) { + ret = exynos_dsi_init(dsi); + if (ret) + return; + } } static void exynos_dsi_atomic_enable(struct drm_bridge *bridge, @@ -1568,12 +1586,9 @@ static ssize_t exynos_dsi_host_transfer(struct mipi_dsi_host *host, if (!(dsi->state & DSIM_STATE_ENABLED)) return -EINVAL; - if (!(dsi->state & DSIM_STATE_INITIALIZED)) { - ret = exynos_dsi_init(dsi); - if (ret) - return ret; - dsi->state |= DSIM_STATE_INITIALIZED; - } + ret = exynos_dsi_init(dsi); + if (ret) + return ret; ret = mipi_dsi_create_packet(&xfer.packet, msg); if (ret < 0) From patchwork Mon Feb 27 11:39:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD53CC64ED8 for ; Mon, 27 Feb 2023 11:40:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229658AbjB0Lkm (ORCPT ); Mon, 27 Feb 2023 06:40:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229608AbjB0Lkl (ORCPT ); Mon, 27 Feb 2023 06:40:41 -0500 Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FDB112878 for ; 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Mon, 27 Feb 2023 03:40:39 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.40.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:40:39 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 09/18] drm: exynos: dsi: Add atomic check Date: Mon, 27 Feb 2023 17:09:16 +0530 Message-Id: <20230227113925.875425-10-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Look like an explicit fixing up of mode_flags is required for DSIM IP present in i.MX8M Mini/Nano SoCs. At least the LCDIF + DSIM needs active low sync polarities in order to correlate the correct sync flags of the surrounding components in the chain to make sure the whole pipeline can work properly. On the other hand the i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 says. "13.6.3.5.2 RGB interface Vsync, Hsync, and VDEN are active high signals." i.MX 8M Mini Applications Processor Reference Manual Rev. 3, 11/2020 3.6.3.5.2 RGB interface i.MX 8M Nano Applications Processor Reference Manual Rev. 2, 07/2022 13.6.2.7.2 RGB interface both claim "Vsync, Hsync, and VDEN are active high signals.", the LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. No clear evidence about whether it can be documentation issues or something, so added proper comments on the code. Comments are suggested by Marek Vasut. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder - fix commit message Changes for v10, v9: - none Changes for v8: - update the comments about sync signals polarities - added clear commit message by including i.MX8M Nano details Changes for v7: - fix the hw_type checking logic Changes for v6: - none Changes for v5: - rebase based new bridge changes [mszyprow] - remove DSIM_QUIRK_FIXUP_SYNC_POL - add hw_type check for sync polarities change. Changes for v4: - none Changes for v3: - add DSIM_QUIRK_FIXUP_SYNC_POL to handle mode_flasg fixup Changes for v2: - none Changes for v1: - fix mode flags in atomic_check instead of mode_fixup drivers/gpu/drm/exynos/exynos_drm_dsi.c | 28 +++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 5723d91ff686..22e3bdcf5494 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -264,6 +264,7 @@ enum exynos_dsi_type { DSIM_TYPE_EXYNOS5410, DSIM_TYPE_EXYNOS5422, DSIM_TYPE_EXYNOS5433, + DSIM_TYPE_IMX8MM, DSIM_TYPE_COUNT, }; @@ -1466,6 +1467,32 @@ static void exynos_dsi_atomic_post_disable(struct drm_bridge *bridge, pm_runtime_put_sync(dsi->dev); } +static int exynos_dsi_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct exynos_dsi *dsi = bridge_to_dsi(bridge); + struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; + + /* + * The i.MX8M Mini/Nano glue logic between LCDIF and DSIM + * inverts HS/VS/DE sync signals polarity, therefore, while + * i.MX 8M Mini Applications Processor Reference Manual Rev. 3, 11/2020 + * 13.6.3.5.2 RGB interface + * i.MX 8M Nano Applications Processor Reference Manual Rev. 2, 07/2022 + * 13.6.2.7.2 RGB interface + * both claim "Vsync, Hsync, and VDEN are active high signals.", the + * LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. + */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) { + adjusted_mode->flags |= (DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + adjusted_mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); + } + + return 0; +} + static void exynos_dsi_mode_set(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode) @@ -1488,6 +1515,7 @@ static const struct drm_bridge_funcs exynos_dsi_bridge_funcs = { .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, .atomic_reset = drm_atomic_helper_bridge_reset, + .atomic_check = exynos_dsi_atomic_check, .atomic_pre_enable = exynos_dsi_atomic_pre_enable, .atomic_enable = exynos_dsi_atomic_enable, .atomic_disable = exynos_dsi_atomic_disable, From patchwork Mon Feb 27 11:39:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 657417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9128C64ED6 for ; Mon, 27 Feb 2023 11:40:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229608AbjB0Lkt (ORCPT ); Mon, 27 Feb 2023 06:40:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbjB0Lkr (ORCPT ); Mon, 27 Feb 2023 06:40:47 -0500 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF73214237 for ; Mon, 27 Feb 2023 03:40:46 -0800 (PST) Received: by mail-pj1-x102c.google.com with SMTP id m3-20020a17090ade0300b00229eec90a7fso11558763pjv.0 for ; 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Mon, 27 Feb 2023 03:40:46 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.40.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:40:45 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 10/18] drm: exynos: dsi: Add input_bus_flags Date: Mon, 27 Feb 2023 17:09:17 +0530 Message-Id: <20230227113925.875425-11-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting the i.MX8M Mini/Nano DSI host to add additional Data Enable signal active low (DE_LOW). This makes the valid data transfer on each horizontal line. So, add additional bus flags DE_LOW setting via input_bus_flags for i.MX8M Mini/Nano platforms. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Suggested-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder Changes for v10, v9: - none Changes for v8: - add DE_LOW for i.MX8M Mini/Nano platforms. Changes for v7, v6: - none Changes for v5: - rebased based on updated bridge changes Changes for v4 - v1: - none drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 22e3bdcf5494..7f0703582506 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1703,6 +1703,10 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static const struct drm_bridge_timings dsim_bridge_timings_de_low = { + .input_bus_flags = DRM_BUS_FLAG_DE_LOW, +}; + static int exynos_dsi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1789,6 +1793,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; dsi->bridge.pre_enable_prev_first = true; + /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) + dsi->bridge.timings = &dsim_bridge_timings_de_low; + ret = component_add(dev, &exynos_dsi_component_ops); if (ret) goto err_disable_runtime; From patchwork Mon Feb 27 11:39:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658046 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37B4AC7EE2D for ; Mon, 27 Feb 2023 11:40:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229639AbjB0Lkz (ORCPT ); Mon, 27 Feb 2023 06:40:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbjB0Lky (ORCPT ); Mon, 27 Feb 2023 06:40:54 -0500 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92713166C2 for ; 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Mon, 27 Feb 2023 03:40:53 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.40.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:40:52 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 11/18] drm: exynos: dsi: Add atomic_get_input_bus_fmts Date: Mon, 27 Feb 2023 17:09:18 +0530 Message-Id: <20230227113925.875425-12-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Finding the right input bus format throughout the pipeline is hard so add atomic_get_input_bus_fmts callback and initialize with the proper input format from list of supported output formats. This format can be used in pipeline for negotiating bus format between the DSI-end of this bridge and the other component closer to pipeline components. List of Pixel formats are taken from, AN13573 i.MX 8/RT MIPI DSI/CSI-2, Rev. 0, 21 March 2022 3.7.4 Pixel formats Table 14. DSI pixel packing formats Reviewed-by: Frieder Schrempf Tested-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - update the logic suggested by Marek Changes for v11: - collect RB from Frieder - drop extra line Changes for v10: - none Changes for v9: - added MEDIA_BUS_FMT_FIXED - return MEDIA_BUS_FMT_RGB888_1X24 output_fmt if supported output_fmt list is unsupported. - added MEDIA_BUS_FMT_YUYV10_1X20, MEDIA_BUS_FMT_YUYV12_1X24 Changes for v8: - added pixel formats supported by NXP AN13573 i.MX 8/RT MIPI DSI/CSI-2 Changes for v7 - v4: - none Changes for v3: - include media-bus-format.h Changes for v2: - none Changes for v1: - new patch drivers/gpu/drm/exynos/exynos_drm_dsi.c | 62 +++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 7f0703582506..aea56b6fbf17 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -1467,6 +1468,66 @@ static void exynos_dsi_atomic_post_disable(struct drm_bridge *bridge, pm_runtime_put_sync(dsi->dev); } +/* + * This pixel output formats list referenced from, + * AN13573 i.MX 8/RT MIPI DSI/CSI-2, Rev. 0, 21 March 2022 + * 3.7.4 Pixel formats + * Table 14. DSI pixel packing formats + */ +static const u32 exynos_dsi_pixel_output_fmts[] = { + MEDIA_BUS_FMT_YUYV10_1X20, + MEDIA_BUS_FMT_YUYV12_1X24, + MEDIA_BUS_FMT_UYVY8_1X16, + MEDIA_BUS_FMT_RGB101010_1X30, + MEDIA_BUS_FMT_RGB121212_1X36, + MEDIA_BUS_FMT_RGB565_1X16, + MEDIA_BUS_FMT_RGB666_1X18, + MEDIA_BUS_FMT_RGB888_1X24, +}; + +static bool exynos_dsi_pixel_output_fmt_supported(u32 fmt) +{ + int i; + + if (fmt == MEDIA_BUS_FMT_FIXED) + return false; + + for (i = 0; i < ARRAY_SIZE(exynos_dsi_pixel_output_fmts); i++) { + if (exynos_dsi_pixel_output_fmts[i] == fmt) + return true; + } + + return false; +} + +static u32 * +exynos_dsi_atomic_get_input_bus_fmts(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state, + u32 output_fmt, + unsigned int *num_input_fmts) +{ + u32 *input_fmts; + + input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL); + if (!input_fmts) + return NULL; + + if (!exynos_dsi_pixel_output_fmt_supported(output_fmt)) + /* + * Some bridge/display drivers are still not able to pass the + * correct format, so handle those pipelines by falling back + * to the default format till the supported formats finalized. + */ + output_fmt = MEDIA_BUS_FMT_RGB888_1X24; + + input_fmts[0] = output_fmt; + *num_input_fmts = 1; + + return input_fmts; +} + static int exynos_dsi_atomic_check(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, @@ -1515,6 +1576,7 @@ static const struct drm_bridge_funcs exynos_dsi_bridge_funcs = { .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, .atomic_reset = drm_atomic_helper_bridge_reset, + .atomic_get_input_bus_fmts = exynos_dsi_atomic_get_input_bus_fmts, .atomic_check = exynos_dsi_atomic_check, .atomic_pre_enable = exynos_dsi_atomic_pre_enable, .atomic_enable = exynos_dsi_atomic_enable, From patchwork Mon Feb 27 11:39:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 657416 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1873AC7EE31 for ; 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Mon, 27 Feb 2023 03:41:00 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.40.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:40:59 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 12/18] drm: exynos: dsi: Consolidate component and bridge Date: Mon, 27 Feb 2023 17:09:19 +0530 Message-Id: <20230227113925.875425-13-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org DSI host registration, attach and detach operations are quite different for the component and bridge-based DRM drivers.  Supporting generic bridge driver to use both component and bridge based DRM drivers can be tricky and would require additional host related operation hooks. Add host operation hooks for registering and unregistering Exynos and generic drivers, where Exynos hooks are used in existing Exynos component based DRM drivers and generic hooks are used in i.MX8M bridge based DRM drivers.  Add host attach and detach operation hooks for Exynos component DRM drivers and those get invoked while DSI core host attach and detach gets called. Reviewed-by: Marek Vasut Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - fix unneeded decleration - collect RB from Marek Changes for v11: - none Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" drivers/gpu/drm/exynos/exynos_drm_dsi.c | 169 +++++++++++++++++++----- 1 file changed, 134 insertions(+), 35 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index aea56b6fbf17..de8604450fb9 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -284,10 +284,10 @@ struct exynos_dsi_driver_data { struct exynos_dsi_plat_data { enum exynos_dsi_type hw_type; + const struct exynos_dsim_host_ops *host_ops; }; struct exynos_dsi { - struct drm_encoder encoder; struct mipi_dsi_host dsi_host; struct drm_bridge bridge; struct drm_bridge *out_bridge; @@ -317,6 +317,19 @@ struct exynos_dsi { const struct exynos_dsi_driver_data *driver_data; const struct exynos_dsi_plat_data *plat_data; + + void *priv; +}; + +struct exynos_dsim_host_ops { + int (*register_host)(struct exynos_dsi *dsim); + void (*unregister_host)(struct exynos_dsi *dsim); + int (*attach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); + int (*detach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); +}; + +struct exynos_dsi_enc { + struct drm_encoder encoder; }; #define host_to_dsi(host) container_of(host, struct exynos_dsi, dsi_host) @@ -1321,7 +1334,8 @@ static irqreturn_t exynos_dsi_irq(int irq, void *dev_id) static irqreturn_t exynos_dsi_te_irq_handler(int irq, void *dev_id) { struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; - struct drm_encoder *encoder = &dsi->encoder; + struct exynos_dsi_enc *dsi_enc = dsi->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) exynos_drm_crtc_te_handler(encoder->crtc); @@ -1590,9 +1604,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; struct device *dev = dsi->dev; - struct drm_encoder *encoder = &dsi->encoder; - struct drm_device *drm = encoder->dev; struct drm_bridge *bridge; struct drm_panel *panel; int ret; @@ -1617,35 +1630,15 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, drm_bridge_add(&dsi->bridge); - drm_bridge_attach(encoder, &dsi->bridge, - list_first_entry_or_null(&encoder->bridge_chain, - struct drm_bridge, - chain_node), 0); - - /* - * This is a temporary solution and should be made by more generic way. - * - * If attached panel device is for command mode one, dsi should register - * TE interrupt handler. - */ - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { - ret = exynos_dsi_register_te_irq(dsi, &device->dev); - if (ret) + if (pdata->host_ops && pdata->host_ops->attach) { + ret = pdata->host_ops->attach(dsi, device); + if (ret < 0) return ret; } - mutex_lock(&drm->mode_config.mutex); - dsi->lanes = device->lanes; dsi->format = device->format; dsi->mode_flags = device->mode_flags; - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); - - mutex_unlock(&drm->mode_config.mutex); - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); return 0; } @@ -1654,12 +1647,14 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, struct mipi_dsi_device *device) { struct exynos_dsi *dsi = host_to_dsi(host); - struct drm_device *drm = dsi->encoder.dev; - - if (drm->mode_config.poll_enabled) - drm_kms_helper_hotplug_event(drm); + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; + int ret; - exynos_dsi_unregister_te_irq(dsi); + if (pdata->host_ops && pdata->host_ops->detach) { + ret = pdata->host_ops->detach(dsi, device); + if (ret < 0) + return ret; + } drm_bridge_remove(&dsi->bridge); @@ -1733,11 +1728,67 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) return 0; } +static int _exynos_dsi_host_attach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi_enc = dsim->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; + struct drm_device *drm = encoder->dev; + int ret; + + drm_bridge_attach(encoder, &dsim->bridge, + list_first_entry_or_null(&encoder->bridge_chain, + struct drm_bridge, + chain_node), 0); + + /* + * This is a temporary solution and should be made by more generic way. + * + * If attached panel device is for command mode one, dsi should register + * TE interrupt handler. + */ + if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { + ret = exynos_dsi_register_te_irq(dsim, &device->dev); + if (ret) + return ret; + } + + mutex_lock(&drm->mode_config.mutex); + + dsim->lanes = device->lanes; + dsim->format = device->format; + dsim->mode_flags = device->mode_flags; + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = + !(dsim->mode_flags & MIPI_DSI_MODE_VIDEO); + + mutex_unlock(&drm->mode_config.mutex); + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + return 0; +} + +static int _exynos_dsi_host_detach(struct exynos_dsi *dsim, + struct mipi_dsi_device *device) +{ + struct exynos_dsi_enc *dsi_enc = dsim->priv; + struct drm_device *drm = dsi_enc->encoder.dev; + + if (drm->mode_config.poll_enabled) + drm_kms_helper_hotplug_event(drm); + + exynos_dsi_unregister_te_irq(dsim); + + return 0; +} + static int exynos_dsi_bind(struct device *dev, struct device *master, void *data) { struct exynos_dsi *dsi = dev_get_drvdata(dev); - struct drm_encoder *encoder = &dsi->encoder; + struct exynos_dsi_enc *dsi_enc = dsi->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; struct drm_device *drm_dev = data; int ret; @@ -1755,7 +1806,7 @@ static void exynos_dsi_unbind(struct device *dev, struct device *master, { struct exynos_dsi *dsi = dev_get_drvdata(dev); - exynos_dsi_atomic_disable(&dsi->bridge, NULL); + dsi->bridge.funcs->atomic_disable(&dsi->bridge, NULL); mipi_dsi_host_unregister(&dsi->dsi_host); } @@ -1765,6 +1816,40 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static int exynos_dsi_register_host(struct exynos_dsi *dsim) +{ + struct exynos_dsi_enc *dsi_enc; + + dsi_enc = devm_kzalloc(dsim->dev, sizeof(*dsi_enc), GFP_KERNEL); + if (!dsi_enc) + return -ENOMEM; + + dsim->priv = dsi_enc; + dsim->bridge.pre_enable_prev_first = true; + + return component_add(dsim->dev, &exynos_dsi_component_ops); +} + +static void exynos_dsi_unregister_host(struct exynos_dsi *dsim) +{ + component_del(dsim->dev, &exynos_dsi_component_ops); +} + +static int generic_dsim_register_host(struct exynos_dsi *dsim) +{ + return mipi_dsi_host_register(&dsim->dsi_host); +} + +static void generic_dsim_unregister_host(struct exynos_dsi *dsim) +{ + mipi_dsi_host_unregister(&dsim->dsi_host); +} + +static const struct exynos_dsim_host_ops generic_dsim_host_ops = { + .register_host = generic_dsim_register_host, + .unregister_host = generic_dsim_unregister_host, +}; + static const struct drm_bridge_timings dsim_bridge_timings_de_low = { .input_bus_flags = DRM_BUS_FLAG_DE_LOW, }; @@ -1859,7 +1944,9 @@ static int exynos_dsi_probe(struct platform_device *pdev) if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) dsi->bridge.timings = &dsim_bridge_timings_de_low; - ret = component_add(dev, &exynos_dsi_component_ops); + if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host) + ret = dsi->plat_data->host_ops->register_host(dsi); + if (ret) goto err_disable_runtime; @@ -1950,24 +2037,36 @@ static const struct dev_pm_ops exynos_dsi_pm_ops = { pm_runtime_force_resume) }; +static const struct exynos_dsim_host_ops exynos_dsi_host_ops = { + .register_host = exynos_dsi_register_host, + .unregister_host = exynos_dsi_unregister_host, + .attach = _exynos_dsi_host_attach, + .detach = _exynos_dsi_host_detach, +}; + static const struct exynos_dsi_plat_data exynos3250_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS3250, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos4210_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS4210, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5410_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5410, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5422_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5422, + .host_ops = &exynos_dsi_host_ops, }; static const struct exynos_dsi_plat_data exynos5433_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5433, + .host_ops = &exynos_dsi_host_ops, }; static const struct of_device_id exynos_dsi_of_match[] = { From patchwork Mon Feb 27 11:39:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658045 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 883D9C64ED6 for ; Mon, 27 Feb 2023 11:41:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229590AbjB0LlJ (ORCPT ); Mon, 27 Feb 2023 06:41:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229554AbjB0LlI (ORCPT ); Mon, 27 Feb 2023 06:41:08 -0500 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42B6016337 for ; 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Mon, 27 Feb 2023 03:41:06 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.41.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:41:06 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v13 13/18] drm: exynos: dsi: Add host helper for te_irq_handler Date: Mon, 27 Feb 2023 17:09:20 +0530 Message-Id: <20230227113925.875425-14-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org IRQ handler for te-gpio seems to be common across DSIM host. However, Exynos is handling this via CRTC drivers but there is no clear evidence on how the same has been handled in i.MX8MM. Keeping the handler as-it-is can be a viable option but adding DSIM bridge core in upcoming patches is not possible to call Exynos CRTC handler as DSIM bridge has to be common across DRM bridge core instead of platform specific DRM drivers like Exynos here. So, this patch handles the handler via platform host helper, so-that handling platform specific hook across Exynos and generic can be reasonable till it makes it generic across all platforms. Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - updated patch - suggested by Marek V Changes for v11: - none Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" drivers/gpu/drm/exynos/exynos_drm_dsi.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index de8604450fb9..938bbc701d3c 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -326,6 +326,7 @@ struct exynos_dsim_host_ops { void (*unregister_host)(struct exynos_dsi *dsim); int (*attach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); int (*detach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); + irqreturn_t (*te_irq_handler)(struct exynos_dsi *dsim); }; struct exynos_dsi_enc { @@ -1334,11 +1335,10 @@ static irqreturn_t exynos_dsi_irq(int irq, void *dev_id) static irqreturn_t exynos_dsi_te_irq_handler(int irq, void *dev_id) { struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; - struct exynos_dsi_enc *dsi_enc = dsi->priv; - struct drm_encoder *encoder = &dsi_enc->encoder; + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; - if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) - exynos_drm_crtc_te_handler(encoder->crtc); + if (pdata->host_ops && pdata->host_ops->te_irq_handler) + return pdata->host_ops->te_irq_handler(dsi); return IRQ_HANDLED; } @@ -1728,6 +1728,17 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) return 0; } +static irqreturn_t _exynos_dsi_te_irq_handler(struct exynos_dsi *dsim) +{ + struct exynos_dsi_enc *dsi_enc = dsim->priv; + struct drm_encoder *encoder = &dsi_enc->encoder; + + if (dsim->state & DSIM_STATE_VIDOUT_AVAILABLE) + exynos_drm_crtc_te_handler(encoder->crtc); + + return IRQ_HANDLED; +} + static int _exynos_dsi_host_attach(struct exynos_dsi *dsim, struct mipi_dsi_device *device) { @@ -2042,6 +2053,7 @@ static const struct exynos_dsim_host_ops exynos_dsi_host_ops = { .unregister_host = exynos_dsi_unregister_host, .attach = _exynos_dsi_host_attach, .detach = _exynos_dsi_host_detach, + .te_irq_handler = _exynos_dsi_te_irq_handler, }; static const struct exynos_dsi_plat_data exynos3250_dsi_pdata = { From patchwork Mon Feb 27 11:39:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 657415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 129CEC7EE2D for ; Mon, 27 Feb 2023 11:41:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229589AbjB0LlY (ORCPT ); Mon, 27 Feb 2023 06:41:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229554AbjB0LlX (ORCPT ); Mon, 27 Feb 2023 06:41:23 -0500 Received: from mail-pj1-x1036.google.com (mail-pj1-x1036.google.com [IPv6:2607:f8b0:4864:20::1036]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B99416337 for ; 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Mon, 27 Feb 2023 03:41:22 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.41.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:41:21 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki , Rob Herring Subject: [PATCH v13 15/18] dt-bindings: display: exynos: dsim: Add NXP i.MX8M Mini/Nano support Date: Mon, 27 Feb 2023 17:09:22 +0530 Message-Id: <20230227113925.875425-16-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Samsung MIPI DSIM bridge can also be found in i.MX8M Mini/Nano SoC. Add dt-bingings for it. Reviewed-by: Marek Vasut Acked-by: Rob Herring Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - collect RB from Marek Changes for v11, v10, v9: - none Changes for v8: - add comment to include i.MX8M Nano. Changes for v7, v6, v5, v4: - none Changes for v3: - collect Rob Acked-by Changes for v2: - updated comments Changes for v1: - new patch Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt index be377786e8cd..5133d4d39190 100644 --- a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt +++ b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt @@ -7,6 +7,7 @@ Required properties: "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */ "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */ "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */ + "fsl,imx8mm-mipi-dsim" /* for i.MX8M Mini/Nano SoCs */ - reg: physical base address and length of the registers set for the device - interrupts: should contain DSI interrupt - clocks: list of clock specifiers, must contain an entry for each required From patchwork Mon Feb 27 11:39:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658044 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28005C64ED6 for ; Mon, 27 Feb 2023 11:41:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229527AbjB0Llc (ORCPT ); Mon, 27 Feb 2023 06:41:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229379AbjB0Llb (ORCPT ); Mon, 27 Feb 2023 06:41:31 -0500 Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18C6A166C2 for ; Mon, 27 Feb 2023 03:41:30 -0800 (PST) Received: by mail-pl1-x62c.google.com with SMTP id z2so6345438plf.12 for ; Mon, 27 Feb 2023 03:41:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UvZwD67eFCMqJHDIBTDsxpjzh+agmIoxVCrI5gJq49Y=; b=GBF68+E7Cmzo3rsD969zbGmpoC4TvJaKmaG5c8b5XM79vWTWZnmRjpGtTnZA1k4nem 4JMGmlR2nadxNPlnY8+gfAoIhvR3/0jP4by4jkKqGCypf5wXzLbPLQHWsCaWR6ei0th/ m7Hwa5LnVBOLNZmE+ZuM6lYP2nFcXhWldZLec= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UvZwD67eFCMqJHDIBTDsxpjzh+agmIoxVCrI5gJq49Y=; b=mRZ1fNHESlzuM/a0JWyoeoZ68pa+M7WkSosmoaShrhXj3fm4o7Wf+9GHIeQ7+18P3X hbIHYz2kWf2eRXu1cYwzNibOy5JStNX6DYP9vY3S1tS/Vy/6K3GWAgwbOdIKjPmuUjXu A6zZqsd1+jOCFpRRFyyOBxSUSSP2B+KVL697dQ8FAj7bhFFOf3P5o4CBfrvK4ubczMr+ PJiFhISOk6jd11FVRiU6YLddWlFSRmySfjH+ysHfF/tfaHcGfpUsKVdoPKJnax/t30rO M5drIbVYntNPCceIvFZAYdf167mDc7tMlTcKNKYmI7USw4AEUlnHukwgdeASJS/U4v3f 7JFg== X-Gm-Message-State: AO0yUKX8sNB70C1GXrH7D9Vp8yUvusNCtv8zC/8gFKdwk9vJh3dmG81h yzMAp8LLLURsrndFxCf1FgFmWQ== X-Google-Smtp-Source: AK7set+lH8IlVJjjGUuzCQ1acMJmqOz2Irk9COU0b1CgAgrvL2pGYSNQ1wh/gSXRBDiC7XgZXZJ90g== X-Received: by 2002:a17:902:ec81:b0:19a:a80e:a6d5 with SMTP id x1-20020a170902ec8100b0019aa80ea6d5mr29294753plg.23.1677498089563; Mon, 27 Feb 2023 03:41:29 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.41.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:41:29 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki , Robert Foss , Laurent Pinchart Subject: [PATCH v13 16/18] drm: bridge: samsung-dsim: Add i.MX8M Mini/Nano support Date: Mon, 27 Feb 2023 17:09:23 +0530 Message-Id: <20230227113925.875425-17-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Samsung MIPI DSIM master can also be found in i.MX8M Mini/Nano SoC. Add compatible and associated driver_data for it. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Acked-by: Robert Foss Reviewed-by: Laurent Pinchart Signed-off-by: Marek Szyprowski Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder - collect ACK from Robert Changes for v10, v9: - none Changed for v8: - fix and update the comment Changes for v7, v6: - none Changes for v3: - enable DSIM_QUIRK_FIXUP_SYNC_POL quirk Changes for v5: - [mszyprow] rebased and adjusted to the new driver initialization - drop quirk Changes for v4: - none Changes for v3: - enable DSIM_QUIRK_FIXUP_SYNC_POL quirk Changes for v2: - collect Laurent r-b Changes for v1: - none drivers/gpu/drm/bridge/samsung-dsim.c | 44 +++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index e0dac7aeab37..9c64a71d2ebd 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -376,6 +376,24 @@ static const unsigned int exynos5433_reg_values[] = { [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0c), }; +static const unsigned int imx8mm_dsim_reg_values[] = { + [RESET_TYPE] = DSIM_SWRST, + [PLL_TIMER] = 500, + [STOP_STATE_CNT] = 0xf, + [PHYCTRL_ULPS_EXIT] = 0, + [PHYCTRL_VREG_LP] = 0, + [PHYCTRL_SLEW_UP] = 0, + [PHYTIMING_LPX] = DSIM_PHYTIMING_LPX(0x06), + [PHYTIMING_HS_EXIT] = DSIM_PHYTIMING_HS_EXIT(0x0b), + [PHYTIMING_CLK_PREPARE] = DSIM_PHYTIMING1_CLK_PREPARE(0x07), + [PHYTIMING_CLK_ZERO] = DSIM_PHYTIMING1_CLK_ZERO(0x26), + [PHYTIMING_CLK_POST] = DSIM_PHYTIMING1_CLK_POST(0x0d), + [PHYTIMING_CLK_TRAIL] = DSIM_PHYTIMING1_CLK_TRAIL(0x08), + [PHYTIMING_HS_PREPARE] = DSIM_PHYTIMING2_HS_PREPARE(0x08), + [PHYTIMING_HS_ZERO] = DSIM_PHYTIMING2_HS_ZERO(0x0d), + [PHYTIMING_HS_TRAIL] = DSIM_PHYTIMING2_HS_TRAIL(0x0b), +}; + static const struct samsung_dsim_driver_data exynos3_dsi_driver_data = { .reg_ofs = exynos_reg_ofs, .plltmr_reg = 0x50, @@ -437,6 +455,22 @@ static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = { .reg_values = exynos5422_reg_values, }; +static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = { + .reg_ofs = exynos5433_reg_ofs, + .plltmr_reg = 0xa0, + .has_clklane_stop = 1, + .num_clks = 2, + .max_freq = 2100, + .wait_for_reset = 0, + .num_bits_resol = 12, + /* + * Unlike Exynos, PLL_P(PMS_P) offset 14 is used in i.MX8M Mini/Nano/Plus + * downstream driver - drivers/gpu/drm/bridge/sec-dsim.c + */ + .pll_p_offset = 14, + .reg_values = imx8mm_dsim_reg_values, +}; + static const struct samsung_dsim_driver_data * samsung_dsim_types[DSIM_TYPE_COUNT] = { [DSIM_TYPE_EXYNOS3250] = &exynos3_dsi_driver_data, @@ -444,6 +478,7 @@ samsung_dsim_types[DSIM_TYPE_COUNT] = { [DSIM_TYPE_EXYNOS5410] = &exynos5_dsi_driver_data, [DSIM_TYPE_EXYNOS5422] = &exynos5422_dsi_driver_data, [DSIM_TYPE_EXYNOS5433] = &exynos5433_dsi_driver_data, + [DSIM_TYPE_IMX8MM] = &imx8mm_dsi_driver_data, }; static inline struct samsung_dsim *host_to_dsi(struct mipi_dsi_host *h) @@ -1843,7 +1878,16 @@ const struct dev_pm_ops samsung_dsim_pm_ops = { }; EXPORT_SYMBOL_GPL(samsung_dsim_pm_ops); +static const struct samsung_dsim_plat_data samsung_dsim_imx8mm_pdata = { + .hw_type = DSIM_TYPE_IMX8MM, + .host_ops = &generic_dsim_host_ops, +}; + static const struct of_device_id samsung_dsim_of_match[] = { + { + .compatible = "fsl,imx8mm-mipi-dsim", + .data = &samsung_dsim_imx8mm_pdata, + }, { /* sentinel. */ } }; MODULE_DEVICE_TABLE(of, samsung_dsim_of_match); From patchwork Mon Feb 27 11:39:24 2023 Content-Type: text/plain; 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Mon, 27 Feb 2023 03:41:36 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.41.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:41:36 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki , Rob Herring Subject: [PATCH v13 17/18] dt-bindings: display: exynos: dsim: Add NXP i.MX8M Plus support Date: Mon, 27 Feb 2023 17:09:24 +0530 Message-Id: <20230227113925.875425-18-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Samsung MIPI DSIM bridge can also be found in i.MX8M Plus SoC. Add dt-bingings for it. Reviewed-by: Marek Vasut Acked-by: Rob Herring Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect ACK from Rob Changes for v10, v9: - none Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt index 5133d4d39190..2a5f0889ec32 100644 --- a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt +++ b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt @@ -8,6 +8,7 @@ Required properties: "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */ "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */ "fsl,imx8mm-mipi-dsim" /* for i.MX8M Mini/Nano SoCs */ + "fsl,imx8mp-mipi-dsim" /* for i.MX8M Plus SoCs */ - reg: physical base address and length of the registers set for the device - interrupts: should contain DSI interrupt - clocks: list of clock specifiers, must contain an entry for each required From patchwork Mon Feb 27 11:39:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 658043 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4AA6BC7EE2D for ; Mon, 27 Feb 2023 11:41:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229582AbjB0Llq (ORCPT ); Mon, 27 Feb 2023 06:41:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229540AbjB0Llp (ORCPT ); Mon, 27 Feb 2023 06:41:45 -0500 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 240AE166C2 for ; Mon, 27 Feb 2023 03:41:44 -0800 (PST) Received: by mail-pj1-x1035.google.com with SMTP id gi3-20020a17090b110300b0023762f642dcso5873048pjb.4 for ; Mon, 27 Feb 2023 03:41:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3AnfktcR9EMxXGBUDl6zPYCDItYIt781znpOZ6IyJMI=; b=Psp/AAkQj2MAb5ioTxIrLYz7yQURRQVJLKWBy1sCrkD9PpBoetnX4DEo2ikZ/jn3Aw g409u5ek7gE3dFlnjcmmiEe6SAcBOFWVky7XFUTI/EiNSFlaAUOFMnJt5jS5Oa2UGDKx 8NFp3M9npGBtziq/D5qhj0BIFYiNigfIzDCmE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3AnfktcR9EMxXGBUDl6zPYCDItYIt781znpOZ6IyJMI=; b=TcPHLe/HBgQA5a0Yun5U9mf8C3yuyqwIkHl1xT1J2Czify/bw7hAWRmslIy3ST2qCX 69jJYt8uCTSEQ9GD9a5spCvO0HMRhxHwKy9wT2+KnaoYsXog9vYfje6RZAoIwk5pUV7M do0+WkyRJcMw0hc9cIcprC+rqKCAiJOcKKI5b8a9AYnihvZmyz/39oFd0I2ontWEBE21 NCr9EQ/i8WyMWQq28w7x4awf9eUD158rel3iLFJzUCl3R0hAw5vvSyLJZJbxRfRzZ47W 2agwTywzoii1yJplDX4nGLYDzADVPwQAOEy6BA9ms5b3U0iMt0HLmIEId8ePHPIjD4Q4 HRNQ== X-Gm-Message-State: AO0yUKVwU685tAv4AYeImheZIhLB4rwDE4P8Ye4oPRJjxUlM7s4UpA5S 8PeJMgNsZq0DGVNBL8F0awn7ZQ== X-Google-Smtp-Source: AK7set8v+qvzVKWgDHdiBBT5ZTxnJyP5VwTrrnJg90Ib8m62/mMB3ZGUZi3vqNnRJDwD5+xKkaxjew== X-Received: by 2002:a17:902:fb90:b0:19c:d97f:5d28 with SMTP id lg16-20020a170902fb9000b0019cd97f5d28mr9388676plb.32.1677498103628; Mon, 27 Feb 2023 03:41:43 -0800 (PST) Received: from localhost.localdomain ([94.140.8.120]) by smtp.gmail.com with ESMTPSA id k10-20020a170902ba8a00b0019c919bccf8sm4395277pls.86.2023.02.27.03.41.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 03:41:43 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Laurent Pinchart , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Robert Foss , Jagan Teki Subject: [PATCH v13 18/18] drm: bridge: samsung-dsim: Add i.MX8M Plus support Date: Mon, 27 Feb 2023 17:09:25 +0530 Message-Id: <20230227113925.875425-19-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227113925.875425-1-jagan@amarulasolutions.com> References: <20230227113925.875425-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org From: Marek Vasut Add extras to support i.MX8M Plus. The main change is the removal of HS/VS/DE signal inversion in the LCDIFv3-DSIM glue logic, otherwise the implementation of this IP in i.MX8M Plus is very much compatible with the i.MX8M Mini/Nano one. Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Acked-by: Robert Foss Signed-off-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder - collect ACK from Robert Changes for v10: - none Changes for v9: - added im8mp in DSIM_STATE_REINITIALIZED check - drop previous = NULL check drivers/gpu/drm/bridge/samsung-dsim.c | 23 +++++++++++++++++++++++ include/drm/bridge/samsung-dsim.h | 1 + 2 files changed, 24 insertions(+) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 9c64a71d2ebd..f91f2feb1987 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -479,6 +479,7 @@ samsung_dsim_types[DSIM_TYPE_COUNT] = { [DSIM_TYPE_EXYNOS5422] = &exynos5422_dsi_driver_data, [DSIM_TYPE_EXYNOS5433] = &exynos5433_dsi_driver_data, [DSIM_TYPE_IMX8MM] = &imx8mm_dsi_driver_data, + [DSIM_TYPE_IMX8MP] = &imx8mm_dsi_driver_data, }; static inline struct samsung_dsim *host_to_dsi(struct mipi_dsi_host *h) @@ -1452,10 +1453,17 @@ static int samsung_dsim_atomic_check(struct drm_bridge *bridge, * 13.6.2.7.2 RGB interface * both claim "Vsync, Hsync, and VDEN are active high signals.", the * LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. + * + * The i.MX8M Plus glue logic between LCDIFv3 and DSIM does not + * implement the same behavior, therefore LCDIFv3 must generate + * HS/VS/DE signals active HIGH. */ if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) { adjusted_mode->flags |= (DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); adjusted_mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); + } else if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MP) { + adjusted_mode->flags &= ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); } return 0; @@ -1689,6 +1697,10 @@ static const struct samsung_dsim_host_ops generic_dsim_host_ops = { .unregister_host = generic_dsim_unregister_host, }; +static const struct drm_bridge_timings samsung_dsim_bridge_timings_de_high = { + .input_bus_flags = DRM_BUS_FLAG_DE_HIGH, +}; + static const struct drm_bridge_timings samsung_dsim_bridge_timings_de_low = { .input_bus_flags = DRM_BUS_FLAG_DE_LOW, }; @@ -1778,6 +1790,8 @@ int samsung_dsim_probe(struct platform_device *pdev) /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) dsi->bridge.timings = &samsung_dsim_bridge_timings_de_low; + else + dsi->bridge.timings = &samsung_dsim_bridge_timings_de_high; if (dsi->plat_data->host_ops && dsi->plat_data->host_ops->register_host) ret = dsi->plat_data->host_ops->register_host(dsi); @@ -1883,11 +1897,20 @@ static const struct samsung_dsim_plat_data samsung_dsim_imx8mm_pdata = { .host_ops = &generic_dsim_host_ops, }; +static const struct samsung_dsim_plat_data samsung_dsim_imx8mp_pdata = { + .hw_type = DSIM_TYPE_IMX8MP, + .host_ops = &generic_dsim_host_ops, +}; + static const struct of_device_id samsung_dsim_of_match[] = { { .compatible = "fsl,imx8mm-mipi-dsim", .data = &samsung_dsim_imx8mm_pdata, }, + { + .compatible = "fsl,imx8mp-mipi-dsim", + .data = &samsung_dsim_imx8mp_pdata, + }, { /* sentinel. */ } }; MODULE_DEVICE_TABLE(of, samsung_dsim_of_match); diff --git a/include/drm/bridge/samsung-dsim.h b/include/drm/bridge/samsung-dsim.h index 4ba387c958ae..fb923caf09e1 100644 --- a/include/drm/bridge/samsung-dsim.h +++ b/include/drm/bridge/samsung-dsim.h @@ -28,6 +28,7 @@ enum samsung_dsim_type { DSIM_TYPE_EXYNOS5422, DSIM_TYPE_EXYNOS5433, DSIM_TYPE_IMX8MM, + DSIM_TYPE_IMX8MP, DSIM_TYPE_COUNT, };