From patchwork Mon Feb 27 13:10:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Walker Chen X-Patchwork-Id: 657253 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2FD3C7EE2E for ; Mon, 27 Feb 2023 13:11:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229896AbjB0NLD (ORCPT ); Mon, 27 Feb 2023 08:11:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229685AbjB0NLC (ORCPT ); Mon, 27 Feb 2023 08:11:02 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23BD912878; Mon, 27 Feb 2023 05:11:01 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id C629424E272; Mon, 27 Feb 2023 21:10:54 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Feb 2023 21:10:54 +0800 Received: from localhost.localdomain (113.72.145.171) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Feb 2023 21:10:54 +0800 From: Walker Chen To: Eugeniy Paltsev , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , "Emil Renner Berthing" , Walker Chen CC: , , , Subject: [PATCH v3 1/3] dt-bindings: dma: snps,dw-axi-dmac: constrain minItems/maxItems of resets for JH7110 DMA Date: Mon, 27 Feb 2023 21:10:40 +0800 Message-ID: <20230227131042.16125-2-walker.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230227131042.16125-1-walker.chen@starfivetech.com> References: <20230227131042.16125-1-walker.chen@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.145.171] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DMA controller needs two reset items to work properly on JH7110 SoC, so there is need to change the maxItems' value to 2 and add minItems whose value is equal to 1. Other platforms do not have this constraint. Signed-off-by: Walker Chen --- .../bindings/dma/snps,dw-axi-dmac.yaml | 25 ++++++++++++++++--- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml index ad107a4d3b33..4ed0a6b7ca69 100644 --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml @@ -12,14 +12,12 @@ maintainers: description: Synopsys DesignWare AXI DMA Controller DT Binding -allOf: - - $ref: "dma-controller.yaml#" - properties: compatible: enum: - snps,axi-dma-1.01a - intel,kmb-axi-dma + - starfive,jh7110-axi-dma reg: minItems: 1 @@ -58,7 +56,8 @@ properties: maximum: 8 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 snps,dma-masters: description: | @@ -109,6 +108,24 @@ required: - snps,priority - snps,block-size +allOf: + - $ref: "dma-controller.yaml#" + - if: + properties: + compatible: + contains: + enum: + - starfive,jh7110-axi-dma + then: + properties: + resets: + minItems: 1 + maxItems: 2 + else: + properties: + resets: + maxItems: 1 + additionalProperties: false examples: From patchwork Mon Feb 27 13:10:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Walker Chen X-Patchwork-Id: 657252 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 653DEC7EE2E for ; Mon, 27 Feb 2023 13:11:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229948AbjB0NLJ (ORCPT ); Mon, 27 Feb 2023 08:11:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229916AbjB0NLF (ORCPT ); Mon, 27 Feb 2023 08:11:05 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1E9EE384; Mon, 27 Feb 2023 05:11:02 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 6E05024E420; Mon, 27 Feb 2023 21:10:55 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Feb 2023 21:10:55 +0800 Received: from localhost.localdomain (113.72.145.171) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 27 Feb 2023 21:10:54 +0800 From: Walker Chen To: Eugeniy Paltsev , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , "Emil Renner Berthing" , Walker Chen CC: , , , Subject: [PATCH v3 2/3] dmaengine: dw-axi-dmac: Add support for StarFive JH7110 DMA Date: Mon, 27 Feb 2023 21:10:41 +0800 Message-ID: <20230227131042.16125-3-walker.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230227131042.16125-1-walker.chen@starfivetech.com> References: <20230227131042.16125-1-walker.chen@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.145.171] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DMA reset operation in device probe and use different configuration on CH_CFG registers according to match data. Signed-off-by: Walker Chen Reviewed-by: Emil Renner Berthing --- .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 34 +++++++++++++++++-- drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 7 ++++ 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c index bf85aa0979ec..400eeef707bf 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c @@ -21,10 +21,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include @@ -86,7 +88,8 @@ static inline void axi_chan_config_write(struct axi_dma_chan *chan, cfg_lo = (config->dst_multblk_type << CH_CFG_L_DST_MULTBLK_TYPE_POS | config->src_multblk_type << CH_CFG_L_SRC_MULTBLK_TYPE_POS); - if (chan->chip->dw->hdata->reg_map_8_channels) { + if (chan->chip->dw->hdata->reg_map_8_channels && + !chan->chip->dw->hdata->use_cfg2) { cfg_hi = config->tt_fc << CH_CFG_H_TT_FC_POS | config->hs_sel_src << CH_CFG_H_HS_SEL_SRC_POS | config->hs_sel_dst << CH_CFG_H_HS_SEL_DST_POS | @@ -1142,7 +1145,7 @@ static int dma_chan_terminate_all(struct dma_chan *dchan) axi_chan_disable(chan); ret = readl_poll_timeout_atomic(chan->chip->regs + DMAC_CHEN, val, - !(val & chan_active), 1000, 10000); + !(val & chan_active), 1000, DMAC_TIMEOUT_US); if (ret == -ETIMEDOUT) dev_warn(dchan2dev(dchan), "%s failed to stop\n", axi_chan_name(chan)); @@ -1367,6 +1370,17 @@ static int parse_device_properties(struct axi_dma_chip *chip) return 0; } +static int jh7110_rst_init(struct platform_device *pdev) +{ + struct reset_control *resets; + + resets = devm_reset_control_array_get_exclusive(&pdev->dev); + if (IS_ERR(resets)) + return PTR_ERR(resets); + + return reset_control_deassert(resets); +} + static int dw_probe(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; @@ -1374,6 +1388,7 @@ static int dw_probe(struct platform_device *pdev) struct resource *mem; struct dw_axi_dma *dw; struct dw_axi_dma_hcfg *hdata; + const struct axi_dma_chip_config *ccfg; u32 i; int ret; @@ -1416,6 +1431,15 @@ static int dw_probe(struct platform_device *pdev) if (IS_ERR(chip->cfgr_clk)) return PTR_ERR(chip->cfgr_clk); + ccfg = of_device_get_match_data(&pdev->dev); + if (ccfg) { + ret = ccfg->rst_init(pdev); + if (ret) + return ret; + + chip->dw->hdata->use_cfg2 = ccfg->use_cfg2; + } + ret = parse_device_properties(chip); if (ret) return ret; @@ -1557,9 +1581,15 @@ static const struct dev_pm_ops dw_axi_dma_pm_ops = { SET_RUNTIME_PM_OPS(axi_dma_runtime_suspend, axi_dma_runtime_resume, NULL) }; +static const struct axi_dma_chip_config jh7110_chip_config = { + .rst_init = jh7110_rst_init, + .use_cfg2 = true, +}; + static const struct of_device_id dw_dma_of_id_table[] = { { .compatible = "snps,axi-dma-1.01a" }, { .compatible = "intel,kmb-axi-dma" }, + { .compatible = "starfive,jh7110-axi-dma", .data = &jh7110_chip_config }, {} }; MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h index e9d5eb0fd594..7b404ae9a26a 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h @@ -21,6 +21,7 @@ #define DMAC_MAX_CHANNELS 16 #define DMAC_MAX_MASTERS 2 #define DMAC_MAX_BLK_SIZE 0x200000 +#define DMAC_TIMEOUT_US 200000 struct dw_axi_dma_hcfg { u32 nr_channels; @@ -33,6 +34,7 @@ struct dw_axi_dma_hcfg { /* Register map for DMAX_NUM_CHANNELS <= 8 */ bool reg_map_8_channels; bool restrict_axi_burst_len; + bool use_cfg2; }; struct axi_dma_chan { @@ -72,6 +74,11 @@ struct axi_dma_chip { struct dw_axi_dma *dw; }; +struct axi_dma_chip_config { + int (*rst_init)(struct platform_device *pdev); + bool use_cfg2; +}; + /* LLI == Linked List Item */ struct __packed axi_dma_lli { __le64 sar;