From patchwork Thu Feb 23 13:43:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 656110 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EE07C61DA4 for ; Thu, 23 Feb 2023 13:44:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234185AbjBWNn7 (ORCPT ); Thu, 23 Feb 2023 08:43:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234073AbjBWNn6 (ORCPT ); Thu, 23 Feb 2023 08:43:58 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB0564E5C4; Thu, 23 Feb 2023 05:43:57 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1486F6602208; Thu, 23 Feb 2023 13:43:56 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159836; bh=1V2jxX0ANAEWX9LhnlvthMdf0fZsDfORdoxEzmZYOWw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UqxbLCz8YHPHJZ9kauVlS3ft33uV+Tec6ZhPT1U3ATczFXnqwSLCJHvz4cyADKVND bwPjNx21ZnZ3Ks6QJtzE0J24frRwjmTRWZRmxcDPPANbFp5paKF6fGPg1/rl+CmpgW obPMTF3+HXqjminUq1KC3eXFDOsjy4DUWcHS2zFA1ZFYlu43RS0RA8EWwZXOGRBvbT 7MbWgwnGO0h34kVEV2xqBwxc8vPuh6uRxAlqa+eABVfwfvPPY3Re4ssUOvTv1imOwo pKR9zaTuTXMDmX12RZXxBSMWAJK1Z1yl+bSzYC6EG9wToiHXiFO0g+Zt5leCqvoYn2 JKR4BvnpgMkaA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 01/16] arm64: dts: mediatek: mt8183-kukui: Couple VGPU and VSRAM_GPU regulators Date: Thu, 23 Feb 2023 14:43:30 +0100 Message-Id: <20230223134345.82625-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index fbe14b13051a..de9778c85b94 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -294,7 +294,6 @@ dsi_out: endpoint { &gpu { mali-supply = <&mt6358_vgpu_reg>; - sram-supply = <&mt6358_vsram_gpu_reg>; }; &i2c0 { @@ -401,6 +400,11 @@ &mt6358codec { Avdd-supply = <&mt6358_vaud28_reg>; }; +&mt6358_vgpu_reg { + regulator-coupled-with = <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + &mt6358_vsim1_reg { regulator-min-microvolt = <2700000>; regulator-max-microvolt = <2700000>; @@ -411,6 +415,11 @@ &mt6358_vsim2_reg { regulator-max-microvolt = <2700000>; }; +&mt6358_vsram_gpu_reg { + regulator-coupled-with = <&mt6358_vgpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + &pio { aud_pins_default: audiopins { pins_bus { From patchwork Thu Feb 23 13:43:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 656109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A89AC64ED6 for ; Thu, 23 Feb 2023 13:44:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234274AbjBWNn7 (ORCPT ); Thu, 23 Feb 2023 08:43:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234155AbjBWNn7 (ORCPT ); Thu, 23 Feb 2023 08:43:59 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DE284DBE8; Thu, 23 Feb 2023 05:43:58 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id B0F376602209; Thu, 23 Feb 2023 13:43:56 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159837; bh=hCOuhzILoJBXJQ8GwcXy/t+mRkm6ZJBcUpxH7FjYYQQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PhinQSxlLUvLFlJ3LSKtKkJDW37sEE5MRSPBDy6B+ZgFZQOIy0MoeDmOWFNEhSIN2 lXXDKlwI69+LpfLiM3M3aJ+tCQZKyvibKE4KefuI+hgsY58K1EGXPVvV8tgjmLJhpf oQVlZBN6usLWiKZZURy72rzYtZ0zZ9VTuMIAd6vBhGKi/DaS9qhR+ACnoDnU8LROEa JlL/JyuhKztsWwrCzYvuDoCv2A73O9yKYnYgtupQUKFRTIQB50eMFzewCt6aUWKtXP 9Elxwafmcvu0TasGoVVMKwUhIeNx+djwFPNw2C0tL1PeKDjLW/qTUOfcRQ+LNXRa25 vQf+7VP50tbBQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 02/16] arm64: dts: mediatek: mt8183-kukui: Override vgpu/vsram_gpu constraints Date: Thu, 23 Feb 2023 14:43:31 +0100 Message-Id: <20230223134345.82625-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Override the PMIC-default voltage constraints for VGPU and VSRAM_GPU with the platform specific vmin/vmax for the highest possible SoC binning. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index de9778c85b94..63952c1251df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -401,6 +401,9 @@ &mt6358codec { }; &mt6358_vgpu_reg { + regulator-min-microvolt = <625000>; + regulator-max-microvolt = <900000>; + regulator-coupled-with = <&mt6358_vsram_gpu_reg>; regulator-coupled-max-spread = <100000>; }; @@ -416,6 +419,9 @@ &mt6358_vsim2_reg { }; &mt6358_vsram_gpu_reg { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1000000>; + regulator-coupled-with = <&mt6358_vgpu_reg>; regulator-coupled-max-spread = <100000>; }; From patchwork Thu Feb 23 13:43:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 656108 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF0A0C61DA4 for ; Thu, 23 Feb 2023 13:44:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234328AbjBWNoA (ORCPT ); Thu, 23 Feb 2023 08:44:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234272AbjBWNn7 (ORCPT ); Thu, 23 Feb 2023 08:43:59 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F41354E5C4; Thu, 23 Feb 2023 05:43:58 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 58449660220A; Thu, 23 Feb 2023 13:43:57 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159837; bh=O+KDnSI3KszDtxSXA0fyQMxxMHho/MGieF2kZyp8r7c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AP3bxT479EcxEZGP2VzwVZJBT0ZPQ39hal42JpJafcKPtXdX+WGz+JaibwRIiKu+D O5akJ3a08NT4gqhpiLtg2O/8N64h+30NOpNpsemItFnlIwxGbj/Tk4sZrfZyWqe5C+ 7SVaoERKNpvUrrbiwre5FxSgc7eWnacYwoCoKq5O21cUlKleWag1ZqtoeqFsurd2d0 +bFb+ZGSmx1QXcMl/F1t6sQoaCCPQ14CBCfKDWS9UHM//f8sm69s5eFfuWaNEPG4jF gniLh0o5jr6kS1mbCY+ql46i/PFFg8SBmp+d+k8iB04H7Eyxtl8tNLYE3SnHXuc5qm iaPL61eHbLceg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 03/16] arm64: dts: mediatek: mt8183: Remove second opp-microvolt entries from gpu table Date: Thu, 23 Feb 2023 14:43:32 +0100 Message-Id: <20230223134345.82625-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This was done to keep a strict relation between VSRAM and VGPU, but it never worked: now we're doing it transparently with the new mediatek-regulator-coupler driver. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 32 ++++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 3d1d7870a5f1..e01b96adef02 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -563,82 +563,82 @@ gpu_opp_table: opp-table-0 { opp-300000000 { opp-hz = /bits/ 64 <300000000>; - opp-microvolt = <625000>, <850000>; + opp-microvolt = <625000>; }; opp-320000000 { opp-hz = /bits/ 64 <320000000>; - opp-microvolt = <631250>, <850000>; + opp-microvolt = <631250>; }; opp-340000000 { opp-hz = /bits/ 64 <340000000>; - opp-microvolt = <637500>, <850000>; + opp-microvolt = <637500>; }; opp-360000000 { opp-hz = /bits/ 64 <360000000>; - opp-microvolt = <643750>, <850000>; + opp-microvolt = <643750>; }; opp-380000000 { opp-hz = /bits/ 64 <380000000>; - opp-microvolt = <650000>, <850000>; + opp-microvolt = <650000>; }; opp-400000000 { opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <656250>, <850000>; + opp-microvolt = <656250>; }; opp-420000000 { opp-hz = /bits/ 64 <420000000>; - opp-microvolt = <662500>, <850000>; + opp-microvolt = <662500>; }; opp-460000000 { opp-hz = /bits/ 64 <460000000>; - opp-microvolt = <675000>, <850000>; + opp-microvolt = <675000>; }; opp-500000000 { opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <687500>, <850000>; + opp-microvolt = <687500>; }; opp-540000000 { opp-hz = /bits/ 64 <540000000>; - opp-microvolt = <700000>, <850000>; + opp-microvolt = <700000>; }; opp-580000000 { opp-hz = /bits/ 64 <580000000>; - opp-microvolt = <712500>, <850000>; + opp-microvolt = <712500>; }; opp-620000000 { opp-hz = /bits/ 64 <620000000>; - opp-microvolt = <725000>, <850000>; + opp-microvolt = <725000>; }; opp-653000000 { opp-hz = /bits/ 64 <653000000>; - opp-microvolt = <743750>, <850000>; + opp-microvolt = <743750>; }; opp-698000000 { opp-hz = /bits/ 64 <698000000>; - opp-microvolt = <768750>, <868750>; + opp-microvolt = <768750>; }; opp-743000000 { opp-hz = /bits/ 64 <743000000>; - opp-microvolt = <793750>, <893750>; + opp-microvolt = <793750>; }; opp-800000000 { opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <825000>, <925000>; + opp-microvolt = <825000>; }; }; From patchwork Thu Feb 23 13:43:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657335 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D99EC64ED8 for ; Thu, 23 Feb 2023 13:44:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234348AbjBWNoC (ORCPT ); Thu, 23 Feb 2023 08:44:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234311AbjBWNoA (ORCPT ); Thu, 23 Feb 2023 08:44:00 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DA994DBE8; Thu, 23 Feb 2023 05:43:59 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 00374660220B; Thu, 23 Feb 2023 13:43:57 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159838; bh=iTiXsbcvL98tLYBNMasBh9C/GsvGSy9IVHh+FRRt/uQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WlHxlvYZhxImKA/EjmjKE1w6P5Qc75JZ/An6P0DwEXCUUhAT0LZTb1G8KatASzVwS rTldgl7J1lSp/I/2C5dXrjBJkr+WDCi/IhvDiGChKfVNtnapxZLoHMXeJUJYv3Uu8N FBOj27fNjQUQ4H5Of6Rbxmkgikx8LbSxzPl8mY52uBeD9P4O1aa5mml7muMKjQfmnQ YUI5rJWK8drYypyz4I83DOtUIaDr68Sg784Y6HLC/iyxTjI2cbuxcIeW1s7vBIKO0d ohpt1xwRskUr3FK7NX9PscPFCT5rxQ6M4fAFdyGXqt+l9QHjMwcJ79QBbqkZaxI6fV o2R7M25q8pCvA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 04/16] arm64: dts: mt8183-pumpkin: Couple VGPU and VSRAM_GPU regulators Date: Thu, 23 Feb 2023 14:43:33 +0100 Message-Id: <20230223134345.82625-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts index a1d01639df30..c228f04d086b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts @@ -71,7 +71,6 @@ &auxadc { &gpu { mali-supply = <&mt6358_vgpu_reg>; - sram-supply = <&mt6358_vsram_gpu_reg>; }; &i2c0 { @@ -176,6 +175,16 @@ &mmc1 { non-removable; }; +&mt6358_vgpu_reg { + regulator-coupled-with = <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-coupled-with = <&mt6358_vgpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + &pio { i2c_pins_0: i2c0 { pins_i2c{ From patchwork Thu Feb 23 13:43:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657334 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75BD6C677F1 for ; Thu, 23 Feb 2023 13:44:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234359AbjBWNoC (ORCPT ); Thu, 23 Feb 2023 08:44:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234338AbjBWNoB (ORCPT ); Thu, 23 Feb 2023 08:44:01 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A22652DDD; Thu, 23 Feb 2023 05:44:00 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 9AD21660220C; Thu, 23 Feb 2023 13:43:58 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159839; bh=MrIqGkrI7LujwoSZ7Bc2owhtRwNGguk3yNGZ02UZ6+Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S52oOLdwx8SJc0VrVkilY+Rm9h+xmcZeTq4RbGHI9TpY0AWNOgqbgGaqRDfeuwtP/ wkHnBsVMEx32STxRhX6Mmtw4HJNy5/CQ61urf5woc0yxJjtvWfj3x+Fk/s6wWYwv6J akCS5IaxUgmY9+tDLAbapeT8I688LPCCUTsvwXjWnNGLZvcTcnO6d6a5eronVa96hz tvsYpiQBvJM+q5LIDuzyMC7XuYCaB73Y/BHC67tN/cNplq3I7MhBWyF6PRMFTAd4q4 FxOmIzMofge19j+bHpg0K0VJHyeI+gm/LAkpJ04tP41UWc//yfd7WPdUDWgWCe5gti CFuCkPSlo8EIA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 05/16] arm64: dts: mediatek: mt8183-evb: Couple VGPU and VSRAM_GPU regulators Date: Thu, 23 Feb 2023 14:43:34 +0100 Message-Id: <20230223134345.82625-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add coupling for these regulators, as they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts index 52dc4a50e34d..fd327437e932 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -52,7 +52,6 @@ &auxadc { &gpu { mali-supply = <&mt6358_vgpu_reg>; - sram-supply = <&mt6358_vsram_gpu_reg>; }; &i2c0 { @@ -138,6 +137,16 @@ &mmc1 { non-removable; }; +&mt6358_vgpu_reg { + regulator-coupled-with = <&mt6358_vsram_gpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + +&mt6358_vsram_gpu_reg { + regulator-coupled-with = <&mt6358_vgpu_reg>; + regulator-coupled-max-spread = <100000>; +}; + &pio { i2c_pins_0: i2c0{ pins_i2c{ From patchwork Thu Feb 23 13:43:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 656107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C4D9C64ED6 for ; Thu, 23 Feb 2023 13:44:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234376AbjBWNoD (ORCPT ); Thu, 23 Feb 2023 08:44:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233157AbjBWNoB (ORCPT ); Thu, 23 Feb 2023 08:44:01 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E38A55190B; Thu, 23 Feb 2023 05:44:00 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 4182B660220D; Thu, 23 Feb 2023 13:43:59 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159839; bh=xAp8H2hVhd7urTj86UlUSbK9LB5eP77m4/nFArJQr+s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BXpHl2GJD8EjzIABLdfe2cxa8PVrmn5m/9ru9rR2XZoZODWb6nA3ZXAKqGJjUj7nC 2QGK97fbrcZKjxH58Ga9BfTOUwoC7nyNIHeAxGb5PGZGf5ERzlXuaCNuDP5VtEhhJp gSqilcMZrkwT8UiWt16tTFcyrQla0DgtBx5Qrqn6OodDRadOZBgMDeUesPM/qbOmy/ Wy3NnOdRf00hpwaaiZ49dtAzvQZYALx27n+Fpu7//NGJ/X9Vw3i1ejC+99Ak9ujsIy WXUk1euFgHXIoztqm6G5Ym7sKIUqPuwNDj89poW7JyLRZVEO6jrNdLcYqiYJLKleFf t4vluZ/JK87Fw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 06/16] arm64: dts: mediatek: mt8183: Use mediatek,mt8183b-mali as GPU compatible Date: Thu, 23 Feb 2023 14:43:35 +0100 Message-Id: <20230223134345.82625-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the new GPU related compatible to finally enable GPU DVFS on the MT8183 SoC. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index e01b96adef02..5169779d01df 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1752,7 +1752,7 @@ mfgcfg: syscon@13000000 { }; gpu: gpu@13040000 { - compatible = "mediatek,mt8183-mali", "arm,mali-bifrost"; + compatible = "mediatek,mt8183b-mali", "arm,mali-bifrost"; reg = <0 0x13040000 0 0x4000>; interrupts = , From patchwork Thu Feb 23 13:43:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 656106 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 587D9C61DA4 for ; Thu, 23 Feb 2023 13:44:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234426AbjBWNoI (ORCPT ); Thu, 23 Feb 2023 08:44:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234389AbjBWNoF (ORCPT ); Thu, 23 Feb 2023 08:44:05 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A02A153281; Thu, 23 Feb 2023 05:44:01 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E802C6602208; Thu, 23 Feb 2023 13:43:59 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159840; bh=dx6Odzp8sUh+RhwlV6Ef65Z+A961rYF6L7cKkj3gD6M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dhlQNM7ZZEtxd9UELVyqYfW6Ii45wzUdix6doLM90C3+Sy/WAflekBJgucT5Jow4E pCbMwb7au+mJxdrfvibpyNl+C/QcHaSmN72hF132vfAXHYJY2DRtrX49Ygm0LMC9b5 2bOdqzw+7CiEw9FrRr4W6Elnyagl13jZxUWVdN5V5Zh3LSTayCFy8J+OHHYaSBFhiO hRZ3nU+r84jqq2/fLyPj5aMijVVw7NFVaZC8TAsuk+5mnlvlOk20CvbHT6q1tadfL+ ISgrYb7A1BmEK09x0DOIigwFpfDAtxVSJxZTpv6LD1p5zegsic1JBMTLah1As4cWo6 V83hhD/jSjPFA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Alyssa Rosenzweig , =?utf-8?q?N=C3=ADcolas?= =?utf-8?q?_F_=2E_R_=2E_A_=2E_Prado?= Subject: [PATCH v2 07/16] arm64: dts: mediatek: mt8192: Add GPU nodes Date: Thu, 23 Feb 2023 14:43:36 +0100 Message-Id: <20230223134345.82625-8-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Alyssa Rosenzweig The MediaTek MT8192 includes a Mali-G57 GPU supported in Panfrost. Add the GPU node to the device tree to enable 3D acceleration. The GPU node is disabled by default. It should be enabled by board with its power supplies correctly assigned. Signed-off-by: Alyssa Rosenzweig [nfraprado: removed sram supply, tweaked opp node name, adjusted commit message] Signed-off-by: Nícolas F. R. A. Prado [wenst@: disable GPU by default; adjusted prefix; split out board change] Signed-off-by: Chen-Yu Tsai Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 109 +++++++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 87b91c8feaf9..2a3606f68ae4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -312,6 +312,91 @@ timer: timer { clock-frequency = <13000000>; }; + gpu_opp_table: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-358000000 { + opp-hz = /bits/ 64 <358000000>; + opp-microvolt = <606250>; + }; + + opp-399000000 { + opp-hz = /bits/ 64 <399000000>; + opp-microvolt = <618750>; + }; + + opp-440000000 { + opp-hz = /bits/ 64 <440000000>; + opp-microvolt = <631250>; + }; + + opp-482000000 { + opp-hz = /bits/ 64 <482000000>; + opp-microvolt = <643750>; + }; + + opp-523000000 { + opp-hz = /bits/ 64 <523000000>; + opp-microvolt = <656250>; + }; + + opp-564000000 { + opp-hz = /bits/ 64 <564000000>; + opp-microvolt = <668750>; + }; + + opp-605000000 { + opp-hz = /bits/ 64 <605000000>; + opp-microvolt = <681250>; + }; + + opp-647000000 { + opp-hz = /bits/ 64 <647000000>; + opp-microvolt = <693750>; + }; + + opp-688000000 { + opp-hz = /bits/ 64 <688000000>; + opp-microvolt = <706250>; + }; + + opp-724000000 { + opp-hz = /bits/ 64 <724000000>; + opp-microvolt = <725000>; + }; + + opp-748000000 { + opp-hz = /bits/ 64 <748000000>; + opp-microvolt = <737500>; + }; + + opp-772000000 { + opp-hz = /bits/ 64 <772000000>; + opp-microvolt = <750000>; + }; + + opp-795000000 { + opp-hz = /bits/ 64 <795000000>; + opp-microvolt = <762500>; + }; + + opp-819000000 { + opp-hz = /bits/ 64 <819000000>; + opp-microvolt = <775000>; + }; + + opp-843000000 { + opp-hz = /bits/ 64 <843000000>; + opp-microvolt = <787500>; + }; + + opp-866000000 { + opp-hz = /bits/ 64 <866000000>; + opp-microvolt = <800000>; + }; + }; + soc { #address-cells = <2>; #size-cells = <2>; @@ -1266,6 +1351,30 @@ mmc1: mmc@11f70000 { status = "disabled"; }; + gpu: gpu@13000000 { + compatible = "mediatek,mt8192-mali", "arm,mali-valhall-jm"; + reg = <0 0x13000000 0 0x4000>; + interrupts = + , + , + ; + interrupt-names = "job", "mmu", "gpu"; + + clocks = <&apmixedsys CLK_APMIXED_MFGPLL>; + + power-domains = + <&spm MT8192_POWER_DOMAIN_MFG2>, + <&spm MT8192_POWER_DOMAIN_MFG3>, + <&spm MT8192_POWER_DOMAIN_MFG4>, + <&spm MT8192_POWER_DOMAIN_MFG5>, + <&spm MT8192_POWER_DOMAIN_MFG6>; + power-domain-names = "core0", "core1", "core2", "core3", "core4"; + + operating-points-v2 = <&gpu_opp_table>; + + status = "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible = "mediatek,mt8192-mfgcfg"; reg = <0 0x13fbf000 0 0x1000>; From patchwork Thu Feb 23 13:43:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657333 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABCB8C636D6 for ; Thu, 23 Feb 2023 13:44:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234396AbjBWNoH (ORCPT ); Thu, 23 Feb 2023 08:44:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234073AbjBWNoE (ORCPT ); Thu, 23 Feb 2023 08:44:04 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97740515CA; Thu, 23 Feb 2023 05:44:02 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A393F6602206; Thu, 23 Feb 2023 13:44:00 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159841; bh=6g8YPvF/fQJS5t/oA/EETjTk+HQtvnCv6Vgp6i8eIQg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=olJwAFq8rMEugAKgzqCigXxF1lW8Eay1JbWHmSlV4HDskIQBZrXRRRAWAow44fToM vNkjU+8q22aZ3/MqahFDM8H+XSNRafzhCkx2SkpoSX6b6OZWGqTJvxQ/iBOVp2Lo2E 9RKGGai6eQVK0spdDPwBmK60c+fb6eUNdvVq4tvZ+xI9IbM2juHB/De/rUSh3J6PpT 483cZXpcC/YXHTg/5dWDLfwLlqn/g1eb0tccKs4zvO9yP0h8twNP0hK3+9tkR9wCCh OZzB5+8KC6sc/lzOQ64UW16bsDx2O6f3guAT5XESplrs/fR2BhlhrxuyIh27Wnh/kE QX7qEFTv3D3ZA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 08/16] arm64: dts: mediatek: mt8192: Add mfg_ref_sel clock to MFG0 domain Date: Thu, 23 Feb 2023 14:43:37 +0100 Message-Id: <20230223134345.82625-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The mfg_ref_sel clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 2a3606f68ae4..018d48f7d3c6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -499,8 +499,9 @@ power-domain@MT8192_POWER_DOMAIN_CONN { power-domain@MT8192_POWER_DOMAIN_MFG0 { reg = ; - clocks = <&topckgen CLK_TOP_MFG_PLL_SEL>; - clock-names = "mfg"; + clocks = <&topckgen CLK_TOP_MFG_PLL_SEL>, + <&topckgen CLK_TOP_MFG_REF_SEL>; + clock-names = "mfg", "alt"; #address-cells = <1>; #size-cells = <0>; #power-domain-cells = <1>; From patchwork Thu Feb 23 13:43:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A17D9C64ED8 for ; Thu, 23 Feb 2023 13:44:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234515AbjBWNoJ (ORCPT ); Thu, 23 Feb 2023 08:44:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234395AbjBWNoF (ORCPT ); Thu, 23 Feb 2023 08:44:05 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED3FD567BD; Thu, 23 Feb 2023 05:44:02 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 4ABBB660220B; Thu, 23 Feb 2023 13:44:01 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159841; bh=ycGpdrBlx/uJtZOtOoxWkcwFaJ2ZAw9Ng7FysdL11fE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oKlgofuEaQjFberftOuu7Q5HzbsWGzBvcdjx4/kF2VantqiM6m7AWmJDxmIEQ7+dh HZrVOTVh2mDBTRdpCG7NQF1dMH2GAVdgTzCj+nZgha/Rln9mDVpYpoy32kplF5EPoh Sl2prOVV2wSD15wkyoN8LcHbbDZ3rWNzSu5CI6YLFFBhUAD1pdpixr+lm35heMUgND xA8PVu3HlKOmuddBwcH/EL5qd0ueAXpJGSgVw7ehMXt3Eby+G5Y109UnNefg60IfFQ tV1uCJngaZWfLZDoZ5YERtpCKak6tynbe8p6GMTsApogr316YfZiNQ2KEWbXSGVthT +qCQoFCFhyKmQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, =?utf-8?b?TsOtY29s?= =?utf-8?b?YXMgRi4gUi4gQS4gUHJhZG8=?= Subject: [PATCH v2 09/16] arm64: dts: mediatek: mt8192-asurada: Add MFG0 domain supply Date: Thu, 23 Feb 2023 14:43:38 +0100 Message-Id: <20230223134345.82625-10-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Nícolas F. R. A. Prado The mfg0 power domain encompasses the whole GPU and its surrounding glue logic. This power domain has a separate power rail. Add its power supply for Asurada. Signed-off-by: Nícolas F. R. A. Prado [wenst@chromium.org: fix subject prefix and add commit message] Signed-off-by: Chen-Yu Tsai [Angelo: Reordered commits to address DVFS stability issues] Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 9f12257ab4e7..ec013d5ef157 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -380,6 +380,10 @@ &i2c7 { pinctrl-0 = <&i2c7_pins>; }; +&mfg0 { + domain-supply = <&mt6315_7_vbuck1>; +}; + &mipi_tx0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 018d48f7d3c6..d536fe5f33a0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -497,7 +497,7 @@ power-domain@MT8192_POWER_DOMAIN_CONN { #power-domain-cells = <0>; }; - power-domain@MT8192_POWER_DOMAIN_MFG0 { + mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { reg = ; clocks = <&topckgen CLK_TOP_MFG_PLL_SEL>, <&topckgen CLK_TOP_MFG_REF_SEL>; From patchwork Thu Feb 23 13:43:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 656105 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 499FBC636D6 for ; Thu, 23 Feb 2023 13:44:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234358AbjBWNoJ (ORCPT ); Thu, 23 Feb 2023 08:44:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234398AbjBWNoF (ORCPT ); Thu, 23 Feb 2023 08:44:05 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8DE1357084; Thu, 23 Feb 2023 05:44:03 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 0062F660220E; Thu, 23 Feb 2023 13:44:01 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159842; bh=h6g8JhUl3ByKknKJO0h/z+EUOf6qSWsVNOP7Ves+YLE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FXXezOP7iroYHgJ5QMenpkLXPgbwhwSRXrI92ZKNC5kUhf9L42eJmE3UMGA/OqMnN 9xoLpSZjqinDokBsC1plasL3onf3Y/Qty6G+GX4Hd8ACLjp0pDokk8AKlWHfVHPkNl eE0g6DmSE7nxs3nZPvLzAW1NM/Jian7xm1rt5olOCsuo/3+5oIoTn0PteZ3/ORxoTe qLJ0d7K38s7jrag7Jn7EU4tAJACVLw33kfMT9KfEXQX/ZTkVsrabRUxElVRC/LSix1 DSb6qlAbxPrRFus5VAA6PGv6mr/yMqkB8jR3gEcc/cl8EZXEWJdGaLkkdeXjHBEBbC 04nJIgj9k1d6w== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 10/16] arm64: dts: mediatek: mt8192-asurada: Assign sram supply to MFG1 pd Date: Thu, 23 Feb 2023 14:43:39 +0100 Message-Id: <20230223134345.82625-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a phandle to the MT8192_POWER_DOMAIN_MFG1 power domain and assign the GPU VSRAM supply to this in mt8192-asurada: this allows to keep the sram powered up while the GPU is used. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index ec013d5ef157..df477eb89f21 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -384,6 +384,10 @@ &mfg0 { domain-supply = <&mt6315_7_vbuck1>; }; +&mfg1 { + domain-supply = <&mt6359_vsram_others_ldo_reg>; +}; + &mipi_tx0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index d536fe5f33a0..91b63060ec7c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -506,7 +506,7 @@ mfg0: power-domain@MT8192_POWER_DOMAIN_MFG0 { #size-cells = <0>; #power-domain-cells = <1>; - power-domain@MT8192_POWER_DOMAIN_MFG1 { + mfg1: power-domain@MT8192_POWER_DOMAIN_MFG1 { reg = ; mediatek,infracfg = <&infracfg>; #address-cells = <1>; From patchwork Thu Feb 23 13:43:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA5C2C64ED6 for ; Thu, 23 Feb 2023 13:44:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234364AbjBWNoK (ORCPT ); Thu, 23 Feb 2023 08:44:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234400AbjBWNoG (ORCPT ); Thu, 23 Feb 2023 08:44:06 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 329AF4DBE8; Thu, 23 Feb 2023 05:44:04 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 967326602209; Thu, 23 Feb 2023 13:44:02 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159843; bh=PvHOALPrQriFUXthOsepKaTpX4xTyaYloZRmD2xgt7w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Kna8qoUB6U2pjst9ZLbcVaE/DNh/Nuhish3Gsux2GGBZHkAp3KgzpMrRKqaAsPnQW NwXPWsnTUJiITgfbfI4ybtVgZglJI8VFy51g4ASOnxccfdwac/jMPlFmeYbfOlf95b g/j0eGNYFepmQHZ6btYMimlbAEOeK01GOIgSvSTkzivjKFIlb8DCuvzxcqSEtrBmdo boU7aEmx6BY/XlLkAd4jacUiF0U0gajIA+Bbpjdp6meLdZXVgBggYPkTKBtzmXC6va HEEFWTDuAf3SVWaXX1sJWrYylUe7cHNl5jRCGuAy4zbboKcWwhjqxYLMI/PAYMSTQY UQF0tTV63rOXw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 11/16] arm64: dts: mediatek: mt8192-asurada: Couple VGPU and VSRAM_OTHER regulators Date: Thu, 23 Feb 2023 14:43:40 +0100 Message-Id: <20230223134345.82625-12-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add coupling for these regulators, as VSRAM_OTHER is used to power the GPU SRAM, and they have a strict voltage output relation to satisfy in order to ensure GPU stable operation. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index df477eb89f21..c8b6e1a9605b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -447,6 +447,13 @@ &mt6359_vrf12_ldo_reg { regulator-always-on; }; +&mt6359_vsram_others_ldo_reg { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <850000>; + regulator-coupled-with = <&mt6315_7_vbuck1>; + regulator-coupled-max-spread = <10000>; +}; + &mt6359_vufs_ldo_reg { regulator-always-on; }; @@ -1411,6 +1418,8 @@ mt6315_7_vbuck1: vbuck1 { regulator-max-microvolt = <1193750>; regulator-enable-ramp-delay = <256>; regulator-allowed-modes = <0 1 2>; + regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>; + regulator-coupled-max-spread = <10000>; }; }; }; From patchwork Thu Feb 23 13:43:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 656104 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5425CC61DA4 for ; Thu, 23 Feb 2023 13:44:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234155AbjBWNoM (ORCPT ); Thu, 23 Feb 2023 08:44:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234394AbjBWNoH (ORCPT ); Thu, 23 Feb 2023 08:44:07 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2D2D57D03; Thu, 23 Feb 2023 05:44:04 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 39FDF660220A; Thu, 23 Feb 2023 13:44:03 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159843; bh=5uTIKzxccTuXc8ARaKxHVjhHv2AKqCAZTuNnIoDmS70=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Sw4L5ZnqFa2sLyuyW38JEOlhxqihMMNhrcOZtS0RpYhksw57hMyge1E4LSf1I8J1P Ta9EdICsUkzksw7zGmVS+mf1y27y05qHPRegzsuouZLyfZ9sYpqMmZ8jYelECmMcm+ E3pW6wlUovBL9sGjTVjvedOMt2U4qSDQkuQ4zNSQ0Da/Cak36Ds/L83szZviB/pjzY JbkYgXFpOnzsd2jVPOpkUzPwEK+lP7ZkVN9Tl7V2G1AkAt2ODXmGb7HcaHTZ+xl6GK kHo8Al6Vw1vxJA6rZUg7lZ/m2dBxaxhkgox/eQ7YD35KH3XgE0P/HjOUL19kdlviVK WWde/QVkRzJvA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org, Alyssa Rosenzweig Subject: [PATCH v2 12/16] arm64: dts: mediatek: mt8192-asurada: Enable GPU Date: Thu, 23 Feb 2023 14:43:41 +0100 Message-Id: <20230223134345.82625-13-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Alyssa Rosenzweig Enable the GPU with its power supplies described. Signed-off-by: Alyssa Rosenzweig [wenst@: patch split out from MT8192 GPU node patch] Signed-off-by: Chen-Yu Tsai [Angelo: Minor commit title fix] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index c8b6e1a9605b..067685191ba6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -275,6 +275,11 @@ &dsi_out { remote-endpoint = <&anx7625_in>; }; +&gpu { + mali-supply = <&mt6315_7_vbuck1>; + status = "okay"; +}; + &i2c0 { status = "okay"; From patchwork Thu Feb 23 13:43:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8A64C64ED8 for ; Thu, 23 Feb 2023 13:44:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234558AbjBWNoN (ORCPT ); Thu, 23 Feb 2023 08:44:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234448AbjBWNoI (ORCPT ); Thu, 23 Feb 2023 08:44:08 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE379567A5; Thu, 23 Feb 2023 05:44:05 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E060C660220D; Thu, 23 Feb 2023 13:44:03 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159844; bh=Uz234EuBCjuBx6OoxFSEzYWl3aQoeDidRKVMhd2S+v0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Dhg5oGo7fLla1KJ2apO4B0vr6swmSsokjeSQkHgo/2J0BAx+oMHI2o0rTcM6wKzAS 3jbxOgJh999yU2lwKpvGjuFaaqCLc4UwzeACIvWkSfkSbcon6gGzVjdZ7Nj8DORfcI fLy/fSSDZokIDolBoVCDnj/qUU7f1m2wnzduo0qu1srKvzKqwr3fOtwSLNHfxpNTh5 BJhCQr1AqP7cVpu9YsLJ863YrYRKd0bO90MaJWc5zmD2jmAleW904w0beBRQnO3rkp Zm/DjUtBk7cmHZGXhFhDTBZPHv3OEJCShJqsZOwMnaAlY5ZWSMH38S2SUXM5sd4zoI VEb0KC1ugA0rw== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 13/16] arm64: dts: mediatek: mt8195: Add mfg_core_tmp clock to MFG1 domain Date: Thu, 23 Feb 2023 14:43:42 +0100 Message-Id: <20230223134345.82625-14-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Similarly to what can be seen in MT8192, on MT8195 the mfg_core_tmp clock is a mux used to switch between different "safe" (and slower) clock sources for the GPU: this is used during MFGPLL reconfiguration and eventually during idling at very low frequencies. This clock getting turned off means that the GPU will occasionally be unclocked, producing obvious consequences such as system crash or unpredictable behavior: assigning it to the top level MFG power domain will make sure that this stays on at all times during any operation on the MFG domain (only GPU-related transactions). Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 8fc527570791..6767bac3f69e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -446,8 +446,9 @@ mfg0: power-domain@MT8195_POWER_DOMAIN_MFG0 { power-domain@MT8195_POWER_DOMAIN_MFG1 { reg = ; - clocks = <&apmixedsys CLK_APMIXED_MFGPLL>; - clock-names = "mfg"; + clocks = <&apmixedsys CLK_APMIXED_MFGPLL>, + <&topckgen CLK_TOP_MFG_CORE_TMP>; + clock-names = "mfg", "alt"; mediatek,infracfg = <&infracfg_ao>; #address-cells = <1>; #size-cells = <0>; From patchwork Thu Feb 23 13:43:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 656103 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A4FCC64ED6 for ; Thu, 23 Feb 2023 13:44:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234614AbjBWNoN (ORCPT ); Thu, 23 Feb 2023 08:44:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234566AbjBWNoJ (ORCPT ); Thu, 23 Feb 2023 08:44:09 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 399A253288; Thu, 23 Feb 2023 05:44:06 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 872BF6602208; Thu, 23 Feb 2023 13:44:04 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159845; bh=2ydCc4fyk0y685SCkm0ivgZR+Aj5TAoj3NXcLWwlqws=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q3AnTIObuHslW9SzO++oOT3faDYE1AjdH6uwsea+oK5LquYGUhEt3StkkFnV6jWS4 v+V17wbHUBy8fzA/EZxZpYlQjdLd9aiZQg0kzjxYJt7heyCZ+fxRWjvB4JNHWqEJ9D jhmKRHZindJfu1lF6Hu7E8O7HowMSjeoMBmtXLA3wvP+pNr+hvSkFvnvMxwGl+idkV /En+od5IJYY9NpYTK8dsEQkDbx2DSGNyAMrvBiZTOWdWtSr65Vx+sZRIHjsI0zCc7o Y8Ot6ZJknyHANxyweJkW183zZvdlLtQQuuzJWc5HWTjW7gDK/G3kq9dKn4yyrgValu B2Cb8EePZU4hg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 14/16] arm64: dts: mt8195: Add panfrost node for Mali-G57 Valhall Natt GPU Date: Thu, 23 Feb 2023 14:43:43 +0100 Message-Id: <20230223134345.82625-15-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add GPU support through panfrost for the Mali-G57 GPU on MT8195 with its OPP table but keep it in disabled state. This is expected to be enabled only on boards which make use of the GPU. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 90 ++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 6767bac3f69e..b0ee4dc4ce20 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -333,6 +333,76 @@ performance: performance-controller@11bc10 { #performance-domain-cells = <1>; }; + gpu_opp_table: opp-table-gpu { + compatible = "operating-points-v2"; + opp-shared; + + opp-390000000 { + opp-hz = /bits/ 64 <390000000>; + opp-microvolt = <625000>; + }; + opp-410000000 { + opp-hz = /bits/ 64 <410000000>; + opp-microvolt = <631250>; + }; + opp-431000000 { + opp-hz = /bits/ 64 <431000000>; + opp-microvolt = <631250>; + }; + opp-473000000 { + opp-hz = /bits/ 64 <473000000>; + opp-microvolt = <637500>; + }; + opp-515000000 { + opp-hz = /bits/ 64 <515000000>; + opp-microvolt = <637500>; + }; + opp-556000000 { + opp-hz = /bits/ 64 <556000000>; + opp-microvolt = <643750>; + }; + opp-598000000 { + opp-hz = /bits/ 64 <598000000>; + opp-microvolt = <650000>; + }; + opp-640000000 { + opp-hz = /bits/ 64 <640000000>; + opp-microvolt = <650000>; + }; + opp-670000000 { + opp-hz = /bits/ 64 <670000000>; + opp-microvolt = <662500>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <675000>; + }; + opp-730000000 { + opp-hz = /bits/ 64 <730000000>; + opp-microvolt = <687500>; + }; + opp-760000000 { + opp-hz = /bits/ 64 <760000000>; + opp-microvolt = <700000>; + }; + opp-790000000 { + opp-hz = /bits/ 64 <790000000>; + opp-microvolt = <712500>; + }; + opp-820000000 { + opp-hz = /bits/ 64 <820000000>; + opp-microvolt = <725000>; + }; + opp-850000000 { + opp-hz = /bits/ 64 <850000000>; + opp-microvolt = <737500>; + }; + opp-880000000 { + opp-hz = /bits/ 64 <880000000>; + opp-microvolt = <750000>; + }; + }; + pmu-a55 { compatible = "arm,cortex-a55-pmu"; interrupt-parent = <&gic>; @@ -1790,6 +1860,26 @@ ufsphy: ufs-phy@11fa0000 { status = "disabled"; }; + gpu: gpu@13000000 { + compatible = "mediatek,mt8195-mali", "mediatek,mt8192-mali", + "arm,mali-valhall-jm"; + reg = <0 0x13000000 0 0x4000>; + + clocks = <&mfgcfg CLK_MFG_BG3D>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&spm MT8195_POWER_DOMAIN_MFG2>, + <&spm MT8195_POWER_DOMAIN_MFG3>, + <&spm MT8195_POWER_DOMAIN_MFG4>, + <&spm MT8195_POWER_DOMAIN_MFG5>, + <&spm MT8195_POWER_DOMAIN_MFG6>; + power-domain-names = "core0", "core1", "core2", "core3", "core4"; + status = "disabled"; + }; + mfgcfg: clock-controller@13fbf000 { compatible = "mediatek,mt8195-mfgcfg"; reg = <0 0x13fbf000 0 0x1000>; From patchwork Thu Feb 23 13:43:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 657329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38E34C64ED8 for ; Thu, 23 Feb 2023 13:44:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234406AbjBWNoO (ORCPT ); Thu, 23 Feb 2023 08:44:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234578AbjBWNoK (ORCPT ); Thu, 23 Feb 2023 08:44:10 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1E2757D0E; Thu, 23 Feb 2023 05:44:06 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2DDFE6602206; Thu, 23 Feb 2023 13:44:05 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159845; bh=862noHI/rREDzYDVTtjiXXlf1hVscfBOCM0dedbpEnY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MGWa/tZWigRcJxgxhM8A1iWWkGMGzeUFou1U0A3VjGFkhm0eJ0rD6ThrC22N/K3pm U1DDgnyOzUqJVhcZhI4RR971z9KFzH/cBaPKtISZHOH9+u6Jm9qoCyzEx6O+Ub62xU pdLvmXZ0VihuTVW1bc6iZxSlh1NqCv/pgjSbEd0xeD33jT+r7ArI9k/AL/1UWEmiwk AGdJFK6hu7hK87LRdIKMlnuJ+Sqs/0OMb8e+H6Sh3gsganlfZuGiJdHsVZAC+dCtLF OTteXY0QB+l7iR+EiSUOkvEgtFhlc+OJm/Ch8jErxR0TfNBPAzNaXwX7iT88BW/EuK iY59O+s5v/wbQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 15/16] arm64: dts: mediatek: mt8195-cherry: Enable Mali-G57 GPU Date: Thu, 23 Feb 2023 14:43:44 +0100 Message-Id: <20230223134345.82625-16-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable the Mali-G57 found on this platform with the open-source Panfrost driver. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 56749cfe7c33..24669093fbed 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -238,6 +238,11 @@ dptx_out: endpoint { }; }; +&gpu { + status = "okay"; + mali-supply = <&mt6315_7_vbuck1>; +}; + &i2c0 { status = "okay"; From patchwork Thu Feb 23 13:43:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 656102 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09AFCC636D6 for ; Thu, 23 Feb 2023 13:44:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233982AbjBWNoT (ORCPT ); Thu, 23 Feb 2023 08:44:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234409AbjBWNoM (ORCPT ); Thu, 23 Feb 2023 08:44:12 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DFE3157D1E; Thu, 23 Feb 2023 05:44:07 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id D451B660220B; Thu, 23 Feb 2023 13:44:05 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677159846; bh=dy6p0VV97fJU2W+Kqgjonk70VW8h+mDMVbMYggMpSpc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GuSHrUQy9erq5ZNAVsetpEIRGkydtz4GeZNTdwFsqf/mEm6sdXG7bXX/F4pbqqrRo Ak/hOc3ehfvQsnR8Z5Z2Y8nhOfHVjJKzisuWTcaIk11oOGk/FnQ33Q05Rf0QDx5aea ol9TyuYtlo+JYMIEN5oN9biMC7PDtIvfslaVXX3mJyzs8zpxGt6r8T144LT71RfS46 EqSbj3B/w5X5c5mFtlyGl8VHdjArAZ9hz8vxLyGzYXWc/MLr795/0g/lnoW7S+U8f1 qsWzjjOyAsTg0s/7q+l4tuyNu2FzDr/qtXz25t6uuDKT9hR5sBDilceqteh0ARwwVe e6hYwbly7GakQ== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH v2 16/16] arm64: dts: mediatek: mt8186: Add GPU node Date: Thu, 23 Feb 2023 14:43:45 +0100 Message-Id: <20230223134345.82625-17-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> References: <20230223134345.82625-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a GPU node for MT8186 SoC but keep it disabled. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index a0d3e1f731bd..dc760e4dafdf 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -1075,6 +1075,23 @@ mfgsys: clock-controller@13000000 { #clock-cells = <1>; }; + gpu: gpu@13040000 { + compatible = "mediatek,mt8186-mali", "mediatek,mt8183b-mali", + "arm,mali-bifrost"; + reg = <0 0x13040000 0 0x4000>; + + clocks = <&mfgsys CLK_MFG_BG3D>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + power-domains = <&spm MT8186_POWER_DOMAIN_MFG2>, + <&spm MT8186_POWER_DOMAIN_MFG3>; + power-domain-names = "core0", "core1"; + #cooling-cells = <2>; + status = "disabled"; + }; + mmsys: syscon@14000000 { compatible = "mediatek,mt8186-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>;