From patchwork Sat Feb 18 06:51:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 654946 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7C18C61DA4 for ; Sat, 18 Feb 2023 06:51:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229499AbjBRGvW (ORCPT ); Sat, 18 Feb 2023 01:51:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229475AbjBRGvV (ORCPT ); Sat, 18 Feb 2023 01:51:21 -0500 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 834324FC88; Fri, 17 Feb 2023 22:51:19 -0800 (PST) Received: by mail-ed1-x536.google.com with SMTP id ec30so668949edb.10; Fri, 17 Feb 2023 22:51:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=x+7lF519TNw7DEedjha5cPKcDehMAz7Bv8bHQk6jEz4=; b=Dy1NDiS2zWrTpyDfLkUhVZ19otqYOvNIptA058v62e0ANpW60H1SUSoQX+/+J9s25J icpFwasXPieGs8kPw/NxgHlxgBrwZHz0poumxNExqboqexXWj/DY2y5rGZaAvybgcnwO U4wfKDCbRElAOGYy5wAet6r+SuNTlM+cCGNIvWu/1+KeuYadkHj6yDipD6LeO3wxz2h/ D/6AjlKO4UKRX6CphqxeozWnup0mKOW0CJC0Q5xoCgc8iJHiAW+jb+E+2IbYT3d1AOvj oUkfKZsOKm8FKbizjupIFPH96LfgDqv1GvVJQw0+Kw6aKMMu3cG0BcdhIsidR+KhElHO 3vJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=x+7lF519TNw7DEedjha5cPKcDehMAz7Bv8bHQk6jEz4=; b=zBsCql/5T0K1/M5AhPKn4WlNdjN9NXTqTYJ/sNO09KC51B3zGMHUW3iq3fHBt2zcne CYp2kIuPOFZZ+yugoOYC+ZieYHG3ZXBLefw6wTos02EgCEQdkrL/iKQqIIElaD56S0cZ 9IvNiRReOJpJSjF/VrvFJc3jdkJ/R5BLdDWqgKN9atPqps/Hi1PCVwmsC17re7StBM3B b261BZRHewZjW1i872RQZlv1U5LFAprKEQxxyC1qEwukc3jJyRdSZWZ89brFNLIuDZUe nx8M7lvzFUdlXqxCrQnDfZ6XkLKnj3PnDtoRkl8vdsUVAvVVvdHUUvdATio3iruBwQsK ueOA== X-Gm-Message-State: AO0yUKWnNkblZJC4JmGI6iUfqiu9VWOg10IP0RfC2pXZO/CDjG0vjKvv 1CzpLX99ncyw1YC3IYJeWXo= X-Google-Smtp-Source: AK7set/N25F8xcfjFi2RltkDno35yAF90bOUYEt+V4Pc7+D3K+722xn/kcgteRJXzhKnuN0U4y2vOg== X-Received: by 2002:a05:6402:12ca:b0:4ad:7204:6968 with SMTP id k10-20020a05640212ca00b004ad72046968mr6459722edx.32.1676703077887; Fri, 17 Feb 2023 22:51:17 -0800 (PST) Received: from arinc9-PC.lan ([37.120.152.236]) by smtp.gmail.com with ESMTPSA id y19-20020a50ce13000000b004acc6c67089sm3156039edi.75.2023.02.17.22.51.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 22:51:17 -0800 (PST) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Linus Walleij , Matthias Brugger Cc: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Daniel Golle , erkin.bozoglu@xeront.com Subject: [PATCH 1/2] pinctrl: mediatek: add missing options to PINCTRL_MT7981 Date: Sat, 18 Feb 2023 09:51:06 +0300 Message-Id: <20230218065108.8958-1-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Arınç ÜNAL There are options missing from PINCTRL_MT7981 whilst being on every other pin controller. Add them. Signed-off-by: Arınç ÜNAL Acked-by: Daniel Golle --- drivers/pinctrl/mediatek/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig index f20c28334bcb..67818ba14d4e 100644 --- a/drivers/pinctrl/mediatek/Kconfig +++ b/drivers/pinctrl/mediatek/Kconfig @@ -130,6 +130,8 @@ config PINCTRL_MT7622 config PINCTRL_MT7981 bool "Mediatek MT7981 pin control" depends on OF + depends on ARM64 || COMPILE_TEST + default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_MOORE config PINCTRL_MT7986 From patchwork Sat Feb 18 06:51:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 654829 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D622EC64EC4 for ; Sat, 18 Feb 2023 06:51:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229606AbjBRGvY (ORCPT ); Sat, 18 Feb 2023 01:51:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229541AbjBRGvW (ORCPT ); Sat, 18 Feb 2023 01:51:22 -0500 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E53E34FC8F; Fri, 17 Feb 2023 22:51:20 -0800 (PST) Received: by mail-ed1-x52d.google.com with SMTP id dm15so1717079edb.0; Fri, 17 Feb 2023 22:51:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PNyW2BK8sxuue6VhlTFrxQ5TeKWpYlIJHuDiD6+cBR4=; b=gp6xiiqOqdlaU30pnKezCuCUjLBT7j3hxCkl3fMDkmDX2T3CcEPfMJOjPN/NS95lac e/p9bb7zWwabXQDokLHKBJXPn/bEVXVa0f3BLAhgEcNnndCLITy6sSFngo+S+3fwnWkb Sww657RMrzP4YyvOHB4Q9ZuXlrAcHPS6cy+GRyjPq1cTmOZWecZTzRleONZycGHYGk8j jofEXGD5y9Lwj8If/oQGk4yKX3A6Yq7ucHCr6sBlqiFbGB1pQt8HDmxjwDT/S7J5SE0b pbyaHDrHlprEZsDrLut+tnzUy12gRm6YdIX6iiS3jBA57o5YFwV9Pwa7L4HHE2Fw6JMa +H/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PNyW2BK8sxuue6VhlTFrxQ5TeKWpYlIJHuDiD6+cBR4=; b=kLy+Z5H3fhLRtAvpEQM6UuzJeL1x4jvDRju/bG5hWSmjoO8putYBfGrtrKHJh+vyyC Tg5xMazrdSFFNE9YSTAVzriGhMauQjah5nAdSeYvCN8/xiiM2gKPk4VOYs72RW0jE/Sl Xk4rj10ixr6RH45aBoOTOZfBEiLwE/riHTSkWdur/+HrDw/AdPcnXyFoP6q9d2WFvkyA cUrxHiZYT2u9/BAJE60c1pV0hakHWxNqnXev/KsVPQwAx+W7+Bhg+R3TXFdl6dx+0BEI qwiSi1d9oI3dBUJVMuH4In6oJzbt+WNObYpf2VCq0mb+3nJTq3SZSaVsibILvTrdQAnM 5KXA== X-Gm-Message-State: AO0yUKVpj4JHr8Q9QRdWfcSY0qPlMIe5fjp+zOtMB3gccKyhDF0ujaZl or51bquh0e/gjoDjGAvA28g= X-Google-Smtp-Source: AK7set/rMYIdfBcyUwwWMGvji9Ty/itrUgwlS3CSvXHw+/l1R/x61+7S4ib+dh5IrMTL0MelF2F1dw== X-Received: by 2002:a17:906:769a:b0:8b1:319c:c29e with SMTP id o26-20020a170906769a00b008b1319cc29emr2271770ejm.74.1676703079128; Fri, 17 Feb 2023 22:51:19 -0800 (PST) Received: from arinc9-PC.lan ([37.120.152.236]) by smtp.gmail.com with ESMTPSA id y19-20020a50ce13000000b004acc6c67089sm3156039edi.75.2023.02.17.22.51.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 22:51:18 -0800 (PST) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Sean Wang , Linus Walleij , Matthias Brugger Cc: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Daniel Golle , erkin.bozoglu@xeront.com Subject: [PATCH 2/2] pinctrl: mediatek: fix naming inconsistency Date: Sat, 18 Feb 2023 09:51:07 +0300 Message-Id: <20230218065108.8958-2-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230218065108.8958-1-arinc.unal@arinc9.com> References: <20230218065108.8958-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Arınç ÜNAL Some options include "MediaTek", some "Mediatek". Rename all to "MediaTek" to address the naming inconsistency. Signed-off-by: Arınç ÜNAL Reviewed-by: Daniel Golle --- drivers/pinctrl/mediatek/Kconfig | 42 ++++++++++++++++---------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig index 67818ba14d4e..a71874fed3d6 100644 --- a/drivers/pinctrl/mediatek/Kconfig +++ b/drivers/pinctrl/mediatek/Kconfig @@ -45,35 +45,35 @@ config PINCTRL_MTK_PARIS # For ARMv7 SoCs config PINCTRL_MT2701 - bool "Mediatek MT2701 pin control" + bool "MediaTek MT2701 pin control" depends on MACH_MT7623 || MACH_MT2701 || COMPILE_TEST depends on OF default MACH_MT2701 select PINCTRL_MTK config PINCTRL_MT7623 - bool "Mediatek MT7623 pin control with generic binding" + bool "MediaTek MT7623 pin control with generic binding" depends on MACH_MT7623 || COMPILE_TEST depends on OF default MACH_MT7623 select PINCTRL_MTK_MOORE config PINCTRL_MT7629 - bool "Mediatek MT7629 pin control" + bool "MediaTek MT7629 pin control" depends on MACH_MT7629 || COMPILE_TEST depends on OF default MACH_MT7629 select PINCTRL_MTK_MOORE config PINCTRL_MT8135 - bool "Mediatek MT8135 pin control" + bool "MediaTek MT8135 pin control" depends on MACH_MT8135 || COMPILE_TEST depends on OF default MACH_MT8135 select PINCTRL_MTK config PINCTRL_MT8127 - bool "Mediatek MT8127 pin control" + bool "MediaTek MT8127 pin control" depends on MACH_MT8127 || COMPILE_TEST depends on OF default MACH_MT8127 @@ -88,33 +88,33 @@ config PINCTRL_MT2712 select PINCTRL_MTK config PINCTRL_MT6765 - tristate "Mediatek MT6765 pin control" + tristate "MediaTek MT6765 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS config PINCTRL_MT6779 - tristate "Mediatek MT6779 pin control" + tristate "MediaTek MT6779 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS help Say yes here to support pin controller and gpio driver - on Mediatek MT6779 SoC. + on MediaTek MT6779 SoC. In MTK platform, we support virtual gpio and use it to map specific eint which doesn't have real gpio pin. config PINCTRL_MT6795 - bool "Mediatek MT6795 pin control" + bool "MediaTek MT6795 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS config PINCTRL_MT6797 - bool "Mediatek MT6797 pin control" + bool "MediaTek MT6797 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -128,42 +128,42 @@ config PINCTRL_MT7622 select PINCTRL_MTK_MOORE config PINCTRL_MT7981 - bool "Mediatek MT7981 pin control" + bool "MediaTek MT7981 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_MOORE config PINCTRL_MT7986 - bool "Mediatek MT7986 pin control" + bool "MediaTek MT7986 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_MOORE config PINCTRL_MT8167 - bool "Mediatek MT8167 pin control" + bool "MediaTek MT8167 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK config PINCTRL_MT8173 - bool "Mediatek MT8173 pin control" + bool "MediaTek MT8173 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK config PINCTRL_MT8183 - bool "Mediatek MT8183 pin control" + bool "MediaTek MT8183 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS config PINCTRL_MT8186 - bool "Mediatek MT8186 pin control" + bool "MediaTek MT8186 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -182,28 +182,28 @@ config PINCTRL_MT8188 map specific eint which doesn't have real gpio pin. config PINCTRL_MT8192 - bool "Mediatek MT8192 pin control" + bool "MediaTek MT8192 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS config PINCTRL_MT8195 - bool "Mediatek MT8195 pin control" + bool "MediaTek MT8195 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS config PINCTRL_MT8365 - bool "Mediatek MT8365 pin control" + bool "MediaTek MT8365 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK config PINCTRL_MT8516 - bool "Mediatek MT8516 pin control" + bool "MediaTek MT8516 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -211,7 +211,7 @@ config PINCTRL_MT8516 # For PMIC config PINCTRL_MT6397 - bool "Mediatek MT6397 pin control" + bool "MediaTek MT6397 pin control" depends on MFD_MT6397 || COMPILE_TEST depends on OF default MFD_MT6397