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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:15 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Kamal Dasu , Miquel Raynal , Linus Walleij Subject: [PATCH v2 01/10] mtd: rawnand: brcmnand: Refactored code to introduce helper functions Date: Sat, 11 Feb 2023 16:29:00 +0100 Message-Id: <20230211152909.1436133-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Kamal Dasu Refactored NAND ECC and CMD address configuration code to use helper functions. Signed-off-by: Kamal Dasu Signed-off-by: Miquel Raynal [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Reviewed-by: Michael Trimarchi Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 100 ++++++++++++++--------- 1 file changed, 62 insertions(+), 38 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 74c9348f7fc4..571f1c795da0 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -595,6 +595,54 @@ static inline void brcmnand_write_fc(struct brcmnand_controller *ctrl, __raw_writel(val, ctrl->nand_fc + word * 4); } +static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl) +{ + + /* Clear error addresses */ + brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0); + brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0); + brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0); + brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0); +} + +static u64 brcmnand_get_uncorrecc_addr(struct brcmnand_controller *ctrl) +{ + u64 err_addr; + + err_addr = brcmnand_read_reg(ctrl, BRCMNAND_UNCORR_ADDR); + err_addr |= ((u64)(brcmnand_read_reg(ctrl, + BRCMNAND_UNCORR_EXT_ADDR) + & 0xffff) << 32); + + return err_addr; +} + +static u64 brcmnand_get_correcc_addr(struct brcmnand_controller *ctrl) +{ + u64 err_addr; + + err_addr = brcmnand_read_reg(ctrl, BRCMNAND_CORR_ADDR); + err_addr |= ((u64)(brcmnand_read_reg(ctrl, + BRCMNAND_CORR_EXT_ADDR) + & 0xffff) << 32); + + return err_addr; +} + +static void brcmnand_set_cmd_addr(struct mtd_info *mtd, u64 addr) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct brcmnand_host *host = nand_get_controller_data(chip); + struct brcmnand_controller *ctrl = host->ctrl; + + brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, + (host->cs << 16) | ((addr >> 32) & 0xffff)); + (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); + brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, + lower_32_bits(addr)); + (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); +} + static inline u16 brcmnand_cs_offset(struct brcmnand_controller *ctrl, int cs, enum brcmnand_cs_reg reg) { @@ -1190,9 +1238,12 @@ static void brcmnand_send_cmd(struct brcmnand_host *host, int cmd) { struct brcmnand_controller *ctrl = host->ctrl; int ret; + u64 cmd_addr; + + cmd_addr = brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); + + dev_dbg(ctrl->dev, "send native cmd %d addr 0x%llx\n", cmd, cmd_addr); - dev_dbg(ctrl->dev, "send native cmd %d addr_lo 0x%x\n", cmd, - brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS)); BUG_ON(ctrl->cmd_pending != 0); ctrl->cmd_pending = cmd; @@ -1365,12 +1416,7 @@ static void brcmnand_cmdfunc(struct mtd_info *mtd, unsigned command, if (!native_cmd) return; - brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, - (host->cs << 16) | ((addr >> 32) & 0xffff)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); - brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, lower_32_bits(addr)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); - + brcmnand_set_cmd_addr(mtd, addr); brcmnand_send_cmd(host, native_cmd); brcmnand_waitfunc(mtd, chip); @@ -1600,20 +1646,10 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, struct brcmnand_controller *ctrl = host->ctrl; int i, j, ret = 0; - /* Clear error addresses */ - brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0); - brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0); - brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0); - brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0); - - brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, - (host->cs << 16) | ((addr >> 32) & 0xffff)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); + brcmnand_clear_ecc_addr(ctrl); for (i = 0; i < trans; i++, addr += FC_BYTES) { - brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, - lower_32_bits(addr)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS); + brcmnand_set_cmd_addr(mtd, addr); /* SPARE_AREA_READ does not use ECC, so just use PAGE_READ */ brcmnand_send_cmd(host, CMD_PAGE_READ); brcmnand_waitfunc(mtd, chip); @@ -1633,21 +1669,15 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, host->hwcfg.sector_size_1k); if (ret != -EBADMSG) { - *err_addr = brcmnand_read_reg(ctrl, - BRCMNAND_UNCORR_ADDR) | - ((u64)(brcmnand_read_reg(ctrl, - BRCMNAND_UNCORR_EXT_ADDR) - & 0xffff) << 32); + *err_addr = brcmnand_get_uncorrecc_addr(ctrl); + if (*err_addr) ret = -EBADMSG; } if (!ret) { - *err_addr = brcmnand_read_reg(ctrl, - BRCMNAND_CORR_ADDR) | - ((u64)(brcmnand_read_reg(ctrl, - BRCMNAND_CORR_EXT_ADDR) - & 0xffff) << 32); + *err_addr = brcmnand_get_correcc_addr(ctrl); + if (*err_addr) ret = -EUCLEAN; } @@ -1721,7 +1751,7 @@ static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip, dev_dbg(ctrl->dev, "read %llx -> %p\n", (unsigned long long)addr, buf); try_dmaread: - brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_COUNT, 0); + brcmnand_clear_ecc_addr(ctrl); #ifndef __UBOOT__ if (has_flash_dma(ctrl) && !oob && flash_dma_buf_ok(buf)) { @@ -1875,15 +1905,9 @@ static int brcmnand_write(struct mtd_info *mtd, struct nand_chip *chip, } #endif /* __UBOOT__ */ - brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS, - (host->cs << 16) | ((addr >> 32) & 0xffff)); - (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS); - for (i = 0; i < trans; i++, addr += FC_BYTES) { /* full address MUST be set before populating FC */ - brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, - lower_32_bits(addr)); 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:17 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Kamal Dasu , Miquel Raynal , Linus Walleij Subject: [PATCH v2 02/10] mtd: rawnand: brcmnand: Add support for v7.3 controller Date: Sat, 11 Feb 2023 16:29:01 +0100 Message-Id: <20230211152909.1436133-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Kamal Dasu This change adds support for brcm NAND v7.3 controller. This controller uses a newer version of flash_dma engine and change mostly implements these differences. Signed-off-by: Kamal Dasu Signed-off-by: Miquel Raynal [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 106 ++++++++++++++++++----- 1 file changed, 84 insertions(+), 22 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 571f1c795da0..170aece0aa79 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -86,6 +86,12 @@ struct brcm_nand_dma_desc { #define FLASH_DMA_ECC_ERROR (1 << 8) #define FLASH_DMA_CORR_ERROR (1 << 9) +/* Bitfields for DMA_MODE */ +#define FLASH_DMA_MODE_STOP_ON_ERROR BIT(1) /* stop in Uncorr ECC error */ +#define FLASH_DMA_MODE_MODE BIT(0) /* link list */ +#define FLASH_DMA_MODE_MASK (FLASH_DMA_MODE_STOP_ON_ERROR | \ + FLASH_DMA_MODE_MODE) + /* 512B flash cache in the NAND controller HW */ #define FC_SHIFT 9U #define FC_BYTES 512U @@ -98,6 +104,53 @@ struct brcm_nand_dma_desc { #define NAND_CTRL_RDY (INTFC_CTLR_READY | INTFC_FLASH_READY) #define NAND_POLL_STATUS_TIMEOUT_MS 100 +/* flash_dma registers */ +enum flash_dma_reg { + FLASH_DMA_REVISION = 0, + FLASH_DMA_FIRST_DESC, + FLASH_DMA_FIRST_DESC_EXT, + FLASH_DMA_CTRL, + FLASH_DMA_MODE, + FLASH_DMA_STATUS, + FLASH_DMA_INTERRUPT_DESC, + FLASH_DMA_INTERRUPT_DESC_EXT, + FLASH_DMA_ERROR_STATUS, + FLASH_DMA_CURRENT_DESC, + FLASH_DMA_CURRENT_DESC_EXT, +}; + +#ifndef __UBOOT__ +/* flash_dma registers v1*/ +static const u16 flash_dma_regs_v1[] = { + [FLASH_DMA_REVISION] = 0x00, + [FLASH_DMA_FIRST_DESC] = 0x04, + [FLASH_DMA_FIRST_DESC_EXT] = 0x08, + [FLASH_DMA_CTRL] = 0x0c, + [FLASH_DMA_MODE] = 0x10, + [FLASH_DMA_STATUS] = 0x14, + [FLASH_DMA_INTERRUPT_DESC] = 0x18, + [FLASH_DMA_INTERRUPT_DESC_EXT] = 0x1c, + [FLASH_DMA_ERROR_STATUS] = 0x20, + [FLASH_DMA_CURRENT_DESC] = 0x24, + [FLASH_DMA_CURRENT_DESC_EXT] = 0x28, +}; + +/* flash_dma registers v4 */ +static const u16 flash_dma_regs_v4[] = { + [FLASH_DMA_REVISION] = 0x00, + [FLASH_DMA_FIRST_DESC] = 0x08, + [FLASH_DMA_FIRST_DESC_EXT] = 0x0c, + [FLASH_DMA_CTRL] = 0x10, + [FLASH_DMA_MODE] = 0x14, + [FLASH_DMA_STATUS] = 0x18, + [FLASH_DMA_INTERRUPT_DESC] = 0x20, + [FLASH_DMA_INTERRUPT_DESC_EXT] = 0x24, + [FLASH_DMA_ERROR_STATUS] = 0x28, + [FLASH_DMA_CURRENT_DESC] = 0x30, + [FLASH_DMA_CURRENT_DESC_EXT] = 0x34, +}; +#endif /* __UBOOT__ */ + /* Controller feature flags */ enum { BRCMNAND_HAS_1K_SECTORS = BIT(0), @@ -135,6 +188,8 @@ struct brcmnand_controller { /* List of NAND hosts (one for each chip-select) */ struct list_head host_list; + /* flash_dma reg */ + const u16 *flash_dma_offsets; struct brcm_nand_dma_desc *dma_desc; dma_addr_t dma_pa; @@ -473,7 +528,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) /* Register offsets */ if (ctrl->nand_version >= 0x0702) ctrl->reg_offsets = brcmnand_regs_v72; - else if (ctrl->nand_version >= 0x0701) + else if (ctrl->nand_version == 0x0701) ctrl->reg_offsets = brcmnand_regs_v71; else if (ctrl->nand_version >= 0x0600) ctrl->reg_offsets = brcmnand_regs_v60; @@ -518,7 +573,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) } /* Maximum spare area sector size (per 512B) */ - if (ctrl->nand_version >= 0x0702) + if (ctrl->nand_version == 0x0702) ctrl->max_oob = 128; else if (ctrl->nand_version >= 0x0600) ctrl->max_oob = 64; @@ -553,6 +608,17 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) return 0; } +#ifndef __UBOOT__ +static void brcmnand_flash_dma_revision_init(struct brcmnand_controller *ctrl) +{ + /* flash_dma register offsets */ + if (ctrl->nand_version >= 0x0703) + ctrl->flash_dma_offsets = flash_dma_regs_v4; + else + ctrl->flash_dma_offsets = flash_dma_regs_v1; +} +#endif /* __UBOOT__ */ + static inline u32 brcmnand_read_reg(struct brcmnand_controller *ctrl, enum brcmnand_reg reg) { @@ -675,7 +741,7 @@ static void brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val) enum brcmnand_reg reg = BRCMNAND_CORR_THRESHOLD; int cs = host->cs; - if (ctrl->nand_version >= 0x0702) + if (ctrl->nand_version == 0x0702) bits = 7; else if (ctrl->nand_version >= 0x0600) bits = 6; @@ -729,7 +795,7 @@ enum { static inline u32 brcmnand_spare_area_mask(struct brcmnand_controller *ctrl) { - if (ctrl->nand_version >= 0x0702) + if (ctrl->nand_version == 0x0702) return GENMASK(7, 0); else if (ctrl->nand_version >= 0x0600) return GENMASK(6, 0); @@ -877,20 +943,6 @@ static inline void brcmnand_set_wp(struct brcmnand_controller *ctrl, bool en) * Flash DMA ***********************************************************************/ -enum flash_dma_reg { - FLASH_DMA_REVISION = 0x00, - FLASH_DMA_FIRST_DESC = 0x04, - FLASH_DMA_FIRST_DESC_EXT = 0x08, - FLASH_DMA_CTRL = 0x0c, - FLASH_DMA_MODE = 0x10, - FLASH_DMA_STATUS = 0x14, - FLASH_DMA_INTERRUPT_DESC = 0x18, - FLASH_DMA_INTERRUPT_DESC_EXT = 0x1c, - FLASH_DMA_ERROR_STATUS = 0x20, - FLASH_DMA_CURRENT_DESC = 0x24, - FLASH_DMA_CURRENT_DESC_EXT = 0x28, -}; - static inline bool has_flash_dma(struct brcmnand_controller *ctrl) { return ctrl->flash_dma_base; @@ -906,14 +958,19 @@ static inline bool flash_dma_buf_ok(const void *buf) #endif /* __UBOOT__ */ } -static inline void flash_dma_writel(struct brcmnand_controller *ctrl, u8 offs, - u32 val) +static inline void flash_dma_writel(struct brcmnand_controller *ctrl, + enum flash_dma_reg dma_reg, u32 val) { + u16 offs = ctrl->flash_dma_offsets[dma_reg]; + brcmnand_writel(val, ctrl->flash_dma_base + offs); } -static inline u32 flash_dma_readl(struct brcmnand_controller *ctrl, u8 offs) +static inline u32 flash_dma_readl(struct brcmnand_controller *ctrl, + enum flash_dma_reg dma_reg) { + u16 offs = ctrl->flash_dma_offsets[dma_reg]; + return brcmnand_readl(ctrl->flash_dma_base + offs); } @@ -2470,6 +2527,7 @@ static const struct of_device_id brcmnand_of_match[] = { { .compatible = "brcm,brcmnand-v7.0" }, { .compatible = "brcm,brcmnand-v7.1" }, { .compatible = "brcm,brcmnand-v7.2" }, + { .compatible = "brcm,brcmnand-v7.3" }, {}, }; MODULE_DEVICE_TABLE(of, brcmnand_of_match); @@ -2600,7 +2658,11 @@ int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc) goto err; } - flash_dma_writel(ctrl, FLASH_DMA_MODE, 1); /* linked-list */ + /* initialize the dma version */ + brcmnand_flash_dma_revision_init(ctrl); + + /* linked-list and stop on error */ + flash_dma_writel(ctrl, FLASH_DMA_MODE, FLASH_DMA_MODE_MASK); flash_dma_writel(ctrl, FLASH_DMA_ERROR_STATUS, 0); /* Allocate descriptor(s) */ From patchwork Sat Feb 11 15:29:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 652695 Delivered-To: patch@linaro.org Received: by 2002:adf:f90f:0:0:0:0:0 with SMTP id b15csp1537035wrr; Sat, 11 Feb 2023 07:29:59 -0800 (PST) X-Google-Smtp-Source: AK7set+GysNjVDJhsK+OeJOVyvGzcCgHZKyg0IHNM3OU+Ammrc2jjamUWh6/pdm9evasAlGQc8A1 X-Received: by 2002:a05:6870:4288:b0:16a:2408:ba8b with SMTP id y8-20020a056870428800b0016a2408ba8bmr4680596oah.3.1676129399660; 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:19 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Claire Lin , Ray Jui , Kamal Dasu , Miquel Raynal , Linus Walleij Subject: [PATCH v2 03/10] mtd: rawnand: brcmnand: Fix ecc chunk calculation for erased page bitfips Date: Sat, 11 Feb 2023 16:29:02 +0100 Message-Id: <20230211152909.1436133-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Claire Lin In brcmstb_nand_verify_erased_page(), the ECC chunk pointer calculation while correcting erased page bitflips is wrong, fix it. Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips") Signed-off-by: Claire Lin Reviewed-by: Ray Jui Signed-off-by: Kamal Dasu Signed-off-by: Miquel Raynal [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 170aece0aa79..0402cb06a74b 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1765,6 +1765,7 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, int bitflips = 0; int page = addr >> chip->page_shift; int ret; + void *ecc_chunk; if (!buf) { #ifndef __UBOOT__ @@ -1784,7 +1785,9 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, return ret; for (i = 0; i < chip->ecc.steps; i++, oob += sas) { - ret = nand_check_erased_ecc_chunk(buf, chip->ecc.size, + ecc_chunk = buf + chip->ecc.size * i; + ret = nand_check_erased_ecc_chunk(ecc_chunk, + chip->ecc.size, oob, sas, NULL, 0, chip->ecc.strength); if (ret < 0) From patchwork Sat Feb 11 15:29:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 652696 Delivered-To: patch@linaro.org Received: by 2002:adf:f90f:0:0:0:0:0 with SMTP id b15csp1537298wrr; Sat, 11 Feb 2023 07:30:33 -0800 (PST) X-Google-Smtp-Source: AK7set9wFlYgYGd+wZLDM8ni4wBPidR8jLIZ0C8SLUKPhwR7z8MqjEbYXy7cV24T52ZKILAp4ROl X-Received: by 2002:aca:2401:0:b0:378:9c51:3ed6 with SMTP id n1-20020aca2401000000b003789c513ed6mr8097816oic.20.1676129433131; Sat, 11 Feb 2023 07:30:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676129433; cv=none; d=google.com; s=arc-20160816; b=ouACyV0Qw+A/3vlR3aHWW+cjnjBCh2bx6HRz5UyaJkcVqqLqlEP4yddgNRy/EI9O1T GLkuE+o0c1YJfkj54GOrmYEFeAqwSMoV2Cj+udLkasuolCS3ao+G2SE/5uqE66JfHhqq k6ZRlwfh428W/TGHnUzgW/og6e674KMQQH1F18bZl5Bfzvyqmuxv++XND7QCy+AXoD0X W757HhuALo7gS/zhlbg2aVwDOPYYLMkTGKsc9t5ovw2EU/ayTUax+ZUtEYEnVai/CuZx 7t8eojKZm9LnnEDc0qY62f+y3JK5NYqjxzeS1T0pI5rsD75Z+gVGIYXoJb19su8D/cIb 1Gig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Wg8CvbH6oag7e9s5/CAPHzV05zxO8iZA6F2coGGE+hU=; b=IXCMRzZ/5JyZjixdfmb3tNFFosRcUQdgZTSggnAgMKJIHVnS9nJ8+FvZ01csWlt8AA xbcD8rF0m26RvnELiDS9BxL93WbVIdoNGFelydQFxYQGaq/byeehRmT6fk02hbwmMtcJ 3aJF5PTOwpip7KDBhV3bmmt1l/Xs4wFJcuza1g8euth9ox30RH8frH+KJ3muByaYfclg hBfw1p64yeyHw96ya3X5SRkiVS9GaA5p69p5pLf4BbCcvSpXd5Drjpgjpbogx1eZVVC1 u2UqmpFDllzH4XjV6MhmfbtYVvD3hB02gzuOsIzYA7zhEq6FGh6+uxx2p8CkxfkO+zfI ENTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VTmnrvz9; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:21 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , Kamal Dasu , Miquel Raynal , Linus Walleij Subject: [PATCH v2 04/10] mtd: nand: brcmnand: Add support for flash-dma v0 Date: Sat, 11 Feb 2023 16:29:03 +0100 Message-Id: <20230211152909.1436133-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Kamal Dasu This change adds support for flash dma v0.0. Signed-off-by: Kamal Dasu Signed-off-by: Miquel Raynal [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 0402cb06a74b..a934373a2992 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -120,6 +120,18 @@ enum flash_dma_reg { }; #ifndef __UBOOT__ +/* flash_dma registers v0*/ +static const u16 flash_dma_regs_v0[] = { + [FLASH_DMA_REVISION] = 0x00, + [FLASH_DMA_FIRST_DESC] = 0x04, + [FLASH_DMA_CTRL] = 0x08, + [FLASH_DMA_MODE] = 0x0c, + [FLASH_DMA_STATUS] = 0x10, + [FLASH_DMA_INTERRUPT_DESC] = 0x14, + [FLASH_DMA_ERROR_STATUS] = 0x18, + [FLASH_DMA_CURRENT_DESC] = 0x1c, +}; + /* flash_dma registers v1*/ static const u16 flash_dma_regs_v1[] = { [FLASH_DMA_REVISION] = 0x00, @@ -614,6 +626,8 @@ static void brcmnand_flash_dma_revision_init(struct brcmnand_controller *ctrl) /* flash_dma register offsets */ if (ctrl->nand_version >= 0x0703) ctrl->flash_dma_offsets = flash_dma_regs_v4; + else if (ctrl->nand_version == 0x0602) + ctrl->flash_dma_offsets = flash_dma_regs_v0; else ctrl->flash_dma_offsets = flash_dma_regs_v1; } @@ -1645,8 +1659,11 @@ static void brcmnand_dma_run(struct brcmnand_host *host, dma_addr_t desc) flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc)); (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC); - flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc)); - (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT); + if (ctrl->nand_version > 0x0602) { + flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, + upper_32_bits(desc)); + (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT); + } /* Start FLASH_DMA engine */ ctrl->dma_pending = true; From patchwork Sat Feb 11 15:29:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 652697 Delivered-To: patch@linaro.org Received: by 2002:adf:f90f:0:0:0:0:0 with SMTP id b15csp1537376wrr; Sat, 11 Feb 2023 07:30:44 -0800 (PST) X-Google-Smtp-Source: AK7set/m73bot4KsxFs2d/VtdJ3YIzPUhnBOCdyHX+Lm5iWrVltbG4d8pN6OpBkx3mx4rHW/Kyec X-Received: by 2002:a05:6808:278a:b0:378:8f21:3ded with SMTP id es10-20020a056808278a00b003788f213dedmr7844959oib.37.1676129444110; Sat, 11 Feb 2023 07:30:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676129444; cv=none; d=google.com; s=arc-20160816; b=dnZdemEiV5x99Bch19u8K3ke3jJ81dRwxUPsplvGviq35ky4I9bcQZo+9RwgWRV37p e4iWILM8Y3U1SeFO4htqE7FMaXz7tXQsqsYjzw73XfefBKbUoH9Hx5piiaDptp365/kL jKdgz3M9vvtFUUhoD8vKnw8jvI+gQSGsZNuIz+dat/LK/2n2Q5np2Rz/PK6H/D3X7HQS 34PHFL2q/zmWdTFTjOH1uGo9fZOJ5j/6GD1hMGlpQaybTAqBNVoOQiLWZmrIHTCTRqD5 vtzmdfVHYlMYZvLL/1MaUieiB6uTgaePM5VmQ/T4Yv+4Mkvec3qZr7E8uTFpiIqEAG+B VfUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=bLzh5w5TLq1Gd/bmSc41Qw+cz9MWQYAi7R/5+7ILTmw=; b=Q574BGbxewFoLsBj6slpvQA4GNU+Px9rGqRxrbXitE/AMcKFjqLEoJ4KpQXF2xDbBq JKhIoKEOOv/HMk5EticORbfLwPUGcJoDbHd5icNzcwmEPhNek62jZxTIwvTV3SRiCea8 lcRendrx54j/2/OEd2i6E7xftdpVr5JOK7CjMiwkHqqMz7SrBypXx1Lq8VvjtepUqS9H dGFAHY+9Htp8z/FiipZBk9Kcje0ZxPhyDD7ipx0wRDTEJN9O7kdbIcMvvBwUJlF4nmbg c3gDOE0xIKHj19G0sWOmTUGj4hBJH5HjwiVs0pGMOqbcmdWTMb0ai6KO92sB3FUjE9BG OmeQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mPUkMqsi; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:24 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , =?utf-8?q?=C3=81lvaro_Fern=C3=A1nd?= =?utf-8?q?ez_Rojas?= , Miquel Raynal , Linus Walleij Subject: [PATCH v2 05/10] mtd: rawnand: brcmnand: correctly verify erased pages Date: Sat, 11 Feb 2023 16:29:04 +0100 Message-Id: <20230211152909.1436133-6-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas The current code checks that the whole OOB area is erased. This is a problem when JFFS2 cleanmarkers are added to the OOB, since it will fail due to the usable OOB bytes not being 0xff. Correct this by only checking that data and ECC bytes aren't 0xff. Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips") Signed-off-by: Álvaro Fernández Rojas Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200512082451.771212-1-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index a934373a2992..5d3fb460d89a 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1777,11 +1777,12 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, struct nand_chip *chip, void *buf, u64 addr) { - int i, sas; - void *oob = chip->oob_poi; + struct mtd_oob_region ecc; + int i; int bitflips = 0; int page = addr >> chip->page_shift; int ret; + void *ecc_bytes; void *ecc_chunk; if (!buf) { @@ -1794,18 +1795,20 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, chip->pagebuf = -1; } - sas = mtd->oobsize / chip->ecc.steps; - /* read without ecc for verification */ ret = chip->ecc.read_page_raw(mtd, chip, buf, true, page); if (ret) return ret; - for (i = 0; i < chip->ecc.steps; i++, oob += sas) { + for (i = 0; i < chip->ecc.steps; i++) { ecc_chunk = buf + chip->ecc.size * i; - ret = nand_check_erased_ecc_chunk(ecc_chunk, - chip->ecc.size, - oob, sas, NULL, 0, + + mtd_ooblayout_ecc(mtd, i, &ecc); + ecc_bytes = chip->oob_poi + ecc.offset; + + ret = nand_check_erased_ecc_chunk(ecc_chunk, chip->ecc.size, + ecc_bytes, ecc.length, + NULL, 0, chip->ecc.strength); if (ret < 0) return ret; From patchwork Sat Feb 11 15:29:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 652698 Delivered-To: patch@linaro.org Received: by 2002:adf:f90f:0:0:0:0:0 with SMTP id b15csp1537455wrr; Sat, 11 Feb 2023 07:30:55 -0800 (PST) X-Google-Smtp-Source: AK7set8N/xwE72eOMO0mssceWkKi7U0rrlzPNHFLS4vG8iYXTGpd8ZF7AxX17SgahzkzlK6KWm9O X-Received: by 2002:a4a:de1a:0:b0:517:523d:b6a2 with SMTP id y26-20020a4ade1a000000b00517523db6a2mr9796721oot.4.1676129455093; Sat, 11 Feb 2023 07:30:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676129455; cv=none; d=google.com; s=arc-20160816; b=KacqdGSJJqHzK9PllSy2QsJ4WOq9w+LPkuHX7WM3gEpfLPQN6ISjjJFaGk5F4S8e3/ VU+o4+W2hqCA/qdcgRzkYFyHW4GQDF7+1HLy5YTz5Q14omvgzL0p/L3vpli9e8Kvo0CK ciBpGxMpd9L5r402LHtpOU4XHlkm6sNH7K6t1et3zetforhM/S/5Yd3taHXHXQ5b9bb8 7elDfPGSXy2NfsoQa+nRPF13EVDQfbxuffAjDfSBTVuU3Q5vDyYXLM+f1PM9okveElXv 9/nvg7dUc6fUV2uk5atFtfKikWd+IDzS+VNg0uadQ7m4S2Ei0Oiac7NExltCoBtx24Zg KLEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=H5B/k4bOyDfaet4agU+tSuVU4NmNPt67u+Bj1P50y9Y=; b=N9+rbUuawjo8/XqgMhNH1n7IUZ/RK4U4xvC4hhOxUexYmA+wqkaYqQOBaIaSEvxWIE iHjnP/DMvVfWUgpCNmu2wgcmzRJZ7/ZZNN45bFyGNtP9srWgv7RBjqEvx7VQOctftXtF pK+f48NJ1/Alt8HSzCBEddK8iU+V0mg+JHDopLFOr0ndmzICNGuOKgRzXvlIIK8qA1BV sgb4PVtXwx1YqJ4WqPqtQM8JHY7R90qhucTXV0Xa06Ii/2xV+PQLB2zIaZEcfidlMpAc rscdgikAI6qBAu1YMhXr2+eds98nDp84no0pTSlHS0FkST7sL02ntsO5OxoyHgHtaiVq LWPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pw7ZaKSM; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:26 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , =?utf-8?q?=C3=81lvaro_Fern=C3=A1nd?= =?utf-8?q?ez_Rojas?= , Miquel Raynal , Florian Fainelli , Linus Walleij Subject: [PATCH v2 06/10] mtd: rawnand: brcmnand: rename v4 registers Date: Sat, 11 Feb 2023 16:29:05 +0100 Message-Id: <20230211152909.1436133-7-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas These registers are also used on v3.3. Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Miquel Raynal Acked-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-2-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Reviewed-by: Michael Trimarchi Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 5d3fb460d89a..ee7c3a21602e 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -293,8 +293,8 @@ enum brcmnand_reg { BRCMNAND_FC_BASE, }; -/* BRCMNAND v4.0 */ -static const u16 brcmnand_regs_v40[] = { +/* BRCMNAND v3.3-v4.0 */ +static const u16 brcmnand_regs_v33[] = { [BRCMNAND_CMD_START] = 0x04, [BRCMNAND_CMD_EXT_ADDRESS] = 0x08, [BRCMNAND_CMD_ADDRESS] = 0x0c, @@ -546,8 +546,8 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) ctrl->reg_offsets = brcmnand_regs_v60; else if (ctrl->nand_version >= 0x0500) ctrl->reg_offsets = brcmnand_regs_v50; - else if (ctrl->nand_version >= 0x0400) - ctrl->reg_offsets = brcmnand_regs_v40; + else if (ctrl->nand_version >= 0x0303) + ctrl->reg_offsets = brcmnand_regs_v33; /* Chip-select stride */ if (ctrl->nand_version >= 0x0701) From patchwork Sat Feb 11 15:29:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 652700 Delivered-To: patch@linaro.org Received: by 2002:adf:f90f:0:0:0:0:0 with SMTP id b15csp1537645wrr; Sat, 11 Feb 2023 07:31:17 -0800 (PST) X-Google-Smtp-Source: AK7set+7vjrKcin0KHQX3YZpK2+b0vNxOrn9WK31Rm1oYAt9G9eEqHH6V4gPVe3Iafsh8BInU0kw X-Received: by 2002:a4a:94a5:0:b0:51f:8b5c:d789 with SMTP id k34-20020a4a94a5000000b0051f8b5cd789mr343509ooi.8.1676129477520; Sat, 11 Feb 2023 07:31:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676129477; cv=none; d=google.com; s=arc-20160816; b=FUeZCDvU9Xh5KSPYU9iFYKp/7qIB9E74x+GnY8cRBX92fRj9xAx2TNzV56s+uh8auR MAN/DjcTIDQ8bbYdZ31YSnboz9lQBpWEXL7XiWP5shU1rP/Wb9kek+1+QotKQQ6su1yM w+t3LgTHEKvTV7Dwv4koeiHEz7BLzb8DxFuVjYNj/2qdxEq4iaZRyb3QDa1mf7UsrWaE XvHTixYoJTEZkuDc2oqk8izeaiWye1TL1ALdoTISo5CUkCnP44t+ElXHTl8pTFfIp1kg QFHBoucGr4MQdlpYVh7zbV1CQ/7CZtbhUKhh+C8IqELsfvMdabAFSCdP6BfmxXM7UQli AXKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=UMgHKME/rQkbvwpkI7ZLxBXFoWc9l3r65uT2r45GxZM=; b=g9bbLNgFX1pxpf+cRzT2DcN5rqQGxesAlv1BYBkqNGWUxvgBwFItBDMJcEcY5xtaOO fS1jZ1miu7Ti6Nob5g+jCmuPt6EFUfqJNdErzgRPmX9gktgHMkI1ZKgDHnI39z6Am7bi 7PAu1YAeNBvoZMkmJV6mx8KVYGJ0Vk8VU4R6HGOCP/QbLrbyKgUtR2R2FjxwUHifQUWP YvZ270sRY/lW4QK4q+pgGiEpSZcStc78osVr0IItniSe6IHjmXWokpQeqn9AIZdCPLKD pnI7DzmvSpP06yf81oWq8ju7rw7q0RQIoDOovGe7BfGBhL3VoWh7ds45SQyK2TpyNyUg U1ww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Y0bETrVK; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:28 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , =?utf-8?q?=C3=81lvaro_Fern=C3=A1nd?= =?utf-8?q?ez_Rojas?= , Florian Fainelli , Miquel Raynal , Linus Walleij Subject: [PATCH v2 07/10] mtd: rawnand: brcmnand: fix CS0 layout Date: Sat, 11 Feb 2023 16:29:06 +0100 Message-Id: <20230211152909.1436133-8-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas Only v3.3-v5.0 have a different CS0 layout. Controllers before v3.3 use the same layout for every CS. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Álvaro Fernández Rojas Acked-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-3-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Reviewed-by: Michael Trimarchi Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index ee7c3a21602e..1ea9091e6497 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -561,8 +561,9 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) } else { ctrl->cs_offsets = brcmnand_cs_offsets; - /* v5.0 and earlier has a different CS0 offset layout */ - if (ctrl->nand_version <= 0x0500) + /* v3.3-5.0 have a different CS0 offset layout */ + if (ctrl->nand_version >= 0x0303 && + ctrl->nand_version <= 0x0500) ctrl->cs0_offsets = brcmnand_cs_offsets_cs0; } From patchwork Sat Feb 11 15:29:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 652699 Delivered-To: patch@linaro.org Received: by 2002:adf:f90f:0:0:0:0:0 with SMTP id b15csp1537556wrr; Sat, 11 Feb 2023 07:31:06 -0800 (PST) X-Google-Smtp-Source: AK7set+CMGZPrw+/TKar5Jh/fZZVzcUtJmCKwvUgEi2JBPjYaX3Dz5siggCMvGNbPbqhPxAInzP4 X-Received: by 2002:a4a:d8d7:0:b0:517:7580:4764 with SMTP id c23-20020a4ad8d7000000b0051775804764mr9816067oov.0.1676129466772; Sat, 11 Feb 2023 07:31:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676129466; cv=none; d=google.com; s=arc-20160816; b=pczx6XZCsLPmx0TQw541ZJkw4hwMOJGDYk5uN4cpDqPUbJ6wC6i8YUCPkTJMdhVhqg cUZiefTFMP7emCSXyWveuuE1O7dgoDFG2KV4Yf583TG2lvcExd9XsPsmLAr6Dd9zF4+6 HBntoxyUYI0w6DAfv00FTBaq3RxgFLTjqFqBzGT45J69tHcqtDzZzE9LGn/y++Reak+/ 83QYQ6u+EOp27RIAca9Q3Q1XbdgJjup/Y8ciWb5tWuG524EogcUrOKcy4YY7FJOlGxgb pZax0ss9kii41DH9goE7msBZTw9rU6A/Suf+DVlfxFrkgSOgpa69nSkxOErs3jDh3jM4 3T5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LnrOWPGeI03zbnn8041Fes9GWNYbQAgM/RxX+QqW548=; b=ZjiRUvCq88oV7K6jS51jPbJoEPF8xzLmMQpJDVc6TnqADzCZNyFx/uT26aR6vF9n/P iB+Xg9Ol5P5fTDPXyyGQTnYn3CtnoP60FKh/AMULuz20eX97OA0TCoTVhy01d/v+ybKs FPP8F1Nx24h72rkdvI2TsFVRG9kpKKDwi4BIDXk9hZO/vrdSbXTb03BFtxIMmbw4qZpT AbcDChqzRA7UMR1o13EaBrcgWIOQn13oPkbLYilkt5tu8/+IQR4HR7C+6O8XlNrM20+U FaRvpuRP06EGJlfiEEevJjaDOaKKooq8f5uhIdmfJ0IBz3Cmoo8ZKqd7WSFRx6A6dF9F KXRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="dk86k/t1"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:30 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , =?utf-8?q?=C3=81lvaro_Fern=C3=A1nd?= =?utf-8?q?ez_Rojas?= , Florian Fainelli , Miquel Raynal , Linus Walleij Subject: [PATCH v2 08/10] mtd: rawnand: brcmnand: rename page sizes Date: Sat, 11 Feb 2023 16:29:07 +0100 Message-Id: <20230211152909.1436133-9-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas Current pages sizes apply to controllers after v3.4 Signed-off-by: Álvaro Fernández Rojas Acked-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-4-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 1ea9091e6497..10a2e2c0f599 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -526,7 +526,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) { static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512, 1024, 2048, 0 }; static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256, 1024, 2048, 0 }; - static const unsigned int page_sizes[] = { 512, 2048, 4096, 8192, 0 }; + static const unsigned int page_sizes_v3_4[] = { 512, 2048, 4096, 8192, 0 }; ctrl->nand_version = nand_readreg(ctrl, 0) & 0xffff; @@ -573,7 +573,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) ctrl->max_page_size = 16 * 1024; ctrl->max_block_size = 2 * 1024 * 1024; } else { - ctrl->page_sizes = page_sizes; + ctrl->page_sizes = page_sizes_v3_4; if (ctrl->nand_version >= 0x0600) ctrl->block_sizes = block_sizes_v6; else From patchwork Sat Feb 11 15:29:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 652701 Delivered-To: patch@linaro.org Received: by 2002:adf:f90f:0:0:0:0:0 with SMTP id b15csp1537737wrr; Sat, 11 Feb 2023 07:31:29 -0800 (PST) X-Google-Smtp-Source: AK7set+b4yr+x149lJpp8x4EFTN/d4WqGVnH2utvjiERuhYenurK/6Hvz4eq7uQht7xKqP5JyXQh X-Received: by 2002:a05:6871:8a8:b0:16b:398:7322 with SMTP id r40-20020a05687108a800b0016b03987322mr4695021oaq.25.1676129489366; Sat, 11 Feb 2023 07:31:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676129489; cv=none; d=google.com; s=arc-20160816; b=kNih/WJIoLg0QubHEplIQ6s5/5gcUIrqaYL8vJiey2Z46O9KODBu+RUCszL4xLbeRu VOZjwnmIVtJ9VU/fI2/12VfVdfX65GyOg2P7wM6gNKweKc4c6zfBdZimI5IYY7y0HI3O hsFP9icqcgdhKA27x0r4+143yRLXDY6CTFCtwP52RML3xri1ltIXiFntxGUD0Qf8oc/y iXjggrTHF/rC5bXXEKU4KqEaHII8DgaLbftn5TZru3piHGbnsgRkU8KZMgiCu/eicgxs XWcCAvG4p9u9AsEvNhB22MKsT4CaDzV6y/fPyOHOrlPzOjLM/MgbWepylrrUHbtjKsTP 4QZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=vTmSxO/CTx0UxaWuSD+jC9GQvkOxE6VWW05k16TBITY=; b=tgYvjgmY2w1X4kVywh3yUy+BcbgOMr9KL4XRJ0KrqcRh60p/DoL4BTkvnnxYg6X5NT d3bla7m54wt+CEm4NaEo8EAn8yIK+oqp6+69dxUtu/WEKiIjbPib5ERFKxmomkH+9Lei auamAYDE6IQP0v5I4yjG7NsWOjymNibfuYNX/promIIQ5Op08Nv3fFUQ6gjj7biT8c+D DJgPe/dDz/r7hkmJKxOXYGWI0sGL8Xcq09qGqjPsLRDY20hVDxTLnMA+ReeUl2Pga4vf zafCcYt5G9UnA3sBPBEiWJ+wWC5OQIDF0PPZj9v9LIsI17HFy1xigEY8I5a6QDarhLZJ XVhA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CgzzIeiX; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:32 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , =?utf-8?q?=C3=81lvaro_Fern=C3=A1nd?= =?utf-8?q?ez_Rojas?= , Florian Fainelli , Miquel Raynal , Linus Walleij Subject: [PATCH v2 09/10] mtd: rawnand: brcmnand: support v2.1-v2.2 controllers Date: Sat, 11 Feb 2023 16:29:08 +0100 Message-Id: <20230211152909.1436133-10-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas v2.1: tested on Netgear DGND3700v1 (BCM6368) v2.2: tested on Netgear DGND3700v2 (BCM6362) Signed-off-by: Álvaro Fernández Rojas Acked-by: Florian Fainelli Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-6-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 85 +++++++++++++++++++++--- 1 file changed, 76 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 10a2e2c0f599..b2ebcaf7a5bf 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -217,6 +217,7 @@ struct brcmnand_controller { const unsigned int *block_sizes; unsigned int max_page_size; const unsigned int *page_sizes; + unsigned int page_size_shift; unsigned int max_oob; u32 features; @@ -293,6 +294,36 @@ enum brcmnand_reg { BRCMNAND_FC_BASE, }; +/* BRCMNAND v2.1-v2.2 */ +static const u16 brcmnand_regs_v21[] = { + [BRCMNAND_CMD_START] = 0x04, + [BRCMNAND_CMD_EXT_ADDRESS] = 0x08, + [BRCMNAND_CMD_ADDRESS] = 0x0c, + [BRCMNAND_INTFC_STATUS] = 0x5c, + [BRCMNAND_CS_SELECT] = 0x14, + [BRCMNAND_CS_XOR] = 0x18, + [BRCMNAND_LL_OP] = 0, + [BRCMNAND_CS0_BASE] = 0x40, + [BRCMNAND_CS1_BASE] = 0, + [BRCMNAND_CORR_THRESHOLD] = 0, + [BRCMNAND_CORR_THRESHOLD_EXT] = 0, + [BRCMNAND_UNCORR_COUNT] = 0, + [BRCMNAND_CORR_COUNT] = 0, + [BRCMNAND_CORR_EXT_ADDR] = 0x60, + [BRCMNAND_CORR_ADDR] = 0x64, + [BRCMNAND_UNCORR_EXT_ADDR] = 0x68, + [BRCMNAND_UNCORR_ADDR] = 0x6c, + [BRCMNAND_SEMAPHORE] = 0x50, + [BRCMNAND_ID] = 0x54, + [BRCMNAND_ID_EXT] = 0, + [BRCMNAND_LL_RDATA] = 0, + [BRCMNAND_OOB_READ_BASE] = 0x20, + [BRCMNAND_OOB_READ_10_BASE] = 0, + [BRCMNAND_OOB_WRITE_BASE] = 0x30, + [BRCMNAND_OOB_WRITE_10_BASE] = 0, + [BRCMNAND_FC_BASE] = 0x200, +}; + /* BRCMNAND v3.3-v4.0 */ static const u16 brcmnand_regs_v33[] = { [BRCMNAND_CMD_START] = 0x04, @@ -491,6 +522,9 @@ enum { CFG_BUS_WIDTH = BIT(CFG_BUS_WIDTH_SHIFT), CFG_DEVICE_SIZE_SHIFT = 24, + /* Only for v2.1 */ + CFG_PAGE_SIZE_SHIFT_v2_1 = 30, + /* Only for pre-v7.1 (with no CFG_EXT register) */ CFG_PAGE_SIZE_SHIFT = 20, CFG_BLK_SIZE_SHIFT = 28, @@ -526,12 +560,16 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) { static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512, 1024, 2048, 0 }; static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256, 1024, 2048, 0 }; + static const unsigned int block_sizes_v2_2[] = { 16, 128, 8, 512, 256, 0 }; + static const unsigned int block_sizes_v2_1[] = { 16, 128, 8, 512, 0 }; static const unsigned int page_sizes_v3_4[] = { 512, 2048, 4096, 8192, 0 }; + static const unsigned int page_sizes_v2_2[] = { 512, 2048, 4096, 0 }; + static const unsigned int page_sizes_v2_1[] = { 512, 2048, 0 }; ctrl->nand_version = nand_readreg(ctrl, 0) & 0xffff; - /* Only support v4.0+? */ - if (ctrl->nand_version < 0x0400) { + /* Only support v2.1+ */ + if (ctrl->nand_version < 0x0201) { dev_err(ctrl->dev, "version %#x not supported\n", ctrl->nand_version); return -ENODEV; @@ -548,6 +586,8 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) ctrl->reg_offsets = brcmnand_regs_v50; else if (ctrl->nand_version >= 0x0303) ctrl->reg_offsets = brcmnand_regs_v33; + else if (ctrl->nand_version >= 0x0201) + ctrl->reg_offsets = brcmnand_regs_v21; /* Chip-select stride */ if (ctrl->nand_version >= 0x0701) @@ -573,14 +613,32 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl) ctrl->max_page_size = 16 * 1024; ctrl->max_block_size = 2 * 1024 * 1024; } else { - ctrl->page_sizes = page_sizes_v3_4; + if (ctrl->nand_version >= 0x0304) + ctrl->page_sizes = page_sizes_v3_4; + else if (ctrl->nand_version >= 0x0202) + ctrl->page_sizes = page_sizes_v2_2; + else + ctrl->page_sizes = page_sizes_v2_1; + + if (ctrl->nand_version >= 0x0202) + ctrl->page_size_shift = CFG_PAGE_SIZE_SHIFT; + else + ctrl->page_size_shift = CFG_PAGE_SIZE_SHIFT_v2_1; + if (ctrl->nand_version >= 0x0600) ctrl->block_sizes = block_sizes_v6; - else + else if (ctrl->nand_version >= 0x0400) ctrl->block_sizes = block_sizes_v4; + else if (ctrl->nand_version >= 0x0202) + ctrl->block_sizes = block_sizes_v2_2; + else + ctrl->block_sizes = block_sizes_v2_1; if (ctrl->nand_version < 0x0400) { - ctrl->max_page_size = 4096; + if (ctrl->nand_version < 0x0202) + ctrl->max_page_size = 2048; + else + ctrl->max_page_size = 4096; ctrl->max_block_size = 512 * 1024; } } @@ -756,6 +814,9 @@ static void brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val) enum brcmnand_reg reg = BRCMNAND_CORR_THRESHOLD; int cs = host->cs; + if (!ctrl->reg_offsets[reg]) + return; + if (ctrl->nand_version == 0x0702) bits = 7; else if (ctrl->nand_version >= 0x0600) @@ -814,8 +875,10 @@ static inline u32 brcmnand_spare_area_mask(struct brcmnand_controller *ctrl) return GENMASK(7, 0); else if (ctrl->nand_version >= 0x0600) return GENMASK(6, 0); - else + else if (ctrl->nand_version >= 0x0303) return GENMASK(5, 0); + else + return GENMASK(4, 0); } #define NAND_ACC_CONTROL_ECC_SHIFT 16 @@ -2149,7 +2212,7 @@ static int brcmnand_set_cfg(struct brcmnand_host *host, (!!(cfg->device_width == 16) << CFG_BUS_WIDTH_SHIFT) | (device_size << CFG_DEVICE_SIZE_SHIFT); if (cfg_offs == cfg_ext_offs) { - tmp |= (page_size << CFG_PAGE_SIZE_SHIFT) | + tmp |= (page_size << ctrl->page_size_shift) | (block_size << CFG_BLK_SIZE_SHIFT); nand_writereg(ctrl, cfg_offs, tmp); } else { @@ -2161,9 +2224,11 @@ static int brcmnand_set_cfg(struct brcmnand_host *host, tmp = nand_readreg(ctrl, acc_control_offs); tmp &= ~brcmnand_ecc_level_mask(ctrl); - tmp |= cfg->ecc_level << NAND_ACC_CONTROL_ECC_SHIFT; tmp &= ~brcmnand_spare_area_mask(ctrl); - tmp |= cfg->spare_area_size; + if (ctrl->nand_version >= 0x0302) { + tmp |= cfg->ecc_level << NAND_ACC_CONTROL_ECC_SHIFT; + tmp |= cfg->spare_area_size; + } nand_writereg(ctrl, acc_control_offs, tmp); brcmnand_set_sector_size_1k(host, cfg->sector_size_1k); @@ -2543,6 +2608,8 @@ const struct dev_pm_ops brcmnand_pm_ops = { EXPORT_SYMBOL_GPL(brcmnand_pm_ops); static const struct of_device_id brcmnand_of_match[] = { + { .compatible = "brcm,brcmnand-v2.1" }, + { .compatible = "brcm,brcmnand-v2.2" }, { .compatible = "brcm,brcmnand-v4.0" }, { .compatible = "brcm,brcmnand-v5.0" }, { .compatible = "brcm,brcmnand-v6.0" }, From patchwork Sat Feb 11 15:29:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 652702 Delivered-To: patch@linaro.org Received: by 2002:adf:f90f:0:0:0:0:0 with SMTP id b15csp1537824wrr; Sat, 11 Feb 2023 07:31:40 -0800 (PST) X-Google-Smtp-Source: AK7set8ODuYljCID9k7UOOWC2Ttwdemn5mImHAT6ieWzqbYxVR4EikKZe4u0kmEwAmplxUOR1yZ4 X-Received: by 2002:a05:6870:d62b:b0:16d:b5cb:9d39 with SMTP id a43-20020a056870d62b00b0016db5cb9d39mr3908455oaq.22.1676129500458; Sat, 11 Feb 2023 07:31:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676129500; 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id f26-20020a170906825a00b0084c4b87aa18sm3977768ejx.37.2023.02.11.07.29.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Feb 2023 07:29:34 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Tom Rini , Michael Nazzareno Trimarchi Cc: Anand Gore , William Zhang , Kursad Oney , Joel Peshkin , Philippe Reynes , =?utf-8?b?UmFmYcWCIE1p?= =?utf-8?b?xYJlY2tp?= , =?utf-8?q?=C3=81lvaro_Fern=C3=A1nd?= =?utf-8?q?ez_Rojas?= , Brian Norris , Miquel Raynal , Linus Walleij Subject: [PATCH v2 10/10] mtd: rawnand: brcmnand: fix OOB R/W with Hamming ECC Date: Sat, 11 Feb 2023 16:29:09 +0100 Message-Id: <20230211152909.1436133-11-linus.walleij@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230211152909.1436133-1-linus.walleij@linaro.org> References: <20230211152909.1436133-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Álvaro Fernández Rojas Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall always be done without ECC enabled. This is a problem when adding JFFS2 cleanmarkers to erased blocks. If JFFS2 clenmarkers are added to the OOB with ECC enabled, OOB bytes will be changed from ff ff ff to 00 00 00, reporting incorrect ECC errors. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Álvaro Fernández Rojas Acked-by: Brian Norris Signed-off-by: Miquel Raynal Link: https://lore.kernel.org/linux-mtd/20210224080210.23686-1-noltari@gmail.com [Ported to U-Boot from the Linux kernel] Signed-off-by: Linus Walleij Acked-by: William Zhang --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index b2ebcaf7a5bf..efbf9a3120a4 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -2515,6 +2515,12 @@ static int brcmnand_init_cs(struct brcmnand_host *host, ofnode dn) ret = nand_register(0, mtd); #endif /* __UBOOT__ */ + /* If OOB is written with ECC enabled it will cause ECC errors */ + if (is_hamming_ecc(host->ctrl, &host->hwcfg)) { + chip->ecc.write_oob = brcmnand_write_oob_raw; + chip->ecc.read_oob = brcmnand_read_oob_raw; + } + return ret; }