From patchwork Mon Apr 29 14:44:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163031 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp1973244ill; Mon, 29 Apr 2019 07:44:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqzjsw6CHdjvNuCDoEFA8qWbubTxlTEdjickMb1dsw45h/BZrLgpSh8kHe/iJzvCxh1yjUGV X-Received: by 2002:a17:902:820a:: with SMTP id x10mr23271744pln.316.1556549085315; Mon, 29 Apr 2019 07:44:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556549085; cv=none; d=google.com; s=arc-20160816; b=f9QEIf4o0JjKPEd/fbHSXeoQ5hN+kknEp+MFWtVmVgVjfMLmXz/eDHBWY9SFlvGn06 PZEK0g+0+6aJcKLdy50onMq92DZddMaTYLz5lcGPR+0Dp6Rj+4fXaaT7finbdoyLpC22 iV60Ta3My9SkPWdjv8ezkE1TJk5IQagFyO+HrJ9dkMN5Ns+T+5AOi2ENB+p7S/L7A/SJ 3OM5PDMcc+1l74Y1cvatR7B21rS38hkKRjk71nv8+8hybcMCuesl5kSkNWDY0My9Qw+/ gNvpynmyts//nkk18Bwe2xDC0U3t4sMVHD0Gnx4GfUO9Z9mXl5y0lNfiL/8L3GGPH+/z Zp6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=t+UA4b2McqV5k1deEbUo40YuXtDvjHl6XokvwwsxtTA=; b=cBGoPexpMRdcjXJdBrz+9qobMxhtbVIJ67eeCBsWPKG5iLp44wpsRr7gF8vCxxVcKX 1W2HIYF0HTeWsqgcKn6OHSdI+xr5E9AZDh9eVFcBBj/+50V9F0chZhWOZPcMdDgkPsGL y8VZcYSGS8p4iXoCBibAeJbJqs1l5jKSSkJEihck8CKVVK83pZEBiPrDx/l+rXftFctO CbhP8b1BH9Fr/47JRM+E35rmlQyNrRH2Gv5ONVxGxtxbY7QVFmvQIoIe+UlXF6z3sgsU dV0DVziUa4ex8VKlXdE4tQG+SMi9lFaYiVZsqb9SwpEeNf5LOEfZue06b8er0eV19038 EbpQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v24si7136864plo.95.2019.04.29.07.44.45; Mon, 29 Apr 2019 07:44:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728449AbfD2Oon (ORCPT + 30 others); Mon, 29 Apr 2019 10:44:43 -0400 Received: from foss.arm.com ([217.140.101.70]:58946 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728342AbfD2Ook (ORCPT ); Mon, 29 Apr 2019 10:44:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 445C8EBD; Mon, 29 Apr 2019 07:44:40 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E8E9B3F5C1; Mon, 29 Apr 2019 07:44:37 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v2 1/7] genirq/msi: Add a new field in msi_desc to store an IOMMU cookie Date: Mon, 29 Apr 2019 15:44:22 +0100 Message-Id: <20190429144428.29254-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190429144428.29254-1-julien.grall@arm.com> References: <20190429144428.29254-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When an MSI doorbell is located downstream of an IOMMU, it is required to swizzle the physical address with an appropriately-mapped IOVA for any device attached to one of our DMA ops domain. At the moment, the allocation of the mapping may be done when composing the message. However, the composing may be done in non-preemtible context while the allocation requires to be called from preemptible context. A follow-up change will split the current logic in two functions requiring to keep an IOMMU cookie per MSI. A new field is introduced in msi_desc to store an IOMMU cookie. As the cookie may not be required in some configuration, the field is protected under a new config CONFIG_IRQ_MSI_IOMMU. A pair of helpers has also been introduced to access the field. Signed-off-by: Julien Grall --- Changes in v2: - Update the commit message to use imperative mood - Protect the field with a new config that will be selected by IOMMU_DMA later on - Add a set of helpers to access the new field --- include/linux/msi.h | 26 ++++++++++++++++++++++++++ kernel/irq/Kconfig | 3 +++ 2 files changed, 29 insertions(+) -- 2.11.0 Reviewed-by: Eric Auger diff --git a/include/linux/msi.h b/include/linux/msi.h index 7e9b81c3b50d..82a308c19222 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -77,6 +77,9 @@ struct msi_desc { struct device *dev; struct msi_msg msg; struct irq_affinity_desc *affinity; +#ifdef CONFIG_IRQ_MSI_IOMMU + const void *iommu_cookie; +#endif union { /* PCI MSI/X specific data */ @@ -119,6 +122,29 @@ struct msi_desc { #define for_each_msi_entry_safe(desc, tmp, dev) \ list_for_each_entry_safe((desc), (tmp), dev_to_msi_list((dev)), list) +#ifdef CONFIG_IRQ_MSI_IOMMU +static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) +{ + return desc->iommu_cookie; +} + +static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, + const void *iommu_cookie) +{ + desc->iommu_cookie = iommu_cookie; +} +#else +static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) +{ + return NULL; +} + +static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, + const void *iommu_cookie) +{ +} +#endif + #ifdef CONFIG_PCI_MSI #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev) #define for_each_pci_msi_entry(desc, pdev) \ diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig index 5f3e2baefca9..8fee06625c37 100644 --- a/kernel/irq/Kconfig +++ b/kernel/irq/Kconfig @@ -91,6 +91,9 @@ config GENERIC_MSI_IRQ_DOMAIN select IRQ_DOMAIN_HIERARCHY select GENERIC_MSI_IRQ +config IRQ_MSI_IOMMU + bool + config HANDLE_DOMAIN_IRQ bool From patchwork Mon Apr 29 14:44:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163032 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp1973302ill; Mon, 29 Apr 2019 07:44:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqytdWbgocyZEWWGI9+4aqwtwdwFLpxfLbkwCFmvIZq0gGZLbBpOszKnRzWcljvW+73smoBw X-Received: by 2002:a63:9dc8:: with SMTP id i191mr49269030pgd.91.1556549088132; Mon, 29 Apr 2019 07:44:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556549088; cv=none; d=google.com; s=arc-20160816; b=Np9bUYrtQnQhiZy4MpzqcjoWNxgUr4IGXebC0/XRZXkCQBxffChruQTnLJk6FmzCGH dFAKeKrrhI9uhVfkfWPGUw4IjnvWl/DcKJ1mLsX+m1EJXxOuNOZB8kiLSPJH489b5sfo hM0A/EKuVT83OKA5mTu8az4QpCgYl3sO2War1hCi4xiZfQa1rVwt9F2ZGauxqfa4BtI6 t91f+vktJgtIunIJdBkqF+rBfBaH/Gwd8ISyTBCSRrVhHsv/qFzgeuo+MagztHd2Yf63 nrcSAhq27iLpZ/Pdn31t3MvBVgjtyhEpUTjrcNt6Ge8OtRv8YH6gZpS3yvHNogztuRxM t8wQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=LC7fir5Lp7qvCRS6l54nukg6LtQweA6hN0Q6cRmpfbI=; b=kIHJP5fR2j1/W2lL0uW8F84aKauKwnLfcviaAZBArakl7rinw4hBQ7+qmXkZy5pkzu HmH6GN+qeGsOCZFANr8ysOlXGNZmgCYpUxFmIvM+sbugVTx/0DwSuckcaU2IRoSMykj3 jKGV8Qf9vAQB9Qffcac3k7aIjpYsL6NmMV4OlnYmEPdPoJ9ecz9BKF3FWGITuVbCe8PY t+0CY7fvMsjys/nGhURNwfcZ9qo8+O/uEfUQ8RTFuYhqyDavO5MeG8YCBZVRKnvaX+tg GskF7ZlB1lFMABUhKym0v7Yc1n9FDwj/AOxhM5oxhCkb1MEdKLpJ/G7aLIpmfThtSx4K Uu8g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v24si7136864plo.95.2019.04.29.07.44.47; Mon, 29 Apr 2019 07:44:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728463AbfD2Oor (ORCPT + 30 others); Mon, 29 Apr 2019 10:44:47 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:58962 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728440AbfD2Oon (ORCPT ); Mon, 29 Apr 2019 10:44:43 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D4877165C; Mon, 29 Apr 2019 07:44:42 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 855483F5C1; Mon, 29 Apr 2019 07:44:40 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v2 2/7] iommu/dma-iommu: Split iommu_dma_map_msi_msg() in two parts Date: Mon, 29 Apr 2019 15:44:23 +0100 Message-Id: <20190429144428.29254-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190429144428.29254-1-julien.grall@arm.com> References: <20190429144428.29254-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On RT, iommu_dma_map_msi_msg() may be called from non-preemptible context. This will lead to a splat with CONFIG_DEBUG_ATOMIC_SLEEP as the function is using spin_lock (they can sleep on RT). iommu_dma_map_msi_msg() is used to map the MSI page in the IOMMU PT and update the MSI message with the IOVA. Only the part to lookup for the MSI page requires to be called in preemptible context. As the MSI page cannot change over the lifecycle of the MSI interrupt, the lookup can be cached and re-used later on. iomma_dma_map_msi_msg() is now split in two functions: - iommu_dma_prepare_msi(): This function will prepare the mapping in the IOMMU and store the cookie in the structure msi_desc. This function should be called in preemptible context. - iommu_dma_compose_msi_msg(): This function will update the MSI message with the IOVA when the device is behind an IOMMU. Signed-off-by: Julien Grall --- Changes in v2: - Rework the commit message to use imperative mood - Use the MSI accessor to get/set the iommu cookie - Don't use ternary on return - Select CONFIG_IRQ_MSI_IOMMU - Pass an msi_desc rather than the irq number --- drivers/iommu/Kconfig | 1 + drivers/iommu/dma-iommu.c | 47 ++++++++++++++++++++++++++++++++++++++--------- include/linux/dma-iommu.h | 23 +++++++++++++++++++++++ 3 files changed, 62 insertions(+), 9 deletions(-) -- 2.11.0 Reviewed-by: Robin Murphy Reviewed-by: Eric Auger diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 6f07f3b21816..eb1c8cd243f9 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -94,6 +94,7 @@ config IOMMU_DMA bool select IOMMU_API select IOMMU_IOVA + select IRQ_MSI_IOMMU select NEED_SG_DMA_LENGTH config FSL_PAMU diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 77aabe637a60..2309f59cefa4 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -888,17 +888,18 @@ static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *dev, return NULL; } -void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) +int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr) { - struct device *dev = msi_desc_to_dev(irq_get_msi_desc(irq)); + struct device *dev = msi_desc_to_dev(desc); struct iommu_domain *domain = iommu_get_domain_for_dev(dev); struct iommu_dma_cookie *cookie; struct iommu_dma_msi_page *msi_page; - phys_addr_t msi_addr = (u64)msg->address_hi << 32 | msg->address_lo; unsigned long flags; - if (!domain || !domain->iova_cookie) - return; + if (!domain || !domain->iova_cookie) { + desc->iommu_cookie = NULL; + return 0; + } cookie = domain->iova_cookie; @@ -911,7 +912,37 @@ void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) msi_page = iommu_dma_get_msi_page(dev, msi_addr, domain); spin_unlock_irqrestore(&cookie->msi_lock, flags); - if (WARN_ON(!msi_page)) { + msi_desc_set_iommu_cookie(desc, msi_page); + + if (!msi_page) + return -ENOMEM; + else + return 0; +} + +void iommu_dma_compose_msi_msg(struct msi_desc *desc, + struct msi_msg *msg) +{ + struct device *dev = msi_desc_to_dev(desc); + const struct iommu_domain *domain = iommu_get_domain_for_dev(dev); + const struct iommu_dma_msi_page *msi_page; + + msi_page = msi_desc_get_iommu_cookie(desc); + + if (!domain || !domain->iova_cookie || WARN_ON(!msi_page)) + return; + + msg->address_hi = upper_32_bits(msi_page->iova); + msg->address_lo &= cookie_msi_granule(domain->iova_cookie) - 1; + msg->address_lo += lower_32_bits(msi_page->iova); +} + +void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) +{ + struct msi_desc *desc = irq_get_msi_desc(irq); + phys_addr_t msi_addr = (u64)msg->address_hi << 32 | msg->address_lo; + + if (WARN_ON(iommu_dma_prepare_msi(desc, msi_addr))) { /* * We're called from a void callback, so the best we can do is * 'fail' by filling the message with obviously bogus values. @@ -922,8 +953,6 @@ void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) msg->address_lo = ~0U; msg->data = ~0U; } else { - msg->address_hi = upper_32_bits(msi_page->iova); - msg->address_lo &= cookie_msi_granule(cookie) - 1; - msg->address_lo += lower_32_bits(msi_page->iova); + iommu_dma_compose_msi_msg(desc, msg); } } diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h index e760dc5d1fa8..3fc48fbd6f63 100644 --- a/include/linux/dma-iommu.h +++ b/include/linux/dma-iommu.h @@ -71,12 +71,24 @@ void iommu_dma_unmap_resource(struct device *dev, dma_addr_t handle, size_t size, enum dma_data_direction dir, unsigned long attrs); /* The DMA API isn't _quite_ the whole story, though... */ +/* + * Map the MSI page in the IOMMU device and store it in @desc + * + * Return 0 if succeeded other an error if the preparation has failed. + */ +int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr); + +/* Update the MSI message if required. */ +void iommu_dma_compose_msi_msg(struct msi_desc *desc, + struct msi_msg *msg); + void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg); void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list); #else struct iommu_domain; +struct msi_desc; struct msi_msg; struct device; @@ -99,6 +111,17 @@ static inline void iommu_put_dma_cookie(struct iommu_domain *domain) { } +static inline int iommu_dma_prepare_msi(struct msi_desc *desc, + phys_addr_t msi_addr) +{ + return 0; +} + +static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc, + struct msi_msg *msg) +{ +} + static inline void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) { } From patchwork Mon Apr 29 14:44:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163034 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp1973392ill; Mon, 29 Apr 2019 07:44:52 -0700 (PDT) X-Google-Smtp-Source: APXvYqz2BLT6qcPSV9ocBqOYwmPxnnPiaiXVGk0GLR91hIC4xxnEO3eSDZ1+9XKd348zTKaWH72C X-Received: by 2002:a65:608d:: with SMTP id t13mr34777262pgu.406.1556549092814; Mon, 29 Apr 2019 07:44:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556549092; cv=none; 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[209.132.180.67]) by mx.google.com with ESMTP id d10si22956271pgu.150.2019.04.29.07.44.52; Mon, 29 Apr 2019 07:44:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728481AbfD2Oou (ORCPT + 30 others); Mon, 29 Apr 2019 10:44:50 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59004 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728258AbfD2Oos (ORCPT ); Mon, 29 Apr 2019 10:44:48 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0A16DEBD; Mon, 29 Apr 2019 07:44:48 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AF5473F5C1; Mon, 29 Apr 2019 07:44:45 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v2 4/7] irqchip/gic-v3-its: Don't map the MSI page in its_irq_compose_msi_msg() Date: Mon, 29 Apr 2019 15:44:25 +0100 Message-Id: <20190429144428.29254-5-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190429144428.29254-1-julien.grall@arm.com> References: <20190429144428.29254-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org its_irq_compose_msi_msg() may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg requires to be called from a preemptible context. A recent change split iommu_dma_map_msi_msg() in two new functions: one that should be called in preemptible context, the other does not have any requirement. The GICv3 ITS driver is reworked to avoid executing preemptible code in non-preemptible context. This can be achieved by preparing the MSI maping when allocating the MSI interrupt. Signed-off-by: Julien Grall --- Changes in v2: - Rework the commit message to use imperative mood --- drivers/irqchip/irq-gic-v3-its.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.11.0 Reviewed-by: Eric Auger diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 7577755bdcf4..12ddbcfe1b1e 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -1179,7 +1179,7 @@ static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) msg->address_hi = upper_32_bits(addr); msg->data = its_get_event_id(d); - iommu_dma_map_msi_msg(d->irq, msg); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); } static int its_irq_set_irqchip_state(struct irq_data *d, @@ -2566,6 +2566,7 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, { msi_alloc_info_t *info = args; struct its_device *its_dev = info->scratchpad[0].ptr; + struct its_node *its = its_dev->its; irq_hw_number_t hwirq; int err; int i; @@ -2574,6 +2575,8 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, if (err) return err; + err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); + for (i = 0; i < nr_irqs; i++) { err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err) From patchwork Mon Apr 29 14:44:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163035 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp1973484ill; Mon, 29 Apr 2019 07:44:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqyaswMCKsWhdXkbd1C6+AhX7pQrM4ElMzncayY+RQ3x8z9TC61MpKoxtRZ981JQzfcgL/JR X-Received: by 2002:aa7:924a:: with SMTP id 10mr17321963pfp.15.1556549097755; Mon, 29 Apr 2019 07:44:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556549097; cv=none; d=google.com; s=arc-20160816; b=GnjWgAL1StuBnyUL99PL7XBOmV9nUXqUs+O8P2pqNgTgM5BD01YXxTKqtW2fTFosCa xGZAqo7ZhkObLuADaOVvpDv8G3Blixg6GlgtkbVAc3Xf8MQHP8q3S3M686nyg1ijZ3zz zKMP+Tk2pi4WAFRgnqnhyOMYxhGHdjgx2dIj6qOi49s3U2raRj/YxUIoLKGaIoCQVPKM eFFBLIMhBsKkXV0P8b4cPgv9L1LgmhDXdmlCYwGGuaVnTsL++FlGluN4YtYYvp8afE75 gBp3gR8ChzfZGphrLQ64QKDHGLMqKN3NAIezk0xnHQ1gGdtLRHNSMKbc1wek/P6U0o+i e6nw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=4uyD06VnI+K4/O4nwGLyapphiM4GHbUIcL0mkfvEJmY=; b=uzqyA+bKdBr/hIfN5LuvcYGAEemJADHxYF/AoQmcboacz08pFMyR5/+0dq6JgwUT/C 7V3TJnc1/8AUy/m6voKCYxqinpDPhBbOp8fhNdzTPg0O5NcPIj0XxY4Vk2J/qepac495 zNioMIotWpw4hiALH1hEUs+HL07wHBo74N24xfeKWkKcrhLU4yreyZQlGn8DrPNi1iMT TLEaUCRV90wqOcDx7/gC6yXhLznpqQngrhOAaojKJ4e3PuuxDFEVTsOd+wjnzquRQeij COYR/GGPPyKonhdkIYvbwwcxnEcMr3RmOLI2vhW2EEi/LrWt9lwAvAK9CHCxF16qpOvI dFMw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h19si589630pgg.125.2019.04.29.07.44.57; Mon, 29 Apr 2019 07:44:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728358AbfD2Oo4 (ORCPT + 30 others); Mon, 29 Apr 2019 10:44:56 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59018 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728480AbfD2Oov (ORCPT ); Mon, 29 Apr 2019 10:44:51 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 99DD3165C; Mon, 29 Apr 2019 07:44:50 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4AE1D3F5C1; Mon, 29 Apr 2019 07:44:48 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v2 5/7] irqchip/ls-scfg-msi: Don't map the MSI page in ls_scfg_msi_compose_msg() Date: Mon, 29 Apr 2019 15:44:26 +0100 Message-Id: <20190429144428.29254-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190429144428.29254-1-julien.grall@arm.com> References: <20190429144428.29254-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ls_scfg_msi_compose_msg() may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg() requires to be called from a preemptible context. A recent patch split iommu_dma_map_msi_msg() in two new functions: one that should be called in preemptible context, the other does not have any requirement. The FreeScale SCFG MSI driver is reworked to avoid executing preemptible code in non-preemptible context. This can be achieved by preparing the MSI maping when allocating the MSI interrupt. Signed-off-by: Julien Grall --- Changes in v2: - Rework the commit message to use imperative mood --- drivers/irqchip/irq-ls-scfg-msi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-ls-scfg-msi.c b/drivers/irqchip/irq-ls-scfg-msi.c index c671b3212010..669d29105772 100644 --- a/drivers/irqchip/irq-ls-scfg-msi.c +++ b/drivers/irqchip/irq-ls-scfg-msi.c @@ -100,7 +100,7 @@ static void ls_scfg_msi_compose_msg(struct irq_data *data, struct msi_msg *msg) msg->data |= cpumask_first(mask); } - iommu_dma_map_msi_msg(data->irq, msg); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg); } static int ls_scfg_msi_set_affinity(struct irq_data *irq_data, @@ -141,6 +141,7 @@ static int ls_scfg_msi_domain_irq_alloc(struct irq_domain *domain, unsigned int nr_irqs, void *args) { + msi_alloc_info_t *info = args; struct ls_scfg_msi *msi_data = domain->host_data; int pos, err = 0; @@ -157,6 +158,10 @@ static int ls_scfg_msi_domain_irq_alloc(struct irq_domain *domain, if (err) return err; + err = iommu_dma_prepare_msi(info->desc, msi_data->msiir_addr); + if (err) + return err; + irq_domain_set_info(domain, virq, pos, &ls_scfg_msi_parent_chip, msi_data, handle_simple_irq, NULL, NULL); From patchwork Mon Apr 29 14:44:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163037 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp1973719ill; Mon, 29 Apr 2019 07:45:07 -0700 (PDT) X-Google-Smtp-Source: APXvYqwivZGD8V2vAPKTBgrfmCCQzPQu1hqXBj0RDKcZyDKeNFl/egn4TJBBHQy9BNvHaaRO5biT X-Received: by 2002:a62:4602:: with SMTP id t2mr63161359pfa.26.1556549107530; Mon, 29 Apr 2019 07:45:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556549107; cv=none; d=google.com; s=arc-20160816; b=X0DKuLcuNUrz+qU9s2D9Ey6BiMH49PEqNLEGCHIOXjK8Th8W+YHcERM5d4/20nUBsA BmPvGuCHHDVEMTmNr/msibahGflsFUJr943lkueS4aCK2iKP1xHFI4dS2CoTa3loYdw8 izt3l3xlRbs+JPj70+WtvLKo6vERqgJbXVHFZxXbHlOmBBKvgyt4J/W4g7k+E8cE2UlB jYCLOHv4M8OyGz/ZptePcT//q+AMHN4aMEUasMKC8GYinRNqcIduM20noVAq80oh2L11 UNUsaN1Z8l2SzpXlLx7pFbAnK8OTzI5cHArtHahC3mTDvmkSbQytmi5Gf3/oJN2IBfoL 9uaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=5YWucx5YeVmREPbqE3wTqTILeV6VyM7Q/wrTqluclv8=; b=zlEp62EoxQ2ZLvuZWHfnpxZJ4oRfM2BBEHumCIshrruq7dJpDjkdqMrZn5he9CzCHY Q1EoAsiZxb53X9UQ3d+TCIoJSWDZ9NpMQqsWVHSv8vUlKzev+Dy18vkGN1hXS/uXYKM6 omjw2HJlxqWEdwGyvW79IX3m4JTxXBTvUlxMZOzwpF3k+fbaytrNAL5jOzIF3WB+PtbG zo3YE9wcUlgmwH8hE5Me2X+eKqIkT0IUq290E66IkygJTXPPk4sLeHsQD8OP+6j28y9p mLReMmf+8QcqhXQ2ixhNPKDByOyeDxCHYDXJH18Yx7MKbsm82sSQyBJmRwI0J1x18A0L F2mw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z12si14204126plk.353.2019.04.29.07.45.07; Mon, 29 Apr 2019 07:45:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728539AbfD2OpB (ORCPT + 30 others); Mon, 29 Apr 2019 10:45:01 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59042 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728497AbfD2Oox (ORCPT ); Mon, 29 Apr 2019 10:44:53 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 36EAE80D; Mon, 29 Apr 2019 07:44:53 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DA67E3F5C1; Mon, 29 Apr 2019 07:44:50 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v2 6/7] irqchip/gic-v3-mbi: Don't map the MSI page in mbi_compose_m{b, s}i_msg() Date: Mon, 29 Apr 2019 15:44:27 +0100 Message-Id: <20190429144428.29254-7-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190429144428.29254-1-julien.grall@arm.com> References: <20190429144428.29254-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The functions mbi_compose_m{b, s}i_msg may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg() requires to be called from a preemptible context. A recent patch split iommu_dma_map_msi_msg in two new functions: one that should be called in preemptible context, the other does not have any requirement. The GICv3 MSI driver is reworked to avoid executing preemptible code in non-preemptible context. This can be achieved by preparing the two MSI mappings when allocating the MSI interrupt. Signed-off-by: Julien Grall --- Changes in v2: - Rework the commit message to use imperative mood --- drivers/irqchip/irq-gic-v3-mbi.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-mbi.c index fbfa7ff6deb1..d50f6cdf043c 100644 --- a/drivers/irqchip/irq-gic-v3-mbi.c +++ b/drivers/irqchip/irq-gic-v3-mbi.c @@ -84,6 +84,7 @@ static void mbi_free_msi(struct mbi_range *mbi, unsigned int hwirq, static int mbi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *args) { + msi_alloc_info_t *info = args; struct mbi_range *mbi = NULL; int hwirq, offset, i, err = 0; @@ -104,6 +105,16 @@ static int mbi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, hwirq = mbi->spi_start + offset; + err = iommu_dma_prepare_msi(info->desc, + mbi_phys_base + GICD_CLRSPI_NSR); + if (err) + return err; + + err = iommu_dma_prepare_msi(info->desc, + mbi_phys_base + GICD_SETSPI_NSR); + if (err) + return err; + for (i = 0; i < nr_irqs; i++) { err = mbi_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err) @@ -142,7 +153,7 @@ static void mbi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR); msg[0].data = data->parent_data->hwirq; - iommu_dma_map_msi_msg(data->irq, msg); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg); } #ifdef CONFIG_PCI_MSI @@ -202,7 +213,7 @@ static void mbi_compose_mbi_msg(struct irq_data *data, struct msi_msg *msg) msg[1].address_lo = lower_32_bits(mbi_phys_base + GICD_CLRSPI_NSR); msg[1].data = data->parent_data->hwirq; - iommu_dma_map_msi_msg(data->irq, &msg[1]); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), &msg[1]); } /* Platform-MSI specific irqchip */ From patchwork Mon Apr 29 14:44:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163036 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp1973635ill; Mon, 29 Apr 2019 07:45:04 -0700 (PDT) X-Google-Smtp-Source: APXvYqy8Yr7jjG4RUWAMZ3HTkd3+0LDy8sEaew+Zu05jkCM+YuBJhz3iwPlKkHz7RM1H1rVmD41d X-Received: by 2002:a63:9dc8:: with SMTP id i191mr49270902pgd.91.1556549104222; Mon, 29 Apr 2019 07:45:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556549104; cv=none; d=google.com; s=arc-20160816; b=la67fXNc9Qzpl2/fdUDSLoCNuabm+kbZ2NWH7hslAWTJKlEGcXx+8hGT0bv5gqSd51 FvZc2WWS/8yw5FNt0sD9ptQCn08LIQdLrynE4rCkdExI9UdSLw0VDm9V7lZHejBuaT18 SalvM+qE106Z8YdneBqyjOy564Icpf6EFR/WI5vqKZTtJ5kHoMw7ds+eNaXB7xHfy/Yr qSWrovYOh3cm2RI5JJpqV6mUnjIUDRhrOQxuzEQ+t2cTkXdtkkDaBs9NjfykmfL8cTRv ddGbEQeTs1pTFG1AAOCcrfITAn1bzATNO95os/ubOG0LALa9B791D9DbgB1Rj1O9C9EW lUug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=ClC7ljKpJUPltPxjDxK/RRLr6w0h/jUeU8rfdiPyI2U=; b=DYX1HVHkcTP6hm7eNXPy0ZLeUULmibTYmvenWkOamy1TEqil6mW83AN9ULz/FfadIf cxrsgZoZnMlYf8ddTnihO/JjbKqEdCfa/3QwvsUTZcWr6llhi7LWXQpRMzvklHFiakMa +llpHZ6qwNb8mbZCj6nx74JguobM6d6y5IacPpxJeiVSPztJD5PPMxyfa0fLDhVrg8br RpbtPPqFZvltmeDF8rw3SnmehZJLnlznMl+J93SMuabEAqOuJ/TMOAglXJsjVI3LOKZy gQjXK8eR4ftbU8kL3Fjh0v9A3aElnn96Xh7zsxBEdEt+A+Rz7t0v2rZoksDTghdPpYTS FXjA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z12si14204126plk.353.2019.04.29.07.45.03; Mon, 29 Apr 2019 07:45:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728550AbfD2OpC (ORCPT + 30 others); Mon, 29 Apr 2019 10:45:02 -0400 Received: from foss.arm.com ([217.140.101.70]:59058 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728331AbfD2Oo4 (ORCPT ); Mon, 29 Apr 2019 10:44:56 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C73A01682; Mon, 29 Apr 2019 07:44:55 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 782303F5C1; Mon, 29 Apr 2019 07:44:53 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v2 7/7] iommu/dma-iommu: Remove iommu_dma_map_msi_msg() Date: Mon, 29 Apr 2019 15:44:28 +0100 Message-Id: <20190429144428.29254-8-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190429144428.29254-1-julien.grall@arm.com> References: <20190429144428.29254-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org A recent change split iommu_dma_map_msi_msg() in two new functions. The function was still implemented to avoid modifying all the callers at once. Now that all the callers have been reworked, iommu_dma_map_msi_msg() can be removed. Signed-off-by: Julien Grall --- Changes in v2: - Rework the commit message --- drivers/iommu/dma-iommu.c | 20 -------------------- include/linux/dma-iommu.h | 5 ----- 2 files changed, 25 deletions(-) -- 2.11.0 Reviewed-by: Robin Murphy Reviewed-by: Eric Auger diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 2309f59cefa4..12f4464828a4 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -936,23 +936,3 @@ void iommu_dma_compose_msi_msg(struct msi_desc *desc, msg->address_lo &= cookie_msi_granule(domain->iova_cookie) - 1; msg->address_lo += lower_32_bits(msi_page->iova); } - -void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) -{ - struct msi_desc *desc = irq_get_msi_desc(irq); - phys_addr_t msi_addr = (u64)msg->address_hi << 32 | msg->address_lo; - - if (WARN_ON(iommu_dma_prepare_msi(desc, msi_addr))) { - /* - * We're called from a void callback, so the best we can do is - * 'fail' by filling the message with obviously bogus values. - * Since we got this far due to an IOMMU being present, it's - * not like the existing address would have worked anyway... - */ - msg->address_hi = ~0U; - msg->address_lo = ~0U; - msg->data = ~0U; - } else { - iommu_dma_compose_msi_msg(desc, msg); - } -} diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h index 3fc48fbd6f63..ddd217c197df 100644 --- a/include/linux/dma-iommu.h +++ b/include/linux/dma-iommu.h @@ -82,7 +82,6 @@ int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr); void iommu_dma_compose_msi_msg(struct msi_desc *desc, struct msi_msg *msg); -void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg); void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list); #else @@ -122,10 +121,6 @@ static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc, { } -static inline void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) -{ -} - static inline void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) { }