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[209.51.188.17]) by mx.google.com with ESMTPS id f42-20020a05622a1a2a00b003b0d885a064si10614007qtb.513.2023.02.07.02.11.12 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:11:12 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKu0-0000XV-3O; Tue, 07 Feb 2023 05:08:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKtS-0000Oz-Az; Tue, 07 Feb 2023 05:08:06 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKtQ-0002Lo-Hn; Tue, 07 Feb 2023 05:08:06 -0500 Received: from gandalf.ozlabs.org (gandalf.ozlabs.org [150.107.74.76]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zMt49ZPz4xwl; Tue, 7 Feb 2023 21:07:54 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zMr5jwKz4wgv; Tue, 7 Feb 2023 21:07:52 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 01/25] tests/avocado: Introduce file_truncate() Date: Tue, 7 Feb 2023 11:07:20 +0100 Message-Id: <20230207100744.698694-2-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Link: https://lore.kernel.org/r/20230120134314.81956-2-philmd@linaro.org [ clg: remove image_pow2ceil_expand() factoring ] Signed-off-by: Cédric Le Goater --- tests/avocado/boot_linux_console.py | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tests/avocado/boot_linux_console.py b/tests/avocado/boot_linux_console.py index 8c1d981586..13e6688624 100644 --- a/tests/avocado/boot_linux_console.py +++ b/tests/avocado/boot_linux_console.py @@ -30,6 +30,11 @@ def pow2ceil(x): return 1 if x == 0 else 2**(x - 1).bit_length() +def file_truncate(path, size): + if size != os.path.getsize(path): + with open(path, 'ab+') as fd: + fd.truncate(size) + """ Expand file size to next power of 2 """ From patchwork Tue Feb 7 10:07:21 2023 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id 15-20020a05620a040f00b00731114e2182si6759999qkp.236.2023.02.07.02.08.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:08:58 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKtq-0000U6-Ax; Tue, 07 Feb 2023 05:08:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKtS-0000P3-Ge; Tue, 07 Feb 2023 05:08:06 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKtQ-0002M8-Fe; Tue, 07 Feb 2023 05:08:06 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zMw61fzz4xxJ; Tue, 7 Feb 2023 21:07:56 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zMv0Ynjz4wgv; Tue, 7 Feb 2023 21:07:54 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 02/25] tests/avocado: Truncate M2S-FG484 SOM SPI flash to 16MiB Date: Tue, 7 Feb 2023 11:07:21 +0100 Message-Id: <20230207100744.698694-3-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé The M2S-FG484 SOM uses a 16 MiB SPI flash (Spansion S25FL128SDPBHICO). Since the test asset is bigger, truncate it to the correct size to avoid when running the test_arm_emcraft_sf2 test: qemu-system-arm: device requires 16777216 bytes, block backend provides 67108864 bytes Add comment regarding the M2S-FG484 SOM hardware in hw/arm/msf2-som.c. Reported-by: Cédric Le Goater Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Tested-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- hw/arm/msf2-som.c | 5 ++++- tests/avocado/boot_linux_console.py | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index a6df473ec9..7b3106c790 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -1,6 +1,9 @@ /* * SmartFusion2 SOM starter kit(from Emcraft) emulation. * + * M2S-FG484 SOM hardware architecture specification: + * https://www.emcraft.com/jdownloads/som/m2s/m2s-som-ha.pdf + * * Copyright (c) 2017 Subbaraya Sundeep * * Permission is hereby granted, free of charge, to any person obtaining a copy @@ -87,7 +90,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) /* Attach SPI flash to SPI0 controller */ spi_bus = qdev_get_child_bus(dev, "spi0"); - spi_flash = qdev_new("s25sl12801"); + spi_flash = qdev_new("s25sl12801"); /* Spansion S25FL128SDPBHICO */ qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1); if (dinfo) { qdev_prop_set_drive_err(spi_flash, "drive", diff --git a/tests/avocado/boot_linux_console.py b/tests/avocado/boot_linux_console.py index 13e6688624..258f2ee897 100644 --- a/tests/avocado/boot_linux_console.py +++ b/tests/avocado/boot_linux_console.py @@ -400,6 +400,8 @@ def test_arm_emcraft_sf2(self): spi_hash = '65523a1835949b6f4553be96dec1b6a38fb05501' spi_path = self.fetch_asset(spi_url, asset_hash=spi_hash) + file_truncate(spi_path, 16 << 20) # Spansion S25FL128SDPBHICO is 16 MiB + self.vm.set_console() kernel_command_line = self.KERNEL_COMMON_COMMAND_LINE self.vm.add_args('-kernel', uboot_path, From patchwork Tue Feb 7 10:07:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 651260 Delivered-To: patch@linaro.org Received: by 2002:a17:522:d8c:b0:4be:c3dc:14d8 with SMTP id d12csp2779816pva; Tue, 7 Feb 2023 02:11:03 -0800 (PST) X-Google-Smtp-Source: AK7set+7KDX5Dj9+7FNoy2pIzy3Ms8LUsaIdVjARM6d7aLKkeuwy/ABCqdykn9lwayCPka8293Yk X-Received: by 2002:ac8:7f02:0:b0:3b6:942b:4ff1 with SMTP id f2-20020ac87f02000000b003b6942b4ff1mr4628063qtk.37.1675764663769; Tue, 07 Feb 2023 02:11:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675764663; cv=none; d=google.com; s=arc-20160816; b=ZUfcDbOLIoMLkcG/CkXAJ5bsF/z+ddzQMV4VOQCIQMWLOcmpPqmKr1a0OpcMs3aul8 /QlCFV5VLtLvaQ2icJJDyJCa/PaXdJC8b4Dpwq36uvOMaEOlknQrSnFOXkBsEigwxmsl 8ZngDSUkoUwaOZ7rblCAwOp3+gCvZockjagf51zadhdmzlGAFxtLPm8d6JlJUnpXAv5G s+R72IWakNYNBYLaS2qSFdFJxSC6QHgyz1k2w/ObB5KEsxPj4Aq0WGY78AQxLjFRu9rk OW1E+rUkfqhHFvHa9fz8I0Pp74wS1txFZOWQ7YQqcvkUdoThbRrHaBoUwOpa+UubKb92 Ntsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=sstWMDZvkl87tPJ7V3mfh0Dne9UuKQ23W5BcFB4Hr+A=; b=Aeacy6qTeqHC4pSm4XiRjXxkEVDNbv6aR1WzspbflghcsuKnWF5FmFWZEZa7lAnleP s9zXv7wVqOgniN2xxfPVooUT28UOE3JN9R/XWkP/P8iz1TbD7wZeTGtwpspuQz/b0+dl 1fHZLl/gSqu8zZzIh6umDBzTBMZRdfHjAjn+YBe0a/9xrJWLFdKySS/O7C9Hv5l/rwbn AwzaHQgxE65gT2oNMg9YFvDpA0EBVOrzUIRRIc1kegaewIc+942PMumgR2Z2mA+cq7Zv 77/EcFdZXEyEW0nIwrJzn/QzqEshHpxLYBel7bY+2QbV3cj9t+d/qAw8gN5NG6AdaRZa XnBg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n11-20020a05620a294b00b00721db04a4fasi11526372qkp.252.2023.02.07.02.11.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:11:03 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuJ-0000wO-7S; Tue, 07 Feb 2023 05:08:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKtw-0000W5-Fs; Tue, 07 Feb 2023 05:08:37 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKtu-0002T3-Fy; Tue, 07 Feb 2023 05:08:36 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zNd3hjMz4xwl; Tue, 7 Feb 2023 21:08:33 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNb3Zzfz4xyf; Tue, 7 Feb 2023 21:08:31 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 15/25] hw/watchdog/wdt_aspeed: Rename MMIO region size as 'iosize' Date: Tue, 7 Feb 2023 11:07:34 +0100 Message-Id: <20230207100744.698694-16-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Avoid confusing two different things: - the WDT I/O region size ('iosize') - at which offset the SoC map the WDT ('offset') While it is often the same, we can map smaller region sizes at larger offsets. Here we are interested in the I/O region size, so rename as 'iosize'. Reviewed-by: Peter Delevoryas Signed-off-by: Philippe Mathieu-Daudé [ clg: Introduced temporary wdt_offset variable ] Signed-off-by: Cédric Le Goater --- include/hw/watchdog/wdt_aspeed.h | 2 +- hw/arm/aspeed_ast10x0.c | 4 ++-- hw/arm/aspeed_ast2600.c | 4 ++-- hw/arm/aspeed_soc.c | 4 ++-- hw/watchdog/wdt_aspeed.c | 8 ++++---- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h index dfa5dfa424..db91ee6b51 100644 --- a/include/hw/watchdog/wdt_aspeed.h +++ b/include/hw/watchdog/wdt_aspeed.h @@ -40,7 +40,7 @@ struct AspeedWDTState { struct AspeedWDTClass { SysBusDeviceClass parent_class; - uint32_t offset; + uint32_t iosize; uint32_t ext_pulse_width_mask; uint32_t reset_ctrl_reg; void (*reset_pulse)(AspeedWDTState *s, uint32_t property); diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 4d0b9b115f..b483735dc2 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -318,14 +318,14 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp) /* Watch dog */ for (i = 0; i < sc->wdts_num; i++) { AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]); + hwaddr wdt_offset = sc->memmap[ASPEED_DEV_WDT] + i * awc->iosize; object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) { return; } - aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset); } /* GPIO */ diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index cd75465c2b..bb2769df04 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -465,14 +465,14 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) /* Watch dog */ for (i = 0; i < sc->wdts_num; i++) { AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]); + hwaddr wdt_offset = sc->memmap[ASPEED_DEV_WDT] + i * awc->iosize; object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) { return; } - aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset); } /* RAM */ diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index b05b9dd416..e884d6badc 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -386,14 +386,14 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) /* Watch dog */ for (i = 0; i < sc->wdts_num; i++) { AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]); + hwaddr wdt_offset = sc->memmap[ASPEED_DEV_WDT] + i * awc->iosize; object_property_set_link(OBJECT(&s->wdt[i]), "scu", OBJECT(&s->scu), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), errp)) { return; } - aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, - sc->memmap[ASPEED_DEV_WDT] + i * awc->offset); + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, wdt_offset); } /* RAM */ diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index d753693a2e..958725a1b5 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -309,7 +309,7 @@ static void aspeed_2400_wdt_class_init(ObjectClass *klass, void *data) AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass); dc->desc = "ASPEED 2400 Watchdog Controller"; - awc->offset = 0x20; + awc->iosize = 0x20; awc->ext_pulse_width_mask = 0xff; awc->reset_ctrl_reg = SCU_RESET_CONTROL1; awc->wdt_reload = aspeed_wdt_reload; @@ -346,7 +346,7 @@ static void aspeed_2500_wdt_class_init(ObjectClass *klass, void *data) AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass); dc->desc = "ASPEED 2500 Watchdog Controller"; - awc->offset = 0x20; + awc->iosize = 0x20; awc->ext_pulse_width_mask = 0xfffff; awc->reset_ctrl_reg = SCU_RESET_CONTROL1; awc->reset_pulse = aspeed_2500_wdt_reset_pulse; @@ -369,7 +369,7 @@ static void aspeed_2600_wdt_class_init(ObjectClass *klass, void *data) AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass); dc->desc = "ASPEED 2600 Watchdog Controller"; - awc->offset = 0x40; + awc->iosize = 0x40; awc->ext_pulse_width_mask = 0xfffff; /* TODO */ awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1; awc->reset_pulse = aspeed_2500_wdt_reset_pulse; @@ -392,7 +392,7 @@ static void aspeed_1030_wdt_class_init(ObjectClass *klass, void *data) AspeedWDTClass *awc = ASPEED_WDT_CLASS(klass); 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[209.51.188.17]) by mx.google.com with ESMTPS id c3-20020a0ce643000000b0053a2a6c1a5fsi9533428qvn.358.2023.02.07.02.09.19 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:09:19 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuG-0000pL-Dh; Tue, 07 Feb 2023 05:08:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKu1-0000Xt-0a; Tue, 07 Feb 2023 05:08:45 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKty-0002UP-Oa; Tue, 07 Feb 2023 05:08:40 -0500 Received: from gandalf.ozlabs.org (gandalf.ozlabs.org [150.107.74.76]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zNh0Gc4z4wgv; Tue, 7 Feb 2023 21:08:36 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNf0986z4xyf; Tue, 7 Feb 2023 21:08:33 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 16/25] hw/watchdog/wdt_aspeed: Extend MMIO range to cover more registers Date: Tue, 7 Feb 2023 11:07:35 +0100 Message-Id: <20230207100744.698694-17-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé When booting the Zephyr demo in [1] we get: aspeed.io: unimplemented device write (size 4, offset 0x185128, value 0x030f1ff1) <-- aspeed.io: unimplemented device write (size 4, offset 0x18512c, value 0x03fffff1) This corresponds to this Zephyr code [2]: static int aspeed_wdt_init(const struct device *dev) { const struct aspeed_wdt_config *config = dev->config; struct aspeed_wdt_data *const data = dev->data; uint32_t reg_val; /* disable WDT by default */ reg_val = sys_read32(config->ctrl_base + WDT_CTRL_REG); reg_val &= ~WDT_CTRL_ENABLE; sys_write32(reg_val, config->ctrl_base + WDT_CTRL_REG); sys_write32(data->rst_mask1, config->ctrl_base + WDT_SW_RESET_MASK1_REG); <------ sys_write32(data->rst_mask2, config->ctrl_base + WDT_SW_RESET_MASK2_REG); return 0; } The register definitions are [3]: #define WDT_RELOAD_VAL_REG 0x0004 #define WDT_RESTART_REG 0x0008 #define WDT_CTRL_REG 0x000C #define WDT_TIMEOUT_STATUS_REG 0x0010 #define WDT_TIMEOUT_STATUS_CLR_REG 0x0014 #define WDT_RESET_MASK1_REG 0x001C #define WDT_RESET_MASK2_REG 0x0020 #define WDT_SW_RESET_MASK1_REG 0x0028 <------ #define WDT_SW_RESET_MASK2_REG 0x002C #define WDT_SW_RESET_CTRL_REG 0x0024 Currently QEMU only cover a MMIO region of size 0x20: #define ASPEED_WDT_REGS_MAX (0x20 / 4) Change to map the whole 'iosize' which might be bigger, covering the other registers. The MemoryRegionOps read/write handlers will report the accesses as out-of-bounds guest-errors, but the next commit will report them as unimplemented. [1] https://github.com/AspeedTech-BMC/zephyr/releases/tag/v00.01.07 [2] https://github.com/AspeedTech-BMC/zephyr/commit/2e99f10ac27b [3] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/drivers/watchdog/wdt_aspeed.c#L31 Reviewed-by: Peter Delevoryas Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Cédric Le Goater --- hw/watchdog/wdt_aspeed.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index 958725a1b5..eefca31ae4 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -260,6 +260,7 @@ static void aspeed_wdt_realize(DeviceState *dev, Error **errp) { SysBusDevice *sbd = SYS_BUS_DEVICE(dev); AspeedWDTState *s = ASPEED_WDT(dev); + AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(dev); assert(s->scu); @@ -271,7 +272,7 @@ static void aspeed_wdt_realize(DeviceState *dev, Error **errp) s->pclk_freq = PCLK_HZ; memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_wdt_ops, s, - TYPE_ASPEED_WDT, ASPEED_WDT_REGS_MAX * 4); + TYPE_ASPEED_WDT, awc->iosize); sysbus_init_mmio(sbd, &s->iomem); } From patchwork Tue Feb 7 10:07:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 651253 Delivered-To: patch@linaro.org Received: by 2002:a17:522:d8c:b0:4be:c3dc:14d8 with SMTP id d12csp2779200pva; Tue, 7 Feb 2023 02:09:23 -0800 (PST) X-Google-Smtp-Source: AK7set/nUPvrc0AMMPYYHxDdATm4he3kBDjqnNkpDNcTLwinNHrM3/n4/O2i7q0w73V1l4P3EbcB X-Received: by 2002:ac8:7f0c:0:b0:3b9:ce9f:499d with SMTP id f12-20020ac87f0c000000b003b9ce9f499dmr4289768qtk.67.1675764563723; Tue, 07 Feb 2023 02:09:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675764563; cv=none; d=google.com; s=arc-20160816; b=S1gWnIIopss2TAczx2hl4SO3oYNH6mwIDIb1dHAbImdLeaKKuPqG3gsngfUC+punte vM1+6jdGHSYqZ6Jc8deXm5RCoA4buVsSQHjRqjpoHAj0V8fxUflqSVmlVqqrf81bIsul CyZTrU7353Fz+8sxOC2PwruvSotw5y+6214owkiOHYXa7cINxS73icWGXAKqAyuENlJE fFClOkS2QRg4OETN82J1sQUHzdEIcHCz/G7OjJtbiUhsbQ5KMez6bc5RtUBDrudBXikQ AVAMswB5wuwEjgami1aS7pB0Vc4Az7aJ9Usy0F/+bb6AcwetiPbDDi7l8R9eNCKzzkoH tcSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=I5o3roGFkzrG8ecnQC8N0HMsota4EuvCXmLOj9GDIMI=; b=VH/dDl4nlepYZcuqmygPJrr3gv5LqAjWAyfjqxLixR85eyrRUWtMvP5JFMVO1CNIGs r9Lr9LLPZp1zx1cM+6H67IV01bpDK8Fj95aY+BHQ4dTPdM5qhukDiv8c5+vm/DtuDhTP jO33lAWNAcyJsaZ6qL4JjN1llH7Ba8NZWwwa7U+RxYU/Ikk/359PE7nBw5UgfQ13W47O n0BKwOSUtj2T7nHGow6WFT/DRcXfoWQRuzwpdaqo0lFF01Ls9X9tofTdcsBDNigXGmBb FrHyWBFowh8bZUaMczuwcs52w5DGFeFK7sp0rgT8214J+fu9TIgNLndwX9E/WrsDfI94 Ee+A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 7-20020a05620a040700b007170950985bsi10392945qkp.30.2023.02.07.02.09.23 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:09:23 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuE-0000nN-RT; Tue, 07 Feb 2023 05:08:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKu3-0000Y0-4d; Tue, 07 Feb 2023 05:08:45 -0500 Received: from mail.ozlabs.org ([2404:9400:2221:ea00::3] helo=gandalf.ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKu1-0002Uw-8C; Tue, 07 Feb 2023 05:08:42 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zNk3yXnz4xxJ; Tue, 7 Feb 2023 21:08:38 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNh3rblz4xyd; Tue, 7 Feb 2023 21:08:36 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 17/25] hw/watchdog/wdt_aspeed: Log unimplemented registers as UNIMP level Date: Tue, 7 Feb 2023 11:07:36 +0100 Message-Id: <20230207100744.698694-18-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2404:9400:2221:ea00::3; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Add more Aspeed watchdog registers from [*]. Since guests can righteously access them, log the access at 'unimplemented' level instead of 'guest-errors'. [*] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/drivers/watchdog/wdt_aspeed.c#L31 Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Delevoryas Signed-off-by: Cédric Le Goater --- include/hw/watchdog/wdt_aspeed.h | 2 +- hw/watchdog/wdt_aspeed.c | 13 +++++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h index db91ee6b51..e90ef86651 100644 --- a/include/hw/watchdog/wdt_aspeed.h +++ b/include/hw/watchdog/wdt_aspeed.h @@ -21,7 +21,7 @@ OBJECT_DECLARE_TYPE(AspeedWDTState, AspeedWDTClass, ASPEED_WDT) #define TYPE_ASPEED_2600_WDT TYPE_ASPEED_WDT "-ast2600" #define TYPE_ASPEED_1030_WDT TYPE_ASPEED_WDT "-ast1030" -#define ASPEED_WDT_REGS_MAX (0x20 / 4) +#define ASPEED_WDT_REGS_MAX (0x30 / 4) struct AspeedWDTState { /*< private >*/ diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index eefca31ae4..d267aa185c 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -42,6 +42,11 @@ #define WDT_PUSH_PULL_MAGIC (0xA8 << 24) #define WDT_OPEN_DRAIN_MAGIC (0x8A << 24) #define WDT_RESET_MASK1 (0x1c / 4) +#define WDT_RESET_MASK2 (0x20 / 4) + +#define WDT_SW_RESET_CTRL (0x24 / 4) +#define WDT_SW_RESET_MASK1 (0x28 / 4) +#define WDT_SW_RESET_MASK2 (0x2c / 4) #define WDT_TIMEOUT_STATUS (0x10 / 4) #define WDT_TIMEOUT_CLEAR (0x14 / 4) @@ -83,6 +88,10 @@ static uint64_t aspeed_wdt_read(void *opaque, hwaddr offset, unsigned size) return s->regs[WDT_RESET_MASK1]; case WDT_TIMEOUT_STATUS: case WDT_TIMEOUT_CLEAR: + case WDT_RESET_MASK2: + case WDT_SW_RESET_CTRL: + case WDT_SW_RESET_MASK1: + case WDT_SW_RESET_MASK2: qemu_log_mask(LOG_UNIMP, "%s: uninmplemented read at offset 0x%" HWADDR_PRIx "\n", __func__, offset); @@ -190,6 +199,10 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data, case WDT_TIMEOUT_STATUS: case WDT_TIMEOUT_CLEAR: + case WDT_RESET_MASK2: + case WDT_SW_RESET_CTRL: + case WDT_SW_RESET_MASK1: + case WDT_SW_RESET_MASK2: qemu_log_mask(LOG_UNIMP, "%s: uninmplemented write at offset 0x%" HWADDR_PRIx "\n", __func__, offset); From patchwork Tue Feb 7 10:07:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 651258 Delivered-To: patch@linaro.org Received: by 2002:a17:522:d8c:b0:4be:c3dc:14d8 with SMTP id d12csp2779681pva; Tue, 7 Feb 2023 02:10:39 -0800 (PST) X-Google-Smtp-Source: AK7set/Z2Fykx5QKZib+kGitYma27i+Y3/9emjznCNqOngTf5qj2XWat6yOBca+JevHlz5OTbXXr X-Received: by 2002:a05:622a:452:b0:3b8:3629:7cb7 with SMTP id o18-20020a05622a045200b003b836297cb7mr4370964qtx.64.1675764638913; Tue, 07 Feb 2023 02:10:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675764638; cv=none; d=google.com; s=arc-20160816; b=ufZe3T79Y5Edcx6XTDGgZUlhX2zfw4bpmmBe2p4gLSOzFNcCzFbV7bABXoYLFWnlkL PGAgH1ss/JIJ12q5x7COEfKZ5nd5v0bmcr5/6O0HhqgQqVYzkrzZcIcTZ1+9V+jNOZvY xxhwqnM/53nXFimDfKV8SxVxlZMHQOyrdd0+mbprR+wpoEGLrg9FRCaYFCXZXVc8lFo9 t87l5z9LNRTMC/6BXapEBms6U24uYuqoEY5ZZxoZDZ5zm0ZgYrjMhpGcSypaXij9Vk0U i8c6Vmn8RzWSQwaPC/3AWI5tkthExCkfRTMpr5I8cUPyBK6oUcBiCxBijbr9FzF8Vm/+ 8ONA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=Jk6BAM/o2QRiTEds7f2bs3G4yYbjllVJPk9HJHm1PM4=; b=QuzUaXWK/f3b45IA/LXERDQJJM2gAjpSc4ldQREaVptH7UeRQ8AhRbvkUNzMyxHC5Y JozoEpqZ7632dOzoC2JH+a+e/rTpkl85ETpt7sSEbH2JD0CWIbOwcTTjoNEv6XPdS6mb UuJ1zN17/6H0QFQZ0vqhU2xF/9HJBSvJtc/su0DyHtIFPOIQuRdqFE+LQCb8kpEo0jfD tkkIO99ZDqm1M7mq+Bzb5Spdw33kjVzVFRkxUuJgFnM21Pmd9OqVs9/aj2/28AqxhWH6 EdpMxFWnRiqkK8NtQKiMie704LXslwf0rZKTwEASdWz3+leV859cGu2vjKLKFYdrJLr7 CU/w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s12-20020a05622a1a8c00b003b9bd530289si10813827qtc.54.2023.02.07.02.10.38 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:10:38 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuB-0000gG-EQ; Tue, 07 Feb 2023 05:08:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKu7-0000ZJ-Bu; Tue, 07 Feb 2023 05:08:47 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKu2-0002UP-1y; Tue, 07 Feb 2023 05:08:45 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zNn0YHPz4xyd; Tue, 7 Feb 2023 21:08:41 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNl0QT4z4xyB; Tue, 7 Feb 2023 21:08:38 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 18/25] hw/misc/aspeed_hace: Do not crash if address_space_map() failed Date: Tue, 7 Feb 2023 11:07:37 +0100 Message-Id: <20230207100744.698694-19-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé address_space_map() can fail: uart:~$ hash test sha256_test tv[0]: Segmentation fault: 11 Thread 3 "qemu-system-arm" received signal SIGSEGV, Segmentation fault. gen_acc_mode_iov (req_len=0x7ffff18b7778, id=, iov=0x7ffff18b7780, s=0x555556ce0bd0) at ../hw/misc/aspeed_hace.c:171 171 if (has_padding(s, &iov[id], *req_len, &total_msg_len, &pad_offset)) { (gdb) bt #0 gen_acc_mode_iov (req_len=0x7ffff18b7778, id=, iov=0x7ffff18b7780, s=0x555556ce0bd0) at ../hw/misc/aspeed_hace.c:171 #1 do_hash_operation (s=s@entry=0x555556ce0bd0, algo=3, sg_mode=sg_mode@entry=true, acc_mode=acc_mode@entry=true) at ../hw/misc/aspeed_hace.c:224 #2 0x00005555559bdbb8 in aspeed_hace_write (opaque=, addr=12, data=262488, size=) at ../hw/misc/aspeed_hace.c:358 This change doesn't fix much, but at least the guest can't crash QEMU anymore. Instead it is still usable: uart:~$ hash test sha256_test tv[0]:hash_final error sha384_test tv[0]:hash_final error sha512_test tv[0]:hash_final error [00:00:06.278,000] hace_global: HACE poll timeout [00:00:09.324,000] hace_global: HACE poll timeout [00:00:12.261,000] hace_global: HACE poll timeout uart:~$ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Delevoryas Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- hw/misc/aspeed_hace.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c index ac21be306c..12a761f1f5 100644 --- a/hw/misc/aspeed_hace.c +++ b/hw/misc/aspeed_hace.c @@ -193,6 +193,7 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode, size_t digest_len = 0; int niov = 0; int i; + void *haddr; if (sg_mode) { uint32_t len = 0; @@ -217,9 +218,13 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode, addr &= SG_LIST_ADDR_MASK; plen = len & SG_LIST_LEN_MASK; - iov[i].iov_base = address_space_map(&s->dram_as, addr, &plen, false, - MEMTXATTRS_UNSPECIFIED); - + haddr = address_space_map(&s->dram_as, addr, &plen, false, + MEMTXATTRS_UNSPECIFIED); + if (haddr == NULL) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__); + return; + } + iov[i].iov_base = haddr; if (acc_mode) { niov = gen_acc_mode_iov(s, iov, i, &plen); @@ -230,10 +235,14 @@ static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode, } else { hwaddr len = s->regs[R_HASH_SRC_LEN]; + haddr = address_space_map(&s->dram_as, s->regs[R_HASH_SRC], + &len, false, MEMTXATTRS_UNSPECIFIED); + if (haddr == NULL) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__); + return; + } + iov[0].iov_base = haddr; iov[0].iov_len = len; - iov[0].iov_base = address_space_map(&s->dram_as, s->regs[R_HASH_SRC], - &len, false, - MEMTXATTRS_UNSPECIFIED); i = 1; if (s->iov_count) { From patchwork Tue Feb 7 10:07:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 651262 Delivered-To: patch@linaro.org Received: by 2002:a17:522:d8c:b0:4be:c3dc:14d8 with SMTP id d12csp2780223pva; Tue, 7 Feb 2023 02:12:05 -0800 (PST) X-Google-Smtp-Source: AK7set+/t3FZEzLU66lA3sy3dGdmFhZFx5C4EIV1iqPNHgxvObf6aV3iIhPd7KeUt/23v9QfuaVB X-Received: by 2002:ad4:5aa4:0:b0:56b:58e9:f7d9 with SMTP id u4-20020ad45aa4000000b0056b58e9f7d9mr4456014qvg.41.1675764724916; Tue, 07 Feb 2023 02:12:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675764724; cv=none; d=google.com; s=arc-20160816; b=WgibZlnxpG2ZZLoz3qSMlT6IN7yGyCapYBu7LUt5SPeh+XNjcvsBPgHcgTGSGk9UQ5 KUr4idMWI1n19NdiBSpoXZZDeW23dePAWp/B17XhcwVuSZhHZp+54sPZO+iqMR6wynAx g0ZPR25yhkZVq7c2zBO7Yr4H94+PH0QSQbwBI4TOFj8a7hrdPrmpW2dfI9udd3UJMrVi VBkV21AVNqRALDbQuwvbL0oXWC7gb4xriOqDuh+q38fV7GjFkwp1nRq6nuR7VPlNGag0 +kXvf1Z6hiJ4NgIIP4JU2ck6c/IJvBleEv2biBMAsWlrKj3Z7ABzrXzYLBxbaPfr6Pf7 B/fA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=+rbLGTkHJy0KFq0mSeipkj+n8nbs9Vm6si5uv8DnaR8=; b=fe7g7pQBSjbR7ANWBROfDDnlAFyKbIC1Q8od1F0rSjWhAaKXFY/g7tMZuXNAfx3Zka xqsxbtzKbufgetUIhJJV3bFHko4W/sX24LSKxrbQP50rSoStWiJoBdjAfW+OdOx0B7eU tJ/C2vunaQIXNYvTcCBNfb6raaK6q2X2txS7sQqm8gohb1f7KruZE90JPoeuxfhnedFK ar9yFsYLpWRP8i3U7CNMu5aQZDQD1aIPV6FbpNN5S2CpDax1B3T1L0HRhrftf1keIWSl F7s3u3XCHmEiw4RetoqekjCaORE7SY/7tDd+9PMPtWGzWA7wtT6ceAz/1q/2NuMUmSXO x53Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h12-20020a0562140dac00b005353cbd0dcbsi11723273qvh.132.2023.02.07.02.12.04 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:12:04 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuH-0000qW-FR; Tue, 07 Feb 2023 05:08:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKu8-0000bP-Vr; Tue, 07 Feb 2023 05:08:49 -0500 Received: from mail.ozlabs.org ([2404:9400:2221:ea00::3] helo=gandalf.ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKu6-0002Uw-2z; Tue, 07 Feb 2023 05:08:48 -0500 Received: from gandalf.ozlabs.org (gandalf.ozlabs.org [150.107.74.76]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zNq62vNz4xyf; Tue, 7 Feb 2023 21:08:43 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNn47TXz4xyB; Tue, 7 Feb 2023 21:08:41 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Joel Stanley Subject: [PULL 19/25] hw/arm/aspeed_ast10x0: Add various unimplemented peripherals Date: Tue, 7 Feb 2023 11:07:38 +0100 Message-Id: <20230207100744.698694-20-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2404:9400:2221:ea00::3; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Based on booting Zephyr demo from [1] running QEMU with '-d unimp' and checking missing devices in [2]. [1] https://github.com/AspeedTech-BMC/zephyr/releases/tag/v00.01.07 [2] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Delevoryas Reviewed-by: Cédric Le Goater Reviewed-by: Joel Stanley Signed-off-by: Cédric Le Goater --- include/hw/arm/aspeed_soc.h | 11 +++++++++++ hw/arm/aspeed_ast10x0.c | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 8389200b2d..9a5e3c0bac 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -44,6 +44,7 @@ #define ASPEED_CPUS_NUM 2 #define ASPEED_MACS_NUM 4 #define ASPEED_UARTS_NUM 13 +#define ASPEED_JTAG_NUM 2 struct AspeedSoCState { /*< private >*/ @@ -87,6 +88,11 @@ struct AspeedSoCState { UnimplementedDeviceState video; UnimplementedDeviceState emmc_boot_controller; UnimplementedDeviceState dpmcu; + UnimplementedDeviceState pwm; + UnimplementedDeviceState espi; + UnimplementedDeviceState udc; + UnimplementedDeviceState sgpiom; + UnimplementedDeviceState jtag[ASPEED_JTAG_NUM]; }; #define TYPE_ASPEED_SOC "aspeed-soc" @@ -174,6 +180,11 @@ enum { ASPEED_DEV_DPMCU, ASPEED_DEV_DP, ASPEED_DEV_I3C, + ASPEED_DEV_ESPI, + ASPEED_DEV_UDC, + ASPEED_DEV_SGPIOM, + ASPEED_DEV_JTAG0, + ASPEED_DEV_JTAG1, }; qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev); diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index b483735dc2..b970a5ea58 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -27,10 +27,15 @@ static const hwaddr aspeed_soc_ast1030_memmap[] = { [ASPEED_DEV_FMC] = 0x7E620000, [ASPEED_DEV_SPI1] = 0x7E630000, [ASPEED_DEV_SPI2] = 0x7E640000, + [ASPEED_DEV_UDC] = 0x7E6A2000, [ASPEED_DEV_SCU] = 0x7E6E2000, + [ASPEED_DEV_JTAG0] = 0x7E6E4000, + [ASPEED_DEV_JTAG1] = 0x7E6E4100, [ASPEED_DEV_ADC] = 0x7E6E9000, + [ASPEED_DEV_ESPI] = 0x7E6EE000, [ASPEED_DEV_SBC] = 0x7E6F2000, [ASPEED_DEV_GPIO] = 0x7E780000, + [ASPEED_DEV_SGPIOM] = 0x7E780500, [ASPEED_DEV_TIMER1] = 0x7E782000, [ASPEED_DEV_UART1] = 0x7E783000, [ASPEED_DEV_UART2] = 0x7E78D000, @@ -78,12 +83,17 @@ static const int aspeed_soc_ast1030_irqmap[] = { [ASPEED_DEV_LPC] = 35, [ASPEED_DEV_PECI] = 38, [ASPEED_DEV_FMC] = 39, + [ASPEED_DEV_ESPI] = 42, [ASPEED_DEV_PWM] = 44, [ASPEED_DEV_ADC] = 46, [ASPEED_DEV_SPI1] = 65, [ASPEED_DEV_SPI2] = 66, [ASPEED_DEV_I2C] = 110, /* 110 ~ 123 */ [ASPEED_DEV_KCS] = 138, /* 138 -> 142 */ + [ASPEED_DEV_UDC] = 9, + [ASPEED_DEV_SGPIOM] = 51, + [ASPEED_DEV_JTAG0] = 27, + [ASPEED_DEV_JTAG1] = 53, }; static qemu_irq aspeed_soc_ast1030_get_irq(AspeedSoCState *s, int dev) @@ -154,6 +164,15 @@ static void aspeed_soc_ast1030_init(Object *obj) object_initialize_child(obj, "iomem", &s->iomem, TYPE_UNIMPLEMENTED_DEVICE); object_initialize_child(obj, "sbc-unimplemented", &s->sbc_unimplemented, TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, "pwm", &s->pwm, TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, "espi", &s->espi, TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, "udc", &s->udc, TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, "sgpiom", &s->sgpiom, + TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, "jtag[0]", &s->jtag[0], + TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, "jtag[1]", &s->jtag[1], + TYPE_UNIMPLEMENTED_DEVICE); } static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp) @@ -336,6 +355,22 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp) sc->memmap[ASPEED_DEV_GPIO]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, aspeed_soc_get_irq(s, ASPEED_DEV_GPIO)); + + aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->pwm), "aspeed.pwm", + sc->memmap[ASPEED_DEV_PWM], 0x100); + + aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->espi), "aspeed.espi", + sc->memmap[ASPEED_DEV_ESPI], 0x800); + + aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->udc), "aspeed.udc", + sc->memmap[ASPEED_DEV_UDC], 0x1000); + aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->sgpiom), "aspeed.sgpiom", + sc->memmap[ASPEED_DEV_SGPIOM], 0x100); + + aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->jtag[0]), "aspeed.jtag", + sc->memmap[ASPEED_DEV_JTAG0], 0x20); + aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->jtag[1]), "aspeed.jtag", + sc->memmap[ASPEED_DEV_JTAG1], 0x20); } static void aspeed_soc_ast1030_class_init(ObjectClass *klass, void *data) From patchwork Tue Feb 7 10:07:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 651254 Delivered-To: patch@linaro.org Received: by 2002:a17:522:d8c:b0:4be:c3dc:14d8 with SMTP id d12csp2779371pva; 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[209.51.188.17]) by mx.google.com with ESMTPS id s11-20020a05622a1a8b00b003b9bd8a4e3asi10874959qtc.401.2023.02.07.02.09.50 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:09:50 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuG-0000pF-C7; Tue, 07 Feb 2023 05:08:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKuA-0000es-L7; Tue, 07 Feb 2023 05:08:50 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKu8-0002WK-OV; Tue, 07 Feb 2023 05:08:50 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zNt2cndz4xyF; Tue, 7 Feb 2023 21:08:46 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNr2Vdlz4xwl; Tue, 7 Feb 2023 21:08:44 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 20/25] hw/arm/aspeed_ast10x0: Map I3C peripheral Date: Tue, 7 Feb 2023 11:07:39 +0100 Message-Id: <20230207100744.698694-21-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Since I don't have access to the datasheet, the relevant values were found in: https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi Reviewed-by: Peter Delevoryas Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- hw/arm/aspeed_ast10x0.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index b970a5ea58..1a06269cb1 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -53,6 +53,7 @@ static const hwaddr aspeed_soc_ast1030_memmap[] = { [ASPEED_DEV_WDT] = 0x7E785000, [ASPEED_DEV_LPC] = 0x7E789000, [ASPEED_DEV_PECI] = 0x7E78B000, + [ASPEED_DEV_I3C] = 0x7E7A0000, [ASPEED_DEV_I2C] = 0x7E7B0000, }; @@ -88,6 +89,7 @@ static const int aspeed_soc_ast1030_irqmap[] = { [ASPEED_DEV_ADC] = 46, [ASPEED_DEV_SPI1] = 65, [ASPEED_DEV_SPI2] = 66, + [ASPEED_DEV_I3C] = 102, /* 102 -> 105 */ [ASPEED_DEV_I2C] = 110, /* 110 ~ 123 */ [ASPEED_DEV_KCS] = 138, /* 138 -> 142 */ [ASPEED_DEV_UDC] = 9, @@ -129,6 +131,8 @@ static void aspeed_soc_ast1030_init(Object *obj) snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); object_initialize_child(obj, "i2c", &s->i2c, typename); + object_initialize_child(obj, "i3c", &s->i3c, TYPE_ASPEED_I3C); + snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname); object_initialize_child(obj, "timerctrl", &s->timerctrl, typename); @@ -239,6 +243,18 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq); } + /* I3C */ + if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) { + return; + } + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]); + for (i = 0; i < ASPEED_I3C_NR_DEVICES; i++) { + qemu_irq irq = qdev_get_gpio_in(DEVICE(&s->armv7m), + sc->irqmap[ASPEED_DEV_I3C] + i); + /* The AST1030 I3C controller has one IRQ per bus. */ + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i3c.devices[i]), 0, irq); + } + /* PECI */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->peci), errp)) { return; From patchwork Tue Feb 7 10:07:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 651256 Delivered-To: patch@linaro.org Received: by 2002:a17:522:d8c:b0:4be:c3dc:14d8 with SMTP id d12csp2779537pva; Tue, 7 Feb 2023 02:10:15 -0800 (PST) X-Google-Smtp-Source: AK7set8KuvZtmnRuVxX8llz+zSvtUqVcp5r2DO3WcOiR9dUz1U2ztRtBsc3zcE/ITWqKDUERAQzW X-Received: by 2002:ac8:7dd0:0:b0:3b0:11a1:3140 with SMTP id c16-20020ac87dd0000000b003b011a13140mr4618663qte.43.1675764615450; Tue, 07 Feb 2023 02:10:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675764615; cv=none; d=google.com; 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[209.51.188.17]) by mx.google.com with ESMTPS id o15-20020a05622a008f00b003b63b7d442fsi10630723qtw.137.2023.02.07.02.10.15 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:10:15 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuK-0000yS-UU; Tue, 07 Feb 2023 05:09:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKuC-0000k0-Jl; Tue, 07 Feb 2023 05:08:52 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKuA-0002UP-0o; Tue, 07 Feb 2023 05:08:52 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zNw6VMTz4wgv; Tue, 7 Feb 2023 21:08:48 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNt6CN8z4xwl; Tue, 7 Feb 2023 21:08:46 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 21/25] hw/arm/aspeed_ast10x0: Map the secure SRAM Date: Tue, 7 Feb 2023 11:07:40 +0100 Message-Id: <20230207100744.698694-22-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Some SRAM appears to be used by the Secure Boot unit and crypto accelerators. Name it 'secure sram'. Note, the SRAM base address was already present but unused (the 'SBC' index is used for the MMIO peripheral). Interestingly using CFLAGS=-Winitializer-overrides reports: ../hw/arm/aspeed_ast10x0.c:32:30: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] [ASPEED_DEV_SBC] = 0x7E6F2000, ^~~~~~~~~~ ../hw/arm/aspeed_ast10x0.c:24:30: note: previous initialization is here [ASPEED_DEV_SBC] = 0x79000000, ^~~~~~~~~~ This fixes with Zephyr: uart:~$ rsa test rsa test vector[0]: [00:00:26.156,000] os: ***** BUS FAULT ***** [00:00:26.157,000] os: Precise data bus error [00:00:26.157,000] os: BFAR Address: 0x79000000 [00:00:26.158,000] os: r0/a1: 0x79000000 r1/a2: 0x00000000 r2/a3: 0x00001800 [00:00:26.158,000] os: r3/a4: 0x79001800 r12/ip: 0x00000800 r14/lr: 0x0001098d [00:00:26.158,000] os: xpsr: 0x81000000 [00:00:26.158,000] os: Faulting instruction address (r15/pc): 0x0001e1bc [00:00:26.158,000] os: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0 [00:00:26.158,000] os: Current thread: 0x38248 (shell_uart) [00:00:26.165,000] os: Halting system Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Delevoryas [ clg: Fixed size of Secure Boot Controller Memory ] Signed-off-by: Cédric Le Goater --- include/hw/arm/aspeed_soc.h | 3 +++ hw/arm/aspeed_ast10x0.c | 11 ++++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 9a5e3c0bac..bd1e03e78a 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -71,6 +71,7 @@ struct AspeedSoCState { AspeedSMCState spi[ASPEED_SPIS_NUM]; EHCISysBusState ehci[ASPEED_EHCIS_NUM]; AspeedSBCState sbc; + MemoryRegion secsram; UnimplementedDeviceState sbc_unimplemented; AspeedSDMCState sdmc; AspeedWDTState wdt[ASPEED_WDTS_NUM]; @@ -105,6 +106,7 @@ struct AspeedSoCClass { const char *cpu_type; uint32_t silicon_rev; uint64_t sram_size; + uint64_t secsram_size; int spis_num; int ehcis_num; int wdts_num; @@ -143,6 +145,7 @@ enum { ASPEED_DEV_SCU, ASPEED_DEV_ADC, ASPEED_DEV_SBC, + ASPEED_DEV_SECSRAM, ASPEED_DEV_EMMC_BC, ASPEED_DEV_VIDEO, ASPEED_DEV_SRAM, diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 1a06269cb1..592a19d988 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -21,7 +21,7 @@ static const hwaddr aspeed_soc_ast1030_memmap[] = { [ASPEED_DEV_SRAM] = 0x00000000, - [ASPEED_DEV_SBC] = 0x79000000, + [ASPEED_DEV_SECSRAM] = 0x79000000, [ASPEED_DEV_IOMEM] = 0x7E600000, [ASPEED_DEV_PWM] = 0x7E610000, [ASPEED_DEV_FMC] = 0x7E620000, @@ -221,6 +221,14 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp) memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SRAM], &s->sram); + memory_region_init_ram(&s->secsram, OBJECT(s), "sec.sram", + sc->secsram_size, &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } + memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SECSRAM], + &s->secsram); /* SCU */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) { @@ -400,6 +408,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *klass, void *data) sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); sc->silicon_rev = AST1030_A1_SILICON_REV; sc->sram_size = 0xc0000; + sc->secsram_size = 0x40000; /* 256 * KiB */ sc->spis_num = 2; sc->ehcis_num = 0; sc->wdts_num = 4; From patchwork Tue Feb 7 10:07:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 651255 Delivered-To: patch@linaro.org Received: by 2002:a17:522:d8c:b0:4be:c3dc:14d8 with SMTP id d12csp2779454pva; Tue, 7 Feb 2023 02:10:03 -0800 (PST) X-Google-Smtp-Source: AK7set/wKn5Jjgvfl9j2M/FzgJpVcdDClyyLX9DSo84nsvdPu3Y8vvaAKzXfu2aMIzmBt1tWb3X0 X-Received: by 2002:a05:622a:1aa5:b0:3b8:61df:e298 with SMTP id s37-20020a05622a1aa500b003b861dfe298mr4926510qtc.3.1675764603312; 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[209.51.188.17]) by mx.google.com with ESMTPS id bs7-20020a05620a470700b0071ee340a85csi12208091qkb.505.2023.02.07.02.10.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:10:03 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuH-0000qO-AJ; Tue, 07 Feb 2023 05:08:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKuE-0000ni-WF; Tue, 07 Feb 2023 05:08:55 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKuC-0002WK-Kc; Tue, 07 Feb 2023 05:08:54 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zNz34xmz4xwl; Tue, 7 Feb 2023 21:08:51 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNx2yVFz4xGR; Tue, 7 Feb 2023 21:08:49 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 22/25] hw/arm/aspeed_ast10x0: Map HACE peripheral Date: Tue, 7 Feb 2023 11:07:41 +0100 Message-Id: <20230207100744.698694-23-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Since I don't have access to the datasheet, the relevant values were found in: https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi Before on Zephyr: uart:~$ hash test sha256_test tv[0]:hash_final error sha384_test tv[0]:hash_final error sha512_test tv[0]:hash_final error [00:00:06.278,000] hace_global: HACE poll timeout [00:00:09.324,000] hace_global: HACE poll timeout [00:00:12.261,000] hace_global: HACE poll timeout uart:~$ crypto aes256_cbc_vault aes256_cbc vault key 1 [00:00:06.699,000] hace_global: aspeed_crypto_session_setup [00:00:06.699,000] hace_global: data->cmd: 1c2098 [00:00:06.699,000] hace_global: crypto_data_src: 93340 [00:00:06.699,000] hace_global: crypto_data_dst: 93348 [00:00:06.699,000] hace_global: crypto_ctx_base: 93300 [00:00:06.699,000] hace_global: crypto_data_len: 80000040 [00:00:06.699,000] hace_global: crypto_cmd_reg: 11c2098 [00:00:09.743,000] hace_global: HACE_STS: 0 [00:00:09.743,000] hace_global: HACE poll timeout [00:00:09.743,000] crypto: CBC mode ENCRYPT - Failed [00:00:09.743,000] hace_global: aspeed_crypto_session_free uart:~$ After: uart:~$ hash test sha256_test tv[0]:PASS tv[1]:PASS tv[2]:PASS tv[3]:PASS tv[4]:PASS sha384_test tv[0]:PASS tv[1]:PASS tv[2]:PASS tv[3]:PASS tv[4]:PASS tv[5]:PASS sha512_test tv[0]:PASS tv[1]:PASS tv[2]:PASS tv[3]:PASS tv[4]:PASS tv[5]:PASS uart:~$ crypto aes256_cbc_vault aes256_cbc vault key 1 Was waiting for: 6b c1 be e2 2e 40 9f 96 e9 3d 7e 11 73 93 17 2a ae 2d 8a 57 1e 03 ac 9c 9e b7 6f ac 45 af 8e 51 30 c8 1c 46 a3 5c e4 11 e5 fb c1 19 1a 0a 52 ef f6 9f 24 45 df 4f 9b 17 ad 2b 41 7b e6 6c 37 10 But got: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [00:00:05.771,000] hace_global: aspeed_crypto_session_setup [00:00:05.772,000] hace_global: data->cmd: 1c2098 [00:00:05.772,000] hace_global: crypto_data_src: 93340 [00:00:05.772,000] hace_global: crypto_data_dst: 93348 [00:00:05.772,000] hace_global: crypto_ctx_base: 93300 [00:00:05.772,000] hace_global: crypto_data_len: 80000040 [00:00:05.772,000] hace_global: crypto_cmd_reg: 11c2098 [00:00:05.772,000] hace_global: HACE_STS: 1000 [00:00:05.772,000] crypto: Output length (encryption): 80 [00:00:05.772,000] hace_global: aspeed_crypto_session_free [00:00:05.772,000] hace_global: aspeed_crypto_session_setup [00:00:05.772,000] hace_global: data->cmd: 1c2018 [00:00:05.772,000] hace_global: crypto_data_src: 93340 [00:00:05.772,000] hace_global: crypto_data_dst: 93348 [00:00:05.772,000] hace_global: crypto_ctx_base: 93300 [00:00:05.772,000] hace_global: crypto_data_len: 80000040 [00:00:05.772,000] hace_global: crypto_cmd_reg: 11c2018 [00:00:05.772,000] hace_global: HACE_STS: 1000 [00:00:05.772,000] crypto: Output length (decryption): 64 [00:00:05.772,000] crypto: CBC mode DECRYPT - Mismatch between plaintext and decrypted cipher text [00:00:05.774,000] hace_global: aspeed_crypto_session_free uart:~$ Reviewed-by: Peter Delevoryas Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Cédric Le Goater --- hw/arm/aspeed_ast10x0.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 592a19d988..5c794c2420 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -28,6 +28,7 @@ static const hwaddr aspeed_soc_ast1030_memmap[] = { [ASPEED_DEV_SPI1] = 0x7E630000, [ASPEED_DEV_SPI2] = 0x7E640000, [ASPEED_DEV_UDC] = 0x7E6A2000, + [ASPEED_DEV_HACE] = 0x7E6D0000, [ASPEED_DEV_SCU] = 0x7E6E2000, [ASPEED_DEV_JTAG0] = 0x7E6E4000, [ASPEED_DEV_JTAG1] = 0x7E6E4100, @@ -165,6 +166,9 @@ static void aspeed_soc_ast1030_init(Object *obj) snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); object_initialize_child(obj, "gpio", &s->gpio, typename); + snprintf(typename, sizeof(typename), "aspeed.hace-%s", socname); + object_initialize_child(obj, "hace", &s->hace, typename); + object_initialize_child(obj, "iomem", &s->iomem, TYPE_UNIMPLEMENTED_DEVICE); object_initialize_child(obj, "sbc-unimplemented", &s->sbc_unimplemented, TYPE_UNIMPLEMENTED_DEVICE); @@ -358,6 +362,17 @@ static void aspeed_soc_ast1030_realize(DeviceState *dev_soc, Error **errp) } aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sbc), 0, sc->memmap[ASPEED_DEV_SBC]); + /* HACE */ + object_property_set_link(OBJECT(&s->hace), "dram", OBJECT(&s->sram), + &error_abort); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->hace), errp)) { + return; + } + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->hace), 0, + sc->memmap[ASPEED_DEV_HACE]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0, + aspeed_soc_get_irq(s, ASPEED_DEV_HACE)); + /* Watch dog */ for (i = 0; i < sc->wdts_num; i++) { AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]); From patchwork Tue Feb 7 10:07:42 2023 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id f14-20020a05620a408e00b00720d9e83167si13228389qko.283.2023.02.07.02.10.48 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:10:48 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuM-00012P-FJ; Tue, 07 Feb 2023 05:09:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKuH-0000qI-3s; Tue, 07 Feb 2023 05:08:57 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKuF-0002UP-2q; Tue, 07 Feb 2023 05:08:56 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zP16mTpz4wgv; Tue, 7 Feb 2023 21:08:53 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zNz6dZpz4xGR; Tue, 7 Feb 2023 21:08:51 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 23/25] hw/arm/aspeed_ast10x0: Add TODO comment to use Cortex-M4F Date: Tue, 7 Feb 2023 11:07:42 +0100 Message-Id: <20230207100744.698694-24-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé This SoC uses a Cortex-M4F. QEMU only implements a M4, which is good enough. Add a TODO note in case the M4F is added. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Delevoryas Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- hw/arm/aspeed_ast10x0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 5c794c2420..649b3b13c1 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -420,7 +420,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *klass, void *data) dc->realize = aspeed_soc_ast1030_realize; sc->name = "ast1030-a1"; - sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); + sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); /* TODO cortex-m4f */ sc->silicon_rev = AST1030_A1_SILICON_REV; sc->sram_size = 0xc0000; sc->secsram_size = 0x40000; /* 256 * KiB */ From patchwork Tue Feb 7 10:07:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 651257 Delivered-To: patch@linaro.org Received: by 2002:a17:522:d8c:b0:4be:c3dc:14d8 with SMTP id d12csp2779635pva; Tue, 7 Feb 2023 02:10:32 -0800 (PST) X-Google-Smtp-Source: AK7set/+6sMCpMxg4VSTFcORJZgEbWRmx4WO5cakL1rjch4JmYcNKnF6CFRi8pcPCE2mNQrsfvwJ X-Received: by 2002:a05:622a:15c4:b0:3b6:3596:182b with SMTP id d4-20020a05622a15c400b003b63596182bmr4356239qty.36.1675764632658; Tue, 07 Feb 2023 02:10:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675764632; cv=none; d=google.com; s=arc-20160816; b=RQkgS/G1D3blrYXjW+jiXM2ubYZk00mEHsJFVhR6U3WmivVwgnnLZmYUy1iCOxwrkD ytKieQWMuFTYYIVtnQQwQYManXF9//fHRyU3J+0jIRGh7nUxt4+75QNIVuQGQbHwAFjW AVTR2e9KT7Pvmx4LLVFUZao+rGy34jCHQUFRVxXFtVeRdSusIuvaCkVvojweG5ZA31u2 eARZe0rIiV8h+KePE5JRQ1yQ4X/1U483YYnE/W2GHCPx6zO4J3b274LVUuUlix8cvnXD VaymWv0eiTWQ9g4Ec3TFDmlXP3Phy1ryexJmatgL2pkAVbek7CSIKHqa09LsFGFROMb5 uUIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=gtYe8UVQzqifk85mpSDLt528eZsOyN1cS8W0DcNQacE=; b=lOzjTAuNcCuUFmVRWrbitLFL61qU3QzRfMaJfWXqQCAo12Mdqi4gdBbyjudhUqm4aU e3kOglIFLbLKOHQBDBq9/c+WhSoF2y6S5qN00GB0z1j6xV8HOXr0ibJPQml7RcPAPtKz DQQ4+T3qyPw9VMjL1RlGgUgSwdXqfrgzwdvA5Bv3NdLU0UbtJzO/OGntdMOxgPundfAD o2QXFo7+WJDEmK+PQ//+k5fKyau13J3UENrfn7VskkQE1Oa4YjdyLRaCEvR3eD+/vDu8 /YLl0JZqXlETaRJDjiec/M3SoAcpgE9vcEuq831CbBN9ZjbHWYBc6PUtnqJ9qYKh4Nsb 7BDg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o8-20020a05622a138800b0039ce6373d32si11015811qtk.534.2023.02.07.02.10.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 07 Feb 2023 02:10:32 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pPKuk-00024o-1D; Tue, 07 Feb 2023 05:09:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKug-0001qv-7S; Tue, 07 Feb 2023 05:09:22 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pPKud-0002Zj-1F; Tue, 07 Feb 2023 05:09:21 -0500 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4P9zP43Mxmz4xxJ; Tue, 7 Feb 2023 21:08:56 +1100 (AEDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4P9zP23Dbkz4xGR; Tue, 7 Feb 2023 21:08:54 +1100 (AEDT) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Peter Delevoryas , =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PULL 24/25] tests/avocado: Test Aspeed Zephyr SDK v00.01.08 on AST1030 board Date: Tue, 7 Feb 2023 11:07:43 +0100 Message-Id: <20230207100744.698694-25-clg@kaod.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230207100744.698694-1-clg@kaod.org> References: <20230207100744.698694-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=150.107.74.76; envelope-from=SRS0=a43c=6D=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé Add a very quick test that runs some commands in a Zephyr shell: $ tests/venv/bin/avocado --show=app,console run -t os:zephyr tests/avocado (2/2) tests/avocado/machine_aspeed.py:AST1030Machine.test_ast1030_zephyros_1_07: console: *** Booting Zephyr OS build v00.01.07 *** console: ast1030_evb demo console: SOC: AST1030-A1 console: uart:~$ kernel stacks console: 0x36910 wdt_background (real size 1024): unused 988 usage 36 / 1024 (3 %) console: 0x36ad8 shell_uart (real size 4096): unused 3084 usage 1012 / 4096 (24 %) console: 0x2edb8 ADC0 (real size 400): unused 260 usage 140 / 400 (35 %) console: 0x2f0f0 ADC1 (real size 400): unused 260 usage 140 / 400 (35 %) console: 0x3b098 sysworkq (real size 1024): unused 860 usage 164 / 1024 (16 %) console: 0x36cc0 usbdworkq (real size 1024): unused 860 usage 164 / 1024 (16 %) console: 0x36bd8 usbworkq (real size 1024): unused 860 usage 164 / 1024 (16 %) console: 0x36a10 logging (real size 768): unused 548 usage 220 / 768 (28 %) console: 0x36ef8 idle 00 (real size 320): unused 268 usage 52 / 320 (16 %) console: 0x47800 IRQ 00 (real size 2048): unused 1504 usage 544 / 2048 (26 %) console: uart:~$ otp info scu console: SCU BIT reg_protect Description console: ____________________________________________________________________ console: 0x500 0x0 0x0 Disable ARM CM4 CPU boot (TXD5) console: 0x500 0x1 0x0 /Reserved console: 0x500 0x2 0x0 \ " console: 0x500 0x3 0x0 Address offset of single chip ABR mode console: 0x500 0x4 0x0 /Reserved console: 0x500 0x5 0x0 | " console: 0x500 0x6 0x0 | " console: 0x500 0x7 0x0 | " console: 0x500 0x8 0x0 | " console: 0x500 0x9 0x0 | " console: 0x500 0xA 0x0 | " console: 0x500 0xB 0x0 | " console: 0x500 0xC 0x0 | " console: 0x500 0xD 0x0 | " console: 0x500 0xE 0x0 | " console: 0x500 0xF 0x0 | " console: 0x500 0x10 0x0 \ " console: 0x500 0x11 0x0 Disabl3 ARM JTAG debug console: 0x500 0x12 0x0 /Reserved console: 0x500 0x13 0x0 | " console: 0x500 0x14 0x0 | " console: 0x500 0x15 0x0 | " console: 0x500 0x16 0x0 | " console: 0x500 0x17 0x0 | " console: 0x500 0x18 0x0 | " console: 0x500 0x19 0x0 | " console: 0x500 0x1A 0x0 | " console: 0x500 0x1B 0x0 | " console: 0x500 0x1C 0x0 | " console: 0x500 0x1D 0x0 | " console: 0x500 0x1E 0x0 | " console: 0x500 0x1F 0x0 \ " console: 0x510 0x0 0x0 /Reserved console: 0x510 0x1 0x0 | " console: 0x510 0x2 0x0 | " console: 0x510 0x3 0x0 \ " console: 0x510 0x4 0x0 Disable debug interfaces console: 0x510 0x5 0x0 /Reserved console: 0x510 0x6 0x0 | " console: 0x510 0x7 0x0 \ " console: 0x510 0x8 0x0 Enable boot from Uart5 by Pin Strap console: 0x510 0x9 0x0 /Reserved console: 0x510 0xA 0x0 \ " console: 0x510 0xB 0x0 Enable boot SPI ABR console: 0x510 0xC 0x0 Boot SPI ABR Mode console: 0x510 0xD 0x0 /Boot SPI flash size console: 0x510 0xE 0x0 | " console: 0x510 0xF 0x0 \ " console: 0x510 0x10 0x0 /Reserved console: 0x510 0x11 0x0 | " console: 0x510 0x12 0x0 | " console: 0x510 0x13 0x0 | " console: 0x510 0x14 0x0 | " console: 0x510 0x15 0x0 \ " console: 0x510 0x16 0x0 Enable boot SPI auxiliary control pins console: 0x510 0x19 0x0 /Reserved console: 0x510 0x1A 0x0 | " console: 0x510 0x1B 0x0 | " console: 0x510 0x1C 0x0 | " console: 0x510 0x1D 0x0 | " console: 0x510 0x1E 0x0 | " console: 0x510 0x1F 0x0 \ " console: 0x510 0x1E 0x0 Enable dedicate GPIO strap pins console: 0x510 0x1F 0x0 Enable Secure Boot by Pin Strap console: uart:~$ hwinfo devid console: Length: 8 console: ID: 0x0000018000000180 console: uart:~$ crypto aes256_cbc_vault console: aes256_cbc vault key 1 console: Was waiting for: console: 6b c1 be e2 2e 40 9f 96 e9 3d 7e 11 73 93 17 2a console: ae 2d 8a 57 1e 03 ac 9c 9e b7 6f ac 45 af 8e 51 console: 30 c8 1c 46 a3 5c e4 11 e5 fb c1 19 1a 0a 52 ef console: f6 9f 24 45 df 4f 9b 17 ad 2b 41 7b e6 6c 37 10 console: But got: console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 console: uart:~$ random get console: 0x862460d console: uart:~$ i2c scan I2C_0 console: 0 1 2 3 4 5 6 7 8 9 a b c d e f console: 00: -- -- -- -- -- -- -- -- -- -- -- -- console: 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 50: 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 70: -- -- -- -- -- -- -- -- console: 1 devices found on I2C_0 console: uart:~$ kernel uptime console: Uptime: 9897 ms console: uart:~$ kernel reboot warm console: *** Booting Zephyr OS build v00.01.07 *** PASS (1.08 s) Ref: https://github.com/AspeedTech-BMC/zephyr/releases/download/v00.01.07/Aspeed_Zephy_SDK_User_Guide_v00.01.07.pdf Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Delevoryas Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- tests/avocado/machine_aspeed.py | 41 ++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/tests/avocado/machine_aspeed.py b/tests/avocado/machine_aspeed.py index 1cab946727..ddf05b3617 100644 --- a/tests/avocado/machine_aspeed.py +++ b/tests/avocado/machine_aspeed.py @@ -22,10 +22,11 @@ class AST1030Machine(QemuSystemTest): timeout = 10 - def test_ast1030_zephyros(self): + def test_ast1030_zephyros_1_04(self): """ :avocado: tags=arch:arm :avocado: tags=machine:ast1030-evb + :avocado: tags=os:zephyr """ tar_url = ('https://github.com/AspeedTech-BMC' '/zephyr/releases/download/v00.01.04/ast1030-evb-demo.zip') @@ -41,6 +42,44 @@ def test_ast1030_zephyros(self): exec_command_and_wait_for_pattern(self, "help", "Available commands") + def test_ast1030_zephyros_1_07(self): + """ + :avocado: tags=arch:arm + :avocado: tags=machine:ast1030-evb + :avocado: tags=os:zephyr + """ + tar_url = ('https://github.com/AspeedTech-BMC' + '/zephyr/releases/download/v00.01.07/ast1030-evb-demo.zip') + tar_hash = '40ac87eabdcd3b3454ce5aad11fedc72a33ecda2' + tar_path = self.fetch_asset(tar_url, asset_hash=tar_hash) + archive.extract(tar_path, self.workdir) + kernel_file = self.workdir + "/ast1030-evb-demo/zephyr.bin" + self.vm.set_console() + self.vm.add_args('-kernel', kernel_file, + '-nographic') + self.vm.launch() + wait_for_console_pattern(self, "Booting Zephyr OS") + for shell_cmd in [ + 'kernel stacks', + 'otp info conf', + 'otp info scu', + 'hwinfo devid', + 'crypto aes256_cbc_vault', + 'random get', + 'jtag JTAG1 sw_xfer high TMS', + 'adc ADC0 resolution 12', + 'adc ADC0 read 42', + 'adc ADC1 read 69', + 'i2c scan I2C_0', + 'i3c attach I3C_0', + 'hash test', + 'kernel uptime', + 'kernel reboot warm', + 'kernel uptime', + 'kernel reboot cold', + 'kernel uptime', + ]: exec_command_and_wait_for_pattern(self, shell_cmd, "uart:~$") + class AST2x00Machine(QemuSystemTest): timeout = 90