From patchwork Fri Feb 3 09:16:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 650737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BC52C636D6 for ; Fri, 3 Feb 2023 09:17:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232798AbjBCJRX (ORCPT ); Fri, 3 Feb 2023 04:17:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232701AbjBCJQ7 (ORCPT ); Fri, 3 Feb 2023 04:16:59 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5842A991D1; Fri, 3 Feb 2023 01:16:37 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d413:5f9c:fc3a:208d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 4B5B66602F08; Fri, 3 Feb 2023 09:16:35 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675415795; bh=WeghlRFY57k/XRhbZSebcHWkeNrEWgqxdzHNHRFL4B0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=krTDlQ3UYuk65VZzTeSbLvrLvgLmqYPYXnfZRrtZLyf8H4jab9+9UueZ9fAJYMqjG U3YfkwlW2KqcsKGU/P2KlFuhZHav+2oByHo7CgdNaX+wwUmUHDYF+Z5qOhFkX5Je9N lCCw7A/X59NxP2oo7HviS3nees+4SbipjbHkdxW2UxZKOtnSKj4ErY9NyeUM2qLji6 FOLWwCGqfJ7M7QClzl8MDIRTFRk8NKeDVpoQ9NPfFNDePWoTOWI8Io/7RlSxwLS2KZ n7noqfkXp664quBYN0DC49PPLgaZTyjEMnwV1moTs66+h4BpwJOW61eaMw1w8sYAlB 2FCW/45YK2Ktw== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v8 1/6] media: verisilicon: Do not set context src/dst formats in reset functions Date: Fri, 3 Feb 2023 10:16:17 +0100 Message-Id: <20230203091622.127279-2-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203091622.127279-1-benjamin.gaignard@collabora.com> References: <20230203091622.127279-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Setting context source and destination formats should only be done in hantro_set_fmt_out() and hantro_set_fmt_cap() after check that the targeted queue is not busy. Remove these calls from hantro_reset_encoded_fmt() and hantro_reset_raw_fmt() to clean the driver. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard --- drivers/media/platform/verisilicon/hantro_v4l2.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c index 2c7a805289e7..33cb865238de 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.c +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c @@ -381,13 +381,10 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) vpu_fmt = hantro_get_default_fmt(ctx, true); - if (ctx->is_encoder) { - ctx->vpu_dst_fmt = vpu_fmt; + if (ctx->is_encoder) fmt = &ctx->dst_fmt; - } else { - ctx->vpu_src_fmt = vpu_fmt; + else fmt = &ctx->src_fmt; - } hantro_reset_fmt(fmt, vpu_fmt); fmt->width = vpu_fmt->frmsize.min_width; @@ -407,11 +404,9 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx) raw_vpu_fmt = hantro_get_default_fmt(ctx, false); if (ctx->is_encoder) { - ctx->vpu_src_fmt = raw_vpu_fmt; raw_fmt = &ctx->src_fmt; encoded_fmt = &ctx->dst_fmt; } else { - ctx->vpu_dst_fmt = raw_vpu_fmt; raw_fmt = &ctx->dst_fmt; encoded_fmt = &ctx->src_fmt; } From patchwork Fri Feb 3 09:16:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 650490 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1F9AC61DA4 for ; Fri, 3 Feb 2023 09:17:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232685AbjBCJRV (ORCPT ); Fri, 3 Feb 2023 04:17:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232633AbjBCJQ5 (ORCPT ); Fri, 3 Feb 2023 04:16:57 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A93A991D8; Fri, 3 Feb 2023 01:16:37 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d413:5f9c:fc3a:208d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id C52986602F0B; Fri, 3 Feb 2023 09:16:35 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675415796; bh=9xkh7Mz6B7KCpRaWkFO7AHPjQWKFgdQpvDXYN313zu0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OuOaHVkfD7N2ri3orPAhlLmTr4P/1eh10YjH1OTywBJCzllotOe5UewgtvKXwlKPy cNl0MCYXwP6C1s12znKZuKUBOHep7GdkILznBAEaqJkRdAAco7UQ0fkLIrjehM9lRN vz0CbEu+0fmPtMybzjb06hDGaJnXW1Q1mB5CSg8LhitTl6rgrg2N4GGXkMOzKQVlp2 h5dRmfG3+7tvq3X+6aDW8xl6hKsMxy+96qo2Lry1HcIXZB2a/rUoI/jblhto3OTA8J iM7HrgA1pnukYRms5gSZ8asSuPp2BMQTms2OpMJVvBc/DcCiyX2WkY/xWTNvSk68w6 7ppQx+NXPFGEQ== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v8 2/6] media: verisilicon: Do not use ctx fields as format storage when resetting Date: Fri, 3 Feb 2023 10:16:18 +0100 Message-Id: <20230203091622.127279-3-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203091622.127279-1-benjamin.gaignard@collabora.com> References: <20230203091622.127279-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Source and destination pixel formats fields of context structure should not be used as storage when resetting the format. Use local variables instead and let hantro_set_fmt_out() and hantro_set_fmt_cap() set them correctly later. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard --- .../media/platform/verisilicon/hantro_v4l2.c | 40 +++++++++---------- 1 file changed, 18 insertions(+), 22 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c index 33cb865238de..e60151a8a401 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.c +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c @@ -377,47 +377,43 @@ static void hantro_reset_encoded_fmt(struct hantro_ctx *ctx) { const struct hantro_fmt *vpu_fmt; - struct v4l2_pix_format_mplane *fmt; + struct v4l2_pix_format_mplane fmt; vpu_fmt = hantro_get_default_fmt(ctx, true); + if (!vpu_fmt) + return; + hantro_reset_fmt(&fmt, vpu_fmt); + fmt.width = vpu_fmt->frmsize.min_width; + fmt.height = vpu_fmt->frmsize.min_height; if (ctx->is_encoder) - fmt = &ctx->dst_fmt; - else - fmt = &ctx->src_fmt; - - hantro_reset_fmt(fmt, vpu_fmt); - fmt->width = vpu_fmt->frmsize.min_width; - fmt->height = vpu_fmt->frmsize.min_height; - if (ctx->is_encoder) - hantro_set_fmt_cap(ctx, fmt); + hantro_set_fmt_cap(ctx, &fmt); else - hantro_set_fmt_out(ctx, fmt); + hantro_set_fmt_out(ctx, &fmt); } static void hantro_reset_raw_fmt(struct hantro_ctx *ctx) { const struct hantro_fmt *raw_vpu_fmt; - struct v4l2_pix_format_mplane *raw_fmt, *encoded_fmt; + struct v4l2_pix_format_mplane raw_fmt, *encoded_fmt; raw_vpu_fmt = hantro_get_default_fmt(ctx, false); + if (!raw_vpu_fmt) + return; - if (ctx->is_encoder) { - raw_fmt = &ctx->src_fmt; + if (ctx->is_encoder) encoded_fmt = &ctx->dst_fmt; - } else { - raw_fmt = &ctx->dst_fmt; + else encoded_fmt = &ctx->src_fmt; - } - hantro_reset_fmt(raw_fmt, raw_vpu_fmt); - raw_fmt->width = encoded_fmt->width; - raw_fmt->height = encoded_fmt->height; + hantro_reset_fmt(&raw_fmt, raw_vpu_fmt); + raw_fmt.width = encoded_fmt->width; + raw_fmt.height = encoded_fmt->height; if (ctx->is_encoder) - hantro_set_fmt_out(ctx, raw_fmt); + hantro_set_fmt_out(ctx, &raw_fmt); else - hantro_set_fmt_cap(ctx, raw_fmt); + hantro_set_fmt_cap(ctx, &raw_fmt); } void hantro_reset_fmts(struct hantro_ctx *ctx) From patchwork Fri Feb 3 09:16:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 650489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05928C63797 for ; Fri, 3 Feb 2023 09:17:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232835AbjBCJR0 (ORCPT ); Fri, 3 Feb 2023 04:17:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232695AbjBCJQ7 (ORCPT ); Fri, 3 Feb 2023 04:16:59 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CAB4E991F3; Fri, 3 Feb 2023 01:16:37 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d413:5f9c:fc3a:208d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 45E836602F0E; Fri, 3 Feb 2023 09:16:36 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675415796; bh=XkoUCITE8h1soeO51L0cqguHb/kDm/X/DMUUXHPEMvQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CFSvYdotWp7taqLyWxCkOcF2cgzFwo1c4wPNGGegBjxBOvXki5QvrFps6xL4yoMSF OJ80+PgWaRdG0Eaer3uja6uIFhv4xJV7DfQD/dwD2hKT+gMf15R0kIlCAhWGuctvCP xX7En04caQ9GRmosrgy9cT292T24zJ/6awv0tCs0m2zntbWqmpqFV5bwXLo92hz/tB vPHtlD0evqErzQS+CU+OMDR7eBeO2KUkoS2lxvm12sS5WmBkYOiT9YqMPEEuWgcQFK OqZqiR1tg0H3kcdgAgfYj6tddnk/NpIb7yLYxAc6UgmlDKL5gWDcKbKdWXS1K4IHwL nwdOu/Cfq5vAg== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v8 3/6] media: verisilicon: Do not set ctx->bit_depth in hantro_try_ctrl() Date: Fri, 3 Feb 2023 10:16:19 +0100 Message-Id: <20230203091622.127279-4-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203091622.127279-1-benjamin.gaignard@collabora.com> References: <20230203091622.127279-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In hantro_try_ctrl() we should only check the values inside control parameters and not set ctx->bit_depth. That must be done in controls set function. Create a set control function for hevc where ctx->bit_depth is set at the right time. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard --- .../media/platform/verisilicon/hantro_drv.c | 32 ++++++++++++++----- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index 8cb4a68c9119..6d8bc55ea627 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -251,11 +251,6 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) { - struct hantro_ctx *ctx; - - ctx = container_of(ctrl->handler, - struct hantro_ctx, ctrl_handler); - if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) { const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; @@ -274,8 +269,6 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) /* Only 8-bit and 10-bit are supported */ return -EINVAL; - - ctx->bit_depth = sps->bit_depth_luma_minus8 + 8; } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; @@ -324,6 +317,24 @@ static int hantro_vp9_s_ctrl(struct v4l2_ctrl *ctrl) return 0; } +static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct hantro_ctx *ctx; + + ctx = container_of(ctrl->handler, + struct hantro_ctx, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_STATELESS_HEVC_SPS: + ctx->bit_depth = ctrl->p_new.p_hevc_sps->bit_depth_luma_minus8 + 8; + break; + default: + return -EINVAL; + } + + return 0; +} + static const struct v4l2_ctrl_ops hantro_ctrl_ops = { .try_ctrl = hantro_try_ctrl, }; @@ -336,6 +347,11 @@ static const struct v4l2_ctrl_ops hantro_vp9_ctrl_ops = { .s_ctrl = hantro_vp9_s_ctrl, }; +static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = { + .try_ctrl = hantro_try_ctrl, + .s_ctrl = hantro_hevc_s_ctrl, +}; + #define HANTRO_JPEG_ACTIVE_MARKERS (V4L2_JPEG_ACTIVE_MARKER_APP0 | \ V4L2_JPEG_ACTIVE_MARKER_COM | \ V4L2_JPEG_ACTIVE_MARKER_DQT | \ @@ -470,7 +486,7 @@ static const struct hantro_ctrl controls[] = { .codec = HANTRO_HEVC_DECODER, .cfg = { .id = V4L2_CID_STATELESS_HEVC_SPS, - .ops = &hantro_ctrl_ops, + .ops = &hantro_hevc_ctrl_ops, }, }, { .codec = HANTRO_HEVC_DECODER, From patchwork Fri Feb 3 09:16:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 650736 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B29FC636D6 for ; Fri, 3 Feb 2023 09:17:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232633AbjBCJR1 (ORCPT ); Fri, 3 Feb 2023 04:17:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232616AbjBCJRA (ORCPT ); Fri, 3 Feb 2023 04:17:00 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D2F88E48F; Fri, 3 Feb 2023 01:16:38 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d413:5f9c:fc3a:208d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id BC2CA6602F09; Fri, 3 Feb 2023 09:16:36 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675415797; bh=752HZ4uVvStIIcKhagF9QnoB41yMeC5WhBi80T4vY4g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QPye5ChwJZQIwKMhEAB6eYd6hBKf5bzEvSW5oRdm1w3xs27rbebEafNS21Mn8D956 yn5FffOiHb97z0DM8DpfREs6UQ6il8wj48rv9pgiXcXJFwmuIKFr1pbGVY9j8noUcP 782LI7vKB4rcYj8MgQYYAdkO73hX65baxbvePIKv8J3i8kAjL5vMYQCXZrPX/Gcz9u Uj+yS+F7xl4YksAOJbd5VzM6It//LlhNlTKQjKwheY7QkPCFAQORhkJOnM7nu8JYA4 EQs/At8jt+qKJqczVJlCX9SAO/JJYrYCZD30GY/QSGGUQnZH3aGcTVWpzUg3gXSqI2 gX+2htfE22TVw== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard , Nicolas Dufresne Subject: [PATCH v8 4/6] media: verisilicon: Do not change context bit depth before validating the format Date: Fri, 3 Feb 2023 10:16:20 +0100 Message-Id: <20230203091622.127279-5-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203091622.127279-1-benjamin.gaignard@collabora.com> References: <20230203091622.127279-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org It is needed to check if the proposed pixels format is valid before updating context bit depth and other internal states. Stop using ctx->bit_depth to check format depth match and return result to the caller. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard Reviewed-by: Nicolas Dufresne --- .../platform/verisilicon/hantro_postproc.c | 2 +- .../media/platform/verisilicon/hantro_v4l2.c | 51 ++++++++++--------- .../media/platform/verisilicon/hantro_v4l2.h | 3 +- 3 files changed, 30 insertions(+), 26 deletions(-) version 8: - Set HANTRO_DEFAULT_BIT_DEPTH to 8 diff --git a/drivers/media/platform/verisilicon/hantro_postproc.c b/drivers/media/platform/verisilicon/hantro_postproc.c index 09d8cf942689..6437423ccf3a 100644 --- a/drivers/media/platform/verisilicon/hantro_postproc.c +++ b/drivers/media/platform/verisilicon/hantro_postproc.c @@ -197,7 +197,7 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) unsigned int i, buf_size; /* this should always pick native format */ - fmt = hantro_get_default_fmt(ctx, false); + fmt = hantro_get_default_fmt(ctx, false, ctx->bit_depth); if (!fmt) return -EINVAL; v4l2_fill_pixfmt_mp(&pix_mp, fmt->fourcc, ctx->src_fmt.width, diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c index e60151a8a401..7c9a04171b45 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.c +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c @@ -28,6 +28,8 @@ #include "hantro_hw.h" #include "hantro_v4l2.h" +#define HANTRO_DEFAULT_BIT_DEPTH 8 + static int hantro_set_fmt_out(struct hantro_ctx *ctx, struct v4l2_pix_format_mplane *pix_mp); static int hantro_set_fmt_cap(struct hantro_ctx *ctx, @@ -76,18 +78,13 @@ int hantro_get_format_depth(u32 fourcc) } static bool -hantro_check_depth_match(const struct hantro_ctx *ctx, - const struct hantro_fmt *fmt) +hantro_check_depth_match(const struct hantro_fmt *fmt, int bit_depth) { - int fmt_depth, ctx_depth = 8; + int fmt_depth; if (!fmt->match_depth && !fmt->postprocessed) return true; - /* 0 means default depth, which is 8 */ - if (ctx->bit_depth) - ctx_depth = ctx->bit_depth; - fmt_depth = hantro_get_format_depth(fmt->fourcc); /* @@ -95,9 +92,9 @@ hantro_check_depth_match(const struct hantro_ctx *ctx, * It may be possible to relax that on some HW. */ if (!fmt->match_depth) - return fmt_depth <= ctx_depth; + return fmt_depth <= bit_depth; - return fmt_depth == ctx_depth; + return fmt_depth == bit_depth; } static const struct hantro_fmt * @@ -119,7 +116,7 @@ hantro_find_format(const struct hantro_ctx *ctx, u32 fourcc) } const struct hantro_fmt * -hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) +hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream, int bit_depth) { const struct hantro_fmt *formats; unsigned int i, num_fmts; @@ -128,7 +125,7 @@ hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) for (i = 0; i < num_fmts; i++) { if (bitstream == (formats[i].codec_mode != HANTRO_MODE_NONE) && - hantro_check_depth_match(ctx, &formats[i])) + hantro_check_depth_match(&formats[i], bit_depth)) return &formats[i]; } return NULL; @@ -203,7 +200,7 @@ static int vidioc_enum_fmt(struct file *file, void *priv, if (skip_mode_none == mode_none) continue; - if (!hantro_check_depth_match(ctx, fmt)) + if (!hantro_check_depth_match(fmt, ctx->bit_depth)) continue; if (j == f->index) { f->pixelformat = fmt->fourcc; @@ -223,7 +220,7 @@ static int vidioc_enum_fmt(struct file *file, void *priv, for (i = 0; i < num_fmts; i++) { fmt = &formats[i]; - if (!hantro_check_depth_match(ctx, fmt)) + if (!hantro_check_depth_match(fmt, ctx->bit_depth)) continue; if (j == f->index) { f->pixelformat = fmt->fourcc; @@ -291,7 +288,7 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, fmt = hantro_find_format(ctx, pix_mp->pixelformat); if (!fmt) { - fmt = hantro_get_default_fmt(ctx, coded); + fmt = hantro_get_default_fmt(ctx, coded, HANTRO_DEFAULT_BIT_DEPTH); pix_mp->pixelformat = fmt->fourcc; } @@ -379,7 +376,7 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) const struct hantro_fmt *vpu_fmt; struct v4l2_pix_format_mplane fmt; - vpu_fmt = hantro_get_default_fmt(ctx, true); + vpu_fmt = hantro_get_default_fmt(ctx, true, HANTRO_DEFAULT_BIT_DEPTH); if (!vpu_fmt) return; @@ -392,15 +389,16 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) hantro_set_fmt_out(ctx, &fmt); } -static void -hantro_reset_raw_fmt(struct hantro_ctx *ctx) +int +hantro_reset_raw_fmt(struct hantro_ctx *ctx, int bit_depth) { const struct hantro_fmt *raw_vpu_fmt; struct v4l2_pix_format_mplane raw_fmt, *encoded_fmt; + int ret; - raw_vpu_fmt = hantro_get_default_fmt(ctx, false); + raw_vpu_fmt = hantro_get_default_fmt(ctx, false, bit_depth); if (!raw_vpu_fmt) - return; + return -EINVAL; if (ctx->is_encoder) encoded_fmt = &ctx->dst_fmt; @@ -411,15 +409,20 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx) raw_fmt.width = encoded_fmt->width; raw_fmt.height = encoded_fmt->height; if (ctx->is_encoder) - hantro_set_fmt_out(ctx, &raw_fmt); + ret = hantro_set_fmt_out(ctx, &raw_fmt); else - hantro_set_fmt_cap(ctx, &raw_fmt); + ret = hantro_set_fmt_cap(ctx, &raw_fmt); + + if (!ret) + ctx->bit_depth = bit_depth; + + return ret; } void hantro_reset_fmts(struct hantro_ctx *ctx) { hantro_reset_encoded_fmt(ctx); - hantro_reset_raw_fmt(ctx); + hantro_reset_raw_fmt(ctx, HANTRO_DEFAULT_BIT_DEPTH); } static void @@ -519,7 +522,7 @@ static int hantro_set_fmt_out(struct hantro_ctx *ctx, * changes to the raw format. */ if (!ctx->is_encoder) - hantro_reset_raw_fmt(ctx); + hantro_reset_raw_fmt(ctx, hantro_get_format_depth(pix_mp->pixelformat)); /* Colorimetry information are always propagated. */ ctx->dst_fmt.colorspace = pix_mp->colorspace; @@ -582,7 +585,7 @@ static int hantro_set_fmt_cap(struct hantro_ctx *ctx, * changes to the raw format. */ if (ctx->is_encoder) - hantro_reset_raw_fmt(ctx); + hantro_reset_raw_fmt(ctx, HANTRO_DEFAULT_BIT_DEPTH); /* Colorimetry information are always propagated. */ ctx->src_fmt.colorspace = pix_mp->colorspace; diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.h b/drivers/media/platform/verisilicon/hantro_v4l2.h index 64f6f57e9d7a..9ea2fef57dcd 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.h +++ b/drivers/media/platform/verisilicon/hantro_v4l2.h @@ -21,9 +21,10 @@ extern const struct v4l2_ioctl_ops hantro_ioctl_ops; extern const struct vb2_ops hantro_queue_ops; +int hantro_reset_raw_fmt(struct hantro_ctx *ctx, int bit_depth); void hantro_reset_fmts(struct hantro_ctx *ctx); int hantro_get_format_depth(u32 fourcc); const struct hantro_fmt * -hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream); +hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream, int bit_depth); #endif /* HANTRO_V4L2_H_ */ From patchwork Fri Feb 3 09:16:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 650488 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26EB6C61DA4 for ; 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(unknown [IPv6:2a01:e0a:120:3210:d413:5f9c:fc3a:208d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 42B336602F13; Fri, 3 Feb 2023 09:16:37 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675415797; bh=nidu6T02emPBRdNskapMOIyau6nCKMPVCYROcQaB4E8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Wr61kx/jAol3M4xSJeQj2og6/DDn7TkNQwJsaeQ6B3y1ytmlAVO0e+WB2ae23w2KK RZbC41NgrVdVOP9X9zBwN5QXBNJ/bJkELqU2J/Aogg4cnJ/Yem/kUflJ0jRCK/clCf pbEo9hZfw4FTZJRRf+n4QEPTH/yEx6UUVYq4t9JmLESeWHaVUXV/CzBnQpiAWFfmwh EKIlNnUfrdyHOay7blUUSRXXxRcLK1Bz+Hwh3zIcJURuvS4/0f0U3Ls4mLd0I0L5fh ChhyTvPeSCr5Fln/te6CTwOlC6kWqKLhXpy7COviGa1pK6GHVoqU2re1dVqDP+Z25I FrsRR1lVxMO/g== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard , Nicolas Dufresne Subject: [PATCH v8 5/6] media: verisilicon: HEVC: Only propose 10 bits compatible pixels formats Date: Fri, 3 Feb 2023 10:16:21 +0100 Message-Id: <20230203091622.127279-6-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203091622.127279-1-benjamin.gaignard@collabora.com> References: <20230203091622.127279-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org When decoding a 10bits bitstreams HEVC driver should only expose 10bits pixel formats. To fulfill this requirement it is needed to call hantro_reset_raw_fmt() when bit depth change and to correctly set match_depth in pixel formats enumeration. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard Reviewed-by: Nicolas Dufresne --- drivers/media/platform/verisilicon/hantro_drv.c | 11 +++++++++-- drivers/media/platform/verisilicon/imx8m_vpu_hw.c | 2 ++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index 6d8bc55ea627..fa31b200b097 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -326,8 +326,15 @@ static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl) switch (ctrl->id) { case V4L2_CID_STATELESS_HEVC_SPS: - ctx->bit_depth = ctrl->p_new.p_hevc_sps->bit_depth_luma_minus8 + 8; - break; + { + const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; + int bit_depth = sps->bit_depth_luma_minus8 + 8; + + if (ctx->bit_depth == bit_depth) + return 0; + + return hantro_reset_raw_fmt(ctx, bit_depth); + } default: return -EINVAL; } diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c index b390228fd3b4..f850d8bddef6 100644 --- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c +++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c @@ -152,6 +152,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_NV12, .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, .postprocessed = true, .frmsize = { .min_width = FMT_MIN_WIDTH, @@ -165,6 +166,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_P010, .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, .postprocessed = true, .frmsize = { .min_width = FMT_MIN_WIDTH, From patchwork Fri Feb 3 09:16:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 650735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB22FC636D6 for ; Fri, 3 Feb 2023 09:17:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232894AbjBCJRw (ORCPT ); Fri, 3 Feb 2023 04:17:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232742AbjBCJRS (ORCPT ); Fri, 3 Feb 2023 04:17:18 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1A73991CD; Fri, 3 Feb 2023 01:16:57 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d413:5f9c:fc3a:208d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id B621D6602F16; Fri, 3 Feb 2023 09:16:37 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675415798; bh=/fZ2ALvuScrtz8aAPnoLovGKMZcYgk0hx4olwjLRTA8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W60lwyM/fIAqN4VdY6txRltfCyqurO225+2II7kNOsqVuiJRpkPUU54d5c7x3AR2j heu3XjIwrYJvny5no8lXojB3AUyDOr8LmDCwwvG0ZTu8BnCABoecEvKLhSMQ/jAxZ1 2Zdl12sHiLUnakZx1r+WBMImQgfTGY90tElVnz9RxN+ZBVVzSMkw0urJe5ATaMCy9j fASrdoiT9JSTV5DVOqcOL78w12l8Lvc/7L3RquN2bdMCyNXIAg2klr18481DepKNy1 2iw9i+vf27LIS6dt7xOGTFoE785HiD+VXsmoyn91R4ZZ9+pUJPX+K7CaLNu073VUSn Tz+O9hbbczv7Q== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v8 6/6] media: verisilicon: VP9: Only propose 10 bits compatible pixels formats Date: Fri, 3 Feb 2023 10:16:22 +0100 Message-Id: <20230203091622.127279-7-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203091622.127279-1-benjamin.gaignard@collabora.com> References: <20230203091622.127279-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org When decoding a 10bits bitstreams VP9 driver should only expose 10bits pixel formats. To fulfill this requirement it is needed to call hantro_reset_raw_fmt() when bit depth change and to correctly set match_depth in pixel formats enumeration. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard --- drivers/media/platform/verisilicon/hantro_drv.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index fa31b200b097..1c4b90c905ea 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -308,8 +308,14 @@ static int hantro_vp9_s_ctrl(struct v4l2_ctrl *ctrl) switch (ctrl->id) { case V4L2_CID_STATELESS_VP9_FRAME: - ctx->bit_depth = ctrl->p_new.p_vp9_frame->bit_depth; - break; + { + int bit_depth = ctrl->p_new.p_vp9_frame->bit_depth; + + if (ctx->bit_depth == bit_depth) + return 0; + + return hantro_reset_raw_fmt(ctx, bit_depth); + } default: return -EINVAL; }