From patchwork Tue Jan 31 13:03:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 650790 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1032C636CC for ; Tue, 31 Jan 2023 13:03:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231709AbjAaNDs (ORCPT ); Tue, 31 Jan 2023 08:03:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231508AbjAaNDq (ORCPT ); Tue, 31 Jan 2023 08:03:46 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71127DBC3; Tue, 31 Jan 2023 05:03:44 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d507:461a:a036:bf89]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 74C096602E64; Tue, 31 Jan 2023 13:03:42 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675170222; bh=WeghlRFY57k/XRhbZSebcHWkeNrEWgqxdzHNHRFL4B0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CPMZQW+6mPld5iY05XVu/jzKUp14nNRqILmG+2SeyHEsWilC7fJXkERMX1p6Sn0cp 3PzweKxJo4Y258kOw6aKYw7NzlkuXMiYcCGJE8T3mzL/nh/ZuCDePHuT1CjOPyrQun AKuWoTwNyxRBf6Lu0mjVtbkSJqbSRnefKzUgCpsf9hQTw4Oxq12JzW7LVKfp531/Bl HQx8rmiJ1GNWtak7KSh8FQj0R/It5ZwEGx0cYhMouGa28rpkUYslr912DwZmeH2ZXx kt1f6p9C4dqmkKK86M/h6zyGx6PB+kkpARFbwnrA8t9bIn/CnD+cCD1VxLdFC7hkk7 J6kvO3O6S7a0g== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 1/5] media: verisilicon: Do not set context src/dst formats in reset functions Date: Tue, 31 Jan 2023 14:03:23 +0100 Message-Id: <20230131130327.776899-2-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230131130327.776899-1-benjamin.gaignard@collabora.com> References: <20230131130327.776899-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Setting context source and destination formats should only be done in hantro_set_fmt_out() and hantro_set_fmt_cap() after check that the targeted queue is not busy. Remove these calls from hantro_reset_encoded_fmt() and hantro_reset_raw_fmt() to clean the driver. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard --- drivers/media/platform/verisilicon/hantro_v4l2.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c index 2c7a805289e7..33cb865238de 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.c +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c @@ -381,13 +381,10 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) vpu_fmt = hantro_get_default_fmt(ctx, true); - if (ctx->is_encoder) { - ctx->vpu_dst_fmt = vpu_fmt; + if (ctx->is_encoder) fmt = &ctx->dst_fmt; - } else { - ctx->vpu_src_fmt = vpu_fmt; + else fmt = &ctx->src_fmt; - } hantro_reset_fmt(fmt, vpu_fmt); fmt->width = vpu_fmt->frmsize.min_width; @@ -407,11 +404,9 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx) raw_vpu_fmt = hantro_get_default_fmt(ctx, false); if (ctx->is_encoder) { - ctx->vpu_src_fmt = raw_vpu_fmt; raw_fmt = &ctx->src_fmt; encoded_fmt = &ctx->dst_fmt; } else { - ctx->vpu_dst_fmt = raw_vpu_fmt; raw_fmt = &ctx->dst_fmt; encoded_fmt = &ctx->src_fmt; } From patchwork Tue Jan 31 13:03:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 649084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9080BC38142 for ; Tue, 31 Jan 2023 13:03:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231686AbjAaNDr (ORCPT ); Tue, 31 Jan 2023 08:03:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230481AbjAaNDq (ORCPT ); Tue, 31 Jan 2023 08:03:46 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7171210A92; Tue, 31 Jan 2023 05:03:44 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d507:461a:a036:bf89]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id EBE026602EBE; Tue, 31 Jan 2023 13:03:42 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675170223; bh=9xkh7Mz6B7KCpRaWkFO7AHPjQWKFgdQpvDXYN313zu0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oipKafPzVPw8hqVNYxENXzkcnaBChLBb9p5uLxcXowHc83se6TvPnTtuXiqOY6Pui PnCMBNyqLqSlduR19Hlh5SkhQskD+q8sby5zGWibidnDtFAPWxZZlfYc0e7FwMxs0y FQlK8CHH+Ag/FPnMNBuqJCGL5U5NybJ6uBkPRSGJcfqZ12JdR5Dzi+xMJ8axkxBnWW jJAkxMkp2Kc/IoZh3jAFYP3NEflBhGRM9k2SdQL1KcyNktMyXrMTJLWCBV+6/3vd2D 77KKDoBQtctUqfq2sM69aOl1uZCcKLT+dcof7L0pLjv1dGUSNGjbjLEBQNI7sMu+hf Phc63SR015EsA== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 2/5] media: verisilicon: Do not use ctx fields as format storage when resetting Date: Tue, 31 Jan 2023 14:03:24 +0100 Message-Id: <20230131130327.776899-3-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230131130327.776899-1-benjamin.gaignard@collabora.com> References: <20230131130327.776899-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Source and destination pixel formats fields of context structure should not be used as storage when resetting the format. Use local variables instead and let hantro_set_fmt_out() and hantro_set_fmt_cap() set them correctly later. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard --- .../media/platform/verisilicon/hantro_v4l2.c | 40 +++++++++---------- 1 file changed, 18 insertions(+), 22 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c index 33cb865238de..e60151a8a401 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.c +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c @@ -377,47 +377,43 @@ static void hantro_reset_encoded_fmt(struct hantro_ctx *ctx) { const struct hantro_fmt *vpu_fmt; - struct v4l2_pix_format_mplane *fmt; + struct v4l2_pix_format_mplane fmt; vpu_fmt = hantro_get_default_fmt(ctx, true); + if (!vpu_fmt) + return; + hantro_reset_fmt(&fmt, vpu_fmt); + fmt.width = vpu_fmt->frmsize.min_width; + fmt.height = vpu_fmt->frmsize.min_height; if (ctx->is_encoder) - fmt = &ctx->dst_fmt; - else - fmt = &ctx->src_fmt; - - hantro_reset_fmt(fmt, vpu_fmt); - fmt->width = vpu_fmt->frmsize.min_width; - fmt->height = vpu_fmt->frmsize.min_height; - if (ctx->is_encoder) - hantro_set_fmt_cap(ctx, fmt); + hantro_set_fmt_cap(ctx, &fmt); else - hantro_set_fmt_out(ctx, fmt); + hantro_set_fmt_out(ctx, &fmt); } static void hantro_reset_raw_fmt(struct hantro_ctx *ctx) { const struct hantro_fmt *raw_vpu_fmt; - struct v4l2_pix_format_mplane *raw_fmt, *encoded_fmt; + struct v4l2_pix_format_mplane raw_fmt, *encoded_fmt; raw_vpu_fmt = hantro_get_default_fmt(ctx, false); + if (!raw_vpu_fmt) + return; - if (ctx->is_encoder) { - raw_fmt = &ctx->src_fmt; + if (ctx->is_encoder) encoded_fmt = &ctx->dst_fmt; - } else { - raw_fmt = &ctx->dst_fmt; + else encoded_fmt = &ctx->src_fmt; - } - hantro_reset_fmt(raw_fmt, raw_vpu_fmt); - raw_fmt->width = encoded_fmt->width; - raw_fmt->height = encoded_fmt->height; + hantro_reset_fmt(&raw_fmt, raw_vpu_fmt); + raw_fmt.width = encoded_fmt->width; + raw_fmt.height = encoded_fmt->height; if (ctx->is_encoder) - hantro_set_fmt_out(ctx, raw_fmt); + hantro_set_fmt_out(ctx, &raw_fmt); else - hantro_set_fmt_cap(ctx, raw_fmt); + hantro_set_fmt_cap(ctx, &raw_fmt); } void hantro_reset_fmts(struct hantro_ctx *ctx) From patchwork Tue Jan 31 13:03:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 650789 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C6D3C636D7 for ; Tue, 31 Jan 2023 13:03:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231765AbjAaNDu (ORCPT ); Tue, 31 Jan 2023 08:03:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231634AbjAaNDr (ORCPT ); Tue, 31 Jan 2023 08:03:47 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E7EDCC153; Tue, 31 Jan 2023 05:03:44 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d507:461a:a036:bf89]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6974F6602EDB; Tue, 31 Jan 2023 13:03:43 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675170223; bh=xFuGtGTNupLtCWrqn28rJaQua02Q5BjDoZkdnX0clbQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Oaho7Cieo4djYgupJKPfUiikKJSOUIOU1kPjNMtjN6kO7edRWD4fCCvB+WJPlPqUX 6gl2F/Dtn+V62BFk3iBXWSKR0bHMC97CupGtzIio137tWWPrgh/DdWz9Qea0bU/TmG aSmTQrpLGzMm5ZIjZhdfdsOeXn+DzIOgx1rtacGKdu2wLFZTNAXUlXdSvY8ZtDf/xz CTY6FT2TiOO9gqPg7BbEljWxAx484RdHtN7F7SibZG27qIERisUKV39e02APFs7O7u epatNpsOfFfC3up1byRBakq/WKeSCx4nsYIeBKoeOHFKR8YuiwRG+l3aLhA72yl5Bp cgYNqj0VmM7ww== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v7 3/5] media: verisilicon: Do not set ctx->bit_depth in hantro_try_ctrl() Date: Tue, 31 Jan 2023 14:03:25 +0100 Message-Id: <20230131130327.776899-4-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230131130327.776899-1-benjamin.gaignard@collabora.com> References: <20230131130327.776899-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In hantro_try_ctrl() we should only check the values inside control parameters and not set ctx->bit_depth. That must be done in controls set function. Create a set control function for hevc where ctx->bit_depth is set at the right time. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard --- version 7: - Remove unused ctx variable in hantro_try_ctrl(). .../media/platform/verisilicon/hantro_drv.c | 32 ++++++++++++++----- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index 8cb4a68c9119..6d8bc55ea627 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -251,11 +251,6 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq) static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) { - struct hantro_ctx *ctx; - - ctx = container_of(ctrl->handler, - struct hantro_ctx, ctrl_handler); - if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) { const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; @@ -274,8 +269,6 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl) if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) /* Only 8-bit and 10-bit are supported */ return -EINVAL; - - ctx->bit_depth = sps->bit_depth_luma_minus8 + 8; } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; @@ -324,6 +317,24 @@ static int hantro_vp9_s_ctrl(struct v4l2_ctrl *ctrl) return 0; } +static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct hantro_ctx *ctx; + + ctx = container_of(ctrl->handler, + struct hantro_ctx, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_STATELESS_HEVC_SPS: + ctx->bit_depth = ctrl->p_new.p_hevc_sps->bit_depth_luma_minus8 + 8; + break; + default: + return -EINVAL; + } + + return 0; +} + static const struct v4l2_ctrl_ops hantro_ctrl_ops = { .try_ctrl = hantro_try_ctrl, }; @@ -336,6 +347,11 @@ static const struct v4l2_ctrl_ops hantro_vp9_ctrl_ops = { .s_ctrl = hantro_vp9_s_ctrl, }; +static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = { + .try_ctrl = hantro_try_ctrl, + .s_ctrl = hantro_hevc_s_ctrl, +}; + #define HANTRO_JPEG_ACTIVE_MARKERS (V4L2_JPEG_ACTIVE_MARKER_APP0 | \ V4L2_JPEG_ACTIVE_MARKER_COM | \ V4L2_JPEG_ACTIVE_MARKER_DQT | \ @@ -470,7 +486,7 @@ static const struct hantro_ctrl controls[] = { .codec = HANTRO_HEVC_DECODER, .cfg = { .id = V4L2_CID_STATELESS_HEVC_SPS, - .ops = &hantro_ctrl_ops, + .ops = &hantro_hevc_ctrl_ops, }, }, { .codec = HANTRO_HEVC_DECODER, From patchwork Tue Jan 31 13:03:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 649082 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65AFDC636D3 for ; Tue, 31 Jan 2023 13:03:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231760AbjAaNDw (ORCPT ); Tue, 31 Jan 2023 08:03:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231405AbjAaNDr (ORCPT ); Tue, 31 Jan 2023 08:03:47 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7ECF710A93; Tue, 31 Jan 2023 05:03:45 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d507:461a:a036:bf89]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id DD19A6602EFF; Tue, 31 Jan 2023 13:03:43 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675170224; bh=I1HrjzpS56XtS/NAaWosB1e94rJ1/sfjPhFmKZRNmCU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=os8XnTyGXxrC6EJfpc+s8KsLwBYH8cDI0HXO+Xcdl0leIIJbFVGH7qAEg6x8OjgqG +7cw6cpU/CDSt2MG3MINWEZHnwabnp0sEAha8XY0iw8AgUVCW36kFLr6vBYn35Te2q wNBFwavGYYa0FBOwatSKIc+GrDCdsBVGuEgmxlDXzMJB49jxfkKPWOhaNKi5jxcfm+ BA7xyhY9eVfCL6cDwDs7k5boSncUGqVW6YDFIgRiIWu0tuz3CaVDjkNGrXzYXiIW7G qSqlyITQ+q9NZrHJpiBF4ZLzamdJ8D3+o3jcQxyaIGESsJRugkTNzMcUeir/BWYri2 UnPzE2H8ZfF9Q== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard , Nicolas Dufresne Subject: [PATCH v7 4/5] media: verisilicon: Do not change context bit depth before validating the format Date: Tue, 31 Jan 2023 14:03:26 +0100 Message-Id: <20230131130327.776899-5-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230131130327.776899-1-benjamin.gaignard@collabora.com> References: <20230131130327.776899-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org It is needed to check if the proposed pixels format is valid before updating context bit depth and other internal states. Stop using ctx->bit_depth to check format depth match and return result to the caller. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard Reviewed-by: Nicolas Dufresne --- version 7: - Change HANTRO_DEFAULT_BIT_DEPTH value to 8. - Simplify hantro_check_depth_match logic. - Keep ctx->bit_depth as integer value because it is use to compute buffers size for hevc. .../platform/verisilicon/hantro_postproc.c | 2 +- .../media/platform/verisilicon/hantro_v4l2.c | 45 ++++++++++--------- .../media/platform/verisilicon/hantro_v4l2.h | 3 +- 3 files changed, 26 insertions(+), 24 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_postproc.c b/drivers/media/platform/verisilicon/hantro_postproc.c index 09d8cf942689..6437423ccf3a 100644 --- a/drivers/media/platform/verisilicon/hantro_postproc.c +++ b/drivers/media/platform/verisilicon/hantro_postproc.c @@ -197,7 +197,7 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) unsigned int i, buf_size; /* this should always pick native format */ - fmt = hantro_get_default_fmt(ctx, false); + fmt = hantro_get_default_fmt(ctx, false, ctx->bit_depth); if (!fmt) return -EINVAL; v4l2_fill_pixfmt_mp(&pix_mp, fmt->fourcc, ctx->src_fmt.width, diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c index e60151a8a401..6c5f4351b257 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.c +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c @@ -28,6 +28,8 @@ #include "hantro_hw.h" #include "hantro_v4l2.h" +#define HANTRO_DEFAULT_BIT_DEPTH 0 + static int hantro_set_fmt_out(struct hantro_ctx *ctx, struct v4l2_pix_format_mplane *pix_mp); static int hantro_set_fmt_cap(struct hantro_ctx *ctx, @@ -76,17 +78,16 @@ int hantro_get_format_depth(u32 fourcc) } static bool -hantro_check_depth_match(const struct hantro_ctx *ctx, - const struct hantro_fmt *fmt) +hantro_check_depth_match(const struct hantro_fmt *fmt, int bit_depth) { - int fmt_depth, ctx_depth = 8; + int fmt_depth, depth = 8; if (!fmt->match_depth && !fmt->postprocessed) return true; /* 0 means default depth, which is 8 */ - if (ctx->bit_depth) - ctx_depth = ctx->bit_depth; + if (bit_depth) + depth = bit_depth; fmt_depth = hantro_get_format_depth(fmt->fourcc); @@ -95,9 +96,9 @@ hantro_check_depth_match(const struct hantro_ctx *ctx, * It may be possible to relax that on some HW. */ if (!fmt->match_depth) - return fmt_depth <= ctx_depth; + return fmt_depth <= depth; - return fmt_depth == ctx_depth; + return fmt_depth == depth; } static const struct hantro_fmt * @@ -119,7 +120,7 @@ hantro_find_format(const struct hantro_ctx *ctx, u32 fourcc) } const struct hantro_fmt * -hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) +hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream, int bit_depth) { const struct hantro_fmt *formats; unsigned int i, num_fmts; @@ -128,7 +129,7 @@ hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) for (i = 0; i < num_fmts; i++) { if (bitstream == (formats[i].codec_mode != HANTRO_MODE_NONE) && - hantro_check_depth_match(ctx, &formats[i])) + hantro_check_depth_match(&formats[i], bit_depth)) return &formats[i]; } return NULL; @@ -203,7 +204,7 @@ static int vidioc_enum_fmt(struct file *file, void *priv, if (skip_mode_none == mode_none) continue; - if (!hantro_check_depth_match(ctx, fmt)) + if (!hantro_check_depth_match(fmt, ctx->bit_depth)) continue; if (j == f->index) { f->pixelformat = fmt->fourcc; @@ -223,7 +224,7 @@ static int vidioc_enum_fmt(struct file *file, void *priv, for (i = 0; i < num_fmts; i++) { fmt = &formats[i]; - if (!hantro_check_depth_match(ctx, fmt)) + if (!hantro_check_depth_match(fmt, ctx->bit_depth)) continue; if (j == f->index) { f->pixelformat = fmt->fourcc; @@ -291,7 +292,7 @@ static int hantro_try_fmt(const struct hantro_ctx *ctx, fmt = hantro_find_format(ctx, pix_mp->pixelformat); if (!fmt) { - fmt = hantro_get_default_fmt(ctx, coded); + fmt = hantro_get_default_fmt(ctx, coded, HANTRO_DEFAULT_BIT_DEPTH); pix_mp->pixelformat = fmt->fourcc; } @@ -379,7 +380,7 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) const struct hantro_fmt *vpu_fmt; struct v4l2_pix_format_mplane fmt; - vpu_fmt = hantro_get_default_fmt(ctx, true); + vpu_fmt = hantro_get_default_fmt(ctx, true, HANTRO_DEFAULT_BIT_DEPTH); if (!vpu_fmt) return; @@ -392,15 +393,15 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx) hantro_set_fmt_out(ctx, &fmt); } -static void -hantro_reset_raw_fmt(struct hantro_ctx *ctx) +int +hantro_reset_raw_fmt(struct hantro_ctx *ctx, int bit_depth) { const struct hantro_fmt *raw_vpu_fmt; struct v4l2_pix_format_mplane raw_fmt, *encoded_fmt; - raw_vpu_fmt = hantro_get_default_fmt(ctx, false); + raw_vpu_fmt = hantro_get_default_fmt(ctx, false, bit_depth); if (!raw_vpu_fmt) - return; + return -EINVAL; if (ctx->is_encoder) encoded_fmt = &ctx->dst_fmt; @@ -411,15 +412,15 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx) raw_fmt.width = encoded_fmt->width; raw_fmt.height = encoded_fmt->height; if (ctx->is_encoder) - hantro_set_fmt_out(ctx, &raw_fmt); + return hantro_set_fmt_out(ctx, &raw_fmt); else - hantro_set_fmt_cap(ctx, &raw_fmt); + return hantro_set_fmt_cap(ctx, &raw_fmt); } void hantro_reset_fmts(struct hantro_ctx *ctx) { hantro_reset_encoded_fmt(ctx); - hantro_reset_raw_fmt(ctx); + hantro_reset_raw_fmt(ctx, HANTRO_DEFAULT_BIT_DEPTH); } static void @@ -519,7 +520,7 @@ static int hantro_set_fmt_out(struct hantro_ctx *ctx, * changes to the raw format. */ if (!ctx->is_encoder) - hantro_reset_raw_fmt(ctx); + hantro_reset_raw_fmt(ctx, hantro_get_format_depth(pix_mp->pixelformat)); /* Colorimetry information are always propagated. */ ctx->dst_fmt.colorspace = pix_mp->colorspace; @@ -582,7 +583,7 @@ static int hantro_set_fmt_cap(struct hantro_ctx *ctx, * changes to the raw format. */ if (ctx->is_encoder) - hantro_reset_raw_fmt(ctx); + hantro_reset_raw_fmt(ctx, HANTRO_DEFAULT_BIT_DEPTH); /* Colorimetry information are always propagated. */ ctx->src_fmt.colorspace = pix_mp->colorspace; diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.h b/drivers/media/platform/verisilicon/hantro_v4l2.h index 64f6f57e9d7a..9ea2fef57dcd 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.h +++ b/drivers/media/platform/verisilicon/hantro_v4l2.h @@ -21,9 +21,10 @@ extern const struct v4l2_ioctl_ops hantro_ioctl_ops; extern const struct vb2_ops hantro_queue_ops; +int hantro_reset_raw_fmt(struct hantro_ctx *ctx, int bit_depth); void hantro_reset_fmts(struct hantro_ctx *ctx); int hantro_get_format_depth(u32 fourcc); const struct hantro_fmt * -hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream); +hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream, int bit_depth); #endif /* HANTRO_V4L2_H_ */ From patchwork Tue Jan 31 13:03:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 650788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 684B8C636CC for ; Tue, 31 Jan 2023 13:03:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231812AbjAaNDx (ORCPT ); Tue, 31 Jan 2023 08:03:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38620 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231706AbjAaNDs (ORCPT ); Tue, 31 Jan 2023 08:03:48 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 502FFC660; Tue, 31 Jan 2023 05:03:47 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d507:461a:a036:bf89]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 659926602F21; Tue, 31 Jan 2023 13:03:44 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1675170224; bh=2u7fYNspq4vzaXs20IC2PfPMx0Y7wxGqqAi7GFh5rb8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TVi0DKWN+e6robHpeRsNMOV9qA0For7LI7lGpnHIxkS3Xo/TM2sCOrrIDEaMWd+LH XIEm7EVsko8vA6ZycMESIyn8I65XfGN760QZ6fBjDmmwFL9Wk+Pt4RmcGzIHtYBzH0 AURtbstu4ImAVNcYaY5Fjk1LX3cr3H11tuc7pKl7OCBitLbu7AIziQhUkyXaEq86F9 QlZFnxLH6lHS8ncAQY+7fRNzhMLDpRMZ57BNedbXnUCBZHDxWAHcUrD2S0mnE8IRw4 tza7r2t7YpE5J35+wzkpAaLdKQVJGGzf63VGShB0oVNkK27g54m1NSXBO5okudN1oA 5ayfdKUO5hpfA== From: Benjamin Gaignard To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, mchehab@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.co.uk Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard , Nicolas Dufresne Subject: [PATCH v7 5/5] media: verisilicon: HEVC: Only propose 10 bits compatible pixels formats Date: Tue, 31 Jan 2023 14:03:27 +0100 Message-Id: <20230131130327.776899-6-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230131130327.776899-1-benjamin.gaignard@collabora.com> References: <20230131130327.776899-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org When decoding a 10bits bitstreams HEVC driver should only expose 10bits pixel formats. To fulfill this requirement it is needed to call hantro_reset_raw_fmt() when bit depth change and to correctly set match_depth in pixel formats enumeration. Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding") Signed-off-by: Benjamin Gaignard Reviewed-by: Nicolas Dufresne --- .../media/platform/verisilicon/hantro_drv.c | 11 ++++++++-- .../media/platform/verisilicon/hantro_v4l2.c | 22 ++++++++++--------- .../media/platform/verisilicon/imx8m_vpu_hw.c | 2 ++ 3 files changed, 23 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index 6d8bc55ea627..fa31b200b097 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -326,8 +326,15 @@ static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl) switch (ctrl->id) { case V4L2_CID_STATELESS_HEVC_SPS: - ctx->bit_depth = ctrl->p_new.p_hevc_sps->bit_depth_luma_minus8 + 8; - break; + { + const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; + int bit_depth = sps->bit_depth_luma_minus8 + 8; + + if (ctx->bit_depth == bit_depth) + return 0; + + return hantro_reset_raw_fmt(ctx, bit_depth); + } default: return -EINVAL; } diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c index 6c5f4351b257..7c9a04171b45 100644 --- a/drivers/media/platform/verisilicon/hantro_v4l2.c +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c @@ -28,7 +28,7 @@ #include "hantro_hw.h" #include "hantro_v4l2.h" -#define HANTRO_DEFAULT_BIT_DEPTH 0 +#define HANTRO_DEFAULT_BIT_DEPTH 8 static int hantro_set_fmt_out(struct hantro_ctx *ctx, struct v4l2_pix_format_mplane *pix_mp); @@ -80,15 +80,11 @@ int hantro_get_format_depth(u32 fourcc) static bool hantro_check_depth_match(const struct hantro_fmt *fmt, int bit_depth) { - int fmt_depth, depth = 8; + int fmt_depth; if (!fmt->match_depth && !fmt->postprocessed) return true; - /* 0 means default depth, which is 8 */ - if (bit_depth) - depth = bit_depth; - fmt_depth = hantro_get_format_depth(fmt->fourcc); /* @@ -96,9 +92,9 @@ hantro_check_depth_match(const struct hantro_fmt *fmt, int bit_depth) * It may be possible to relax that on some HW. */ if (!fmt->match_depth) - return fmt_depth <= depth; + return fmt_depth <= bit_depth; - return fmt_depth == depth; + return fmt_depth == bit_depth; } static const struct hantro_fmt * @@ -398,6 +394,7 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx, int bit_depth) { const struct hantro_fmt *raw_vpu_fmt; struct v4l2_pix_format_mplane raw_fmt, *encoded_fmt; + int ret; raw_vpu_fmt = hantro_get_default_fmt(ctx, false, bit_depth); if (!raw_vpu_fmt) @@ -412,9 +409,14 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx, int bit_depth) raw_fmt.width = encoded_fmt->width; raw_fmt.height = encoded_fmt->height; if (ctx->is_encoder) - return hantro_set_fmt_out(ctx, &raw_fmt); + ret = hantro_set_fmt_out(ctx, &raw_fmt); else - return hantro_set_fmt_cap(ctx, &raw_fmt); + ret = hantro_set_fmt_cap(ctx, &raw_fmt); + + if (!ret) + ctx->bit_depth = bit_depth; + + return ret; } void hantro_reset_fmts(struct hantro_ctx *ctx) diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c index b390228fd3b4..f850d8bddef6 100644 --- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c +++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c @@ -152,6 +152,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_NV12, .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, .postprocessed = true, .frmsize = { .min_width = FMT_MIN_WIDTH, @@ -165,6 +166,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_P010, .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, .postprocessed = true, .frmsize = { .min_width = FMT_MIN_WIDTH,