From patchwork Mon Jan 30 12:06:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 649242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A5486C54EED for ; Mon, 30 Jan 2023 12:09:45 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 6C3AF82B; Mon, 30 Jan 2023 13:08:53 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 6C3AF82B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1675080583; bh=v/tEkZndHLSFZQ+dXZe20waQvOgf9abYz/CSFTYQntc=; h=From:To:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: Cc:From; b=QHou/xJBDmI3teJTVLOtkGiZ+PzJMsdfGISrQBc7bNYSDko2Oh0W4dCX5PP1Phpvl jawpJT3kVTVPm+ucK3HpF2oiXbeRVAmMPo9hMQ/V3pfeqbXrOZuKrb4ntxanGC02UF efTMGWfJsALxJdKc7MaZ7p4jpSjbj/1d6we+z0kg= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id E481FF8055B; Mon, 30 Jan 2023 13:07:53 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id A8D44F80553; Mon, 30 Jan 2023 13:07:52 +0100 (CET) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 08452F8047D for ; Mon, 30 Jan 2023 13:07:32 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 08452F8047D Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=tgpxk4sH DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080455; x=1706616455; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=v/tEkZndHLSFZQ+dXZe20waQvOgf9abYz/CSFTYQntc=; b=tgpxk4sHI8SS0knvMmM1p08dpP1r6Zql+MmwI5qT58gXxdoEV7gtEL9q 1lGj1CZHD7KheRLdTu58cAZjirtysSSZw8Un9k+t2VOjNqwHZAJfaJztF 826ikpqLVO9tq6TGp15mvQwnHAs9QhE4kE4u2knnLd/0SyEmhMkSjz1bZ RBWFPK1AQjrIt7JIuj600zM6Fd+SME0YnK/WtjIo6ySntqnVDDfXrvhp+ rxC9RUefERVgjJvC35GEIplGlLymOx+Rt+8KOns73J28Cr+Kx8UpnmQ/U oQN6ehGNxrA2txBKXmdhRj55pv8lVNJwr8kT32wlx7VpUJ9lBSD/m7vhc w==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="194432936" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:26 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:24 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:20 -0700 From: Claudiu Beznea To: , , , , , Subject: [PATCH 1/8] ASoC: mchp-spdifrx: fix controls which rely on rsr register Date: Mon, 30 Jan 2023 14:06:40 +0200 Message-ID: <20230130120647.638049-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" The SPDIFRX block is clocked by 2 clocks: peripheral and generic clocks. Peripheral clock feeds user interface (registers) and generic clock feeds the receiver. To enable the receiver the generic clock needs to be enabled and also the ENABLE bit of MCHP_SPDIFRX_MR register need to be set. The signal control exported by mchp-spdifrx driver reports wrong status when the receiver is disabled. This can happen when requesting the signal and the capture was not previously started. To solve this the receiver needs to be enabled (by enabling generic clock and setting ENABLE bit of MR register) before reading the signal status. As with this fix there are 2 paths now that need to control the generic clock and ENABLE bit of SPDIFRX_MR register (one path though controls, one path though configuration) a mutex has been introduced. We can't rely on subsystem locking as the controls are protected by struct snd_card::controls_rwsem semaphore and configuration is protected by a different lock (embedded in snd_pcm_stream_lock_irq()). The introduction of mutex is also extended to other controls which rely on SPDIFRX_RSR.ULOCK bit as it has been discovered experimentally that having both clocks enabled but not the receiver (through ENABLE bit of SPDIFRX.MR) leads to inconsistent values of SPDIFRX_RSR.ULOCK. Thus on some controls we rely on software state (dev->trigger_enabled protected by mutex) to retrieve proper values. Fixes: ef265c55c1ac ("ASoC: mchp-spdifrx: add driver for SPDIF RX") Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 192 ++++++++++++++++++++++++--------- 1 file changed, 142 insertions(+), 50 deletions(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index ec0705cc40fa..2d86e0ec930f 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -233,11 +233,13 @@ struct mchp_spdifrx_dev { struct mchp_spdifrx_mixer_control control; spinlock_t blockend_lock; /* protect access to blockend_refcount */ int blockend_refcount; + struct mutex mlock; struct device *dev; struct regmap *regmap; struct clk *pclk; struct clk *gclk; unsigned int fmt; + unsigned int trigger_enabled; unsigned int gclk_enabled:1; }; @@ -353,47 +355,40 @@ static int mchp_spdifrx_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); - u32 mr; - int running; - int ret; - - regmap_read(dev->regmap, SPDIFRX_MR, &mr); - running = !!(mr & SPDIFRX_MR_RXEN_ENABLE); + int ret = 0; switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - if (!running) { - mr &= ~SPDIFRX_MR_RXEN_MASK; - mr |= SPDIFRX_MR_RXEN_ENABLE; - /* enable overrun interrupts */ - regmap_write(dev->regmap, SPDIFRX_IER, - SPDIFRX_IR_OVERRUN); - } + mutex_lock(&dev->mlock); + /* Enable overrun interrupts */ + regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_OVERRUN); + + /* Enable receiver. */ + regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, + SPDIFRX_MR_RXEN_ENABLE); + dev->trigger_enabled = true; + mutex_unlock(&dev->mlock); break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - if (running) { - mr &= ~SPDIFRX_MR_RXEN_MASK; - mr |= SPDIFRX_MR_RXEN_DISABLE; - /* disable overrun interrupts */ - regmap_write(dev->regmap, SPDIFRX_IDR, - SPDIFRX_IR_OVERRUN); - } + mutex_lock(&dev->mlock); + /* Disable overrun interrupts */ + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_OVERRUN); + + /* Disable receiver. */ + regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, + SPDIFRX_MR_RXEN_DISABLE); + dev->trigger_enabled = false; + mutex_unlock(&dev->mlock); break; default: - return -EINVAL; + ret = -EINVAL; } - ret = regmap_write(dev->regmap, SPDIFRX_MR, mr); - if (ret) { - dev_err(dev->dev, "unable to enable/disable RX: %d\n", ret); - return ret; - } - - return 0; + return ret; } static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, @@ -413,13 +408,6 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } - regmap_read(dev->regmap, SPDIFRX_MR, &mr); - - if (mr & SPDIFRX_MR_RXEN_ENABLE) { - dev_err(dev->dev, "PCM already running\n"); - return -EBUSY; - } - if (params_channels(params) != SPDIFRX_CHANNELS) { dev_err(dev->dev, "unsupported number of channels: %d\n", params_channels(params)); @@ -445,6 +433,13 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } + mutex_lock(&dev->mlock); + if (dev->trigger_enabled) { + dev_err(dev->dev, "PCM already running\n"); + ret = -EBUSY; + goto unlock; + } + if (dev->gclk_enabled) { clk_disable_unprepare(dev->gclk); dev->gclk_enabled = 0; @@ -455,19 +450,24 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, dev_err(dev->dev, "unable to set gclk min rate: rate %u * ratio %u + 1\n", params_rate(params), SPDIFRX_GCLK_RATIO_MIN); - return ret; + goto unlock; } ret = clk_prepare_enable(dev->gclk); if (ret) { dev_err(dev->dev, "unable to enable gclk: %d\n", ret); - return ret; + goto unlock; } dev->gclk_enabled = 1; dev_dbg(dev->dev, "GCLK range min set to %d\n", params_rate(params) * SPDIFRX_GCLK_RATIO_MIN + 1); - return regmap_write(dev->regmap, SPDIFRX_MR, mr); + ret = regmap_write(dev->regmap, SPDIFRX_MR, mr); + +unlock: + mutex_unlock(&dev->mlock); + + return ret; } static int mchp_spdifrx_hw_free(struct snd_pcm_substream *substream, @@ -475,10 +475,12 @@ static int mchp_spdifrx_hw_free(struct snd_pcm_substream *substream, { struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); + mutex_lock(&dev->mlock); if (dev->gclk_enabled) { clk_disable_unprepare(dev->gclk); dev->gclk_enabled = 0; } + mutex_unlock(&dev->mlock); return 0; } @@ -627,10 +629,24 @@ static int mchp_spdifrx_ulock_get(struct snd_kcontrol *kcontrol, u32 val; bool ulock_old = ctrl->ulock; - regmap_read(dev->regmap, SPDIFRX_RSR, &val); - ctrl->ulock = !(val & SPDIFRX_RSR_ULOCK); + mutex_lock(&dev->mlock); + + /* + * The RSR.ULOCK has wrong value if both pclk and gclk are enabled + * and the receiver is disabled. Thus we take into account the + * dev->trigger_enabled here to return a real status. + */ + if (dev->trigger_enabled) { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + ctrl->ulock = !(val & SPDIFRX_RSR_ULOCK); + } else { + ctrl->ulock = 0; + } + uvalue->value.integer.value[0] = ctrl->ulock; + mutex_unlock(&dev->mlock); + return ulock_old != ctrl->ulock; } @@ -643,8 +659,22 @@ static int mchp_spdifrx_badf_get(struct snd_kcontrol *kcontrol, u32 val; bool badf_old = ctrl->badf; - regmap_read(dev->regmap, SPDIFRX_RSR, &val); - ctrl->badf = !!(val & SPDIFRX_RSR_BADF); + mutex_lock(&dev->mlock); + + /* + * The RSR.ULOCK has wrong value if both pclk and gclk are enabled + * and the receiver is disabled. Thus we take into account the + * dev->trigger_enabled here to return a real status. + */ + if (dev->trigger_enabled) { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + ctrl->badf = !!(val & SPDIFRX_RSR_BADF); + } else { + ctrl->badf = 0; + } + + mutex_unlock(&dev->mlock); + uvalue->value.integer.value[0] = ctrl->badf; return badf_old != ctrl->badf; @@ -656,11 +686,48 @@ static int mchp_spdifrx_signal_get(struct snd_kcontrol *kcontrol, struct snd_soc_dai *dai = snd_kcontrol_chip(kcontrol); struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); struct mchp_spdifrx_mixer_control *ctrl = &dev->control; - u32 val; + u32 val = ~0U, loops = 10; + int ret; bool signal_old = ctrl->signal; - regmap_read(dev->regmap, SPDIFRX_RSR, &val); - ctrl->signal = !(val & SPDIFRX_RSR_NOSIGNAL); + mutex_lock(&dev->mlock); + + /* + * To get the signal we need to have receiver enabled. This + * could be enabled also from trigger() function thus we need to + * take care of not disabling the receiver when it runs. + */ + if (!dev->trigger_enabled) { + ret = clk_prepare_enable(dev->gclk); + if (ret) + goto unlock; + + regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, + SPDIFRX_MR_RXEN_ENABLE); + + /* Wait for RSR.ULOCK bit. */ + while (--loops) { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + if (!(val & SPDIFRX_RSR_ULOCK)) + break; + usleep_range(100, 150); + } + + regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, + SPDIFRX_MR_RXEN_DISABLE); + + clk_disable_unprepare(dev->gclk); + } else { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + } + +unlock: + mutex_unlock(&dev->mlock); + + if (!(val & SPDIFRX_RSR_ULOCK)) + ctrl->signal = !(val & SPDIFRX_RSR_NOSIGNAL); + else + ctrl->signal = 0; uvalue->value.integer.value[0] = ctrl->signal; return signal_old != ctrl->signal; @@ -685,18 +752,32 @@ static int mchp_spdifrx_rate_get(struct snd_kcontrol *kcontrol, u32 val; int rate; - regmap_read(dev->regmap, SPDIFRX_RSR, &val); - - /* if the receiver is not locked, ISF data is invalid */ - if (val & SPDIFRX_RSR_ULOCK || !(val & SPDIFRX_RSR_IFS_MASK)) { + mutex_lock(&dev->mlock); + + /* + * The RSR.ULOCK has wrong value if both pclk and gclk are enabled + * and the receiver is disabled. Thus we take into account the + * dev->trigger_enabled here to return a real status. + */ + if (dev->trigger_enabled) { + regmap_read(dev->regmap, SPDIFRX_RSR, &val); + /* If the receiver is not locked, ISF data is invalid. */ + if (val & SPDIFRX_RSR_ULOCK || !(val & SPDIFRX_RSR_IFS_MASK)) { + ucontrol->value.integer.value[0] = 0; + goto unlock; + } + } else { + /* Reveicer is not locked, IFS data is invalid. */ ucontrol->value.integer.value[0] = 0; - return 0; + goto unlock; } rate = clk_get_rate(dev->gclk); ucontrol->value.integer.value[0] = rate / (32 * SPDIFRX_RSR_IFS(val)); +unlock: + mutex_unlock(&dev->mlock); return 0; } @@ -913,7 +994,18 @@ static int mchp_spdifrx_probe(struct platform_device *pdev) "failed to get the PMC generated clock: %d\n", err); return err; } + + /* + * Signal control need a valid rate on gclk. hw_params() configures + * it propertly but requesting signal before any hw_params() has been + * called lead to invalid value returned for signal. Thus, configure + * gclk at a valid rate, here, in initialization, to simplify the + * control path. + */ + clk_set_min_rate(dev->gclk, 48000 * SPDIFRX_GCLK_RATIO_MIN + 1); + spin_lock_init(&dev->blockend_lock); + mutex_init(&dev->mlock); dev->dev = &pdev->dev; dev->regmap = regmap; From patchwork Mon Jan 30 12:06:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 648649 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B8D64C54EED for ; Mon, 30 Jan 2023 12:08:52 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 383D1E9D; Mon, 30 Jan 2023 13:08:00 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 383D1E9D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1675080530; bh=rU46NQL4hbbHQR9L/65OOymuaCyWdxogbhBIy2BOVDA=; h=From:To:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: Cc:From; b=iUA3ZoOu77DeEMPu0nGIaFdIeu81hBmBHXdzMPaXmAf/Dexa4YDJK2C8P0ltXCtm7 QV/rzXXDr0aPyyv/1W4/1VTW2cyYZV0IZT8oH/+gSgzMhStFcNVTarLOzbVKdMmw8z fi/YxXhOP0XzaujFvjtqRqrAM5MsFUKzDv5XdUjU= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 3FBD2F80423; Mon, 30 Jan 2023 13:07:38 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 4E908F80494; Mon, 30 Jan 2023 13:07:36 +0100 (CET) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 0418AF80236 for ; Mon, 30 Jan 2023 13:07:31 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 0418AF80236 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=ad8rE9hx DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080453; x=1706616453; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rU46NQL4hbbHQR9L/65OOymuaCyWdxogbhBIy2BOVDA=; b=ad8rE9hx1zTTIZNrTtFrcu8uP/60ISLuoEFS+/OwUWfS3rR47s17GwtP +fOJLSTa25I02noCI9sn+iNJN9pLrPwN8M+bWcYA9FQL5ebhDuJnNUtYA huNdEVHflr9V4B9HZJNH2UEK58cHLZQLNlYHuwQBzXfxY8RlkB467RBZ2 +JO7w9n0+GjCQ+L0+EhvBC7hp7xzybTAgEGZ5GD4gFhOlGuPG80vbg6DL i/UXgHMqtwFL27N/X4vxkt2wd0HbExnvPymc+K7V0iBltIhvNUsnQWGBX rHMAFgYT3DyW/jXNMwzN2pX4AqWih2Y9JMhXvcrOM4B03h6ejNHlmDp0N A==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="197975239" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:28 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:28 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:24 -0700 From: Claudiu Beznea To: , , , , , Subject: [PATCH 2/8] ASoC: mchp-spdifrx: fix return value in case completion times out Date: Mon, 30 Jan 2023 14:06:41 +0200 Message-ID: <20230130120647.638049-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" wait_for_completion_interruptible_timeout() returns 0 in case of timeout. Check this into account when returning from function. Fixes: ef265c55c1ac ("ASoC: mchp-spdifrx: add driver for SPDIF RX") Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 2d86e0ec930f..7f359371b31b 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -524,9 +524,10 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev *dev, ret = wait_for_completion_interruptible_timeout(&ch_stat->done, msecs_to_jiffies(100)); /* IP might not be started or valid stream might not be present */ - if (ret < 0) { + if (ret <= 0) { dev_dbg(dev->dev, "channel status for channel %d timeout\n", channel); + return ret ? : -ETIMEDOUT; } memcpy(uvalue->value.iec958.status, ch_stat->data, @@ -580,7 +581,7 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdifrx_dev *dev, dev_dbg(dev->dev, "user data for channel %d timeout\n", channel); mchp_spdifrx_isr_blockend_dis(dev); - return ret; + return ret ? : -ETIMEDOUT; } spin_lock_irqsave(&user_data->lock, flags); From patchwork Mon Jan 30 12:06:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 648648 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9FF4FC54EED for ; Mon, 30 Jan 2023 12:09:24 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 8F4EEEBB; Mon, 30 Jan 2023 13:08:32 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 8F4EEEBB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1675080562; bh=zxwq9uIaU8bzolvs0Ucl4pALHPjSjFBI0eSgfnpCcZo=; h=From:To:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: Cc:From; b=rBBBZHCFv4rTJYPJoXaamcxjHWOiqPCPOiu5StBHQnwDURfEvCO2lXzQxiXLVv0T7 DJlx4oHgIEBiMAVPrE8NT5zEGSWJuPfh7nIvA8C7wXadw8KG8bI3IvO9RjRJzCEKwO +Z/I/oDr2I5Nd1DVluprLVX4a4Mlt9+UTmc2hlOQ= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 8C644F80548; Mon, 30 Jan 2023 13:07:50 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id F294DF80549; Mon, 30 Jan 2023 13:07:46 +0100 (CET) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id EA1CDF80496 for ; Mon, 30 Jan 2023 13:07:37 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz EA1CDF80496 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=oDtadSuG DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080460; x=1706616460; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zxwq9uIaU8bzolvs0Ucl4pALHPjSjFBI0eSgfnpCcZo=; b=oDtadSuG9FNnPAPo5yvGKeiEJeKcz6uIuGOjyWoPykEuZNSRiIriwJht Akc65QT2Kza5zX+TKUMzLpj2pL9rBHC0NX4+HARY7/9VsopDyVtgIEy3N IrErcviDzdAC+v4U8lE8h8olJ9RNl7GwL0qLoSsiz+bMWOQ7LyNXBSb9c HJmiMBIKz77srBgMywbuXP9L5+WOSc06bCPsn0Nro0yWogoWjf79xO7uC UKhvoRpSAvBy2Z6kclKO1rQ1Mk+zuSP2fvmkmzrH+v8R2L4AdUlIsxsN+ TGwddijGWT4k7rpGdvPrAN2oeGIuZpVRv0XwPe/tIiUo0yCdAAaLIZSB+ w==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="134605293" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:34 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:32 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:28 -0700 From: Claudiu Beznea To: , , , , , Subject: [PATCH 3/8] ASoC: mchp-spdifrx: fix controls that works with completion mechanism Date: Mon, 30 Jan 2023 14:06:42 +0200 Message-ID: <20230130120647.638049-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Channel status get and channel subcode get controls relies on data returned by controls when certain IRQs are raised. To achieve that completions are used b/w controls and interrupt service routine. The concurrent accesses to these controls are protected by struct snd_card::controls_rwsem. Issues identified: - reinit_completion() may be called while waiting for completion which should be avoided - in case of multiple threads waiting, the complete() call in interrupt will signal only one waiting thread per interrupt which may lead to timeout for the others - in case of channel status get as the CSC interrupt is not refcounted ISR may disable interrupt for threads that were just enabled it. To solve these the access to controls were protected by a mutex. Along with this there is no need for spinlock to protect the software cache reads/updates b/w controls and ISR as the update is happening only when requested from control, and only one reader can reach the control. Fixes: ef265c55c1ac ("ASoC: mchp-spdifrx: add driver for SPDIF RX") Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 143 ++++++++++++++++++--------------- 1 file changed, 77 insertions(+), 66 deletions(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 7f359371b31b..31ffaaf46dec 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -217,7 +217,6 @@ struct mchp_spdifrx_ch_stat { struct mchp_spdifrx_user_data { unsigned char data[SPDIFRX_UD_BITS / 8]; struct completion done; - spinlock_t lock; /* protect access to user data */ }; struct mchp_spdifrx_mixer_control { @@ -231,8 +230,6 @@ struct mchp_spdifrx_mixer_control { struct mchp_spdifrx_dev { struct snd_dmaengine_dai_dma_data capture; struct mchp_spdifrx_mixer_control control; - spinlock_t blockend_lock; /* protect access to blockend_refcount */ - int blockend_refcount; struct mutex mlock; struct device *dev; struct regmap *regmap; @@ -277,37 +274,11 @@ static void mchp_spdifrx_channel_user_data_read(struct mchp_spdifrx_dev *dev, } } -/* called from non-atomic context only */ -static void mchp_spdifrx_isr_blockend_en(struct mchp_spdifrx_dev *dev) -{ - unsigned long flags; - - spin_lock_irqsave(&dev->blockend_lock, flags); - dev->blockend_refcount++; - /* don't enable BLOCKEND interrupt if it's already enabled */ - if (dev->blockend_refcount == 1) - regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_BLOCKEND); - spin_unlock_irqrestore(&dev->blockend_lock, flags); -} - -/* called from atomic/non-atomic context */ -static void mchp_spdifrx_isr_blockend_dis(struct mchp_spdifrx_dev *dev) -{ - unsigned long flags; - - spin_lock_irqsave(&dev->blockend_lock, flags); - dev->blockend_refcount--; - /* don't enable BLOCKEND interrupt if it's already enabled */ - if (dev->blockend_refcount == 0) - regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND); - spin_unlock_irqrestore(&dev->blockend_lock, flags); -} - static irqreturn_t mchp_spdif_interrupt(int irq, void *dev_id) { struct mchp_spdifrx_dev *dev = dev_id; struct mchp_spdifrx_mixer_control *ctrl = &dev->control; - u32 sr, imr, pending, idr = 0; + u32 sr, imr, pending; irqreturn_t ret = IRQ_NONE; int ch; @@ -322,13 +293,10 @@ static irqreturn_t mchp_spdif_interrupt(int irq, void *dev_id) if (pending & SPDIFRX_IR_BLOCKEND) { for (ch = 0; ch < SPDIFRX_CHANNELS; ch++) { - spin_lock(&ctrl->user_data[ch].lock); mchp_spdifrx_channel_user_data_read(dev, ch); - spin_unlock(&ctrl->user_data[ch].lock); - complete(&ctrl->user_data[ch].done); } - mchp_spdifrx_isr_blockend_dis(dev); + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND); ret = IRQ_HANDLED; } @@ -336,7 +304,7 @@ static irqreturn_t mchp_spdif_interrupt(int irq, void *dev_id) if (pending & SPDIFRX_IR_CSC(ch)) { mchp_spdifrx_channel_status_read(dev, ch); complete(&ctrl->ch_stat[ch].done); - idr |= SPDIFRX_IR_CSC(ch); + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_CSC(ch)); ret = IRQ_HANDLED; } } @@ -346,8 +314,6 @@ static irqreturn_t mchp_spdif_interrupt(int irq, void *dev_id) ret = IRQ_HANDLED; } - regmap_write(dev->regmap, SPDIFRX_IDR, idr); - return ret; } @@ -517,23 +483,51 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev *dev, { struct mchp_spdifrx_mixer_control *ctrl = &dev->control; struct mchp_spdifrx_ch_stat *ch_stat = &ctrl->ch_stat[channel]; - int ret; + int ret = 0; + + mutex_lock(&dev->mlock); - regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_CSC(channel)); - /* check for new data available */ - ret = wait_for_completion_interruptible_timeout(&ch_stat->done, - msecs_to_jiffies(100)); - /* IP might not be started or valid stream might not be present */ - if (ret <= 0) { - dev_dbg(dev->dev, "channel status for channel %d timeout\n", - channel); - return ret ? : -ETIMEDOUT; + /* + * We may reach this point with both clocks enabled but the receiver + * still disabled. To void waiting for completion and return with + * timeout check the dev->trigger_enabled. + * + * To retrieve data: + * - if the receiver is enabled CSC IRQ will update the data in software + * caches (ch_stat->data) + * - otherwise we just update it here the software caches with latest + * available information and return it; in this case we don't need + * spin locking as the IRQ is disabled and will not be raised from + * anywhere else. + */ + + if (dev->trigger_enabled) { + reinit_completion(&ch_stat->done); + regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_CSC(channel)); + /* Check for new data available */ + ret = wait_for_completion_interruptible_timeout(&ch_stat->done, + msecs_to_jiffies(100)); + /* Valid stream might not be present */ + if (ret <= 0) { + dev_dbg(dev->dev, "channel status for channel %d timeout\n", + channel); + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_CSC(channel)); + ret = ret ? : -ETIMEDOUT; + goto unlock; + } else { + ret = 0; + } + } else { + /* Update software cache with latest channel status. */ + mchp_spdifrx_channel_status_read(dev, channel); } memcpy(uvalue->value.iec958.status, ch_stat->data, sizeof(ch_stat->data)); - return 0; +unlock: + mutex_unlock(&dev->mlock); + return ret; } static int mchp_spdifrx_cs1_get(struct snd_kcontrol *kcontrol, @@ -567,29 +561,49 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdifrx_dev *dev, int channel, struct snd_ctl_elem_value *uvalue) { - unsigned long flags; struct mchp_spdifrx_mixer_control *ctrl = &dev->control; struct mchp_spdifrx_user_data *user_data = &ctrl->user_data[channel]; - int ret; + int ret = 0; + + mutex_lock(&dev->mlock); + + /* + * We may reach this point with both clocks enabled but the receiver + * still disabled. To void waiting for completion to just timeout we + * check here the dev->trigger_enabled flag. + * + * To retrieve data: + * - if the receiver is enabled we need to wait for blockend IRQ to read + * data to and update it for us in software caches + * - otherwise reading the SPDIFRX_CHUD() registers is enough. + */ - reinit_completion(&user_data->done); - mchp_spdifrx_isr_blockend_en(dev); - ret = wait_for_completion_interruptible_timeout(&user_data->done, - msecs_to_jiffies(100)); - /* IP might not be started or valid stream might not be present */ - if (ret <= 0) { - dev_dbg(dev->dev, "user data for channel %d timeout\n", - channel); - mchp_spdifrx_isr_blockend_dis(dev); - return ret ? : -ETIMEDOUT; + if (dev->trigger_enabled) { + reinit_completion(&user_data->done); + regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_BLOCKEND); + ret = wait_for_completion_interruptible_timeout(&user_data->done, + msecs_to_jiffies(100)); + /* Valid stream might not be present. */ + if (ret <= 0) { + dev_dbg(dev->dev, "user data for channel %d timeout\n", + channel); + regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND); + ret = ret ? : -ETIMEDOUT; + goto unlock; + } else { + ret = 0; + } + } else { + /* Update software cache with last available data. */ + mchp_spdifrx_channel_user_data_read(dev, channel); } - spin_lock_irqsave(&user_data->lock, flags); memcpy(uvalue->value.iec958.subcode, user_data->data, sizeof(user_data->data)); - spin_unlock_irqrestore(&user_data->lock, flags); - return 0; +unlock: + mutex_unlock(&dev->mlock); + return ret; } static int mchp_spdifrx_subcode_ch1_get(struct snd_kcontrol *kcontrol, @@ -890,11 +904,9 @@ static int mchp_spdifrx_dai_probe(struct snd_soc_dai *dai) SPDIFRX_MR_AUTORST_NOACTION | SPDIFRX_MR_PACK_DISABLED); - dev->blockend_refcount = 0; for (ch = 0; ch < SPDIFRX_CHANNELS; ch++) { init_completion(&ctrl->ch_stat[ch].done); init_completion(&ctrl->user_data[ch].done); - spin_lock_init(&ctrl->user_data[ch].lock); } /* Add controls */ @@ -1005,7 +1017,6 @@ static int mchp_spdifrx_probe(struct platform_device *pdev) */ clk_set_min_rate(dev->gclk, 48000 * SPDIFRX_GCLK_RATIO_MIN + 1); - spin_lock_init(&dev->blockend_lock); mutex_init(&dev->mlock); dev->dev = &pdev->dev; From patchwork Mon Jan 30 12:06:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 649243 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1DDF0C54EAA for ; Mon, 30 Jan 2023 12:09:17 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id DC7CEEAE; Mon, 30 Jan 2023 13:08:24 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz DC7CEEAE DKIM-Signature: v=1; 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Mon, 30 Jan 2023 05:07:36 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:33 -0700 From: Claudiu Beznea To: , , , , , Subject: [PATCH 4/8] ASoC: mchp-spdifrx: disable all interrupts in mchp_spdifrx_dai_remove() Date: Mon, 30 Jan 2023 14:06:43 +0200 Message-ID: <20230130120647.638049-5-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" CSC interrupts which might be used in controls are on bits 8 and 9 of SPDIFRX_IDR register. Thus disable all the interrupts that are exported by driver. Fixes: ef265c55c1ac ("ASoC: mchp-spdifrx: add driver for SPDIF RX") Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 31ffaaf46dec..b81fc77728df 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -921,7 +921,7 @@ static int mchp_spdifrx_dai_remove(struct snd_soc_dai *dai) struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); /* Disable interrupts */ - regmap_write(dev->regmap, SPDIFRX_IDR, 0xFF); + regmap_write(dev->regmap, SPDIFRX_IDR, GENMASK(14, 0)); clk_disable_unprepare(dev->pclk); From patchwork Mon Jan 30 12:06:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 648647 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7F565C61DA4 for ; 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X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="134605326" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:52 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:41 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:37 -0700 From: Claudiu Beznea To: , , , , , Subject: [PATCH 5/8] ASoC: mchp-spdifrx: use unsigned long to store clk_get_rate() value Date: Mon, 30 Jan 2023 14:06:44 +0200 Message-ID: <20230130120647.638049-6-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" clk_get_rate() returns an unsigned long. Use a variable of type unsigned long to store it. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index b81fc77728df..90b2fb3a9844 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -764,8 +764,8 @@ static int mchp_spdifrx_rate_get(struct snd_kcontrol *kcontrol, { struct snd_soc_dai *dai = snd_kcontrol_chip(kcontrol); struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); + unsigned long rate; u32 val; - int rate; mutex_lock(&dev->mlock); From patchwork Mon Jan 30 12:06:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 649241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D2C0C54EAA for ; Mon, 30 Jan 2023 12:10:14 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 87BAFEAB; Mon, 30 Jan 2023 13:09:22 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 87BAFEAB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1675080612; bh=wy5L39BFMKrQQvzhCUrefjNpUTQMmUcvw5a7H2/NVdQ=; h=From:To:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: Cc:From; b=AtFLzOoP6aaGFEMZNW6OnsFnp5CTab3YOR82WNk2sTPhr+50gEzEdY2Dnu0iqTJE8 rSwPcFI7pqkgmyypV5anRBB2yBG3hZFhMi5KuD7P9hwG6akgNDnPrlY29m2o65duIU UUC8yw7BZCJOxHbzJgyUk52x1Uz6bO7XWQ/6S2Ss= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id E0725F80579; Mon, 30 Jan 2023 13:08:00 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 6215DF8056F; Mon, 30 Jan 2023 13:07:58 +0100 (CET) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id C6AB0F80567 for ; Mon, 30 Jan 2023 13:07:55 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz C6AB0F80567 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=1SzI5Jb4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080476; x=1706616476; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wy5L39BFMKrQQvzhCUrefjNpUTQMmUcvw5a7H2/NVdQ=; b=1SzI5Jb4Sd6lJ0sIBqeSAqgzg4aX7itbi5tzA02O4IpXvRWpIVTexOIj AKMsGedCLo8OJYKTDqSiLXDEswE74hWiacDbTUI/OYvVA4i1MtEZPCLpg ecoMXsZhMdt8qQ2ORnV68g1IixKLi7ZXaP78DAsd8DnHLBLyIkZfHOg+3 MebY3Q8pHEvuITaF9iXG9823PUW6ivpag1DMt3FF7YagQZE4SVk1NOwXK vq8IxUnk60e9NPEJCS/n0c4tu7BpJX1Q5P5DgTaCoZUY0aOY+Xw/qQAMh Nsu2dztNIysxk3458KmX4iw32CDPGkNLXCrtgYd4PWHKA8UpdXQhwBHCB Q==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="134605337" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:53 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:45 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:41 -0700 From: Claudiu Beznea To: , , , , , Subject: [PATCH 6/8] ASoC: mchp-spdifrx: remove struct mchp_spdifrx_dev::fmt member Date: Mon, 30 Jan 2023 14:06:45 +0200 Message-ID: <20230130120647.638049-7-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Remove member fmt of struct mchp_spdifrx_dev as it is not used anywhere. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 1 - 1 file changed, 1 deletion(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 90b2fb3a9844..46fff31321f3 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -235,7 +235,6 @@ struct mchp_spdifrx_dev { struct regmap *regmap; struct clk *pclk; struct clk *gclk; - unsigned int fmt; unsigned int trigger_enabled; unsigned int gclk_enabled:1; }; From patchwork Mon Jan 30 12:06:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 648646 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10D9FC54EED for ; Mon, 30 Jan 2023 12:10:31 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 09FE7E98; Mon, 30 Jan 2023 13:09:39 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 09FE7E98 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1675080629; bh=c3S3eY9RQtpuSlzP+O7igbYJtQsWXUsgyYbzOFDO/FQ=; h=From:To:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: Cc:From; b=qjjL/T3KyRfJO5qwTZyCW34Gi51PLc/3/yqeCs7exW2HAIgl/Dks976JrHcy+UHs8 Dl6TrYqX/Yuqx4l5kZYeUWrP1CT1fYdpmKEITr5AMX9LFtzcbYefdHNSFMk8cECgO9 hsNQCgaWaVoWtM5hF1W/8rDMkEzFRH0yrIYU1a3g= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 05C97F8055A; Mon, 30 Jan 2023 13:08:05 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id DF1E0F8057C; Mon, 30 Jan 2023 13:08:03 +0100 (CET) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 85712F8055A for ; Mon, 30 Jan 2023 13:07:56 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 85712F8055A Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=pgWodtS/ DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675080477; x=1706616477; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=c3S3eY9RQtpuSlzP+O7igbYJtQsWXUsgyYbzOFDO/FQ=; b=pgWodtS/GYcnQgkHXyLl4H1a0IkK3kh5yO1de8lKo5Pd7/ArIRhvVANy 53Z/qqfXtCZFa3m2qyvA/C6hv2uMFoDnS2a7plbZGSzIqoKZrjYPRIsEa NO1c4l7MEvWINGuZ2aNao2NmxjgkkKRpiRF+chZCuxr5/ArTOSXKNw2n+ Pzb3mqs1mzrBTGq5haJYxkm4Is0g0NP4sUULoPYo5o0bOFdZJNkhkwP8x V/fCSjLh652N8DGHnH/18Qi6oWDBFMDzgjstTIPoozgBgktiP0Gg7ucxn Ur0RvvZGSN2R+G/Z5N17Las9cGtu6lfbURuJInPWMlqXatsCH+XONzwuD w==; X-IronPort-AV: E=Sophos;i="5.97,257,1669100400"; d="scan'208";a="134605344" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Jan 2023 05:07:54 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 30 Jan 2023 05:07:48 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:45 -0700 From: Claudiu Beznea To: , , , , , Subject: [PATCH 7/8] ASoC: mchp-spdifrx: add runtime pm support Date: Mon, 30 Jan 2023 14:06:46 +0200 Message-ID: <20230130120647.638049-8-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add runtime PM support for Microchip SPDIFRX driver. On runtime suspend the clocks are disabled and regmap is set in caching mode. On runtime resume the clocks are enabled and regmap is synced with the device. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 210 ++++++++++++++++++++++++++------- 1 file changed, 166 insertions(+), 44 deletions(-) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 46fff31321f3..796d4ec2b2b1 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include @@ -192,6 +193,43 @@ static bool mchp_spdifrx_precious_reg(struct device *dev, unsigned int reg) } } +static bool mchp_spdifrx_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case SPDIFRX_IMR: + case SPDIFRX_ISR: + case SPDIFRX_RSR: + case SPDIFRX_CHSR(0, 0): + case SPDIFRX_CHSR(0, 1): + case SPDIFRX_CHSR(0, 2): + case SPDIFRX_CHSR(0, 3): + case SPDIFRX_CHSR(0, 4): + case SPDIFRX_CHSR(0, 5): + case SPDIFRX_CHUD(0, 0): + case SPDIFRX_CHUD(0, 1): + case SPDIFRX_CHUD(0, 2): + case SPDIFRX_CHUD(0, 3): + case SPDIFRX_CHUD(0, 4): + case SPDIFRX_CHUD(0, 5): + case SPDIFRX_CHSR(1, 0): + case SPDIFRX_CHSR(1, 1): + case SPDIFRX_CHSR(1, 2): + case SPDIFRX_CHSR(1, 3): + case SPDIFRX_CHSR(1, 4): + case SPDIFRX_CHSR(1, 5): + case SPDIFRX_CHUD(1, 0): + case SPDIFRX_CHUD(1, 1): + case SPDIFRX_CHUD(1, 2): + case SPDIFRX_CHUD(1, 3): + case SPDIFRX_CHUD(1, 4): + case SPDIFRX_CHUD(1, 5): + case SPDIFRX_VERSION: + return true; + default: + return false; + } +} + static const struct regmap_config mchp_spdifrx_regmap_config = { .reg_bits = 32, .reg_stride = 4, @@ -200,6 +238,8 @@ static const struct regmap_config mchp_spdifrx_regmap_config = { .readable_reg = mchp_spdifrx_readable_reg, .writeable_reg = mchp_spdifrx_writeable_reg, .precious_reg = mchp_spdifrx_precious_reg, + .volatile_reg = mchp_spdifrx_volatile_reg, + .cache_type = REGCACHE_FLAT, }; #define SPDIFRX_GCLK_RATIO_MIN (12 * 64) @@ -236,7 +276,6 @@ struct mchp_spdifrx_dev { struct clk *pclk; struct clk *gclk; unsigned int trigger_enabled; - unsigned int gclk_enabled:1; }; static void mchp_spdifrx_channel_status_read(struct mchp_spdifrx_dev *dev, @@ -405,16 +444,17 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, goto unlock; } - if (dev->gclk_enabled) { - clk_disable_unprepare(dev->gclk); - dev->gclk_enabled = 0; - } + /* GCLK is enabled by runtime PM. */ + clk_disable_unprepare(dev->gclk); + ret = clk_set_min_rate(dev->gclk, params_rate(params) * SPDIFRX_GCLK_RATIO_MIN + 1); if (ret) { dev_err(dev->dev, "unable to set gclk min rate: rate %u * ratio %u + 1\n", params_rate(params), SPDIFRX_GCLK_RATIO_MIN); + /* Restore runtime PM state. */ + clk_prepare_enable(dev->gclk); goto unlock; } ret = clk_prepare_enable(dev->gclk); @@ -422,7 +462,6 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, dev_err(dev->dev, "unable to enable gclk: %d\n", ret); goto unlock; } - dev->gclk_enabled = 1; dev_dbg(dev->dev, "GCLK range min set to %d\n", params_rate(params) * SPDIFRX_GCLK_RATIO_MIN + 1); @@ -435,24 +474,9 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, return ret; } -static int mchp_spdifrx_hw_free(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); - - mutex_lock(&dev->mlock); - if (dev->gclk_enabled) { - clk_disable_unprepare(dev->gclk); - dev->gclk_enabled = 0; - } - mutex_unlock(&dev->mlock); - return 0; -} - static const struct snd_soc_dai_ops mchp_spdifrx_dai_ops = { .trigger = mchp_spdifrx_trigger, .hw_params = mchp_spdifrx_hw_params, - .hw_free = mchp_spdifrx_hw_free, }; #define MCHP_SPDIF_RATES SNDRV_PCM_RATE_8000_192000 @@ -486,6 +510,10 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev *dev, mutex_lock(&dev->mlock); + ret = pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * We may reach this point with both clocks enabled but the receiver * still disabled. To void waiting for completion and return with @@ -512,7 +540,7 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev *dev, channel); regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_CSC(channel)); ret = ret ? : -ETIMEDOUT; - goto unlock; + goto pm_runtime_put; } else { ret = 0; } @@ -524,6 +552,9 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev *dev, memcpy(uvalue->value.iec958.status, ch_stat->data, sizeof(ch_stat->data)); +pm_runtime_put: + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); unlock: mutex_unlock(&dev->mlock); return ret; @@ -566,6 +597,10 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdifrx_dev *dev, mutex_lock(&dev->mlock); + ret = pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * We may reach this point with both clocks enabled but the receiver * still disabled. To void waiting for completion to just timeout we @@ -588,7 +623,7 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdifrx_dev *dev, channel); regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND); ret = ret ? : -ETIMEDOUT; - goto unlock; + goto pm_runtime_put; } else { ret = 0; } @@ -600,6 +635,9 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdifrx_dev *dev, memcpy(uvalue->value.iec958.subcode, user_data->data, sizeof(user_data->data)); +pm_runtime_put: + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); unlock: mutex_unlock(&dev->mlock); return ret; @@ -641,10 +679,15 @@ static int mchp_spdifrx_ulock_get(struct snd_kcontrol *kcontrol, struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); struct mchp_spdifrx_mixer_control *ctrl = &dev->control; u32 val; + int ret; bool ulock_old = ctrl->ulock; mutex_lock(&dev->mlock); + ret = pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * The RSR.ULOCK has wrong value if both pclk and gclk are enabled * and the receiver is disabled. Thus we take into account the @@ -659,6 +702,9 @@ static int mchp_spdifrx_ulock_get(struct snd_kcontrol *kcontrol, uvalue->value.integer.value[0] = ctrl->ulock; + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); +unlock: mutex_unlock(&dev->mlock); return ulock_old != ctrl->ulock; @@ -671,10 +717,15 @@ static int mchp_spdifrx_badf_get(struct snd_kcontrol *kcontrol, struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); struct mchp_spdifrx_mixer_control *ctrl = &dev->control; u32 val; + int ret; bool badf_old = ctrl->badf; mutex_lock(&dev->mlock); + ret = pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * The RSR.ULOCK has wrong value if both pclk and gclk are enabled * and the receiver is disabled. Thus we take into account the @@ -687,6 +738,9 @@ static int mchp_spdifrx_badf_get(struct snd_kcontrol *kcontrol, ctrl->badf = 0; } + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); +unlock: mutex_unlock(&dev->mlock); uvalue->value.integer.value[0] = ctrl->badf; @@ -706,16 +760,16 @@ static int mchp_spdifrx_signal_get(struct snd_kcontrol *kcontrol, mutex_lock(&dev->mlock); + ret = pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * To get the signal we need to have receiver enabled. This * could be enabled also from trigger() function thus we need to * take care of not disabling the receiver when it runs. */ if (!dev->trigger_enabled) { - ret = clk_prepare_enable(dev->gclk); - if (ret) - goto unlock; - regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, SPDIFRX_MR_RXEN_ENABLE); @@ -729,12 +783,13 @@ static int mchp_spdifrx_signal_get(struct snd_kcontrol *kcontrol, regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK, SPDIFRX_MR_RXEN_DISABLE); - - clk_disable_unprepare(dev->gclk); } else { regmap_read(dev->regmap, SPDIFRX_RSR, &val); } + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); + unlock: mutex_unlock(&dev->mlock); @@ -765,9 +820,14 @@ static int mchp_spdifrx_rate_get(struct snd_kcontrol *kcontrol, struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); unsigned long rate; u32 val; + int ret; mutex_lock(&dev->mlock); + ret = pm_runtime_resume_and_get(dev->dev); + if (ret < 0) + goto unlock; + /* * The RSR.ULOCK has wrong value if both pclk and gclk are enabled * and the receiver is disabled. Thus we take into account the @@ -778,21 +838,24 @@ static int mchp_spdifrx_rate_get(struct snd_kcontrol *kcontrol, /* If the receiver is not locked, ISF data is invalid. */ if (val & SPDIFRX_RSR_ULOCK || !(val & SPDIFRX_RSR_IFS_MASK)) { ucontrol->value.integer.value[0] = 0; - goto unlock; + goto pm_runtime_put; } } else { /* Reveicer is not locked, IFS data is invalid. */ ucontrol->value.integer.value[0] = 0; - goto unlock; + goto pm_runtime_put; } rate = clk_get_rate(dev->gclk); ucontrol->value.integer.value[0] = rate / (32 * SPDIFRX_RSR_IFS(val)); +pm_runtime_put: + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); unlock: mutex_unlock(&dev->mlock); - return 0; + return ret; } static struct snd_kcontrol_new mchp_spdifrx_ctrls[] = { @@ -882,14 +945,6 @@ static int mchp_spdifrx_dai_probe(struct snd_soc_dai *dai) struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai); struct mchp_spdifrx_mixer_control *ctrl = &dev->control; int ch; - int err; - - err = clk_prepare_enable(dev->pclk); - if (err) { - dev_err(dev->dev, - "failed to enable the peripheral clock: %d\n", err); - return err; - } snd_soc_dai_init_dma_data(dai, NULL, &dev->capture); @@ -922,8 +977,6 @@ static int mchp_spdifrx_dai_remove(struct snd_soc_dai *dai) /* Disable interrupts */ regmap_write(dev->regmap, SPDIFRX_IDR, GENMASK(14, 0)); - clk_disable_unprepare(dev->pclk); - return 0; } @@ -954,6 +1007,48 @@ static const struct of_device_id mchp_spdifrx_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, mchp_spdifrx_dt_ids); +static int mchp_spdifrx_runtime_suspend(struct device *dev) +{ + struct mchp_spdifrx_dev *spdifrx = dev_get_drvdata(dev); + + regcache_cache_only(spdifrx->regmap, true); + clk_disable_unprepare(spdifrx->gclk); + clk_disable_unprepare(spdifrx->pclk); + + return 0; +} + +static int mchp_spdifrx_runtime_resume(struct device *dev) +{ + struct mchp_spdifrx_dev *spdifrx = dev_get_drvdata(dev); + int ret; + + ret = clk_prepare_enable(spdifrx->pclk); + if (ret) + return ret; + + ret = clk_prepare_enable(spdifrx->gclk); + if (ret) + goto disable_pclk; + + regcache_cache_only(spdifrx->regmap, false); + regcache_mark_dirty(spdifrx->regmap); + ret = regcache_sync(spdifrx->regmap); + if (ret) { + regcache_cache_only(spdifrx->regmap, true); + clk_disable_unprepare(spdifrx->gclk); +disable_pclk: + clk_disable_unprepare(spdifrx->pclk); + } + + return ret; +} + +static const struct dev_pm_ops mchp_spdifrx_pm_ops = { + RUNTIME_PM_OPS(mchp_spdifrx_runtime_suspend, mchp_spdifrx_runtime_resume, + NULL) +}; + static int mchp_spdifrx_probe(struct platform_device *pdev) { struct mchp_spdifrx_dev *dev; @@ -1022,13 +1117,20 @@ static int mchp_spdifrx_probe(struct platform_device *pdev) dev->regmap = regmap; platform_set_drvdata(pdev, dev); + pm_runtime_enable(dev->dev); + if (!pm_runtime_enabled(dev->dev)) { + err = mchp_spdifrx_runtime_resume(dev->dev); + if (err) + goto pm_runtime_disable; + } + dev->capture.addr = (dma_addr_t)mem->start + SPDIFRX_RHR; dev->capture.maxburst = 1; err = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); if (err) { dev_err(&pdev->dev, "failed to register PCM: %d\n", err); - return err; + goto pm_runtime_suspend; } err = devm_snd_soc_register_component(&pdev->dev, @@ -1036,20 +1138,40 @@ static int mchp_spdifrx_probe(struct platform_device *pdev) &mchp_spdifrx_dai, 1); if (err) { dev_err(&pdev->dev, "fail to register dai\n"); - return err; + goto pm_runtime_suspend; } regmap_read(regmap, SPDIFRX_VERSION, &vers); dev_info(&pdev->dev, "hw version: %#lx\n", vers & SPDIFRX_VERSION_MASK); return 0; + +pm_runtime_suspend: + if (!pm_runtime_status_suspended(dev->dev)) + mchp_spdifrx_runtime_suspend(dev->dev); +pm_runtime_disable: + pm_runtime_disable(dev->dev); + return err; +} + +static int mchp_spdifrx_remove(struct platform_device *pdev) +{ + struct mchp_spdifrx_dev *dev = platform_get_drvdata(pdev); + + pm_runtime_disable(dev->dev); + if (!pm_runtime_status_suspended(dev->dev)) + mchp_spdifrx_runtime_suspend(dev->dev); + + return 0; } static struct platform_driver mchp_spdifrx_driver = { .probe = mchp_spdifrx_probe, + .remove = mchp_spdifrx_remove, .driver = { .name = "mchp_spdifrx", .of_match_table = of_match_ptr(mchp_spdifrx_dt_ids), + .pm = pm_ptr(&mchp_spdifrx_pm_ops), }, }; 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Mon, 30 Jan 2023 05:07:52 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 30 Jan 2023 05:07:48 -0700 From: Claudiu Beznea To: , , , , , Subject: [PATCH 8/8] ASoC: mchp-spdifrx: document data structures Date: Mon, 30 Jan 2023 14:06:47 +0200 Message-ID: <20230130120647.638049-9-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230130120647.638049-1-claudiu.beznea@microchip.com> References: <20230130120647.638049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Document data structures used by mchp-spdifrx driver. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdifrx.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/sound/soc/atmel/mchp-spdifrx.c b/sound/soc/atmel/mchp-spdifrx.c index 796d4ec2b2b1..dab5d93de329 100644 --- a/sound/soc/atmel/mchp-spdifrx.c +++ b/sound/soc/atmel/mchp-spdifrx.c @@ -249,16 +249,34 @@ static const struct regmap_config mchp_spdifrx_regmap_config = { #define SPDIFRX_CHANNELS 2 +/** + * struct mchp_spdifrx_ch_stat: MCHP SPDIFRX channel status + * @data: channel status bits + * @done: completion to signal channel status bits acquisition done + */ struct mchp_spdifrx_ch_stat { unsigned char data[SPDIFRX_CS_BITS / 8]; struct completion done; }; +/** + * struct mchp_spdifrx_user_data: MCHP SPDIFRX user data + * @data: user data bits + * @done: completion to signal user data bits acquisition done + */ struct mchp_spdifrx_user_data { unsigned char data[SPDIFRX_UD_BITS / 8]; struct completion done; }; +/** + * struct mchp_spdifrx_mixer_control: MCHP SPDIFRX mixer control data structure + * @ch_stat: array of channel statuses + * @user_data: array of user data + * @ulock: ulock bit status + * @badf: badf bit status + * @signal: signal bit status + */ struct mchp_spdifrx_mixer_control { struct mchp_spdifrx_ch_stat ch_stat[SPDIFRX_CHANNELS]; struct mchp_spdifrx_user_data user_data[SPDIFRX_CHANNELS]; @@ -267,6 +285,17 @@ struct mchp_spdifrx_mixer_control { bool signal; }; +/** + * struct mchp_spdifrx_dev: MCHP SPDIFRX device data structure + * @capture: DAI DMA configuration data + * @control: mixer controls + * @mlock: mutex to protect concurency b/w configuration and control APIs + * @dev: struct device + * @regmap: regmap for this device + * @pclk: peripheral clock + * @gclk: generic clock + * @trigger_enabled: true if enabled though trigger() ops + */ struct mchp_spdifrx_dev { struct snd_dmaengine_dai_dma_data capture; struct mchp_spdifrx_mixer_control control;